An Adaptive Biasing Technique to Convert a

Pseudo-Class AB Amplifier to Class AB

M. Wasequr Rashid, Annajirao Garimella and Paul M. Furth

Abstract: An essential modification to a conventional four-stage pseudo-class AB

amplifier results in a true class AB amplifier. As opposed to the conventional pseudo-

class AB scheme, which uses a current mirror in the third stage, our work uses an

adaptive biasing circuit in the third stage in order to drastically reduce quiescent current.

The pseudo-class AB and new class AB amplifiers are designed in a 0.5µm process with

power supplies of ±1.5V for a phase margin of 67o while driving a load of 32Ω || 500pF.

At a maximum negative load current of −12.5mA, simulations show that both amplifiers

consume 43.9 µA of quiescent current. However, at a maximum positive load current of

+12.5mA, the pseudo-class AB consumes 1.22mA of quiescent current, while the new

class AB amplifier consumes only 140µA, a reduction in quiescent current by more than

a factor of eight at maximum positive load.

Indexing terms: Analogue circuits, Adaptive biasing, multistage amplifiers, class AB

amplifier, pseudo-class AB amplifier, pole tracking.

Introduction: As battery-powered circuits become ubiquitous, the demand for highly

current-efficient amplifiers and drivers is increasing in order to reduce the size and/or
increase the lifetime of the battery [1]. However, as the dimensions of transistors become

smaller, the inherent gain of each transistor stage is reducing. In order to achieve high

gain, multistage amplifiers are required. High current efficiency is generally achieved by

employing a class AB push-pull output stages. As a result, multistage class AB

amplifiers are among of the most widely used circuits in battery-powered applications.

A low-voltage [2] four-stage pseudo-class AB four-stage amplifier has been widely

reported in the literature [3]–[5]. Its schematic is given in Fig. 1(a). This pseudo-class

AB amplifier requires a large amount of bias current whenever the output load current is

large and positive due to the current mirror formed by transistors M13–M15 between the

third and forth stages. On the other hand, when driving a large and negative output load

current, the bias current remains low. The designation pseudo-class AB results from the

fact that the maximum positive output current is proportional to the bias current of the

third stage.

To overcome the problem of a large bias current in the third stage, we are proposing an

adaptive biasing circuit in the third stage, as shown in Fig. 1(b). This essential change

converts the output stage to true class AB, such that the maximum output current is much

larger than the bias current [6]. This adaptive biasing circuit also known as pole-tracking,

finds use in low dropout voltage regulator applications [7]–[9].

.
Improved Class AB Topology: Referring to Fig. 1(b), the input stage is implemented

using a folded-cascode amplifier with transistors M1–M9. Transistors M10–M12 realize a

common-source gain stage. The third stage M13–M14 also realizes a common-source gain
stage with the proposed adaptive load. The fourth stage is the push-pull output stage,

formed by M15–M16.

The third stage bias current adapts so as to boost the output load current when a large

positive input signal is applied, yielding a maximum positive load current much larger

than the quiescent current. The adaptive load of stage 3 consists of a diode-connected

transistor M13 and resistors Rad1 and Rad2. At very low output currents, transistor M13 is in

cutoff and the stage 3 load is simply Rad2. The presence of parallel resistor Rad2 helps

move the non-dominant pole at the gate of M15 to higher frequencies and improves the

overall phase margin of the amplifier [8].

At higher output currents, M13 goes into saturation and the third stage load resistance

becomes (1/gm13+Rad1) || Rad2. The presence of Rad1 in the source of M13 forms an inverse-

Wildar current mirror between M13 and M15 [10]. Depending on the choice of resistor

values, the output resistance of third stage of the proposed class AB amplifier can be

much higher than that of the conventional pseudo-class AB amplifier, which is 1/gm13. As

a result, the overall gain of the proposed class AB amplifier can be proportionately

higher, as well.

Simulation Results: The circuits in Fig. 1 were simulated in 0.5µm 2P3M CMOS ON

Semi process with HSPICE using device dimensions given in Table I. The push-pull

output stage has dimensions that are 6x to 12x than that of the first three stages, so as to

be able to sink and source large load currents. Compensation networks were designed for
each amplifier such that a phase margin of 67o was achieved in both cases. The true

class-AB amplifier required an additional Miller capacitor with nulling resistor (Rm1 and

Cm1 in Fig. 1(b)) so as to achieve the desired phase margin.

The amplifiers were configured as inverting amplifiers with a gain of negative four,

driving a load of 32Ω || 500pF. Fig. 2 shows transient simulation results of both the

pseudo-class AB and class AB amplifiers where the input is a square wave of ±100mV

with rise and fall times of 10ns. At a maximum negative load current, ILMAX−, of

−12.5mA, both amplifiers consume 44µA of quiescent current. However, at a maximum

positive load current, ILMAX+, of +12.5mA, the pseudo-class AB consumes 1.22mA of bias

current. On the other hand, the true class AB amplifier consumes only 140µA for the

same output load current.

A summary of bias currents at different load currents is summarized in Table II. The

current boosting factor (CBF), defined as ILMAX / IQ in [1], is 89 for the proposed

amplifier, compared to a value of 10.2 for the conventional pseudo-class AB amplifier,

for a positive load current of 12.5mA.

A performance comparison of the two amplifiers is given in Table III. The major

difference between the two amplifiers is the gain, which improves from 53.7 dB for the

pseudo-class AB amplifier to 71.9 dB for the class AB amplifier. As described earlier,

this increase is due to the higher load resistance of stage 3.

Conclusions: A simple but effective scheme for converting a pseudo-class AB amplifier

to a true class AB amplifier is introduced. The adaptive biasing circuit results in a low-

voltage, low-bias current amplifier. Simulation results illustrate the improved operation

of the proposed class AB amplifier.

References:

[1] LOPEZ-MARTIN, A.J., BASWA, S., RAMIREZ-ANGULO, J., and

CARVAJAL, R.G., "Low-Voltage Super class AB CMOS OTA cells with very

high slew rate and power efficiency", IEEE Journal of Solid-State Circuits, vol.

40, no. 5, pp. 1068-1077, May 2005.

[2] ESCHAUZIER, R.G.H., HOGERVORST, R., and HUIJSING, J.H., "A

programmable 1.5 V CMOS class-AB operational amplifier with hybrid nested

Miller compensation for 120 dB gain and 6 MHz UGF", IEEE Journal of Solid-

State Circuits, vol. 29, no. 12, pp.1497-1504, Dec. 1994.

[3] GRASSO, A. D., PALUMBO, G., and PENNISI, S., "Advances in reverse nested

Miller compensation", IEEE Trans. Circuits Syst. I, vol. 54, no. 7, pp. 1459-1470,

Jul. 2007.

[4] MITA, R., PALUMBO, G., and PENNISI, S., "Design guidelines for reversed

nested Miller compensation in three-stage amplifiers", IEEE Trans. on Circuits

and Systems II: Analog and Digital Signal Processing , vol. 50, no. 5, pp. 227-

233, May 2003.

[5] ZHU, F., YAN, S., HU, J., and SANCHEZ-SINENCIO, E., "Feedforward

reversed nested Miller compensation techniques for three-stage amplifiers", in

Proc. IEEE International Symposium on Circuits and Systems’05, vol. 3, pp.

2575–2578, May 2005.

[6] SEDRA, A.S., and SMITH, K.C, "Microelectronic Circuit, 6th Edition", Oxford

University Press, New York, 2009.

[7] WONG, K., and EVANS, D., "A 150mA low noise, high PSRR low-dropout

linear regulator in 0.13µm technology for RF SoC applications", in Proc.

European Solid-State Circuits Conference’06, pp. 532-535, Sep. 2006.

[8] LIN, Y. –H., ZHENG, K. –L., and CHEN, K. –H., "Smooth pole tracking

technique by power MOSFET array in low-dropout regulators", IEEE Trans.

Power Electronics, vol. 23, no. 5, pp. 2421-2427, Sep. 2008.

[9] GARIMELLA, A., RASHID, M. W., and FURTH, P. M., "Reverse Nested

Miller Compensation Using Current Buffers in a Three-Stage LDO", IEEE Trans.

on Circuits and Systems II: Express Briefs, vol. 57, no. 4, pp. 250-254, Apr. 2010.

[10] WIDLAR, R., "Some Circuit Design Techniques for Linear Integrated Circuits",

IEEE Transactions on Circuit Theory, vol. 12, no. 4, pp. 586-590, Dec. 1965.
Authors’ affiliations:

M. Wasequr Rashid, Annajirao Garimella and Paul M. Furth

Klipsch School of Electrical and Computer Engineering,

New Mexico State University

Las Cruces, NM 88003-8001 USA

Email: wasequr@nmsu.edu, annaji@nmsu.edu, pfurth@nmsu.edu

Corresponding Author:

M. Wasequr Rashid

Klipsch School of Electrical and Computer Engineering,

New Mexico State University

Las Cruces, NM 88003-8001 USA

Email: wasequr@nmsu.edu
Figure and Table captions:

Figure captions:

Fig. 1. Schematic of the four-stage amplifier (a) conventional pseudo-class AB (b) true
class-AB using adaptive biasing technique.

Fig. 2. Simulation results (a) Input waveform with rise and fall time of 10ns (b) Output
waveforms with gain= – 4 (c) Load Current while driving 32Ω || 500pF Quiescent currents
(d)VDD supply current (e) VSS supply current.
Solid Line for class AB
Dotted Line for pseudo-class AB

Table captions:

Table I. Device dimensions.

Table II. Comparison of bias currents of pseudo-class AB and class AB amplifier using
adaptive biasing technique.

Table III. Performance comparison of pseudo-class AB and class AB amplifier with

adaptive biasing technique
Figure 1:

(a)

(b)
Figure 2:
100
V (mV) (a)
0
IN

_100

0 2 4 6 8 10
(b)
400
0
(mV)

_ 400
OUT

400
V

0
_ 400
0 2 4 6 8 10
12.5m I LMAX_= _ 12.5mA
(c)
0 I LMAX+=12.5mA
_12.5m
(A)
LOAD

12.5m I LMAX_= _ 12.5mA

I

0 I LMAX+=12.5mA
_12.5m

0 2 4 6 8 10

13.7m (d)
I Q@I LMAX _= 44µ A
I(VDD) (A)

44µ
12.5m
I Q@I LMAX_= 44µ A

44µ
0 2 4 6 8 10
_1.22m
(e)
= _1.22mA
I(VSS) (A)

I @I
Table I:

Transistor Value
M1, M2, M8, M9 2(30/1.2)
M3, M14 30/1.2
M12 4(30/1.2)
M4, M5, M6, M7,
2(30/1.2)
M10, M11, M13
M15, M16 24(30/1.2)
Rad1, Rad2 70kΩ, 170kΩ
Rm1, Rm3 20kΩ, 18kΩ
Cm1, Cm2, 1pF, 0.6pF,
Cm3, Ccb 0.3pF, 0.2pF
Table II:

Pseudo-
Class AB
Class AB
IQ @ ILOAD = +12.5mA 1.22 mA 140 µA
IQ @ ILOAD =0 119 µA 119 µA
IQ @ ILOAD = −12.5mA 44 µA 44 µA
CBF @ ILOAD = +12.5mA 10.2 89
Table III:

Pseudo-Class
Class AB
AB
Process 0.5µm 0.5µm
Load 32Ω || 500pF 32Ω || 500pF
Supply Voltage ±1.5 ±1.5
Gain 53.7dB 71.9dB
Unity Gain
1.16MHz 1.17MHz
Frequency
Phase Margin 67º 67º
Gain Margin 19dB 17.5dB
Slew Rate+ 1.22 V/µs 1.17 V/µ
µs
Slew Rate− 1.45 V/µs 1.61 V/µ
µs