1. List there broad classifications of external or peripheral devices? a.

Human Readable, the devices associated with humans as users of computers. Example: monitor, keyboard, mouse, printer, diskdrive. b. Machine Readable, the device associated with the equipment. Usually in the form of sensors and transducer modules for monitoring and control of an equipment or system c. Commucation , the devices associated with remote communication. Example: NIC and modem.

2. What is the international reference alphabet? The International Reference Alphabet No. 5 (formerly International Alphabet No.5, or "IA5") is an international standard specified in ITU-T Recommendation T.50 for information interchange among data processing systems and data communications systems. Each IRA character is a 7-bit coded unique character. The letters available in this character set are restricted to the Latin uppercase A-Z and lowercase a-z letters. In addition to printing characters, IRA also defines codes for control characters such as linefeed and non-printing character such as space and delete, which are the same as ANSI X3.4-1986: ASCII (American Standard Code for Information Interchange). The ASCII and ISO 646 are equivalent to the International Reference Alphabet No. 5. The advantage of IRA encoding is its (almost) universal acceptance and implementation.

3. What are the major functions of an I/O module? Module I / O is an entity inside a computer that is responsible for controlling an external device or more and to exchange data between those devices with the main memory or CPU registers. The main function I / O module are divided into several categories, namely: a. Control and timing In a period of time, the CPU will communicate with one or more devices with a pattern that is not menetu, depending on the needs of the program I / O.Sumber internal resources, such as main memory and system bus must be shared by a number of activities including I / O data. Thus, to mengkoordinasikann traffic

flow between internal resources and external devices. Therefore, the function I / O should include requirements for control and timing. For example, dick transfer data from an external device to the CPU. b. Communication CPU I / O module must also have the ability to carry out communication with the CPU and external devices. Communications CPU cover: Command Decoding : I / O module receives commands from the CPU, these commands are sent as signals for bus control. Data: Exchange of data between the CPU with I / O module will be via the data bus. Status reporting: because the peripherals are very slow then the status of I / O module must be known, to check if the module is ready to send data to the CPU or not, because the module is still run command I / O to another.. Address Recognition : I / O module must know the unique address all the peripherals they control. . c. Communication devices I / O module must be capable of forming a communication device (communication device). This communication includes the command, status information and data d. Data buffering I / O module must be able to operate with speed and memory, to set the speed of data transfer. Speed data transfer to main memory and from main memory or CPU is quite high, while the speed to slow peripheral devices. The data comes from main memory is sent to I / O module with a burst very quickly. Data on bufferkan and then sent to peripherals with a speed not as fast as before. . e. Error Detection. Error detection is the responsibility of I / O module of the most recent, errors often occur because the bit pattern changes abruptly when sent from the device to the module I / O. Some error detecting codes are often used to detect transmission errors. A common example is the use of parity bit data characters. When the bit is received, the module I / O will check parity for checking whether an error has occurred or not.

4. List and briefly define three techniques for performing I/O ? Three techniques in I / O operations : Programmed, on this technique data is exchanged between the CPU and I / O module CPU executes the program given I / O to the CPU directly, such as data transfer, read or write command delivery and monitoring devices Interrupt Driven I/O Interrupt-driven Engineering I / O allows a process that does not waste time. The process is CPU issued an order I / O on I / O module, the same command I / O run I / O module, the CPU will execute the commands sharing. If the module I / O has finished running the instructions given to him then I / O module will interrupt the CPU that the task is completed. Direct Memory Access (DMA) The working principle is the CPU DMA will delegate the work I / O to DMA, the CPU will only be involved at the beginning of the process to provide complete instruction on the DMA and the end of the process just.

5. What is the difference between memory mapped I/O and isolated I/O? I / O Memory Mapped, memory does not use IN and OUT instructions to transmit data.I/O is using an intruction that sends data between the micropcessor and memory. Device I/O with memory mapping to be treated like a memory location in the memory map. The main shortcomings of the technique using a memory.

I / O isolation is the most common transfer technique, which any I / O in the system isolated from the memory. The address of the device I / O is isolated in the call I / O ports, separated from the memory.

6. When device interrupt occurs, how does the processor determine which device issued the interupt? if on one device interrupt has occurred, the processor will identify the cause of the interruption, the processor will check one by one I / O devices to determine which device is sending an interrupt, then the processor will interrupt routine execute it.

7. When DMA module takes control of a bus, and while it retains control of the bus. What does the processor do? DMA will control the system bus and transfer all the data block tau Kea in a single burst of memory, data transfer method is called Burts DMA Mode. 8. Briefly explain the following representation : sign magnitude, twos complement, biased ?

9. Explain how to determine if a number is negative in the following representations : sign-magnitude, twos complement, biased?

10. What is the sign-exdtension rule for twos complement numbers? In two's-complement, there is only one zero (00000000). In two's-complement, there is only one zero (00 million). Negating a number (whether negative or positive) is done by inverting all the bits and then adding 1 to that result. Negating a number (whether negative or positive) is done by inverting all the bits and then adding 1 to That result. Addition of a pair of two's-complement integers is the same as addition of a pair of unsigned numbers (except for detection of overflow, if that is done). Addition of a pair of two's-complement integers is the same as Addition of a pair of unsigned numbers (except for detection of overflow, if That Is done).

11. How can you form the negation of an integer in twos complements representation?

12. In general terms, when does the twos complement operation on an n-bit integher produce the same integer?

13. What is the difference between the twos complement representation of a number and the twos complement of a number?

14. If we treat 2 twos complement numbers as unsigned integers for purposes of addition the result is correct if interpreted as a twos complement number. This is not true for multiplication. Why?

15. What are the four essential elements of a number in floating point notation? 16. What is the benefit of using biased representation for the exponent portion of a floating point number? 17. 18. 19. 20. 21. 22. 23. 24. 25. 26. 27. 28. 29. 30. 31. 32. 33. 34. 35. 36.

37. 38. Briefly define direct addressing ? Directly addressing technique is done by giving a little market value of the register. To implement a direct addressing technique is used the sign '#'.

39. Briefly define register addressing ? Techniques addressing these registers, refer to the register address field, not in main memory and each field that reference the register has a length of 3 or 4 bits, so it can reference the 8 or 16 general purpose registers

40. Briefly define register indirect addressing ? indirect addressing technique points to a register containing the memory address location to be used in the operation. The actual location depends on the contents of the register when the instruction is executed. To perform indirect addressing used the symbol '@'.

. 41. Briefly define register indirect addressing ? Register indirect addressing nearly equal to the indirect addressing, the difference is in addressing indirect register address field refers to the address register 42. 43. Briefly define relative addressing ? Addressing this, there is the instruction SJMP (sort jump). Because of the relative jump step (from the original), only 8 bits (256 steps), then jump forward SJMP can only move so far +127 (memory locations) or -128 backward step. So keep in mind their relative distance, not to be out of range .