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Freescale Semiconductor, Inc.

AN2342/D
Rev. 0, 9/2002

Opto Isolation Circuits For In


Circuit Debugging of
68HC9(S)12 and 68HC908
Microcontrollers

by John Logan
Systems Engineering
Freescale Semiconductor, Inc...

Freescale, East Kilbride

Introduction

Motorola’s HC08 and HC12 MCUs are widely used in ac line powered
applications. In some cases, the MCU uses a non-isolated power supply.
Performing in-circuit debugging on ac line powered systems can be tricky and
sometimes dangerous due to differing ground connections, floating power
supplies, etc. For example, Figure 1 . Microcontroller Circuit with Low Cost
Power Supply shows an MCU controlling an ac motor. The MCU is powered
from a low cost charge pump power supply that is connected directly to the ac
line voltage. In relation to earth, the MCU Vdd and Vss pins can reach hundreds
of volts. This type of power supply is common in white and brown goods
applications, examples of which include vacuum cleaners, fridges, washing
machines, light dimmers, etc. If a debugging tool was connected directly to the
MCU in this circuit, two possibilities could occur depending on the construction
of the tool’s power supply.

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©M

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Line F1 5V

FUSE

Q1
TRIAC
D1
5.6V C1

R1 C2 D2 M1
MOTOR AC

MCU Vdd
tracks the
line
voltage
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U1

1 16
2 Vss VDD 15
0V 3 PTA1 PTA4 14 R2
4 PTA0 PTA3 13
5 IRQ PTA2 12
6 PTB0 PTB4 11
7 PTB1 PTB5 10
8 PTB2 PTB6 09
PTB3 PTB7

MC68HC908KX8

Neutral

Figure 1. Microcontroller Circuit with Low Cost Power Supply

If the power supply is isolated from earth, as shown in Figure 2 . Debugger


with isolated power supply, it will rise to ac line potential in relation to earth.
This will raise the potential of the debugging tool to ac line voltage - potentially
lethal for the end user. Alternatively, the development tool’s power supply
output could be referenced to earth as shown in Figure 3 . Debugger with
power supply referenced to earth and connecting the tool to the application
would result in a blown fuse or damage to either the application or the
development tool.

For simple applications, engineers have developed non-isolated ac line


powered designs by programming windowed EPROMs or flash based MCUs
and debugging by trial and error. Basically the engineer had to remove the mcu
from the application, erase then reprogram the mcu and put it back into the
application. However, by using the powerful in-circuit debugging modes of
Motorola’s 68HC9(S)12 and 68HC908 microcontrollers in combination with an
optoisolated interface, designers can safely develop these applications more
efficiently without the risk of damaging their development tools.

This application note shows some circuits that can used to optically isolate
input, output and bi-directional digital pins. Debug interfaces for the
Background Debug Mode of the 68HC(S)12 and monitor mode on the 68HC08
are also shown.

Opto Isolation Circuits For In Circuit Debugging


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Input and Output Pins

Target
Dev tool floating - risk
of electrocution to
user!!!
Line F2

FUSE D5 U2 MCU
MC7805ACK
T1 1 2
IN OUT Vdd
JP1
- +
Dev

GND
1 2 D1
3 4
Tool 5 6
C1

Neutral Debug Connection D2 C2 R1

3
0V Vss

0V

Earth

0V line can reach


hundreds of volts
relative to earth
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Figure 2. Debugger with isolated power supply

Target

Line

FUSE U2 MCU
MC7805ACK
T1 1 2
IN OUT Vdd
JP1
- +
Dev
GND

1 2 D1
3 4
Tool 5 6
C1

Neutral Debug Connection D2 C2 R1


3

Vss

Earth

This will put


full mains
voltage across
MCU!!

Figure 3. Debugger with power supply referenced to earth

Input and Output Pins

The optoisolation circuit shown in Figure 4 . Opto Isolation of a


unidirectional pin shows a standard circuit that can be used to isolate a
unidirectional digital I/O pin.

Opto Isolation Circuits For In Circuit Debugging


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Input Output

5V L 5V R

R3
ISO1
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2 8 2K
U2A
J2 U1A 7 J1
R2 6 1 2
1 2 3 1
1 C1
5
74HCT04 OUTPUT
INPUT 74HCT04 330R 6N137
0.1uF

R1
10K

Figure 4. Opto Isolation of a unidirectional pin

The circuit works as follows: -


• If the input is at logic ‘1’, the output of inverter U1 is low and the LED in
ISO1 is lit. This is detected by the photodiode and the optoisolated
transistor is switched ON pulling the input of inverter U2 low. The output
is then at logic ‘1’
• If the input is at logic ‘0’, the output of inverter U1 is high and the LED in
ISO1 is not lit. The transistor is switched OFF, so the input to inverter U2
is pulled high. The output is then at logic ‘0’.
• If the input is not driven, for example, if it is connected to a tristated I/O
pin, the input value is set to logic ‘0’ by Rx, thus the output is also logic
‘0’.

In some cases the 2 inverters can be removed provided that the system
connected to the input pin can sink at least 15mA current from the LED in ISO1,
and the system connected to the output has high input impedance.

Opto Isolation Circuits For In Circuit Debugging


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Open Drain and Bidirectional Pins

Open Drain and Bidirectional Pins

Figure 5 . Opto Isolation of a BiDirectional Pin shows a circuit that allows


opto-isolated bidirectional communications on a bi-directional digital pin. It uses
2 x 6N137 optoisolators, 2 PNP transistors and some passives.

Vdd_Host Vdd_Target
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R1
R2
50K
330
ISO1 C1

0.1uF
R3
2K

6N137
J1
Q1
1 BC307

HOST_IN_OUT

R4 R5
50K 330

0.1uF
C2 ISO2

R6
2K

6N137

Q2
BC307 J2

TARGET_IN_OUT

Figure 5. Opto Isolation of a BiDirectional Pin

Opto Isolation Circuits For In Circuit Debugging


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The circuit works as follows: -


• When HOST_IN_OUT is at logic ‘0’, transistor Q1 is ON and the LED in
ISO1 is lit. This is received by the photo detector and switches on the
transistor in ISO1. This causes TARGET_IN_OUT to be pulled to ground
by resistor R6 and also ensures that the LED in ISO2 is OFF. This
means the transistor in ISO2 is also OFF.
• When HOST_IN_OUT is at logic ‘1’, transistor Q1 is OFF, The output
transistor in ISO1 is OFF. TARGET_IN_OUT is pulled high by resistors
R1 and R6. The LED in ISO2 is OFF. Thus there is no feedback to
HOST_IN_OUT.
• If HOST_IN_OUT is not driven, for example if it is connected to a
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tristated I/O pin, it is pulled high by R2 and R3. From the description
above, it can be seen that the output will then be high also.
• If both HOST_IN_OUT and TARGET_IN_OUT are not driven, the both
pins will be pulled high

The circuit is bi-directional. However, the user should not drive both terminals
at the same time. This will not cause any damage to the circuit, but it will
increase the current consumption

If the circuit is used to optoisolate an open drain I/O pin, no additional pull-up
resistors should be required.

Using the 2 circuits for unidirectional and bi-directional pins described above, it
is possible to optically isolate the Background Debug Mode on the 68HC(S)912
mcu family and monitor mode on the 68HC908 family.

Opto Isolation Circuits For In Circuit Debugging


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Design Considerations When Using Optoisolation

Design Considerations When Using Optoisolation

The designer should consider the following when adding optoisolators to a


design for debugging purposes

Power Consumption A 6N137 optoisolator requires approximately 15mA current to drive its LED.
This extra power requirement needs to be considered when choosing voltage
regulators or other power supply components. For the bidirectional circuit
shown in Figure 5 . Opto Isolation of a BiDirectional Pin, under normal
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operation condition, only 1 optoisolator will be active at any given time, so for
this circuit, the designer need only allocate extra current for 1 optocoupler.

Opto Coupler Speed There are a wide variety of opto couplers available with differing maximum
frequencies. The 6N137 optocouplers used in this application note were rated
to 10Mbits/s and gave excellent performance when used to isolate the
Background Debug Module on the 68HC(S)12 and monitor mode on the
68HC08 (the bit rate of the background debug module is less than 2 Mbits/s
and less than 56kbits/s for monitor mode).

Opto Isolation Circuits For In Circuit Debugging


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Background Debug Connection For 68HC(S)12

Freescale HC12 and HCS12 MCUs provide on chip debugging via the
Background Debug Module (BDM). Full details of the Background Debug
Module are available in the BDM chapter of each HC(S)12 datasheet.

There are many development tools available that can interface to the BDM
module. Most take the form of a small debug cable that connects to a PC
through a serial or parallel port. There is usually a 3-wire connection between
the debug cable and the BDM module - BKGND, RESET and GND.
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• BKGND is a bidirectional pin that allows communications between the


HC12 and a debugger.
• RESET is also a bidirectional pin. The debugger can pull reset low to
reset the chip. The MCU may reset itself due to an internal operation, for
example, a watchdog reset. This needs to be signalled back to the
debugger
• GND is the ground connection.

Most debug cables use the Freescale-recommended 6 pin connection shown in


Figure 7 . Freescale Recommended Background Debug Connector.
Figure 8 . Optical Isolation Circuit for Background Debug Mode shows a
circuit that provides optoisolation for the debugging cable using 2 bidirectional
circuits as shown in Figure 5 . Opto Isolation of a BiDirectional Pin.

Figure 6. Serial Debug Cable

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Background Debug Connection For 68HC(S)12

BKGND 1 2 GND

NC 3 4 RESET

NC 5 6 VDD

Figure 7. Freescale Recommended Background Debug Connector


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5V Vdd Vdd

Debug cable V dd _Ho st

R1
Vd d _ T a r g e t

Vdd
R2
50K
3 30
I SO 1 C1

0 . 1 uF
R3
2K

6N1 3 7
J 1
Q 1
1 B C3 0 7

HO S T _ I N_ O UT

R4 R5
5 0K 33 0

0. 1uF
C2 I SO 2

R6
2K

6 N1 3 7

BKGND
Q 2
BC3 0 7 J 2

T A R G E T_ I N _ O U T

RESET

68HC12

Vss
5V Vdd

BKGND 1 2 GND V dd _Ho st Vd d _ T a r g e t

R1
R2
50K
3 30
I SO 1 C1

0 . 1 uF
R3
2K

6N1 3 7

NC 3 4 RESET J 1

HO S T _ I N_ O UT
Q 1
B C3 0 7

NC 5 6 VDD
5V R4
5 0K

0. 1uF
C2 I SO 2
R5
33 0

R6
2K

6 N1 3 7

Q 2
BC3 0 7 J 2

T A R G E T_ I N _ O U T

Figure 8. Optical Isolation Circuit for Background Debug Mode

Opto Isolation Circuits For In Circuit Debugging


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MODA and MODB The engineer can choose to select the operating mode of the 68HC(S)12 when
Pin Control the mcu resets by setting or clearing the MODA and MODB pins on the mcu.
Mostly, these pins are hardwired in the application to select a particular mode
of operation. However, some debuggers can connect to these pins and provide
dynamic control over the operating modes. These pins can be easily
optisolated using the circuit shown in Figure 4 . Opto Isolation of a
unidirectional pin.

Monitor Mode Connections For 68HC08


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Figure 9 . HC08 Monitor Mode Connection shows the connections required


to access monitor mode on the 68HC908AZ60A and a minimal debugging
circuit. For other HC08 mcus the connections may vary, please refer to the
monitor ROM chapter in the device datasheet for the exact connection.
However, all HC08s require the following minimum connections: -
• PTA0 – a bi-directional data pin used to communicate between the mcu
and debugging hardware
• RESET – a bi-directional pin used by the debugger to reset the mcu. It
can also be used by the debugger to detect mcu-generated resets (eg,
watchdog timeouts). In Figure 9 . HC08 Monitor Mode Connection
reset is controlled by a switch that the user can toggle to reset the device

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Monitor Mode Connections For 68HC08

VDD
68HC08
10 kΩ

RST
0.1 µF

VHI

1 KΩ
IRQ
9.1V
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CGMXFC
0.022 µF
1 20
MC145407
+ +
10 µF 10 µF
3 18 OSC1
*
X1
20 pF 4.9152 MHz 10 MΩ
4 17
+ OSC2
VDD
10 µF 10 µF VDDA
+ 20 pF VDDA/VDDAREF
2 19
0.1 µF
VSSA

DB-25 VSS
2 5 16
0.1 µF
3 6 15
VDD
VDD
7

VDD
1 14 VDD
MC74HC125
2 3 10 kΩ

PTA0
6 5

4 PTC3
VDD
VDD

7 10 kΩ 10 kΩ

NOTE: Position A — Bus clock = CGMXCLK ÷ 4 or CGMVCLK ÷ 4 A PTC0


Position B — Bus clock = CGMXCLK ÷ 2 (SEE PTC1
NOTE.) B

Figure 9. HC08 Monitor Mode Connection

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Other monitor mode pins (PTC0, PTC1, PTC3) can be ‘hardwired’ to allow
monitor mode access, or they could be optoisolated using the circuit shown in
Figure 4 . Opto Isolation of a unidirectional pin. Note, isolating all the
monitor mode set-up pins would involve adding significant additional current
requirements on the application’s power supply

Figure 10 . Opto Isolation Circuit For Monitor Mode shows the monitor
mode circuit with optoisolation using circuits shown in Figure 4 . Opto
Isolation of a unidirectional pin and Figure 5 . Opto Isolation of a
BiDirectional Pin.
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Opto Isolation Circuits For In Circuit Debugging


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Monitor Mode Connections For 68HC08

5V
VDD

68HC08
10 kΩ 2
ISO1
8
R3
2K
U2A
J2 U1A 7 J1

1
1 2
R2
3
6

5
C1
1 2
1 RST
74HCT04 OUTPUT
INPUT 74HCT04 330R 6N137

0.1 µF
0.1uF

R1
10K

VHI
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1 KΩ
IRQ
9.1V

1 20
MC145407
+ +
10 µF 10 µF
3 18

4 17 CGMXFC
+
10 µF 10 µF 5V 0.022 µF
+
2 19

OSC1
DB-25 *
X1
2 5 16 20 pF 4.9152 MHz 10 MΩ

OSC2
3 6 15 VDDA
20 pF VDDA/VDDAREF
7
VDD 0.1 µF
VSSA
VSS
5V
1 14
0.1 µF
R1
R2

MC74HC125 ISO1
330

C1
50K

2 3 R3
2K
0.1uF
VDD
6N137 VDD
Q1
BC307

6 5

4 R4
50K
R5
330

0.1uF
C2 ISO2

R6
2K

7 6N137

Q2
BC307

PTA0

VDD PTC3
VDD

10 kΩ 10 kΩ

A PTC0
(SEE PTC1
NOTE.) B

Figure 10. Opto Isolation Circuit For Monitor Mode

Opto Isolation Circuits For In Circuit Debugging


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IRQ Pin Control For correct entry to monitor mode on the 68HC908AZ60A and many other
68HC08 mcus, the IRQ pin must be supplied with a voltage level of Vdd +
4.5V. For debugging purposes when using an optically isolated interface, this
voltage can be hardwired on the application board side of the optical barrier. If
the user wishes to control switching of the IRQ voltage, it can be achieved using
the circuit shown in Figure 11 . IRQ Pin Optical Isolation Circuit.

Vdd Target+ 4.5V

Vdd Debugger Vdd Target


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R13
1K

R3
ISO1 J1
2 8 2K
1

J2 U1A 7 Q1
6 MOSFET N OUTPUT
R2
1 2 3 C1
1 5

INPUT 74HCT04 330R 6N137


0.1uF

R1
10K

Figure 11. IRQ Pin Optical Isolation Circuit

Summary

This application note details 2 circuits for optically isolating unidirectional and
bi-directional digital pins. It explains how these circuits can be used to allow
development engineers to safely and efficiently develop non-isolated ac line
powered applications.

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References

References

1. M68HC908AZ60A Technical Data


2. MC9S12DP256 Technical Data
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Opto Isolation Circuits For In Circuit Debugging


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