LECTURE NOTE

COURSE TITLE: DIGITAL COMPUTER FUNDAMENTALS

COURSE CODE: (CTE 213)

COVENANT POLYTECHNIC
ABA, ABIA STATE
 LECTURE I
LOGIC GATE
Introduction
The individual memory cells used in computers are bistable in operation (pendulous
between 1 and 0) and capable of storing a single binary bit. Therefore, it is most practical
to use the binary number system that uses only two basic symbols 0 and 1 to represent
numbers. Binary logic is used to describe, in mathematical way, the manipulation and
processing of binary information.
Binary logic consists of binary variables and logic operations. The binary variables are
letters of the alphabet such as X, A, D . . . etc. Each variable has two possible values, 0 or
1. The basic logic operations are the three operations OR, AND, and NOT.

Gates
A gate is simply an electronic circuit which operates on one or more input signals to
perform the logic operation and produce an output signal. There are many types of gates
such as: OR, AND, NOT, NOR, NAND gates. Each gate has its block diagram symbol.
The lines connected to each symbol are the inputs on the left and the output on the right
of it.

Truth table
A truth table is a two-dimensional array where there is one column for each input and one
column for each output (a circuit may have more than one output).
Since we are dealing with binary values, each input can be either 0 or 1.The number of
truth table possibilities are 2n, where n is the number of input variable. For example, if
n=3 the number of possibilities are 23 =8.
The values in the output column are determined from applying the corresponding input
values to the functional operator. For example, in the following truth table:

Here are 2 input variables, X and Y, and one output variable, F. So there are 2 2 =4
combinations. The output F = 1 when either X and Y are both 1 or X=0 and Y =1, while
the value of F is 0 for the other possibilities. Using truth tables is one method to formally
describe the operation of a circuit or function.

Pulse waveform
Pulses are very important in digital circuits and systems because voltage level are
normally changing back and front between High (logic 1) and Low (logic 0) states.

Pulses can be classified as either periodic or non-periodic, as shown in the figure below.

A timing diagram is a graphical method of showing the exact output behaviour of a

logic circuit for every possible of input condition. It is used to describe the operation of
digital devices because its visual characteristics are much easier to understand than
explanation using words.
Basic Gates
AND gate: The AND-gate is a device whose output is logic (1) if both of the inputs are
logic (1). It performs logical multiplication. It composed of two or more inputs and single
output. The logical AND function of two variables is represented either by writing dot
between the two variables or by writing the adjacent letters without dot. For example,
X ∙ Y =Z∨XY =Z is read "X AND Y is equal to Z". This AND gate symbol and its truth
table are shown in figure (a) and (b) respectively, with two inputs marked A and B and
one output marked X.

OR Gate
It is one of the simplest and most common used. It is a device whose output is logic ‘1’ if
either or both of its inputs are ‘1’. The OR gate composed of two or more inputs and
single output. It performs logical addition. The OR operation is represented by a plus
sign, +. For example, X + Y = Z is read "X OR Y is equal to Z".
The standard logic symbol for the OR gate is shown in fig (a) and the truth table of
combinations for the inputs and outputs for it's is shown in fig (b).
NOT Gate (Inverter)
The NOT gate (called inverter) perform a basic logic function called inversion or
complementation. It has a single input and one output. The purpose of the NOT gate is to
change one logic level to the opposite level. In term of bits, it change ‘1’ at its input to
logic ‘0’ at the output, and a ‘0’ to a logic ‘1’. The NOT operation is represented by a
prime or bar. The standard logic symbol for the NOT and its truth table are shown in
figure (a) and figure (b) respectively.
From the three basic logic gates (AND, OR, and NOT gates), the most powerful
computer circuit can be made. Furthermore, these basic gates are built using transistors,
the fundamental building blocks for all digital logic circuits. Transistors are just
electronic binary switches that can be turned on or off. The on and off states of transistors
are used to represent the two binary values 1 and 0.

Example: Find the truth table for the following?

A∨( NOT B∧C )∧B

Solution
The number of inputs variables is 3, so the number of combinations are 23 = 8. The
sequence of perform the operation are as follow

The truth table is as following, the NOT is replaced with dash in this table.

One can see the last column is equal the value of first column. The block diagram of the
circuit that represent the expression is, figure 2-5:
NAND, NOR, X-OR and XNOR gates

NAND Gate:
The NAND gate is an inverse (negative) of AND functions. Its output is logic (0) if both
inputs are logic (1). It is called NOT-AND gate but is abbreviated NAND gate.
Symbolically the NAND gate is represented by the AND symbol followed by a small
circle indicating an inversion of the output, as shown in fig (7).

FIGURE 7: NAND GATE

Figure (8) shows the equivalent of NAND gate diagram using AND gate and NOT gate.

Fig (2-8): Equivalent of NAND gate

FIGURE 8: EQUIVALENT OF NAND

GATE

NOR Gate:
The NOR gate (NOT–OR) is equivalent of an inverted OR function and will yield a low
output (0) if either or both inputs are high (1). Symbolically the NOR gate is represented
by the OR gate symbol followed by a bubble to represent the complemented output
signal. The NOR gate is a universal building block of a digital logic because it may be
used to implement any logic function. The NOR gate can be represented by the symbol
shown in figure (9a). Its truth table is shown in figure (9b)
 FIGURE 9: NOR GATE

Figure (10) shows the equivalent of NOR gate diagram using OR gate and NOT gate.

FIGURE 10: EQUIVALENT OF NOR

GATE
Exclusive- OR Gate:
The Exclusive- OR gate is called the XOR gate. It gives logic (1) at the output when both
inputs are different and logic (0) when both inputs are the same. The XOR of two
variables is written by . The XOR gate symbol and its truth table are shown in figure
(11).

FIGURE 11: XOR

GATE
Exclusive NOR Gate:
Exclusive NOR gate, is called XNOR, is just the inverse of the XOR gate. The XNOR
uses the symbol, and it performs the following logic operation:

X ⨀ Y = XY + X Y =( X ⨁ Y )

The graphic symbols and truth table of XOR is shown in Figure (12). The result is 1
when either both X or Y are 0’s or when both are 1’s.

FIGURE 12: XOR

GATE
The truth tables clearly show that the exclusive-NOR operation is the complement of the
Exclusive-OR. This can also be shown by algebraic manipulation as follows:

Example: Show using Boolean algebra that XOR =XNOR for three inputs that is
A ⊕B ⊕C= A ⨀ B ⨀C

Solution

LECTURE II
BASIC PRINCIPLES OF BISTABLE ELEMENTS

Introduction

In a dynamical system, bistability means the system has two stable equilibrium states.[1]
Something that is bistable can be resting in either of two states. An example of a
mechanical device which is bistable is a light switch. The switch lever is designed to rest
in the "on" or "off" position, but not between the two. Bistable behaviour can occur in
mechanical linkages, electronic circuits, nonlinear optical systems, chemical reactions,
and physiological and biological systems.

In a conservative force field, bistability stems from the fact that the potential energy has
two local minima, which are the stable equilibrium points. [2] These rest states need not
have equal potential energy. By mathematical arguments, a local maximum, an unstable
equilibrium point, must lie between the two minima. At rest, a particle will be in one of
the minimum equilibrium positions, because that corresponds to the state of lowest
energy. The maximum can be visualized as a barrier between them.

A system can transition from one state of minimal energy to the other if it is given
enough activation energy to penetrate the barrier (compare activation energy and
Arrhenius equation for the chemical case). After the barrier has been reached, assuming
the system has damping, it will relax into the other minimum state in a time called the
relaxation time.

Bistability is widely used in digital electronics devices to store binary data. It is the
essential characteristic of the flip-flop, a circuit which is a fundamental building block of
computers and some types of semiconductor memory. A bistable device can store one bit
of binary data, with one state representing a "0" and the other state a "1". It is also used in
relaxation oscillators, multivibrators, and the Schmitt trigger. Optical bistability is an
attribute of certain optical devices where two resonant transmissions states are possible
and stable, dependent on the input. Bistability can also arise in biochemical systems,
where it creates digital, switch-like outputs from the constituent chemical concentrations
and activities. It is often associated with hysteresis in such systems.

Flip Flop Basics – Types, Truth Table, Circuit, and Applications

A flip-flop in digital electronics is a circuit with two stable states that can be used to store binary
data. The stored data can be changed by applying varying inputs. Flip-flops and latches are
fundamental building blocks of digital electronics systems used in computers, communications,
and many other types of systems. Both are used as data storage elements.

It is the basic storage element in sequential logic. But first, let’s clarify the difference between a
latch and flip-flops.

Difference Between Flip-flop and Latch

Parameter Flip-Flop Latch
Basic Principle Flip-flop utilizes an edge Latch follows a level triggering
 triggering approach. approach.
Clock Signal The clock signal is present. The clock signal is absent.
Designed Using You can design it using Latches You can design it using Logic gates.
along with a clock.
Sensitivity Flip-flop is sensitive to the Latches are sensitive to the applied
applied input and the clock signal. input signal- only when enabled.
Operating Speed It has a slow operating speed. It has comparatively fast operating
speed.
Classification You can classify a flip-flop into a A user cannot classify the Latch this
synchronous or asynchronous way.
flip-flop.
Working Flip-Flops work using the binary Latches operate only using binary
input and the clock signal. inputs.
Power It requires more power. It requires comparatively less power.
Requirement
Analysis of It is quite easy to perform circuit Analyzing the circuit is quite complex.
Circuit analysis.
Type of Flip-flop performs Synchronous Latch performs Asynchronous
Operation operations. operations.
Performed
Robustness Flip-flops are comparatively more Latches are comparatively less robust.
robust.
Dependency of The operation relies on the The operation depends on the present
Operation present and past input bits along and past input along with the past
with the past output and clock output binary values.
pulses.
Usage as a A flip-flop is capable of working A latch cannot serve as a register as
Register as a register as it contains clock the register requires further advanced
signals in its input. electronic circuits (EC). Time also
plays an essential role here.
Types J-K, S-R, D, and T Flip-flops. J-K, S-R, D, and T Latches.
Area Required It requires more area. It requires comparatively less area.
Uses They constitute the building Users can utilize these for designing
blocks of many sequential circuits sequential circuits. But they are still
such as counters. not generally preferred.
Input and Output A flip-flop checks the inputs. It The latch responds to the changes in
only changes the output at times inputs continuously as soon as it
defined by any control signal like checks the inputs.
the clock signal.
Synchronicity A flip-flop is synchronous. It A latch is asynchronous. It does not
works based on the clock signal. work based on the time signal.
Faults Flip-Flops stay protected against The latches are responsive to any
any fault. occurring faults on the enable pin.

For example, let us talk about SR latch and SR flip-flops. In this circuit when you Set S as active,
the output Q will be high and Q' will be Low. This is irrespective of anything else. (This is an
active-low circuit; so active here means low, but for an active high circuit, active would mean
high)

SR Latch

A flip-flop, on the other hand, is a synchronous Circuit and is also known as a gated or clocked
SR latch.

SR Flip Flop Circuit

In this circuit diagram, the output is changed (i.e. the stored data is changed) only when you give
an active clock signal. Otherwise, even if the S or R is active, the data will not change. 

Types
There are basically 4 types of flip-flops:

1. SR Flip-Flop
2. JK Flip-Flop
3. D Flip-Flop
4. T Flip-Flop
SR Flip Flop

This is the most common flip-flop among all. This simple flip-flop circuit has a set input (S) and
a reset input (R). In this system, when you Set “S” as active, the output “Q” would be high, and
'
Q would be low. Once the outputs are established, the wiring of the circuit is maintained until
“S” or “R” go high, or power is turned off.

As shown above, it is the simplest and easiest to understand. The two outputs, as shown above,
are the inverse of each other. The truth table of SR Flip-Flop is highlighted below.

S R Q Q'

0 0 0 1

0 1 0 1

1 0 1 0

1 1 ∞ ∞

JK Flip-Flop

Due to the undefined state in the SR flip-flops, another flip-flop is required in electronics. The
JK flip-flop is an improvement on the SR flip-flop where S=R=1 is not a problem.

JK Flip Flop Circuit

The input condition of J=K=1 gives an output inverting the output state. However, the outputs
are the same when one tests the circuit practically.

In simple words, If J and K data input are different (i.e. high and low), then the output Q takes
the value of J at the next clock edge. If J and K are both low, then no change occurs. If J and K
are both high at the clock edge, then the output will toggle from one state to the other. JK Flip-
Flops can function as Set or Reset Flip-flops.

Truth Table:

 
J K Q Q’
0 0 0 0
0 1 0 0
1 0 0 1
1 1 0 1
0 0 1 1
0 1 1 0
1 0 1 1
1 1 1 0

D Flip-Flop

D flip-flop is a better alternative that is very popular with digital electronics. They are commonly
used for counters and shift registers and input synchronization.

D Flip-Flop

In the D flip-flops, the output can only be changed at the clock edge, and if the input changes at
other times, the output will be unaffected.
Truth Table:

  Clock D Q Q’

↓»0 0 0 1

↑»1 0 0 1

↓»0 1 0 1

↑»1 1 1 0

The change of state of the output is dependent on the rising edge of the clock. The output (Q) is
the same as the input and can only change at the rising edge of the clock.

T Flip-Flop

A T flip-flop is like a JK flip-flop. These are basically single-input versions of JK flip-flops. This
modified form of the JK is obtained by connecting inputs J and K together. It has only one input
along with the clock input.

T flip flop

These flip-flops are called T flip-flops because of their ability to complement their state i.e.
Toggle, hence they are named Toggle flip-flops.

Truth Table:
 T Q Q (t+1)
0 0 0

1 0 1
0 1 1

1 1 0

Applications
These are the various types of flip-flops being used in digital electronic circuits and the
applications of Flip-flops are as specified below.

 Counters
 Frequency Dividers
 Shift Registers
 Storage Registers

LECTURE III
ADDITION OPERATION IN COMPUTER

Addition is a fundamental operation in digital electronics, and is used in a wide range of

applications such as arithmetic, data processing, and control systems. The electronic
circuit that performs the addition of two or more numbers, more specifically binary
numbers, is called adder. As we know, the logic circuits use binary number system to
perform the operations, hence the adder is referred to as binary adder.

Depending on the number of binary digits that a circuit can add, adders (or binary adders)
are of two types − Half Adder and Full Adder

Furthermore, there are two main types of adders used in digital circuits: Serial Adder and
Parallel Adder. Understanding the differences between these two types of adders is
essential to designing and implementing efficient and effective digital systems.

Half Adder in Digital Logic

A half adder is a digital logic circuit that performs binary addition of two single-bit
binary numbers. It has two inputs, A and B, and two outputs, SUM and CARRY. The
SUM output is the least significant bit (LSB) of the result, while the CARRY output is
the most significant bit (MSB) of the result, indicating whether there was a carry-over
from the addition of the two inputs. The half adder can be implemented using basic gates
such as XOR and AND gates. The half adder is a basic building block for more complex
adder circuits such as full adders and multiple-bit adders.

It is named half adder because putting two half adders together with the use of an OR
gate results in a full adder. In other words, it only does half the work of a full adder.

The adder works by combining the operations of basic logic gates, with the simplest form
using only a XOR and an AND gate. This can also be converted into a circuit that only
has AND, OR and NOT gates. This is especially useful since these three simpler logic
gate ICs (integrated circuits) are more common and available than the XOR IC, though
this might result in a bigger circuit since three different chips are used instead of just one.

The SUM output is the least significant bit (LSB) of the result, which is the XOR of the
two inputs A and B. The XOR gate implements the addition operation for binary digits,
where a “1” is generated in the SUM output only when one of the inputs is “1”.

The CARRY output is the most significant bit (MSB) of the result, indicating whether
there was a carry-over from the addition of the two inputs. The CARRY output is the
AND of the two inputs A and B. The AND gate generates a “1” in the CARRY output
only when both inputs are “1”.

Truth Table:

A B SUM CARRY
0 0 0 0

0 1 1 0

1 0 1 0

1 1 0 1

Here we perform two operations Sum and Carry, thus we need two K-maps one for each
to derive the expression.
Logical Expression: 

For Sum:
                  

Sum = A XOR B

For Carry: 
                

Carry = A AND B 

Implementation:
Note: Half adder has only two inputs and there is no provision to add a carry coming
from the lower order bits when multi addition is performed. 

Full Adder

A combinational logic circuit that can add two binary digits (bits) and a carry bit, and
produces a sum bit and a carry bit as output is known as a full-adder.

In other words, a combinational circuit which is designed to add three binary digits and
produces two outputs (sum and carry) is known as a full adder. Thus, a full adder circuit
adds three binary digits, where two are the inputs and one is the carry forwarded from the
previous addition. The block diagram and circuit diagram of the full adder are shown in
Figure-1.

Hence, the circuit of the full adder consists of one EX-OR gate, three AND gates and one
OR gate, which are connected together as shown in the full adder circuit in Figure-1

Operation of Full Adder

Full adder takes three inputs namely A, B, and Cin. Where, A and B are the two binary
digits, and Cin is the carry bit from the previous stage of binary addition. The sum output
of the full adder is obtained by using XOR bits A, B, and Cin. While the carry output bit
(Cout) is obtained using AND and OR operations.

Truth Table of Full Adder

Truth table is one that indicates the relationship between input and output variables of a
logic circuit and explains the operation of the logic circuit. The following is the truth
table of the full-adder circuit –

Inputs Outputs
A B Cin S (Sum) Cout
(Carry)
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

Hence, from the truth table, it is clear that the sum output of the full adder is equal to 1
when only 1 input is equal to 1 or when all the inputs are equal to 1. While the carry
output has a carry of 1 if two or three inputs are equal to 1.

K-Map for Full Adder

K-Map (Karnaugh Map) is a tool for simplifying binary complex Boolean algebraic
expressions. The K-Map for full adder is shown in Figure-2.

Characteristic Equations of Full Adder

The characteristic equations of the full adder, i.e. equations of sum (S) and carry output
(Cout) are obtained according to the rules of binary addition. These equations are given
below −

The sum (S) of the full-adder is the XOR of A, B, and Cin. Therefore,

∑ ( S )= A ⨁ B ⨁ C ¿= A ' B' C ¿+ A' B C '¿+ A B' C '¿+ ABC ¿

The carry (C) of the half-adder is the AND of A and B. Therefore,

Carry ( Cout ) = AB+ A C ¿ + B C ¿

Serial Binary Adder in Digital Logic

Serial binary adder is a combinational logic circuit that performs the addition of two
binary numbers in serial form. Serial binary adder performs bit by bit addition. A serial
adder consists of a 1-bit full-adder and several shift registers. In serial adders, pairs of
bits are added simultaneously during each clock cycle. Two right-shift registers are used
to hold the numbers (A and B) to be added, while one left-shift register is used to hold the
sum (S).

A single full adder is used to add one pair of bits at a time along with the carry. The carry
output from the full adder is applied to a D flip-flop. After that output is used as carry for
next significant bits. The sum bit from the output of the full adder can be transferred into
a third shift register.
Block diagram of Serial Binary Adder:

Shift Registers:
Shift Register is a group of flip flops used to store multiple bits of data. There are two
shift registers used in the serial binary adder. In one shift register augend is stored and in
other shift register addend is stored.

Full Adder:
Full adder is the combinational circuit which takes three inputs and gives two outputs as
sum and carry. The circuit adds one pair at a time with the help of it.

D Flip-flop:
the carry output from the full adder is applied on the D flip-flop. Further, the output of D
flip-flop is used as a carry input for the next pair of significant bits.

Working Process:
Following is the procedure of addition using serial binary adder:

Step-1: The two shift registers A and B are used to store the numbers to be added.

Step-2: A single full adder is used to add one pair of bits at a time along with the carry.
Step-3: The contents of the shift registers shift from left to right and their output starting
from A and B are fed into a single full adder along with the output of the carry flip-flop
upon application of each clock pulse.

Step-4: The sum output of the full adder is fed to the most significant bit of the sum
register.

Step-5: The content of sum register is also shifted to right when clock pulse is applied.

Step-6: After applying four clock pulse the addition of two registers (A & B) contents are
stored in sum register.

Example of operation
Serial binary addition is done by a flip-flop and a full adder. The flip-flop takes the carry-
out signal on each clock cycle and provides its value as the carry-in signal on the next
clock cycle. After all of the bits of the input operands have arrived, all of the bits of the
sum have come out of the sum output. See example below:

Decimal
5+9=14

 X=5, Y=9, Sum=14

Binary
0101+1001=1110

Addition of each step

Inputs Outputs
Ci X Y Sum Cout
n
0 1 1 0 1
1 0 0 1 0
0 1 0 1 0
0 0 1 1 0

*addition starts from lowest

Result=1110 or 14
Parallel Binary Adder in Digital Logic
A parallel adder is a combinational digital circuit that adds two binary numbers in parallel
form. It consists of full adders connected in cascade, with the output carry from each full
adder connected to the input carry of the next full adder.

How does Parallel Adder Work

To understand the working principle of Parallel Adder, let us understand the construction
of Parallel Adder as shown in the Figure below, 4- bit Parallel Adder is designed using 4
Full Adders FA0, FA1, FA2, FA3 . Full Adder FA0 adds A0, B0 along with carry Cin to
generate Sum S0 and Carry bit C1 and this Carry bit is connected to FA1.

FA1 accepts this Carry C1 and adds with its inputs A1 and B1 to generate Sum S1 and
Carry C2. This bit C2 is connected to FA2. This process continues till last Full Adder. FA
‘n’ accepts the carry bit Cn and adds with its input An and Bn to generate the final output
along with the last carry bit Cout.

Construction of Parallel Adder using Full Adders

Similarities:

 Both Serial Adder and Parallel Adder are used for adding binary numbers in
digital circuits.
 They both use full adders as the basic building blocks for performing addition
operations.
 Both types of adders have inputs for two binary numbers and a carry-in bit, and
outputs for a sum and a carry-out bit.
  The operation of both types of adders is based on the principles of binary addition,
where a carry-out bit is generated if the sum of the two bits is greater than or equal
to two.
 They can both be used for various applications in digital electronics, such as
arithmetic, data processing, and control systems.

Difference between Serial Adder and Parallel Adder:

Parameters Serial Adder Parallel Adder

Addition It is used to add two binary It is used to add two binary numbers
manner numbers in serial form. in parallel form. 
Type of A serial adder uses shift A parallel adder uses registers with
Registers registers. parallel loads.
Requirement It requires a single full It requires multiple full adders.
adder.
Usage of A carry flip-flop is used in
Ripple carry adder is used in the
the serial adder. parallel adder.
Circuit Type A serial adder is a A parallel adder is a combinational
sequential circuit. circuit.
Propagation In serial adder, propagation
In parallel adder, propagation delay is
Delay delay is less. present from input carry to output
carry.
Speed The serial adder has a slow The parallel adder has fast speed as
speed as compared to the compared to the serial adder.
parallel adder.
Addition The addition process is The addition process is carried out
process carried out bit by bit. simultaneously. That implies all bits
Therefore, addition time sum up simultaneously. Therefore,
relies on bit count. time does not rely on bit count.
Requirement of It necessitates fewer It necessitates more components
Components components.  because of design complexity.
Number of Full The number of required The number of required full adders is
Adders full adders is fixed i.e. one. equal to the number of bits in the
binary number.
LECTURE IV

Basics of Digital Components

In this lecture we will learn about the basics of digital computers. We will cover
Integrated Circuits, Digital Logic family, Encoder and Decoder etc.

Integrated Circuit(IC)
Complex digital circuits are constructed with integrated circuits. IC is a small silicon
semiconductor crystal, called a chip, containing the electronic components for the digital
gates. The various gates are interconnected inside the chip to form the required circuit.
The chip is mounted in a ceramic or plastic container and the connections are welded to
the external pins to form an IC. The number of pins of IC vary from 14 to several
thousand. Each pin is identified by a unique number printed on its body.

Categories of Integrated Circuits

1. SSI (Small Scale Integration Device)
It contains several independent gates in a single package. The inputs and outputs
of gates are connected directly to the pins in the package. The number of gates is
usually less than 10.

2. MSI (Medium Scale Integration Device)

It contains 10 to 200 gates in a single package. They perform elementary digital
functions such as decoders, adders, registers.

3. LSI (Large Scale Integration Device)

It contains gates between 200 to few thousand in a single package. They include
digital systems such as processors, memory chips etc.

4. VLSI (Very Large Scale Integration Device)

It contains thousands of gates within a single package such as microcomputer
chip.

5. ULSI (Ultra Large Scale Integration Device)

It contains hundreds of thousands of gates within a single package such as
microcomputer chip.

Digital Logic Family

IC's are also classified by the specific circuit technology to which they belong. The basic
circuit in each technology is NAND, NOR, NOT gates.

The earliest logic family was Resistor-transistor logic which used a resistor as input and
a transistor as switching device.

Diode-transistor logic is a direct ancestor of the Transistor-transistor logic, and used a

diode for logic functions while a transistor for amplifying functions.

TTL (Transistor Transistor Logic)

It is the modified form of DTL (Diode Transistor Logic), invented in 1961 by James L
Buie. The diodes were replaced by transistor to improve the circuit operation. It is called
transistor-transistor logic because transistor performs both the logic function and the
amplifying function.

Above figure is two inputs TTL NAND gate with one output.

Advantages:

 TTL circuits are fast.

 Low propagation delay.
 Power dissipation does not depend upon the frequency.

Some other Important points:

 TTL circuits consume more power when at rest(i.e. not being used), but as
mentioned earlier, that the power dissipation does not depend on frequency, hence
the power speed does not increase with clock speed as fast as for other CMOS
devices.
 Compared to ECL circuits, TTL uses less power but is comparitively slower.
  TTL is less prone to damage due to electrostatic discharge than the early CMOS
devices.
 Before VLSI devices, TTL circuits were used in the construction of processors for
mini-computers and mainframe processors.
 While in use, many sub-types of TTL circuits were made, like Low-power TTL
(less power consumption, but reduced speed), High-speed TTL, Schottky TTL
(with improved switching time) etc.

ECL (Emitter Coupled Logic)

It provides highest speed digital circuits. It is used in systems such as supercomputers and
signal processors where high speed is required. ECL uses overdriven BJT (Bipolar
junction Transistors) in its circuit.

Above figure is two input ECL gate.

Advantages:

 ECL is the fastest logic family.

 Propagation delay is very less.
 Noise margin is low.
Some other Important points:

 In ECL circuit, each gate continuously draws current even when inactive, hence
power consumption is more as compared to other logic families.
 The large current requirement of ECL is constant and does not depend on the state
of the circuit, which is the reason for lower power noise.

MOS (Metal Oxide Semiconductor)

It depends upon the flow of one type of carriers (electrons or holes). It is basically of two
types: PMOS and NMOS. A p-channel MOS is called PMOS and n-channel MOS is
called NMOS.

Just like any other FET(Field Effect Transistor), they have 4 terminals: Gate, Drain,
Source and Substrate.

They have four modes of operation: cut-off (or subthreshold), triode, saturation
(sometimes called active), and velocity saturation.

PMOS transistors operate by creating an inversion layer in an n-type transistor body. This
inversion layer, called the p-channel, can conduct holes between p-type "source" and
"drain" terminals. Similarly, NMOS Transistors functions by creating an n-channel
(inversion layer) in a p-type transistor body.

CMOS (Complimentary MOS)

It also falls under the category of MOS, used to construct Integrated Circuits. It uses both
P and N channel MOS. It is also known as COS-MOS (Complementary-symmetry metal
oxide semiconductor), as it uses complementary and symmetrical pairs of p-type and n-
type MOS for logic functions. It is used in systems which require low power
consumption.
 Above figure is two input ECL gate.

Advantages:

 Noise margin is high.

 Power dissipation is low.
 Waste heat production is very less as compared to other logic families.
 CMOS allows high density integration of logic functions on a chip.

Decoders

A decoder is a combinational circuit that converts binary information from n coded inputs
to 2n outputs. Commercial decoders include one or more enable (E) inputs to control the
operation of circuit. The decoder is enabled when E is equal to 1 and disabled when E is
equal to 0.
  Used in code converters.
 Used to implement Boolean functions.

Encoders

An encoder is a digital circuit that performs the inverse operation of a decoder. An

encoder has 2n input lines and n output lines. It converts octal input to binary digits.

Types of Encoders

 Priority encoders.
 Decimal to BCD encoder.
 Octal to binary encoder.
 Hexadecimal to binary encoder.

Advantages:
 Highly reliable and accurate.
 Low-cost feedback.
 High resolution.
 Integrated electronics.
 Fuses optical and digital technology.
 Can be incorporated into existing applications.
  Compact size.

Disadvantages:
 Subject to magnetic or radio interference (Magnetic Encoders).
 Direct light source interference (Optical Encoders).
 Susceptible to dirt, oil and dust contaminates.

Multiplexer
A multiplexer is a combinational circuit that receives binary information from one of the
2n input lines and directs it to a single output line.

Advantages:

 It reduces number of wires.

 It reduces circuit complexity and cost.
 It simplifies logic design.
 We can implement many combinational circuits using MUX.
 It does not need k-maps and simplification.
Disadvantages:

The following disadvantages arise while using multiplexer chips to expand I/O
ports on an Arduino:

 Added delays in switching ports.

 Added delays in I/O signals propagating through the multiplexer.
 Limitations on which ports can be used simultaneously.
 Added firmware complexity to handle switching ports.
 Extra I/O ports required to control the multiplexer.