HEF4017B

5-stage Johnson decade counter

Rev. 9 — 8 April 2016 Product data sheet

1. General description
The HEF4017B is a 5-stage Johnson decade counter with ten spike-free decoded active
HIGH outputs (Q0 to Q9), an active LOW carry output from the most significant flip-flop
(Q5-9), active HIGH and active LOW clock inputs (CP0, CP1) and an overriding
asynchronous master reset input (MR).

The counter is advanced by either a LOW-to-HIGH transition at CP0 while CP1 is LOW or
a HIGH-to-LOW transition at CP1 while CP0 is HIGH (see Table 3).

When cascading counters, the Q5-9 output, which is LOW while the counter is in states 5,
6, 7, 8, and 9, can be used to drive the CP0 input of the next counter. A HIGH on MR
resets the counter to zero (Q0 = Q5-9 = HIGH; Q1 to Q9 = LOW) independent of the clock
inputs (CP0, CP1).

Automatic counter code correction is provided by an internal circuit: following any illegal
code the counter returns to a proper counting mode within 11 clock pulses.

Schmitt trigger action makes the clock inputs highly tolerant of slower rise and fall times.

It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS

(usually ground). Unused inputs must be connected to VDD, VSS, or another input.

2. Features and benefits

 Automatic counter correction
 Tolerant of slow clock rise and fall times
 Fully static operation
 5 V, 10 V, and 15 V parametric ratings
 Standardized symmetrical output characteristics
 Specified from 40 C to +125 C
 Complies with JEDEC standard JESD 13-B

3. Ordering information
Table 1. Ordering information
All types operate from 40 C to +125 C
Type number Package
Name Description Version
HEF4017BT SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
Nexperia HEF4017B
5-stage Johnson decade counter

4. Functional diagram

&3

&3

67$*(-2+1621&2817(5
05


4
'(&2',1*$1'287387&,5&8,75< 

4 4 4 4 4 4 4 4 4 4

          DDK

Fig 1. Functional diagram

' 4 ' 4 ' 4 ' 4 ' 4

&3 )) )) )) )) ))
    
&3 &3 4 &3 4 &3 4 &3 4 &3 4
5' 5' 5' 5' 5'

05

4 4 4 4 4 4 4 4 4 4 4
DDK

Fig 2. Logic diagram

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Product data sheet Rev. 9 — 8 April 2016 2 of 18

Nexperia HEF4017B
5-stage Johnson decade counter

 &75',9'(& 
&3 4  

 
&3 4  

 
4  &7  

4  

4  

4  

4  

 05 4  

4  

4  

4  &7•

DDK DDK

Fig 3. Logic symbol Fig 4. IEE logic symbol

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Product data sheet Rev. 9 — 8 April 2016 3 of 18

Nexperia HEF4017B
5-stage Johnson decade counter

5. Pinning information

5.1 Pinning

+()%

4   9''

4   05

4   &3

4   &3

4   4

4   4

4   4

966   4

DDH

Fig 5. Pin configuration

5.2 Pin description

Table 2. Pin description
Symbol Pin Description
Q0 to Q9 3, 2, 4, 7, 10, 1, 5, 6, 9, 11 decoded output
VSS 8 ground supply voltage
Q5-9 12 carry output (active LOW)
CP1 13 clock input (HIGH-to-LOW edge-triggered)
CP0 14 clock input (LOW-to-HIGH edge-triggered)
MR 15 master reset input
VDD 16 supply voltage

6. Functional description
Table 3. Function table [1]
MR CP0 CP1 Operation
H X X Q0 = Q5-9 = H; Q1 to Q9 = L
L H  counter advances
L  L counter advances
L L X no change
L X H no change
L H  no change
L  L no change

[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care;

 = positive-going transition;  = negative-going transition.
HEF4017B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved

Product data sheet Rev. 9 — 8 April 2016 4 of 18

Nexperia HEF4017B
5-stage Johnson decade counter

&3,1387

&3,1387

05,1387

4287387

4287387

4287387

4287387

4287387

4287387

4287387

4287387

4287387

4287387

4287387
DDK

Fig 6. Timing diagram

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Product data sheet Rev. 9 — 8 April 2016 5 of 18

Nexperia HEF4017B
5-stage Johnson decade counter

7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDD supply voltage 0.5 +18 V
IIK input clamping current VI < 0.5 V or VI > VDD + 0.5 V - 10 mA
VI input voltage 0.5 VDD + 0.5 V
IOK output clamping current VO < 0.5 V or VO > VDD + 0.5 V - 10 mA
II/O input/output current - 10 mA
IDD supply current - 50 mA
Tstg storage temperature 65 +150 C
Tamb ambient temperature 40 +125 C
Ptot total power dissipation Tamb = 40 C to +125 C
SO16 package [1] - 500 mW
P power dissipation per output - 100 mW

[1] For SO16 package: Ptot derates linearly with 8 mW/K above 70 C.

8. Recommended operating conditions

Table 5. Recommended operating conditions
Symbol Parameter Conditions Min Typ Max Unit
VDD supply voltage 3 - 15 V
VI input voltage 0 - VDD V
Tamb ambient temperature in free air 40 - +125 C
t/V input transition rise and fall rate VDD = 5 V - - 3.75 s/V
VDD = 10 V - - 0.5 s/V
VDD = 15 V - - 0.08 s/V

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Product data sheet Rev. 9 — 8 April 2016 6 of 18

Nexperia HEF4017B
5-stage Johnson decade counter

9. Static characteristics
Table 6. Static characteristics
VSS = 0 V; VI = VSS or VDD unless otherwise specified.
Symbol Parameter Conditions VDD Tamb = 40 C Tamb = 25 C Tamb = 85 C Tamb = 125 C Unit
Min Max Min Max Min Max Min Max
VIH HIGH-level IO < 1 A 5V 3.5 - 3.5 - 3.5 - 3.5 - V
input voltage 10 V 7.0 - 7.0 - 7.0 - 7.0 - V
15 V 11.0 - 11.0 - 11.0 - 11.0 - V
VIL LOW-level IO < 1 A 5V - 1.5 - 1.5 - 1.5 - 1.5 V
input voltage 10 V - 3.0 - 3.0 - 3.0 - 3.0 V
15 V - 4.0 - 4.0 - 4.0 - 4.0 V
VOH HIGH-level IO < 1 A; 5V 4.95 - 4.95 - 4.95 - 4.95 - V
output voltage VI = VSS or VDD 10 V 9.95 - 9.95 - 9.95 - 9.95 - V
15 V 14.95 - 14.95 - 14.95 - 14.95 - V
VOL LOW-level IO < 1 A; 5V - 0.05 - 0.05 - 0.05 - 0.05 V
output voltage VI = VSS or VDD 10 V - 0.05 - 0.05 - 0.05 - 0.05 V
15 V - 0.05 - 0.05 - 0.05 - 0.05 V
IOH HIGH-level VO = 2.5 V 5V - 1.7 - 1.4 - 1.1 - 1.1 mA
output current V = 4.6 V 5V - 0.64 - 0.5 - 0.36 - 0.36 mA
O
VO = 9.5 V 10 V - 1.6 - 1.3 - 0.9 - 0.9 mA
VO = 13.5 V 15 V - 4.2 - 3.4 - 2.4 - 2.4 mA
IOL LOW-level VO = 0.4 V 5V 0.64 - 0.5 - 0.36 - 0.36 - mA
output current V = 0.5 V 10 V 1.6 - 1.3 - 0.9 - 0.9 - mA
O
VO = 1.5 V 15 V 4.2 - 3.4 - 2.4 - 2.4 - mA
II input leakage 15 V - 0.1 - 0.1 - 1.0 - 1.0 A
current
IDD supply current IO = 0 A; 5V - 5 - 5 - 150 - 150 A
VI = VSS or VDD 10 V - 10 - 10 - 300 - 300 A
15 V - 20 - 20 - 600 - 600 A
CI input - - - - 7.5 - - - - pF
capacitance

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Product data sheet Rev. 9 — 8 April 2016 7 of 18

Nexperia HEF4017B
5-stage Johnson decade counter

10. Dynamic characteristics

Table 7. Dynamic characteristics
Tamb = 25 C; VSS = 0 V; for test circuit see Figure 10
Symbol Parameter Conditions VDD Extrapolation formula[1] Min Typ Max Unit
tPHL HIGH to LOW CP0, CP1  Q0 to Q9; 5 V 113 ns + (0.55 ns/pF)CL - 140 280 ns
propagation delay see Figure 7 10 V 44 ns + (0.23 ns/pF)CL - 55 110 ns
15 V 32 ns + (0.16 ns/pF)CL - 40 80 ns
CP0, CP1  Q5-9; 5V 118 ns + (0.55 ns/pF)CL - 145 290 ns
see Figure 7 10 V 44 ns + (0.23 ns/pF)CL - 55 110 ns
15 V 32 ns + (0.16 ns/pF)CL - 40 80 ns
MR  Q1 to Q9; 5V 88 ns + (0.55 ns/pF)CL - 115 230 ns
see Figure 8 10 V 39 ns + (0.23 ns/pF)CL - 50 100 ns
15 V 27 ns + (0.16 ns/pF)CL - 35 70 ns
tPLH LOW to HIGH CP0, CP1  Q0 to Q9; 5 V 98 ns + (0.55 ns/pF)CL - 125 250 ns
propagation delay see Figure 7 10 V 39 ns + (0.23 ns/pF)CL - 50 100 ns
15 V 32 ns + (0.16 ns/pF)CL - 40 80 ns
CP0, CP1  Q5-9; 5V 98 ns + (0.55 ns/pF)CL - 125 250 ns
see Figure 7 10 V 39 ns + (0.23 ns/pF)CL - 50 100 ns
15 V 32 ns + (0.16 ns/pF)CL - 40 80 ns
MR  Q5-9; 5V 83 ns + (0.55 ns/pF)CL - 110 220 ns
see Figure 8 10 V 34 ns + (0.23 ns/pF)CL - 45 90 ns
15 V 27 ns + (0.16 ns/pF)CL - 35 70 ns
MR  Q0; 5V 103 ns + (0.55 ns/pF)CL - 130 260 ns
see Figure 8 10 V 44 ns + (0.23 ns/pF)CL - 55 105 ns
15 V 32 ns + (0.16 ns/pF)CL - 40 75 ns
tt transition time see Figure 7 5V [2] 10 ns + (1.00 ns/pF)CL - 60 120 ns
10 V 9 ns + (0.42 ns/pF)CL - 30 60 ns
15 V 6 ns + (0.28 ns/pF)CL - 20 40 ns
th hold time CP0  CP1; 5V 90 45 - ns
see Figure 9 10 V 40 20 - ns
15 V 20 10 - ns
CP1  CP0; 5V 80 40 - ns
see Figure 9 10 V 40 20 - ns
15 V 30 10 - ns

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Product data sheet Rev. 9 — 8 April 2016 8 of 18

Nexperia HEF4017B
5-stage Johnson decade counter

Table 7. Dynamic characteristics …continued

Tamb = 25 C; VSS = 0 V; for test circuit see Figure 10
Symbol Parameter Conditions VDD Extrapolation formula[1] Min Typ Max Unit
tW pulse width CP0 input LOW; 5V 80 40 - ns
minimum width; 10 V 40 20 - ns
see Figure 8
15 V 30 15 - ns
CP1 input HIGH; 5V 80 40 - ns
minimum width; 10 V 40 20 - ns
see Figure 8
15 V 30 15 - ns
MR input HIGH; 5V 50 25 - ns
minimum width; 10 V 30 15 - ns
see Figure 8
15 V 20 10 - ns
trec recovery time MR input; 5V 60 30 - ns
see Figure 8 10 V 30 15 - ns
15 V 20 10 - ns
fmax maximum see Figure 8 5V 6 12 - MHz
frequency 10 V 12 30 - MHz
15 V 15 30 - MHz

[1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF).
[2] tt is the same as tTHL and tTLH.

Table 8. Dynamic power dissipation PD

PD can be calculated from the formulas shown. VSS = 0 V; tr = tf  20 ns; Tamb = 25 C.
Symbol Parameter VDD Typical formula for PD (W) where:
PD dynamic power 5V PD = 500  fi + (fo  CL)  VDD 2 fi = input frequency in MHz;
dissipation 10 V PD = 2200  fi + (fo  CL)  VDD2 fo = output frequency in MHz;
15 V PD = 6000  fi + (fo  CL)  VDD 2 CL = output load capacitance in pF;
VDD = supply voltage in V;
(CL  fo) = sum of the outputs.

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Product data sheet Rev. 9 — 8 April 2016 9 of 18

Nexperia HEF4017B
5-stage Johnson decade counter

11. Waveforms

9,
&3LQSXW 90
966

9,
&3LQSXW 90

966
W3+/ W3/+
92+
44 90
RXWSXW
92/
W3/+ W3+/
92+
444 90
RXWSXW
92/
W7/+ W7+/
DDM

Conditions: CP1 = LOW, while CP0 triggers on a LOW-to-HIGH transition. CP1 triggers on a HIGH-to-LOW transition;
The shaded areas indicate where the output state is set by the input count.
Measurement points given in Table 9.
Fig 7. Waveforms showing the propagation delays for CP0, CP1 to Qn, Q5-9 outputs and the output transition
times

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Product data sheet Rev. 9 — 8 April 2016 10 of 18

Nexperia HEF4017B
5-stage Johnson decade counter

IPD[
W:
9,

&3LQSXW 90
966
IPD[
9,
&3LQSXW 90

966
W:
WUHF
9,
05LQSXW 90

966
W:
92+
44 90
RXWSXW
92/
W3+/
92+
444
90
RXWSXW
92/
DDM
W3/+

Conditions: CP1 = LOW, while CP0 triggers on a LOW-to-HIGH transition, tW and trec are measured when CP0 = HIGH and
CP1 triggers on a HIGH-to-LOW transition.
The shaded areas indicate where the output state is set by the input count.
Measurement points given in Table 9.
Fig 8. Waveforms showing the minimum pulse width for CP0, CP1 and MR input; the maximum frequency for
CP0 and CP1 input; the recovery time for MR and the MR input to Qn and Q5-9 output propagation delays

9,
&3LQSXW 90 90
966
WK WK

9,
&3LQSXW 90 90
966
DDH

Hold times are shown as positive values, but may be specified as negative values;
Measurement points given in Table 9.
Fig 9. Waveforms showing hold times for CP0 to CP1 and CP1 to CP0

Table 9. Measurement points

Supply voltage Input Output
VDD VM VM
5 V to 15 V 0.5VDD 0.5VDD

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Product data sheet Rev. 9 — 8 April 2016 11 of 18

Nexperia HEF4017B
5-stage Johnson decade counter

W:
9,
 
QHJDWLYH
SXOVH 90 90
 
9
WI WU

WU WI
9,
 
SRVLWLYH
SXOVH 90 90
 
9
W:
DDM

a. Input waveforms

9''

9, 92
* '87

57 &/

DDJ

b. Test circuit
Test data is given in Table 10.
Definitions for test circuit:
DUT = Device Under Test;
CL = load capacitance including jig and probe capacitance;
RT = termination resistance should be equal to the output impedance Zo of the pulse generator.
Fig 10. Test circuit for measuring switching times

Table 10. Test data

Supply voltage Input Load
VDD VI tr, tf CL
5 V to 15 V VSS or VDD  20 ns 50 pF

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Product data sheet Rev. 9 — 8 April 2016 12 of 18

Nexperia HEF4017B
5-stage Johnson decade counter

12. Application information

Some examples of applications for the HEF4017B are:

• Decade counter with decimal decoding

• 1 out of n decoding counter (when cascaded)
• Sequential controller
• Timer

Figure 11 shows a technique for extending the number of decoded output states for the
HEF4017B. Decoded outputs are sequential within each stage and from stage to stage,
with no dead time (except propagation delay).

&3 05 &3 05 &3 05

+()% +()% +()%
&3 &3 &3
4 4 4 4 4 4 4 4 4  4 4

GHFRGHG GHFRGHG GHFRGHG

RXWSXWV RXWSXWV RXWSXWV

FORFN
ILUVWVWDJH LQWHUPHGLDWHVWDJHV ODVWVWDJH
DDH

Enabling the counter on CP1 when CP0 is HIGH, or on CP0 when CP1 is LOW, causes an extra count.
Fig 11. Counter expansion

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Product data sheet Rev. 9 — 8 April 2016 13 of 18

Nexperia HEF4017B
5-stage Johnson decade counter

13. Package outline

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Fig 12. Package outline SOT109-1 (SO16)

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Product data sheet Rev. 9 — 8 April 2016 14 of 18

Nexperia HEF4017B
5-stage Johnson decade counter

14. Revision history

Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
HEF4017B v.9 20160408 Product data sheet - HEF4017B v.8
Modifications: • Type number HEF4017BP (SOT38-4) removed.
HEF4017B v.8 20111118 Product data sheet - HEF4017B v.7
Modifications: • Legal pages updated.
• Changes in “General description” and “Features and benefits”.
• Section “Applications” removed.
HEF4017B v.7 20110914 Product data sheet - HEF4017B v.6
HEF4017B v.6 20091105 Product data sheet - HEF4017B v.5
HEF4017B v.5 20090709 Product data sheet - HEF4017B v.4
HEF4017B v.4 20081209 Product data sheet - HEF4017B_CNV v.3
HEF4017B_CNV v.3 19950101 Product specification - HEF4017B_CNV v.2
HEF4017B_CNV v.2 19950101 Product specification - -

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Product data sheet Rev. 9 — 8 April 2016 15 of 18

Nexperia
15. Legal information
15.1 Data sheet status
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nexperia.com.
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HEF4017B All information provided in this document is subject to legal disclaimers.
Product data sheet
HEF4017B
5-stage Johnson decade counter
Suitability for use — Nexperia products are not designed,
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Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
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Characteristics sections of this document is not warranted. Constant or
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© Nexperia B.V. 2017. All rights reserved
Rev. 9 — 8 April 2016 16 of 18
Nexperia
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For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
HEF4017B All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 9 — 8 April 2016
HEF4017B
5-stage Johnson decade counter
Nexperia’s specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies Nexperia for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond Nexperia’s
standard warranty and Nexperia’s product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
© Nexperia B.V. 2017. All rights reserved
17 of 18
Nexperia HEF4017B
5-stage Johnson decade counter

17. Contents
1 General description . . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1
4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4
5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
6 Functional description . . . . . . . . . . . . . . . . . . . 4
7 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6
8 Recommended operating conditions. . . . . . . . 6
9 Static characteristics. . . . . . . . . . . . . . . . . . . . . 7
10 Dynamic characteristics . . . . . . . . . . . . . . . . . . 8
11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
12 Application information. . . . . . . . . . . . . . . . . . 13
13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14
14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 15
15 Legal information. . . . . . . . . . . . . . . . . . . . . . . 16
15.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 16
15.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
15.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
15.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 17
16 Contact information. . . . . . . . . . . . . . . . . . . . . 17
17 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

© Nexperia B.V. 2017. All rights reserved

For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 08 April 2016