Acer Nitro AN515-43 FH50P LA-H901P Schematic Diagram

A B C D E
1 1
Compal Confidential
2
FH50P MB Schematics Document 2
AMD Picasso Platform
AMD R18M-G1-90
3
LA-H901P REV:1A 3
2019-05-13
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2018/ 12/18 Deciphered Date 2019/12/18 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
COVER PAGE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1A
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50P M/B LA-H901P
Shared with Compal Date: W ednesday, May 15, 2019 Sheet 1 of 99
A B C D E
A B C D E
Compal Confidential
Model Name : FH50P
(Channel A) page 23 (Channel B) page 24
1
260pin DDRIV SO-DIMM 260pin DDRIV SO-DIMM 1
Memory BUS(DDR4)
GPU
GDDR5 x4pcs 128-bits
S4 Package PEG x8
1.2V DDRIV
2400Mhz
RX560X : R18M-G1-90
page 35~36
AMD USB2.0
page 27~33
Port 3 Port 1 Port 2 Port 4 Port 0 Port 5
Display Port
Picasso
Port 1 Port 0 Type-C Type-A (CHG) Type-A Type-A Camera USB2.0 Hub
Conn. Conn. Conn. (SUB) page 38
eDP Conn. HDMI Conn. page 75
page 73
page 38 page 40
page 42~43 page 71 page 72
2 2
USB3.0 Port 3 Port 2 Port 1

Port 3 Port 1 Port 2
AMD FP5 APU Finger Touch WLAN/BT
Print Screen NGFF Conn.
BGA 1140-balls page 66 page 38 page 52
PCIE
Port 0, 1, 2, 3 Port 4 Port 5 page 6~12

SSD1 page 68~70 LAN WLAN/BT
HD Audio
NGFF Conn. RTL8118ASA NGFF Conn.
page 51 page 52
SPI SATA III
Transformer
LPC I2C Audio
RJ45page 51
ALC255
page 56
3 3
page 10
ENE
BIOS (8M, 1.8V) KBC9022
page 38 page 73
page 58
Port 0 Port 1
PS2 Port 3
Int. DMIC Int. Speaker UAJ
PTP HDD SSD2 page 68 on Camera Conn. page 56 on Sub/B
page 63 Conn. NGFF Conn.
page 67
page 63
Int.KBD
Fan Control
page 77
RTC CKT.
page 11
Power On/Off CKT.

page 63
4 4
DC/DC Interface CKT.

page 78 Sub Board
LS-H901 IO/B
Power Circuit DC/DC page 73
page 82~96 Security Classification Compal Secret Data Compal Electronics, Inc.
LS-H502 Hall Sensor/B BLOCK DIAGRAMS

VRAM Config Table page 66
page 29 Custom 1A
Date: Wednesday, May 15, 2019 Sheet 2 of 99
A B C D E
A B C D E
Voltage Rails BOARD ID Table Board ID / SKU ID Table for AD channel

Board ID PCB Revision
Power Plane Description S0 S3 S5
0 EVT
+19V_VIN Adapter power supply (19V) ON ON ON
1 PVT
+19VB AC or battery power rail for power circuit. ON ON ON
2 MP
+APU_CORE Core voltage for APU ON OFF OFF
+APU_CORE_SOC Core voltage for APU ON OFF OFF
9 With RGB BL
+1.8VALW 1.8V always on power rail ON ON OFF
1 1
+1.8VS 1.8V switched power rail ON OFF OFF
+2.5V 2.5V power rail for APU and DDR ON ON OFF
+1.2V 1.2V power rail for APU and DDR ON ON OFF
+0.6VS 0.6V switched power rail for DDR terminator ON OFF OFF
+3VALW 3.3V always on power rail ON ON OFF
+3VS 3.3V switched power rail ON OFF OFF
+5VALW 5V always on power rail ON ON ON
+5VS 5V switched power rail ON OFF OFF
+RTC_APU RTC power ON ON ON
+3V_LAN 3.3V LAN IC power ON ON OFF
+TP_VCC 3.3V Touch Pad power ON ON OFF
+3VSDGPU VGA power ON OFF OFF
+1.8VSDGPU VGA power ON OFF OFF BOM Structure Table
+1.5VSDGPU VGA power ON OFF OFF BOM Structure BTO Item
+VDDCI VGA power ON OFF OFF @ Unpop
+VGA_CORE VGA power ON OFF OFF EMC@/@EMC@ EMI/ESD Pop/Unpop
+FP_VCC 3.3V Finger Print power ON ON OFF 45@ HDMI Royalty
2 CONN@ Mechanical Connector 2
JP@ Jump
RS@ R-Short
TP@ Test Point
LDO@/SWR@ RTL8118ASA Switching-Mode only
APU SMBus/I2C Address Table R5/R7APUQC@ APU PN Refer p.6
Address [7:0] POWER SEQUENCE
Master Device Address[7:1] HDT@ HDT Circuits
Write Read
DIS@ VGA Circuits G-A +RTCBATT
RX560@ R18M-G1-90 GPU / Circuit EC_ON

I2C Port 0
(+1.8VS) EVT@/PVT@/MP@ Test BOM for EVT/PVT/MP +5VALW
3V_EN
I2C Port 1 G-B +3VALW
(+1.8VS) 0.9_1.8VALW_PWREN
TMS@ Thermal Sensor
KBLED@/LED14P@ Keyboard back light / RGB back light +1.8VALW/+0.9VALW
I2C Port 2
(+3VS)
X76_S4G@ VRAM Config Refer p.33 SYSON
0101 0000b 1010 0000b 1010 0001b VRAM Config Refer p.33
G-C
+1.2V/+2.5V
JDIMM1 50h A0h A1h X76_H4G@
SBMus Port 0 SUSP#
(+3VS)
3 +5VS/+3VS/+1.8VS/+0.6VS 3
0101 0001b 1010 0010b 1010 0011b
JDIMM2 51h A2h A3h 0.9VS_PWR_EN#
+0.9VS
PTP 0010 1100b 0101 1000b 0101 1001b
I2C Port 3 (Synaptics) 2Ch 58h 59h VR_ON
(+3VALW) +APU_CORE
PTP 0001 1111b 0011 1110b 0011 1111b G-D
+APU_CORE_SOC
(ELAN) 15h 3Eh 3Fh
SMBus Port 1
(+3VALW)
VGA POWER SEQUENCE
EC SMBus Address Table PE_GPIO1/VGA_ON
+3VSDGPU
0000 1011b 0001 0110b 0001 0111b
Smart Battery 0Bh 16h 17h +1.8VSDGPU
SMBus Port 1
(+3VALW)
Charger IC 0000 1001b 0001 0010b 0001 0011b VGA_ON_B
(BQ24735) 09h 12h 13h +VDDCI
+VGA_CORE
4
APU Temp. 0100 1100b 1001 1000b 1001 1001b 4
(TSI) 4Ch 98h 99h DGPU_PWRGOOD
+1.5VSDGPU
SMBus Port 2 0100 0001b 1000 0010b 1000 0011b PE_GPIO0
(+3VS) GPU Temp. 41h 82h 83h
Thermal Sensor 1001 1010b 1001 1011b Security Classification Compal Secret Data Compal Electronics, Inc.
(Remote1 GPU) 9Ah 9Bh 2018/ 12/18 2019/12/18 Title
(Remote2 APU) Issued Date Deciphered Date
NOTES LIST
Size Document Number Rev
SMBus Port 3 LED driver 1100 0000b 1100 0001b AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1A
(+3VALW) C0h C1h
A B C D E
5 4 3 2 1
PJP101
AC-IN
APU Power Rail
24810mA +APU_CORE 70000mA +APU_CORE
+19V_VIN VDDCR_VDD @0.65-TBD
+19VB 5243mA
PU301 PU801
+APU_CORE_SOC 13000mA +APU_CORE_SOC VDDCR_SOC @0.72-TBD
Group C, S0 domain
+17.4V_BATT
D D
PJP201 250mA +3VS

DC-IN VDD_33 @0.25A
2000mA +1.8VS
VDD_18 @2.0A
Group B, S0 domain
4000mA +0.9VS 4000mA +0.9VS
U4 VDDP @4.0A
+1.2V 9500mA 6000mA +1.2V
638mA VDDIO_MEM_S3 @6.0A
PU501
+0.6VS 1200mA 250mA +3VALW
VDD_33_S5 @0.25A
2026mA +1.8VALW To VGA 1013mA 500mA +1.8VALW
PU602 VDD_18_S5 @0.5A
2660mA
+1.8VS 200mA +1.8VS Group B, S3 domain
UV8 VDDIO_AUDIO @0.2A
5000mA 2200mA
237mA +0.9VALW 1000mA +0.9VALW
PU601 VDDP_S5 @1.0A
+RTCVCC
+RTC_APU_R 0.045mA +RTC_APU_R
JRTC1 UC8 VDDBT_RTC_G @0.045mA Group A, S5 domain
DDR4 SO-DIMM1/SO-DIMM2
528mA +2.5V 528mA +2.5V
C PU502 +2.5V C
4160mA +1.2V
+1.2V
1500mA +0.6VS
+0.6VS
280mA
SATA Redriver*2 (M.2 & HDD)
2790mA +3VS_SSD1
M.2 PCIE SSD
2311mA
PU401 13347mA +3VALW UL1 300mA +3V_LAN
RL2 LAN RTL8118ASA

+3VLP
30mA +TP_VCC Touch Pad
U13
KB9022
1500mA +3VS_WLAN
RM101 WLAN
R18M-G1-90
UM3
59mA +3V_HUB USB HUB
RS148
1500mA +LCDVDD
UX1 Panel Logic
10mA To VGA M.2 SATA SSD

GPU Power Rail (R18M-G1-90)
200mA +1.2V_HDMI
B U1302 HDMI Retimer B
+19VB 140000mA +VGA_CORE

8330mA +3VS 200mA +3VS_CAM PU1401 VDDC @140A
RX18 Camera
U2 3579mA
3869mA 14700mA +5VALW +3VS_SSD1 200mA +5VS_BL
PU401 U2616
U3 KB Light
4200mA +5VS
12000mA +VDDCI
250mA +5VALW_MUX VDDCI @12A
US14
Type C
3000mA +USB3_VCCC RTS5441E
US11
2000mA +USB3_VCCA
US12 USB3.0(Charger)
+VDDCI
VDD_08 @4A
2000mA +USB3_VCCB
US13 USB3.0
2500mA
JIO2 +3VALW UV8 10mA +3VSDGPU
USB/B VDD_GPIO33 @0.01A
To VGA
+VGA_CORE 3579mA 1500mA +5VS_HDD 10mA
+VDDCI/VDD_08 169mA RO4
+1.35VSDGPU 474mA HDD +3VALW 1013mA +1.8VSDGPU VDD_18 @1A
PU701
1000mA +VCC_FAN1 TSVDD @0.013A
RF4/RF7 +VCC_FAN2 1013mA
FAN1/FAN2 2000mA
+19VB 6720mA +1.5VSDGPU VMEMIO @2A
1500mA +5VS_PVDD PU1001
LA1
Audio 474mA
A A
100mA +FP_VCC 4720mA
UK6 +1.5VSDGPU
Finger Print VRAM x4pcs
100mA +TS_PWR
RX17
Touch Screen
2000mA +INVPWR_B+
LX1
Panel BackLight
POWER MAP
Custom 1A
5 4 3 2 1
5 4 3 2 1
AMD Picasso Platform Power Sequence
AC-IN G3 --> S0 S0 --> S3 S3 --> S0

S0 --> S5
+3VLP +3VLP
ACIN 41.49ms ACIN
EC_ON 41.49ms EC_ON
D
+5VALW 2.32ms, Tr = 555us +5VALW D
197.4ms
ON/OFFBTN# 9.608us ON/OFFBTN#
3V_EN 93.85ms 8.190s 3V_EN
+3VALW 1.124ms, Tr = 1.075ms 5.228ms, Tf = 4.973ms +3VALW
0.9_1.8VALW_PWREN 93.9ms 9.166ms 0.9_1.8VALW_PWREN

+1.8VALW 2.560ms, Tr = 1.418ms 7.537ms, Tf = 9.313ms +1.8VALW
+0.9VALW 820.9us, Tr = 358us 1.525ms, Tf = 9.252ms +0.9VALW
199.4ms
PBTN_OUT# 5.422ms 99.42ms 8.190s PBTN_OUT#

EC_RSMRST# 132.6ms 8.190s EC_RSMRST#
SLP_S5# 168us SLP_S5#
SLP_S3# 168us SLP_S3#
SYSON 119ms 51.70ms SYSON
+1.2V 721.4us, Tr = 193.8us 2.353ms, Tf = 38.51us +1.2V
+2.5V 1.695ms, Tr = 1.431ms 5.143ms, Tf = 20.32ms +2.5V
SUSP# 19.85ms 56.14ms 20.48ms 51.69ms SUSP#
C
+5VS 643.7us, Tr = 540.1us 4.415ms. Tf = 4.407ms 696.6us, Tr = 591.2us 6.756ms, Tf = 6.739ms +5VS C
+3VS 683.4us, Tr = 525.9us 33.12ms, Tf = 32.78ms 716.1us, Tr = 555.7us 28.36ms, Tf = 28.04ms +3VS
+1.8VS 321us, Tr = 205.1us 12.87ms, Tf = 12.59ms 327.7us, Tr = 211.1us 13.95ms, Tf = 13.67ms +1.8VS
+0.6VS 16us, Tr = 17.18us 2.716ms, Tf = 2.480ms 15.42us, Tr = 15.38us 837.7us, Tf = 772.7us +0.6VS
KBRST# 19.92ms 60.86ms 19.34ms 58.19ms KBRST#
0.9VS_PWR_EN# 39.66ms 60.92ms 39.45ms 58.25ms 0.9VS_PWR_EN#
+0.9VS 335.9us, Tr = 132.1us 2.3ms, Tf = 2.246ms 331.1us, Tr = 127.2us 2.221ms, Tf = 2.165us +0.9VS
VR_ON 19.77ms 90.80ms 19.77ms 87.99ms VR_ON
+APU_CORE 2.186ms, Tr = 295.7us 339.7us, Tf = 267.5us 2.190ms, Tr = 299.8us 335.2us, Tf = 247.5us +APU_CORE
+APU_CORE_SOC 2.212ms, Tr = 316.7us 338.9us, Tf = 284.6us 2.210ms, Tr = 313.4us 329.9us, Tf = 273.3us +APU_CORE_NB
VGATE 2.393ms 2.391ms VGATE

SYS_PWRGD_EC 41.59ms 27.25ms 41.56ms 24.92ms SYS_PWRGD_EC
APU_PWROK 15.02ms 1.306ms 15.10ms 1.31ms APU_PWROK
LPC_RST# 10.39ms 4.826ms 10.61ms 4.837ms LPC_RST#
APU_PCIE_RST# 12.24ms 4.956ms 12.64ms 4.92ms 1.575s APU_PCIE_RST#
APU_RST# 21.36ms 4.956ms 21.60ms 4.92ms APU_RST#
B B
VGA Sequence VGA Sequence

PE_GPIO1 1.93s 11.1ms 211.1ms 10.96ms PE_GPIO1
+3VSDGPU 1.153ms, Tr = 955.4us 77us, Tf = 266.8us 1.158ms, Tr = 956.5us 75.49us, Tf = 2.634ms +3VSDGPU
+1.8VSDGPU 4.470ms, Tr = 1.359ms 13.44ms, Tf = 3.396ms 4.496ms, Tr = 1.374ms 13.39ms, Tf = 3.463ms +1.8VSDGPU
VGA_ON_B 5.351ms 11.1ms 5.354ms 10.97ms VGA_ON_B

+VDDCI 6.218ms, Tr = 84.15us 1.652ms, Tf = 21.21ms 6.173ms, Tr = 84.5us 1.665ms, Tf = 19.63ms +VDDCI
+VGA_CORE 6.218ms, Tr = 85.54us 894us, Tf = 5.296ms 6.173ms, Tr = 86.28us 653.5ms, Tf = 4.784ms +VGA_CORE
DGPU_PWRGOOD 6.174ms 11.1ms 6.216ms 10.97ms DGPU_PWRGOOD
+1.5VSDGPU 772.6us, Tr = 416.8us 1.746ms, Tf = 18.06ms 830.8us, Tr = 480.8us 1.758ms, Tf = 17.78ms +1.5VSDGPU
PE_GPIO0 139.7ms 96.42ms PE_GPIO0
PLT_RST_VGA# 5.036ms 5.032ms PLT_RST_VGA#
A A

POWER SEQUENCE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1A
5 4 3 2 1
5 4 3 2 1
Main Func = CPU
UC1B
PCIE
D D
PEG_ARX_GTX_P0 P8 P_GFX_RXP0 P_GFX_TXP0 N1 PEG_ATX_GRX_P0

27 PEG_ARX_GTX_P0 PEG_ARX_GTX_N0 PEG_ATX_GRX_N0 PEG_ATX_GRX_P0 27
P9 P_GFX_RXN0 P_GFX_TXN0 N3
27 PEG_ARX_GTX_N0 PEG_ATX_GRX_N0 27
PEG_ARX_GTX_P1 N6 P_GFX_RXP1 P_GFX_TXP1 M2 PEG_ATX_GRX_P1
N7 P_GFX_RXN1 P_GFX_TXN1 M4
PEG PEG_ARX_GTX_P2 M8 P_GFX_RXP2 P_GFX_TXP2 L2 PEG_ATX_GRX_P2
M9 P_GFX_RXN2 P_GFX_TXN2 L4
PEG_ARX_GTX_P3 L6 P_GFX_RXP3 P_GFX_TXP3 L1 PEG_ATX_GRX_P3
L7 P_GFX_RXN3 P_GFX_TXN3 L3
PEG
PEG_ARX_GTX_P4 K11 P_GFX_RXP4 P_GFX_TXP4 K2 PEG_ATX_GRX_P4
J11 P_GFX_RXN4 P_GFX_TXN4 K4
PEG_ARX_GTX_P5 H6 P_GFX_RXP5 P_GFX_TXP5 J2 PEG_ATX_GRX_P5
H7 P_GFX_RXN5 P_GFX_TXN5 J4
PEG_ARX_GTX_P6 G6 P_GFX_RXP6 P_GFX_TXP6 H1 PEG_ATX_GRX_P6
F7 P_GFX_RXN6 P_GFX_TXN6 H3
PEG_ARX_GTX_P7 G8 P_GFX_RXP7 P_GFX_TXP7 H2 PEG_ATX_GRX_P7
F8 P_GFX_RXN7 P_GFX_TXN7 H4
PCIE_ARX_DTX_P0 N10 P_GPP_RXP0 P_GPP_TXP0 N2 PCIE_ATX_DRX_P0 CC1204 1 2 0.22U_0402_16V7K

68 PCIE_ARX_DTX_P0 PCIE_ARX_DTX_N0 PCIE_ATX_DRX_N0 PCIE_ATX_C_DRX_P0 68
C N9 P_GPP_RXN0 P_GPP_TXN0 P3 CC1203 1 2 0.22U_0402_16V7K C
68 PCIE_ARX_DTX_N0 PCIE_ATX_C_DRX_N0 68
PCIE_ARX_DTX_P1 L10 P_GPP_RXP1 P_GPP_TXP1 P4 PCIE_ATX_DRX_P1 CC1206 1 2 0.22U_0402_16V7K
L9 P_GPP_RXN1 P_GPP_TXN1 P2 CC1205 1 2 0.22U_0402_16V7K
M.2 SSD1 M.2 SSD1
PCIE_ARX_DTX_P2 L12 P_GPP_RXP2 P_GPP_TXP2 R3 PCIE_ATX_DRX_P2 CC1212 1 2 0.22U_0402_16V7K
M11 P_GPP_RXN2 P_GPP_TXN2 R1 CC1211 1 2 0.22U_0402_16V7K
PCIE_ARX_DTX_P3 P12 P_GPP_RXP3 P_GPP_TXP3 T4 PCIE_ATX_DRX_P3 CC1214 1 2 0.22U_0402_16V7K
P11 P_GPP_RXN3 P_GPP_TXN3 T2 CC1213 1 2 0.22U_0402_16V7K
PCIE_ARX_DTX_P4 V6 P_GPP_RXP4 P_GPP_TXP4 W2 PCIE_ATX_DRX_P4 CC1 1 2 .1U_0402_16V7K

LAN V7 P_GPP_RXN4 P_GPP_TXN4 W4 CC2 1 2 .1U_0402_16V7K LAN
PCIE_ARX_DTX_P5 T8 P_GPP_RXP5 P_GPP_TXP5 W3 PCIE_ATX_DRX_P5 CC3 1 2 .1U_0402_16V7K
WLAN T9 P_GPP_RXN5 P_GPP_TXN5 V2 CC4 1 2 .1U_0402_16V7K WLAN
SATA_ARX_DTX_P0 R6 P_GPP_RXP6/SATA_RXP0 P_GPP_TXP6/SATA_TXP0 V1 SATA_ATX_DRX_P0
67 SATA_ARX_DTX_P0 SATA_ARX_DTX_N0 SATA_ATX_DRX_N0 SATA_ATX_DRX_P0 67
HDD R7 P_GPP_RXN6/SATA_RXN0 P_GPP_TXN6/SATA_TXN0 V3 HDD
67 SATA_ARX_DTX_N0 SATA_ATX_DRX_N0 67
SATA_ARX_DTX_P1 R9 P_GPP_RXP7/SATA_RXP1 P_GPP_TXP7/SATA_TXP1 U2 SATA_ATX_DRX_P1
69 SATA_ARX_DTX_P1 SATA_ARX_DTX_N1 SATA_ATX_DRX_N1 SATA_ATX_DRX_P1 69
M.2 SSD2 R10 P_GPP_RXN7/SATA_RXN1 P_GPP_TXN7/SATA_TXN1 U4 M.2 SSD2
69 SATA_ARX_DTX_N1 SATA_ATX_DRX_N1 69
FP5 REV 0.90

PART 2 OF 13
B FP5_BGA_1140P B
@
APU PN Table
APU Platform Customer PN Customer PN Customer PN Customer PN Compal PN Compal PN
UC1 R5APUQC@ UC1 R7APUQC@ UC1 R5APU@ UC1 R7APU@
Picasso
S IC RYZEN5 YM3500C4T4MFG 2.1G BGA APU S IC RYZEN7 YM3700C4T4MFG 2.3G BGA APU S IC RYZEN5 YM3500C4T4MFG 2.1G APU ABO! S IC RYZEN7 YM3700C4T4MFG 2.3G APU ABO!
SA0000CCR20 SA0000C7640 SA0000CCR60 SA0000C7680
PCB Number
A A
ZZZ EVT@
PCB 2QE LA-H901P REV0 MB 2
DA8001JM000
ZZZ PVT@
PCB FH50P LA-H901P LS-H901P/H502P
DAZ2QE00100 Security Classification Compal Secret Data Compal Electronics, Inc.
PCB: DAZ2QE00100, DA8001JM010 REV: 1.0/1.0/1.0 2018/ 12/18 2019/12/18 Title
Issued Date Deciphered Date
ZZZ MP@
FP5_(1/7)_PEG/PCIE/SATA
PCB FH50P LA-H901P LS-H901P/H502P AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DAZ2QE00101 Custom 1A
PCB: DAZ2QE00101, DA8001JM01A REV: 1.A/1.0/1.0
Date: W ednesday, May 15, 2019 Sheet 6 of 99
5 4 3 2 1
5 4 3 2 1
Main Func = CPU

UC1A UC1I
MEMORY A
23 DDR_A_MA[13..0]
MEMORY B
DDR_A_MA0 AF25 DDR_A_DQ[63..0] 23 24 DDR_B_MA[13..0]
MA_ADD0
DDR_A_MA1 AE23 J21 DDR_A_DQ0 DDR_B_MA0 AG30 DDR_B_DQ[63..0] 24
MA_ADD1 MA_DATA0 MB_ADD0
DDR_A_MA2 AD27 MA_ADD2 MA_DATA1 H21 DDR_A_DQ1 DDR_B_MA1 AC32 MB_ADD1 MB_DATA0 B21 DDR_B_DQ0
DDR_A_MA3 AE21 MA_ADD3 MA_DATA2 F23 DDR_A_DQ2 DDR_B_MA2 AC30 MB_ADD2 MB_DATA1 D21 DDR_B_DQ1
DDR_A_MA4 AC24 MA_ADD4 MA_DATA3 H23 DDR_A_DQ3 DDR_B_MA3 AB29 MB_ADD3 MB_DATA2 B23 DDR_B_DQ2
DDR_A_MA5 AC26 MA_ADD5 MA_DATA4 G20 DDR_A_DQ4 DDR_B_MA4 AB31 MB_ADD4 MB_DATA3 D23 DDR_B_DQ3
DDR_A_MA6 AD21 MA_ADD6 MA_DATA5 F20 DDR_A_DQ5 DDR_B_MA5 AA30 MB_ADD5 MB_DATA4 A20 DDR_B_DQ4
DDR_A_MA7 AC27 MA_ADD7 MA_DATA6 J22 DDR_A_DQ6 DDR_B_MA6 AA29 MB_ADD6 MB_DATA5 C20 DDR_B_DQ5
D D
DDR_A_MA8 AD22 MA_ADD8 MA_DATA7 J23 DDR_A_DQ7 DDR_B_MA7 Y30 MB_ADD7 MB_DATA6 A22 DDR_B_DQ6
DDR_A_MA9 AC21 MA_ADD9
DDR_B_MA8 AA31 MB_ADD8 MB_DATA7 C22 DDR_B_DQ7
DDR_A_MA10 AF22 MA_ADD10 MA_DATA8 G25 DDR_A_DQ8 DDR_B_MA9 W29 MB_ADD9
DDR_A_MA11 AA24 MA_ADD11 MA_DATA9 F26 DDR_A_DQ9 DDR_B_MA10 AH29 MB_ADD10 MB_DATA8 D24 DDR_B_DQ8
DDR_A_MA12 AC23 MA_ADD12 MA_DATA10 L24 DDR_A_DQ10 DDR_B_MA11 Y32 MB_ADD11 MB_DATA9 A25 DDR_B_DQ9
DDR_A_MA13 AJ25 MA_ADD13_BANK2 MA_DATA11 L26 DDR_A_DQ11 DDR_B_MA12 W31 MB_ADD12 MB_DATA10 D27 DDR_B_DQ10
DDR_A_MA14_WE# AG27 MA_WE_L_ADD14 MA_DATA12 L23 DDR_A_DQ12 DDR_B_MA13 AL30 MB_ADD13_BANK2 MB_DATA11 C27 DDR_B_DQ11
23 DDR_A_MA14_WE# DDR_A_MA15_CAS# AG23 F25 DDR_A_DQ13 DDR_B_MA14_WE# AK30 C23 DDR_B_DQ12
MA_CAS_L_ADD15 MA_DATA13 MB_WE_L_ADD14 MB_DATA12
23 DDR_A_MA15_CAS# DDR_A_MA16_RAS# AG26 K25 DDR_A_DQ14 24 DDR_B_MA14_WE# DDR_B_MA15_CAS# AK32 B24 DDR_B_DQ13
MA_RAS_L_ADD16 MA_DATA14 MB_CAS_L_ADD15 MB_DATA13
23 DDR_A_MA16_RAS# DDR_A_DQ15 24 DDR_B_MA15_CAS# DDR_B_MA16_RAS# DDR_B_DQ14
MA_DATA15 K27 AJ30 MB_RAS_L_ADD16 MB_DATA14 C26
24 DDR_B_MA16_RAS# B27 DDR_B_DQ15
MB_DATA15
DDR_A_BA0 AF21 MA_BANK0 MA_DATA16 M25 DDR_A_DQ16
23 DDR_A_BA0 DDR_A_BA1 AF27 M27 DDR_A_DQ17 DDR_B_BA0 AH31 C30 DDR_B_DQ16
MA_BANK1 MA_DATA17 MB_BANK0 MB_DATA16
23 DDR_A_BA1 P27 DDR_A_DQ18 24 DDR_B_BA0 DDR_B_BA1 AG32 E29 DDR_B_DQ17
MA_DATA18 MB_BANK1 MB_DATA17
DDR_A_BG0 DDR_A_DQ19 24 DDR_B_BA1 DDR_B_DQ18
AA21 MA_BG0 MA_DATA19 R24 MB_DATA18 H29
23 DDR_A_BG0 DDR_A_BG1 AA27 L27 DDR_A_DQ20 DDR_B_BG0 V31 H31 DDR_B_DQ19
MA_BG1 MA_DATA20 MB_BG0 MB_DATA19
23 DDR_A_BG1 M24 DDR_A_DQ21 24 DDR_B_BG0 DDR_B_BG1 V29 A28 DDR_B_DQ20
MA_DATA21 MB_BG1 MB_DATA20
DDR_A_ACT# AA22 P24 DDR_A_DQ22 24 DDR_B_BG1 D28 DDR_B_DQ21
MA_ACT_L MA_DATA22 MB_DATA21
23 DDR_A_ACT# P25 DDR_A_DQ23 DDR_B_ACT# V30 F31 DDR_B_DQ22
MA_DATA23 MB_ACT_L MB_DATA22
23 DDR_A_DM[7..0] DDR_A_DM0 24 DDR_B_ACT# DDR_B_DQ23
F21 MA_DM0 MB_DATA23 G30
DDR_A_DM1 G27 M22 DDR_A_DQ24 24 DDR_B_DM[7..0] DDR_B_DM0 C21
MA_DM1 MA_DATA24 MB_DM0
DDR_A_DM2 N24 MA_DM2 MA_DATA25 N21 DDR_A_DQ25 DDR_B_DM1 C25 MB_DM1 MB_DATA24 J29 DDR_B_DQ24
DDR_A_DM3 N23 MA_DM3 MA_DATA26 T22 DDR_A_DQ26 DDR_B_DM2 E32 MB_DM2 MB_DATA25 J31 DDR_B_DQ25
DDR_A_DM4 AL24 MA_DM4 MA_DATA27 V21 DDR_A_DQ27 DDR_B_DM3 K30 MB_DM3 MB_DATA26 L29 DDR_B_DQ26
DDR_A_DM5 AN27 MA_DM5 MA_DATA28 L21 DDR_A_DQ28 DDR_B_DM4 AP30 MB_DM4 MB_DATA27 L31 DDR_B_DQ27
DDR_A_DM6 AW25 MA_DM6 MA_DATA29 M20 DDR_A_DQ29 DDR_B_DM5 AW31 MB_DM5 MB_DATA28 H30 DDR_B_DQ28
DDR_A_DM7 AT21 MA_DM7 MA_DATA30 R23 DDR_A_DQ30 DDR_B_DM6 BB26 MB_DM6 MB_DATA29 H32 DDR_B_DQ29
T27 RSVD_36 MA_DATA31 T21 DDR_A_DQ31 DDR_B_DM7 BD22 MB_DM7 MB_DATA30 L30 DDR_B_DQ30
N32 RSVD_21 MB_DATA31 L32 DDR_B_DQ31
DDR_A_DQS0 F22 MA_DQS_H0 MA_DATA32 AL27 DDR_A_DQ32
23 DDR_A_DQS0 DDR_A_DQS0# G22 AL25 DDR_A_DQ33 DDR_B_DQS0 D22 AP29 DDR_B_DQ32
MA_DQS_L0 MA_DATA33 MB_DQS_H0 MB_DATA32
23 DDR_A_DQS0# DDR_A_DQS1 H27 AP26 DDR_A_DQ34 24 DDR_B_DQS0 DDR_B_DQS0# B22 AP32 DDR_B_DQ33
MA_DQS_H1 MA_DATA34 MB_DQS_L0 MB_DATA33
23 DDR_A_DQS1 DDR_A_DQS1# H26 AR27 DDR_A_DQ35 24 DDR_B_DQS0# DDR_B_DQS1 D25 AT29 DDR_B_DQ34
23 DDR_A_DQS1# DDR_A_DQS2 N27 AK26 DDR_A_DQ36 24 DDR_B_DQS1 DDR_B_DQS1# B25 AU32 DDR_B_DQ35
23 DDR_A_DQS2 DDR_A_DQS2# DDR_A_DQ37 24 DDR_B_DQS1# DDR_B_DQS2 DDR_B_DQ36
N26 MA_DQS_L2 MA_DATA37 AK24 F29 MB_DQS_H2 MB_DATA36 AN30
C 23 DDR_A_DQS2# DDR_A_DQS3 R21 AM24 DDR_A_DQ38 24 DDR_B_DQS2 DDR_B_DQS2# F30 AP31 DDR_B_DQ37 C
23 DDR_A_DQS3 DDR_A_DQS3# P21 AP27 DDR_A_DQ39 24 DDR_B_DQS2# DDR_B_DQS3 K31 AR30 DDR_B_DQ38
23 DDR_A_DQS3# DDR_A_DQS4 AM26 24 DDR_B_DQS3 DDR_B_DQS3# K29 AT31 DDR_B_DQ39
MA_DQS_H4 MB_DQS_L3 MB_DATA39
23 DDR_A_DQS4 DDR_A_DQS4# AM27 AM23 DDR_A_DQ40 24 DDR_B_DQS3# DDR_B_DQS4 AR29
MA_DQS_L4 MA_DATA40 MB_DQS_H4
23 DDR_A_DQS4# DDR_A_DQS5 DDR_A_DQ41 24 DDR_B_DQS4 DDR_B_DQS4# DDR_B_DQ40
AN24 MA_DQS_H5 MA_DATA41 AM21 AR31 MB_DQS_L4 MB_DATA40 AU29
23 DDR_A_DQS5 DDR_A_DQS5# AN25 AR25 DDR_A_DQ42 24 DDR_B_DQS4# DDR_B_DQS5 AW30 AV30 DDR_B_DQ41
23 DDR_A_DQS5# DDR_A_DQS6 AU23 AU27 DDR_A_DQ43 24 DDR_B_DQS5 DDR_B_DQS5# AW29 BB30 DDR_B_DQ42
23 DDR_A_DQS6 DDR_A_DQS6# AT23 AL22 DDR_A_DQ44 24 DDR_B_DQS5# DDR_B_DQS6 BC25 BA28 DDR_B_DQ43
23 DDR_A_DQS6# DDR_A_DQS7 AV20 AL21 DDR_A_DQ45 24 DDR_B_DQS6 DDR_B_DQS6# BA25 AU30 DDR_B_DQ44
23 DDR_A_DQS7 DDR_A_DQS7# DDR_A_DQ46 24 DDR_B_DQS6# DDR_B_DQS7 DDR_B_DQ45
AW20 MA_DQS_L7 MA_DATA46 AP24 BC22 MB_DQS_H7 MB_DATA45 AU31
23 DDR_A_DQS7# V24 AP23 DDR_A_DQ47 24 DDR_B_DQS7 DDR_B_DQS7# BA22 AY32 DDR_B_DQ46
RSVD_41 MA_DATA47 MB_DQS_L7 MB_DATA46
V23 24 DDR_B_DQS7# N31 AY29 DDR_B_DQ47
RSVD_40 RSVD_20 MB_DATA47
MA_DATA48 AW26 DDR_A_DQ48 N29 RSVD_18
DDR_A_CLK0 AD25 MA_CLK_H0 MA_DATA49 AV25 DDR_A_DQ49 MB_DATA48 BA27 DDR_B_DQ48
23 DDR_A_CLK0 DDR_A_CLK0# DDR_A_DQ50 DDR_B_CLK0 DDR_B_DQ49
AD24 MA_CLK_L0 MA_DATA50 AV22 AC31 MB_CLK_H0 MB_DATA49 BC27
23 DDR_A_CLK0# DDR_A_CLK1 AE26 AW22 DDR_A_DQ51 24 DDR_B_CLK0 DDR_B_CLK0# AD30 BA24 DDR_B_DQ50
MA_CLK_H1 MA_DATA51 MB_CLK_L0 MB_DATA50
23 DDR_A_CLK1 DDR_A_CLK1# AE27 AU26 DDR_A_DQ52 24 DDR_B_CLK0# DDR_B_CLK1 AD29 BC24 DDR_B_DQ51
MA_CLK_L1 MA_DATA52 MB_CLK_H1 MB_DATA51
23 DDR_A_CLK1# AV27 DDR_A_DQ53 24 DDR_B_CLK1 DDR_B_CLK1# AD31 BD28 DDR_B_DQ52
MA_DATA53 MB_CLK_L1 MB_DATA52
AW23 DDR_A_DQ54 24 DDR_B_CLK1# AE30 BB27 DDR_B_DQ53
MA_DATA54 MB_CLK_H2 MB_DATA53
MA_DATA55 AT22 DDR_A_DQ55 AE32 MB_CLK_L2 MB_DATA54 BB25 DDR_B_DQ54
AF29 MB_CLK_H3 MB_DATA55 BD25 DDR_B_DQ55
MA_DATA56 AW21 DDR_A_DQ56 AF31 MB_CLK_L3
DDR_A_CS0# AG21 MA_CS_L0 MA_DATA57 AU21 DDR_A_DQ57 MB_DATA56 BC23 DDR_B_DQ56
23 DDR_A_CS0# DDR_A_CS1# AJ27 AP21 DDR_A_DQ58 DDR_B_CS0# AJ31 BB22 DDR_B_DQ57
MA_CS_L1 MA_DATA58 MB0_CS_L0 MB_DATA57
23 DDR_A_CS1# DDR_A_DQ59 24 DDR_B_CS0# DDR_B_CS1# DDR_B_DQ58
MA_DATA59 AN20 AM31 MB0_CS_L1 MB_DATA58 BC21
AR22 DDR_A_DQ60 24 DDR_B_CS1# AJ29 BD20 DDR_B_DQ59
MA_DATA60 MB1_CS_L0 MB_DATA59
MA_DATA61 AN22 DDR_A_DQ61 AM29 MB1_CS_L1 MB_DATA60 BB23 DDR_B_DQ60
MA_DATA62 AT20 DDR_A_DQ62 MB_DATA61 BA23 DDR_B_DQ61
MA_DATA63 AR20 DDR_A_DQ63 MB_DATA62 BB21 DDR_B_DQ62
DDR_A_CKE0 Y23 MA_CKE0 MB_DATA63 BA21 DDR_B_DQ63
23 DDR_A_CKE0 DDR_A_CKE1 Y26 T24 DDR_B_CKE0 U29
MA_CKE1 RSVD_34 MB0_CKE0
23 DDR_A_CKE1 T25 24 DDR_B_CKE0 DDR_B_CKE1 T30 M31
RSVD_35 MB0_CKE1 RSVD_17
W25 24 DDR_B_CKE1 V32 N30
RSVD_51 MB1_CKE0 RSVD_19
RSVD_52 W27 U31 MB1_CKE1 RSVD_26 P31
DDR_A_ODT0 AG24 MA_ODT0 RSVD_27 R26 RSVD_29 R32
B
23 DDR_A_ODT0 DDR_A_ODT1 AJ22 R27 DDR_B_ODT0 AL31 M30 B
MA_ODT1 RSVD_28 MB0_ODT0 RSVD_16
23 DDR_A_ODT1 V27 24 DDR_B_ODT0 DDR_B_ODT1 AM32 M29
RSVD_43 MB0_ODT1 RSVD_15
V26 24 DDR_B_ODT1 AL29 P30
RSVD_42 MB1_ODT0 RSVD_25
AM30 MB1_ODT1 RSVD_24 P29
DDR_A_ALERT# AA25 MA_ALERT_L
23 DDR_A_ALERT# AF24 DDR_A_PAR DDR_B_ALERT# W30
MA_PAROUT MB_ALERT_L
DDR_A_EVENT# AE24 DDR_A_PAR 23 24 DDR_B_ALERT# AG31 DDR_B_PAR
MA_EVENT_L MB_PAROUT
23 DDR_A_EVENT# DDR_A_RST# Y24 DDR_B_EVENT# AG29 DDR_B_PAR 24
MA_RESET_L MB_EVENT_L
23 DDR_A_RST# 24 DDR_B_EVENT# DDR_B_RST# T31
FP5 REV 0.90 MB_RESET_L
PART 1 OF 13
24 DDR_B_RST#
FP5 REV 0.90
@ PART 9 OF 13
FP5_BGA_1140P @
FP5_BGA_1140P
EVENT# pull high

+1.2V
RC1 1 2 1K_0402_5% DDR_B_EVENT#
+1.2V
RC2 1 2 1K_0402_5% DDR_A_EVENT#

A A

FP5_(2/7)_DDR4
Custom 1A
5 4 3 2 1
A B C D E
Main Func = CPU

DISP
+1.8VALW
EC/THERM
5
UC1C UC66
+3VS 1
P
NC 4 ENBKL
DISPLAY/SVI2/JTAG/TEST
1 2 APU_SID APU_DP0_P0 C8 G15 ENBKL_R ENBKL_R 2 Y ENBKL 58
RC105 1K_0402_5% DP0_TXP0 DP_BLON
40 APU_DP0_P0 A
G
RC106 1 2 1K_0402_5% APU_ALERT# APU_DP0_N0 A8 DP0_TXN0 IO18 DP_DIGON F15 ENVDD_R
1 2 APU_SIC 40 APU_DP0_N0 L14 INVTPWM_R
RC107 1K_0402_5% DP_VARY_BL NL17SZ07DFT2G_SC70-5
3
RC108 1 2 1K_0402_5% APU_PROCHOT# APU_DP0_P1 D8 DP0_TXP1 SA00004BV00
40 APU_DP0_P1 APU_DP0_N1 APU_DP0_CTRL_CLK
1
B8 DP0_TXN1 DP0_AUXP D9 1
40 APU_DP0_N1 B9 APU_DP0_CTRL_DATA APU_DP0_CTRL_CLK 40
HDMI DP0_AUXN
APU_DP0_CTRL_DATA 40 HDMI
APU_DP0_P2 B6 DP0_TXP2 DP0_HPD C10 APU_DP0_HPD
40 APU_DP0_P2 APU_DP0_N2 C7 APU_DP0_HPD 40 +1.8VALW
DP0_TXN2
40 APU_DP0_N2 G11 EDP_AUXP
DP1_AUXP
APU_DP0_P3 EDP_AUXN EDP_AUXP 38
C6 DP0_TXP3 DP1_AUXN F11 EDP
40 APU_DP0_P3 EDP_AUXN 38
5
APU_DP0_N3 D6 G13 EDP_HPD UC64
40 APU_DP0_N3 DP0_TXN3
DP3: DP1_HPD
EDP_HPD 38
1
P
38 EDP_TXP0
EDP_TXP0 E6 DP1_TXP0 DP2: DP2_AUXP J12 NC
Y
4 ENVDD
ENVDD 38
EDP_TXN0 D5 H12 ENVDD_R 2
38 EDP_TXN0 DP1_TXN0 DP1: eDP DP2_AUXN
A
G
DP2_HPD K13
38 EDP_TXP1
EDP_TXP1 E1 DP1_TXP1 DP0: HDMI NL17SZ07DFT2G_SC70-5
3
EDP_TXN1 C1 DP1_TXN1 DP3_AUXP J10 @ SA00004BV00
38 EDP_TXN1 H10
DP3_AUXN
EDP EDP_TXP2 F3 DP1_TXP2 DP3_HPD K8
38 EDP_TXP2 EDP_TXN2 ENVDD_R
E4 DP1_TXN2 RC690 1 RS@ 2 0_0402_5% ENVDD
38 EDP_TXN2 K15 DP_STEREOSYNC
DP_STEREOSYNC
EDP_TXP3 F4 DP1_TXP3
38 EDP_TXP3 EDP_TXN3 F2 F14
DP1_TXN3 RSVD_4
38 EDP_TXN3 F12 +1.8VALW
RSVD_3
EC_SMB_CK2 RC616 1 2 0_0402_5% APU_SIC
28,58,66 EC_SMB_CK2 EC_SMB_DA2 1 2 0_0402_5% APU_SID F10
RC617 RSVD_2
28,58,66 EC_SMB_DA2
5
UC65
1
P
NC 4 INVTPWM
INVTPWM_R Y INVTPWM 38
2
A
G
NL17SZ07DFT2G_SC70-5
3
SA00004BV00
TEST4 AP14 APU_TEST4 TP@

APU_TEST5 T4949
TEST5 AN14 TP@ T4948 +3VS
TEST6 F13
ENBKL RC3 1 2 4.7K_0402_5%
TEST14 G18 APU_TEST14
2 H19 APU_TEST15 ENVDD 1 2 4.7K_0402_5% 2
TEST15 RC4 @
TEST16 F18 APU_TEST16
TEST17 F19 APU_TEST17 INVTPWM RC5 1 2 4.7K_0402_5%
+3VS
TEST31 W24 APU_TEST31 TP@ T4942
RC664 1 2 1K_0402_5% THERMTRIP#
TEST41 AR11 APU_TEST41 TP@ T4941 ENBKL_R RC6130 1 2 100K_0402_5%
APU_TDI AU2 TDI TEST470 AJ21 APU_TEST470 TP@
APU_PROCHOT# APU_TDO APU_TEST471 TP@ T4940 ENVDD_R
AU4 TDO TEST471 AK21 T4939 RC6131 1 2 100K_0402_5%
APU_RST# APU_TCK AU1 TCK
APU_PWROK APU_TMS AU3 TMS IO18S5 INVTPWM_R RC6132 1 @ 2 100K_0402_5%
APU_TRST# AV3
1 1 1 TRST_L
@EMC@ EMC@ EMC@ APU_DBREQ# AW3 DBREQ_L
CC1202 CC5 CC6 +0.9VS
.1U_0402_16V7K 33P_0402_50V8J 33P_0402_50V8J
2 2 2 RC80 1 2 300_0402_5% APU_RST# AW4 RESET_L SMU_ZVDD V4 SMU_ZVDDP RC1682 1 2 196_0402_1%
+1.8VS APU_PWROK +3VALW
RC81 1 2 300_0402_5% AW2 PWROK IO18
+1.8VS
88 APU_PWROK APU_SIC H14 AW11
SIC CORETYPE CORETYPE RC1681 1 @ 2 1K_0402_5%
Close to APU APU_SID J14 SID
APU_ALERT# J15 ALERT_L
THERMTRIP# AP16 THERMTRIP_L IO33 VDDP_SENSE AN11 APU_VDDP_SEN_H
58 THERMTRIP# APU_PROCHOT# APU_CORESOC_SEN_H APU_VDDP_SEN_H 87
L19 PROCHOT_L VDDCR_SOC_SENSE J19
58,84,88 APU_PROCHOT# K18 APU_CORE_SEN_H APU_CORESOC_SEN_H 88
VDDCR_SENSE
APU_CORE_SEN_H 88 Leakage prevent from power side
SVID 88 APU_SVC
RC669 1
RC670 1
2 0_0402_5% APU_SVC_R
2 0_0402_5% APU_SVD_R
F16
H16
SVC0
SVD0 IO18 VSS_SENSE_A J18 APU_VSS_SEN_L
88 APU_SVD APU_SVT_R APU_VSS_SEN_L 88
J16 SVT0 FP5 REV 0.90 VSS_SENSE_B AM11 APU_VDDP_SEN_L
+1.8VS 88 APU_SVT_R PART 3 OF 13
APU_VDDP_SEN_L 87
@ FP5_BGA_1140P
RC109 1 @ 2 1K_0402_5% APU_SVT_R

3 RC110 1 @ 2 1K_0402_5% APU_SVC 3
RC111 1 @ 2 1K_0402_5% APU_SVD
HDT+ TESTPOINT
+1.8VS
+1.8VALW DP_STEREOSYNC RC155 1 2 1K_0402_5%

+1.8VALW
JHDT1 CONN@ RC154 1 @ 2 1K_0402_5%
1 2 APU_TCK_R RH27 1 HDT@ 2 0_0402_5% APU_TCK APU_TCK RH34 1 2 1K_0402_5%
1 2 APU_TMS RH35 1 2 1K_0402_5%
3 4 APU_TMS_R RH28 1 HDT@ 2 0_0402_5% APU_TMS APU_TDI RH36 1 2 1K_0402_5%
3 4 APU_DBREQ# RH37 1 2 1K_0402_5%
5 6 APU_TDI_R RH29 1 HDT@ 2 0_0402_5% APU_TDI
5 6
7 8 APU_TDO_R RH30 1 HDT@ 2 0_0402_5% APU_TDO
7 8 +1.8VS
APU_TRST# RH21 1 2 33_0402_5% APU_TRST#_R 9 10 APU_PWROK_R RH31 1 HDT@ 2 0_0402_5% APU_PWROK APU_TRST# RH26 1 2 1K_0402_5%
9 10
RH38 2 1 10K_0402_5% HDT_P11 11 12 APU_RST#_R RH32 1 HDT@ 2 0_0402_5% APU_RST#
2 11 12
CH2 APU_TEST14 RC112 2 @ 1 10K_0402_5%
0.01U_0402_16V7K RH39 2 1 10K_0402_5% HDT_P13 13 14 APU_TEST15 RC113 2 @ 1 10K_0402_5%
13 14 APU_TEST16 RC114 2 @ 1 10K_0402_5%
1 RH40 2 1 10K_0402_5% HDT_P15 15 16 APU_DBREQ#_R RH33 1 2 33_0402_5% APU_DBREQ# APU_TEST17 RC115 2 @ 1 10K_0402_5%
15 16
4 4
17 18
17 18
19 20 Follow C5V08
19 20
SAMTE_ASP-136446-07-B

(3/7)_DISP/MISC/HDT
Custom 1A
A B C D E
A B C D E
Main Func = CPU
+1.8VALW
UC1D I2C_0_SCL RC6139 1 @ 2 2.2K_0402_5%

ACPI/AUDIO/I2C/GPIO/MISC I2C_0_SDA RC6140 1 @ 2 2.2K_0402_5%
CC7 1 2 150P_0402_50V8J
@ CC100 1 2 150P_0402_50V8J EGPIO41/SFI_S5_EGPIO41 AW12 I2C_1_SCL RC6176 1 @ 2 2.2K_0402_5%
AGPIO39/SFI_S5_AGPIO39 AU12 I2C_1_SDA RC6177 1 @ 2 2.2K_0402_5%
APU_PCIE_RST#_C RC29 1 2 33_0402_5% APU_PCIE_RST#_R BD5 PCIE_RST0_L/EGPIO26
1 APU_PCIE1_RST#_C RC704 1 @ 2 33_0402_5% APU_PCIE1_RST#_R BB6 PCIE_RST1_L/EGPIO27 SW PU/PD SW PU/PD I2C0_SCL/SFI0_I2C_SCL/EGPIO151 AR13 I2C_0_SCL 1
EC_RSMRST# AT16 RSMRST_L SW PU/PD1.8V_S5 I2C0_SDA/SFI0_I2C_SDA/EGPIO152 AT13 I2C_0_SDA
58 EC_RSMRST# +3VS
PBTN_OUT# AR15 PWR_BTN_L/AGPIO0 SW PU/PD I2C1_SCL/SFI1_I2C_SCL/EGPIO149 AN8 I2C_1_SCL
58 PBTN_OUT# SYS_PWRGD_EC I2C_1_SDA SMB_0_SCL
AV6 PWR_GOOD SW PU/PD1.8V_S5 I2C1_SDA/SFI1_I2C_SDA/EGPIO150 AN9 RC6157 1 2 2.2K_0402_5%
58 SYS_PWRGD_EC SYS_RST# SMB_0_SDA
AP10 SYS_RESET_L/AGPIO1 RC6156 1 2 2.2K_0402_5%
APU_PCIE_WAKE# AV11 WAKE_L/AGPIO2 SW PU/PD I2C2_SCL/EGPIO113/SCL0 BC20 SMB_0_SCL
SMB_0_SDA SMB_0_SCL 23,24
SW PU/PD 3.3V I2C2_SDA/EGPIO114/SDA0 BA20 DDR4
SLP_S3# SMB_0_SDA 23,24 +3VALW
AV13 SLP_S3_L
58 SLP_S3# SLP_S5# I2C_3_SCL
AT14 SLP_S5_L SW PU/PD I2C3_SCL/AGPIO19/SCL1 AM9
58,84 SLP_S5# I2C_3_SDA I2C_3_SCL 63 I2C_3_SCL
3.3V_S5 I2C3_SDA/AGPIO20/SDA1 AM10 Touch Pad RC6159 1 2 2.2K_0402_5%
I2C_3_SDA 63 I2C_3_SDA
AGPIO10 AR8 S0A3_GPIO/AGPIO10 RC6158 1 2 2.2K_0402_5%
PSA_I2C_SCL L16
AGPIO23 AT10 AC_PRES/AGPIO23 PSA_I2C_SDA M16
AGPIO12 AN6 LLB_L/AGPIO12 SW PU/PD
+3VS
AGPIO3 AT15 AGPIO3
AW8 AW10 AGPIO4
ACPI EGPIO42 AGPIO4/SATAE_IFDET
AGPIO5/DEVSLP0 AP9 AGPIO5

DEVSLP1 RC663 2 @ 1 10K_0402_5%
AGPIO6/DEVSLP1 AU10 DEVSLP1

+3VALW PANEL_OD# DEVSLP1 68
SATA_ACT_L/AGPIO130 AV15
PANEL_OD# 38
AGPIO9 AU7 AGPIO9
RC6133 1 @ 2 10K_0402_5% APU_PCIE_WAKE# SW PU/PD3.3VALW input AGPIO40 AU6 AGPIO40
AGPIO40 68
3.3VS input AGPIO69 AW13
3.3VS input AGPIO86 AW15
HDA_BIT_CLK AR2 AZ_BITCLK/TDM_BCLK_MIC
HDA_SDIN0 AP7 AZ_SDIN0/CODEC_GPI
56 HDA_SDIN0 HDA_SDIN1 AP1 AZ_SDIN1/SW_DATA1B/TDM_BCLK_PLAYBACK INTRUDER_ALERT AU14
Reserve for MBDG/CRB HDA_SDIN2 AP4 AZ_SDIN2/SW_DATA2/TDM_DATA_PLAYBACK 3.3VS Output SPKR/AGPIO91 AU16 APU_SPKR
HDA_RST# APU_SPKR 56
CRB use S0-rail AP3 AZ_RST_L/SW_DATA1A/SW_DATA3/TDM_DATA_MIC BLINK/AGPIO11 AV8 AGPIO11
+1.8VALW CC1210 HDA_SYNC AR4 AZ_SYNC/TDM_FRM_MIC
10U_0402_6.3V6M HDA_SDOUT AR3 AZ_SDOUT/TDM_FRM_PLAYBACK 3.3VS input GENINT1_L/AGPIO89 AW16
+3VALW +3VS 1 2 3.3VS input GENINT2_L/AGPIO90 BD15 TP_I2C_INT#_APU
TP_I2C_INT#_APU 63
@ AT2 SW_MCLK/TDM_BCLK_BT
AT4 SW_DATA0/TDM_DOUT_BT
1
AGPIO7 AR6 AGPIO7/FCH_ACP_I2S_SDIN_BT 3.3VS input FANIN0/AGPIO84 AR18

RC6165 RC28 RC54 AP6 AGPIO8/FCH_ACP_I2S_LRCLK_BT 3.3VS input FANOUT0/AGPIO85 AT18
@ 10K_0402_1% 10K_0402_1% 22K_0402_1% FP5 REV 0.90
PART 4 OF 13
2
2 2
@ FP5_BGA_1140P
SYS_PWRGD_EC EC_RSMRST#
2 1
CC8
0.22U_0402_16V7K CC16
1U_0201_6.3V6M
1 2
AGPIO40 AGPIO9 AGPIO12 AGPIO23
DIS
H RSV Type1 RSV RSV
L RSV RSV DMIC x2 RSV
APU_PCIE_RST#_C RC700 1 RS@ 2 0_0402_5% APU_PCIE_RST#_U

APU_PCIE1_RST#_C RC701 1 @ 2 0_0402_5%
+3VALW
APU_PCIE_RST#_U RC30 1 RS@ 2 0_0402_5% APU_PCIE_RST#
1
1
1
@ @ @
RC693 RC6147 RC6135 RC6175
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
+3VALW CC14
2
2
2
0.1U_0201_10V6K
1 2 AGPIO40
@ AGPIO9
AGPIO12
5
AGPIO23
APU_PCIE_RST#_U 1
P
IN1 4 APU_PCIE_RST#
APU_PCIE_RST# 27,51,52,68
1
2 O
G
IN2 @ @ @
UC4 SA00000OH00 RC692 RC6148 RC6136 RC6174
3
2
@ MC74VHC1G08DFT2G_SC70-5 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%

3 RC6160 3
2
10K_0402_5% @
GPIO Table
1
AGPIO10 AGPIO11
AGPIO5 AGPIO7 AGPIO3 AGPIO4
HDA Strap Pin

APU_SPI_CLK_R SYS_RST#
USE 48MHZ CRYSTAL NORMAL RESET MODE

H CLOCK (Default)
RC116 1 EMC@ 2 33_0402_5% HDA_RST# (Default)
56 HDA_RST#_R HDA_BIT_CLK
RC117 1 EMC@ 2 33_0402_5%
56 HDA_BIT_CLK_R HDA_SYNC +3VALW +3VALW +3VALW
RC118 1 EMC@ 2 33_0402_5% USE 100MHZ PCIE SHORT RESET MODE
56 HDA_SYNC_R
RC119 1 EMC@ 2 33_0402_5% HDA_SDOUT L CLOCK AS
56 HDA_SDOUT_R REFERENCE CLOCK
1
1
1
@ @ @ @ @ @
RC120 1 2 1K_0402_5% RC6145 RC6137 RC6170 RC6168 RC619 RC6172
RC121 1 2 1K_0402_5% +1.8VS +1.8VALW +3VALW 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
RC122 1 2 1K_0402_5%
2
2
2
RC123 1 2 1K_0402_5%
AGPIO5 AGPIO3 AGPIO10
1
AGPIO7 AGPIO4 AGPIO11

RC622 RC47 RC951
4 10K_0402_5% @ 10K_0402_5% 10K_0402_5% 4
1
1
1
1
1
1
RC695 1 @ 2 10K_0402_5% HDA_SDIN1 @ @ @ @ @ @
2
RC696 1 @ 2 10K_0402_5% HDA_SDIN2 RC6146 RC6138 RC6171 RC6169 RC6134 RC6173

RC703 1 @ 2 10K_0402_5% HDA_SDIN0 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
APU_SPI_CLK_R
10 APU_SPI_CLK_R
2
2
2
2
2
2
SYS_RST#
1
1
RC1703 RC929
2K_0402_5% @ 2K_0402_5% @
2
2
FP5_(4/7)_GPIO/HDA/STRAP
Custom 1A
A B C D E
A B C D E
Main Func = CPU

RC602
33_0402_5%
LPC_RST_A# 1 2
LPC_RST# 58
UC1E CC615
150P_0402_50V8J
CLK/LPC/EMMC/SD/SPI/eSPI/UART
2
+3VS M.2 SSD1 CLKREQ_PCIE#0 AV18 CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92

+3VALW
68 CLKREQ_PCIE#0
AN19 CLK_REQ1_L/AGPIO115
CLKREQ_PCIE#2 AP19
M.2 WLAN 52 CLKREQ_PCIE#2 CLKREQ_PCIE#3
CLK_REQ2_L/AGPIO116
AT19 CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/EGPIO131
RC1695 1 2 10K_0402_5% CLKREQ_PCIE#0 LAN 51 CLKREQ_PCIE#3 CLKREQ_PEG#4 AU19 EC_SCI# RC6154 2 1 10K_0402_5%
CLK_REQ4_L/OSCIN/EGPIO132
DGPU 28 CLKREQ_PEG#4
AW18 CLK_REQ5_L/EGPIO120 SW PU/PD
RC6149 1 2 10K_0402_5% CLKREQ_PCIE#2 AW19 CLK_REQ6_L/EGPIO121
1 RC1696 1 2 10K_0402_5% CLKREQ_PEG#4 +3VS 1
RC1697 1 2 10K_0402_5% CLKREQ_PCIE#3 EGPIO70/SD_CLK BD13
SW PU/PD LPC_PD_L/SD_CMD/AGPIO21 BB14 LPCPD# TP@ T103
CLK_PCIE_P0 AK1 GPP_CLK0P LAD0/SD_DATA0/EGPIO104 BB12 LPC_AD0 RC101 1 2 10_0402_5%
68 CLK_PCIE_P0 CLK_PCIE_N0 LPC_AD1 LPC_AD0_R 58
M.2 SSD1 AK3 GPP_CLK0N M.2 WLAN/BT LAD1/SD_DATA1/EGPIO105 BC11 RC102 1 2 10_0402_5%
68 CLK_PCIE_N0 LPC_AD2 LPC_AD1_R 58
LAD2/SD_DATA2/EGPIO106 BB15 RC103 1 2 10_0402_5%
LPC_AD3 LPC_AD2_R 58 PE_GPIO1
AM2 GPP_CLK1P LAD3/SD_DATA3/EGPIO107 BC15 RC104 1 2 10_0402_5% RC6166 2 @ 1 10K_0402_5%
LPC_CLK0 LPC_AD3_R 58
AM4 GPP_CLK1N GBE LAN SW PU/PD LPCCLK0/EGPIO74 BA15 RC449 1 2 22_0402_5%
LPC_CLK0_EC 58
BC13
48MHz CRYSTAL WLAN
52 CLK_PCIE_P2
CLK_PCIE_P2
CLK_PCIE_N2
AM1
AM3
GPP_CLK2P
GPP_CLK2N M.2 WWAN
SW PU/PD
LPC_CLKRUN_L/AGPIO88
LPCCLK1/EGPIO75
SERIRQ/AGPIO87
BB13
BC12
LPC_CLK1
SERIRQ
ESPI_ALERT_L RC6181 2 1 10K_0402_5%
52 CLK_PCIE_N2 LPC_FRAME# SERIRQ 58
SW PU/PD LFRAME_L/EGPIO109 BA12
CLK_PCIE_P3 LPC_FRAME# 58
AL2 GPP_CLK3P
51 CLK_PCIE_P3 CLK_PCIE_N3 LPC_RST_A#
LAN AL4 GPP_CLK3N M.2 WLAN LPC_RST_L/SD_WP_L/AGPIO32 BD11
48M_X2 51 CLK_PCIE_N3 LPC_CLK1
AGPIO68/SD_CD BA11 RC6180 2 @ 1 10K_0402_5%
CLK_PEG_P4 AN2 SW PU/PDLPC_PME_L/SD_PWR_CTRL/AGPIO22 BA13 EC_SCI#
27 CLK_PEG_P4 GPP_CLK4P EC_SCI# 58
1 RC939 2 48M_X1 DGPU CLK_PEG_N4 AN4 GPP_CLK4N PCIE X4 DT SLOT
27 CLK_PEG_N4
1M_0402_5%
AN3 GPP_CLK5P
AP2 GPP_CLK5N M.2 PCIE SSD SPI_ROM_REQ/EGPIO67 BC8
2 1 SPI_ROM_GNT/AGPIO76 BB8
2 1 AJ2 GPP_CLK6P
AJ4 GPP_CLK6N EVAL GFX SLOT ESPI_RESET_L/KBRST_L/AGPIO129 BB11 KBRST# KBRST# 58
ESPI_ALERT_L/LDRQ0_L/EGPIO108 BC6 ESPI_ALERT_L
AJ3 48M_OSC
YC2 SPI_CLK/ESPI_CLK BB7 APU_SPI_CLK RC74 1 EMC@ 2 10_0402_5%
APU_SPI_MISO APU_SPI_CLK_R 9
48MHZ_8PF_7V48000010 SPI_DI/ESPI_DATA BA9
SJ10000JP00 48M_X1 BB3 X48M_X1 SPI_DO BB10 APU_SPI_MOSI
SPI_WP_L/ESPI_DAT2 BA10 APU_SPI_WP#
SPI_HOLD_L/ESPI_DAT3 BC10 APU_SPI_HOLD#
3 4 BC9 APU_SPI_CS#1 +SPI_VCC
1
3 4
1
48M_X2 BA5 X48M_X2 SW PU/PD
SPI_CS1_L/EGPIO118
SPI_CS2_L/ESPI_CS_L/AGPIO30
SPI_CS3_L/AGPIO31
BA8
BA6
8MB SPI ROM
C796 C797 SPI_TPM_CS_L/AGPIO29 BD8 APU_SPI_TPMCS# APU_SPI_MISO RC1706 1 @ 2 10K_0402_5%
3.9P_0402_50V8C 3.9P_0402_50V8C
2 2 AF8 RSVD_76 APU_SPI_WP# RC640 1 2 10K_0402_5%
AF9 RSVD_77 UART0_RXD/EGPIO136 BA16 UART_0_ARXD_DTXD
UART_0_ATXD_DRXD UART_0_ARXD_DTXD 52 APU_SPI_HOLD# RC642
UART0_TXD/EGPIO138 BB18 1 2 10K_0402_5%
UART_0_ATXD_DRXD 52
UART0_RTS_L/UART2_RXD/EGPIO137 BC17
UART0_CTS_L/UART2_TXD/EGPIO135 BA18 APU_SPI_CS#1 RC639 1 2 10K_0402_5%
T115 TP@ RTCCLK AW14 RTCCLK UART0_INTR/AGPIO139 BD18
APU_SPI_TPMCS# RC646 1 @ 2 10K_0402_5%
2 2
32.768KHz CRYSTAL 32K_X1 AY1 X32K_X1 EGPIO141/UART1_RXD

EGPIO143/UART1_TXD
BC18
BA17
PE_GPIO1
DGPU_PWRGOOD PE_GPIO1 37
DGPU_PWRGOOD 27,92,94
EGPIO142/UART1_RTS_L/UART3_RXD BC16
EGPIO140/UART1_CTS_L/UART3_TXD BB19 PE_GPIO0
32K_X2 PE_GPIO0 27
AY4 X32K_X2 AGPIO144/UART1_INTR BB16
32K_X1 +1.8VALW +SPI_VCC

FP5 REV 0.90
1
PART 5 OF 13 RC1672
SJ10000PW00 YC3 0_0603_5%
32.768KHZ_9PF_X1A000141000200 FP5_BGA_1140P
1 RS@ 2
2
2 1 32K_X2 @
RC914
20M_0402_5%
1 1
CC682
CC686 10P_0402_50V8J
12P_0402_50V8J
2 2 UC7
APU_SPI_CS#1 1 8 +SPI_VCC
APU_SPI_MISO 2 CS# VCC 7 APU_SPI_HOLD#
APU_SPI_WP# 3 DO(IO1) HOLD#(IO3) 6 APU_SPI_CLK_R
4 WP#(IO2) CLK 5 APU_SPI_MOSI
GND DI(IO0)
2
GD25LB64CSIGR_SOIC_8P @
SA00008K400 CC635
0.1U_0201_10V6K
USB Function 1
@EMC@
APU_SPI_CLK_R 1 @EMC@ 2 1 2
RC680 CC636
10_0402_5% 10P_0402_50V8J
+1.8VALW
RC94 1 2 4.7K_0402_5% APU_USBC_SCL

UC1J
3 3
RC95 1 2 4.7K_0402_5% APU_USBC_SDA
USB
USB20_P0 AE7 USB_0_DP0 USBC0_A2/USB_0_TXP0/DP3_TXP2 AD2

38 USB20_P0 USB20_N0
CAMERA AE6 USB_0_DM0 USBC0_A3/USB_0_TXN0/DP3_TXN2 AD4
38 USB20_N0
Port 0
USB20_P1 AG10 USB_0_DP1 USBC0_B11/USB_0_RXP0/DP3_TXP3 AC2
Type-A MB CHG AG9 USB_0_DM1 USBC0_B10/USB_0_RXN0/DP3_TXN3 AC4
71 USB20_N1
Controller 0
USB20_P2 AF12 USB_0_DP2 USBC0_B2/DP3_TXP1 AF4
Type-A MB AF11 USB_0_DM2 USBC0_B3/DP3_TXN1 AF2
72 USB20_N2
USB20_P3 AE10 USB_0_DP3 USBC0_A11/DP3_TXP0 AE3
Type-C MB AE9 USB_0_DM3 USBC0_A10/DP3_TXN0 AE1
43 USB20_N3
USB20_P4 AJ12 USB_1_DP0 USB_0_TXP1 AG3 USB3_ATX_DRX_P1
73 USB20_P4 USB20_N4 USB3_ATX_DRX_N1 USB3_ATX_DRX_P1 71
Type-A SUB AJ11 USB_1_DM0 Port 1 USB_0_TXN1 AG1
73 USB20_N4 USB3_ATX_DRX_N1 71
Controller 1 Type-A MB CHG
USB20_P5 AD9 USB_1_DP1 USB_0_RXP1 AJ9 USB3_ARX_DTX_P1
52 USB20_P5 USB20_N5 USB3_ARX_DTX_N1 USB3_ARX_DTX_P1 71
USB Hub AD8 USB_1_DM1 USB_0_RXN1 AJ8
52 USB20_N5 USB3_ARX_DTX_N1 71
USB_0_TXP2 AG4 USB3_ATX_DRX_P2
USB3_ATX_DRX_N2 USB3_ATX_DRX_P2 72
Port 2 USB_0_TXN2 AG2
USB3_ATX_DRX_N2 72
USB3_ARX_DTX_P2
Type-A MB
USB_0_RXP2 AG7
APU_USBC_SCL USB3_ARX_DTX_N2 USB3_ARX_DTX_P2 72
AM6 USBC_I2C_SCL USB_0_RXN2 AG6
USB3_ARX_DTX_N2 72
APU_USBC_SDA AM7 USBC_I2C_SDA USBC1_A2/USB_0_TXP3/DP2_TXP2 AA2 USB3_ATX_DRX_P3
USB3_ATX_DRX_N3 USB3_ATX_DRX_P3 42
Port 3 USBC1_A3/USB_0_TXN3/DP2_TXN2 AA4
USB3_ATX_DRX_N3 42
USB3_ARX_DTX_P3
Type-C MB
USBC1_B11/USB_0_RXP3/DP2_TXP3 Y1
USB3_ARX_DTX_N3 USB3_ARX_DTX_P3 42
USBC1_B10/USB_0_RXN3/DP2_TXN3 Y3 USB3_ARX_DTX_N3 42
USBC1_B2/DP2_TXP1 AC1
USBC1_B3/DP2_TXN1 AC3
AK10 USB_OC0_L/AGPIO16
AK9 USB_OC1_L/AGPIO17 USBC1_A11/DP2_TXP0 AB2
AL9 USB_OC2_L/AGPIO18 USBC1_A10/DP2_TXN0 AB4
AL8 USB_OC3_L/AGPIO24
AW7 AGPIO14/USB_OC4_L USB_1_TXP0 AH4
AT12 AGPIO13/USB_OC5_L SW PU/PD Port 4 USB_1_TXN0 AH2
4 4
USB_1_RXP0 AK7
USB_1_RXN0 AK6
FP5 REV 0.90
PART 10 OF 13
FP5_BGA_1140P
@

FP5_(5/7)_CLK/USB/SPI/LPC
Custom 1A
A B C D E
A B C D E
Main Func = CPU

UC1F
TDC: 10A POWER TDC: 53A

EDC: 13A M15 VDDCR_SOC_1 VDDCR_1 G7 EDC: 70A
+APU_CORE_SOC +APU_CORE
M18 VDDCR_SOC_2 VDDCR_2 G10
M19 VDDCR_SOC_3 VDDCR_3 G12
SCL/MBDG: N16 VDDCR_SOC_4 VDDCR_4 G14
7*22uF (BU) N18 VDDCR_SOC_5 VDDCR_5 H8
1*1uF (BU) N20 H11
VDDCR_SOC_6 VDDCR_6
1*180pF (BU) P17 H15
VDDCR_SOC_7 VDDCR_7
1
P19 VDDCR_SOC_8 VDDCR_8 K7 1
R18 VDDCR_SOC_9 VDDCR_9 K12
R20 VDDCR_SOC_10 VDDCR_10 K14
T19 VDDCR_SOC_11 VDDCR_11 L8
U18 VDDCR_SOC_12 VDDCR_12 M7
U20 M10 SCL/MBDG:
+APU_CORE_SOC Cap V19
VDDCR_SOC_13
VDDCR_SOC_14
VDDCR_13
VDDCR_14 N14 16*22uF (BU)
1*180pF (BU)
place at Power Side W18
W20
VDDCR_SOC_15
VDDCR_SOC_16
VDDCR_15
VDDCR_16
P7
P10
Y19 VDDCR_SOC_17 VDDCR_17 P13
VDDCR_18 P15
+1.2V TDC: 6A T32 VDDIO_MEM_S3_1 VDDCR_19 R8
V28 VDDIO_MEM_S3_2 VDDCR_20 R14
W28 VDDIO_MEM_S3_3 VDDCR_21 R16
W32 T7
Y22
VDDIO_MEM_S3_4
VDDIO_MEM_S3_5
VDDCR_22
VDDCR_23 T10 +APU_CORE Cap place at Power Side
Y25 VDDIO_MEM_S3_6 VDDCR_24 T13
Y28 VDDIO_MEM_S3_7 VDDCR_25 T15
AA20 VDDIO_MEM_S3_8 VDDCR_26 T17
AA23 VDDIO_MEM_S3_9 VDDCR_27 U14
SCL/MBDG: AA26 VDDIO_MEM_S3_10 VDDCR_28 U16
9*22uF (BU) AA28 VDDIO_MEM_S3_11 VDDCR_29 V13
+1.2V +1.2V 2*1uF (BU) AA32 V15
VDDIO_MEM_S3_12 VDDCR_30
4*0.22uF AC20 V17
1*180pF (BU) VDDIO_MEM_S3_13 VDDCR_31
2*180pF AC22 VDDIO_MEM_S3_14 VDDCR_32 W7
AC25 VDDIO_MEM_S3_15 VDDCR_33 W10
CC1059 22U_0603_6.3V6M
CC1060 22U_0603_6.3V6M
CC1165 1U_0201_6.3V6M
CC1082 0.22U_0402_16V7K
CC1081 0.22U_0402_16V7K
CC1079 0.22U_0402_16V7K
CC1078 0.22U_0402_16V7K
CC1167 180P_0402_50V8J
CC1166 180P_0402_50V8J
CC1008 22U_0603_6.3V6M
CC1057 22U_0603_6.3V6M
CC1058 22U_0603_6.3V6M
CC1061 22U_0603_6.3V6M
CC1062 22U_0603_6.3V6M
CC1063 22U_0603_6.3V6M
CC1163 22U_0603_6.3V6M
CC1164 1U_0201_6.3V6M
CC1093 180P_0402_50V8J
AC28 VDDIO_MEM_S3_16 VDDCR_34 W14

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 AD23 VDDIO_MEM_S3_17 VDDCR_35 W16
AD26 VDDIO_MEM_S3_18 VDDCR_36 Y8
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 AE20 VDDIO_MEM_S3_21 VDDCR_39 Y17
AE22 VDDIO_MEM_S3_22 VDDCR_40 AA7
AF23 VDDIO_MEM_S3_25 VDDCR_43 AA16
2 AF26 AA18 2
AF28 VDDIO_MEM_S3_27 VDDCR_45 AB13
AF32 VDDIO_MEM_S3_28 VDDCR_46 AB15
AG20 VDDIO_MEM_S3_29 VDDCR_47 AB17
AG22 VDDIO_MEM_S3_30 VDDCR_48 AB19
AG25 AC14
All BU(on bottom side under SOC) ACROSS VDDIO AND VSS SPLIT AG28
VDDIO_MEM_S3_31
VDDIO_MEM_S3_32
VDDCR_49
VDDCR_50 AC16
AJ20 VDDIO_MEM_S3_33 VDDCR_51 AC18
AJ23 VDDIO_MEM_S3_34 VDDCR_52 AD7
AJ26 VDDIO_MEM_S3_35 VDDCR_53 AD10
SCL/MBDG: SCL/MBDG: AJ28 VDDIO_MEM_S3_36 VDDCR_54 AD13
1 *22uF (BO) 1 *22uF (BO) AJ32 VDDIO_MEM_S3_37 VDDCR_55 AD15
+1.8VS +VDDIO_AUDIO 1*1uF (BU) +3VS +3VS_APU 2*1uF (BO+BU) AK28 AD17
RC1677 RC1676 AL28 VDDIO_MEM_S3_39 VDDCR_57 AD19
0_0402_5% 0_0402_5% AL32 VDDIO_MEM_S3_40 VDDCR_58 AE8
1 RS@ 2 1 RS@ 2 TDC :0.2A VDDCR_59 AE14
+VDDIO_AUDIO AP12 VDDIO_AUDIO VDDCR_60 AE16
CC1207
CC1192
CC1137
CC1208
CC1209
VDDCR_61 AE18
1 1 1 1 1 TDC :0.25A AL18 VDD_33_1 VDDCR_62 AF7
+3VS_APU
AM17 VDD_33_2 VDDCR_63 AF10
VDDCR_64 AF13
22U_0603_6.3V6M
1U_0201_6.3V6M
22U_0603_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
+1.8VS TDC :2A AL20 VDD_18_1 VDDCR_65 AF15

2 2 2 2 2 AM19 VDD_18_2 VDDCR_66 AF17
VDDCR_67 AF19
+1.8VALW TDC :0.5A AL19 VDD_18_S5_1 VDDCR_68 AG14
AM18 VDD_18_S5_2 VDDCR_69 AG16
VDDCR_70 AG18
TDC :0.25A AL17 VDD_33_S5_1 VDDCR_71 AH13
+3VALW
AM16 VDD_33_S5_2 VDDCR_72 AH15
AH17
BO BU BO BO BU TDC :1A AL14 VDDP_S5_1
VDDCR_73
VDDCR_74 AH19
+0.9VALW
AL15 VDDP_S5_2 VDDCR_75 AJ7
AM14 VDDP_S5_3 VDDCR_76 AJ10
VDDCR_77 AJ14
+0.9VS TDC :4A AL13 VDDP_1 VDDCR_78 AJ16
3 SCL/MBDG: SCL/MBDG: SCL/MBDG: AM12 VDDP_2 VDDCR_79 AJ18 3
+1.8VS 1 *22uF (BO) +1.8VALW 1 *22uF (BO) +3VALW 1 *22uF (BO) AM13 VDDP_3 VDDCR_80 AK13
2*1uF (BO+BU) 2*1uF (BO+BU) 2*1uF (BO+BU) AN12 AK15
VDDP_4 VDDCR_81
AN13 VDDP_5 VDDCR_82 AK17
TDC :4.5uA VDDCR_83 AK19
+RTCBATT
CC1189 22U_0603_6.3V6M
CC1187 1U_0201_6.3V6M
CC1188 1U_0201_6.3V6M
CC1183 22U_0603_6.3V6M
CC1184 1U_0201_6.3V6M
CC1185 1U_0201_6.3V6M
CC1190 1U_0201_6.3V6M
CC1191 1U_0201_6.3V6M
CC1186 22U_0603_6.3V6M
+RTC_APU_R AT11 VDDBT_RTC_G

1 1 1 1 1 1 1 1 1
FP5 REV 0.90
PART 6 OF 13 JRTC1
FP5_BGA_1140P 1
2 2 2 2 2 2 2 2 2 2 1
@ 2
3
4 GND
GND
ACES_50271-0020N-001
RTC OF APU CONN@
BO BO BU BO BO BU BO BO BU
SP02000RO00
+RTC_APU_R +RTC_APU +RTCVCC +RTCBATT
Vo=1.5V
RC6161
close to UC1 RC6164 UC8 SA000066U00 DC1 1K_0402_5% +CHGRTC
SCL/MBDG: SCL/MBDG: W=20mils 1K_0402_5% AP2138N-1.5TRG1_SOT23-3 3 1 2
+0.9VS 2 *22uF (BO) +0.9VALW 1 *22uF (BO) 1 2 3
8*1uF (BOx4+BUx4) 3*1uF (BOx1+BUx2) Vout 1 1
1*180pF (BU) 2 Vin
GND
1
1 1 1 2
CC1169
CC1171
CC1177
CC1174
CC1175
CC1178
CC1168
CC1170
CC1172
CC1176
CC1173
CC1179
CC1180
CC1181
CC1182
1
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 CC166 CC923 CLRP1 @ CC119 CC120
0.22U_0402_16V7K 1U_0201_6.3V6M 0_0603_5% 0.1U_0201_10V6K 680P_0402_50V7K CHN202UPT_SC70-3
2 2 2
2
2
22U_0603_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
180P_0402_50V8J
22U_0603_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
22U_0603_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
4 4
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
Need OPEN
for Clear CMOS
BO BOx4 BUx4 BU BO BO BU
(6/7)_PWR
Custom 1A
A B C D E
5 4 3 2 1
Main Func = CPU UC1G

UC1H UC1K
GND
N12 VSS_316 VSS_62 K32 GND
A3 VSS_1 VSS_63 L5 V8 VSS_124 VSS_186 AG8 GND/RSVD
A5 VSS_2 VSS_64 L13 V11 VSS_125 VSS_187 AG11 AR5 VSS_248 VSS_310 BD16
D A19 VSS_8 VSS_70 M1 V22 VSS_131 VSS_193 AH14 AR21 VSS_254 D
A21 VSS_9 VSS_71 M5 V25 VSS_132 VSS_194 AH16 AR26 VSS_255
A23 VSS_10 VSS_72 M12 W1 VSS_133 VSS_195 AH18 AR28 VSS_256
A26 VSS_11 VSS_73 M21 W5 VSS_134 VSS_196 AH20 AR32 VSS_257
A30 VSS_12 VSS_74 M23 W13 VSS_135 VSS_197 AJ1 AU5 VSS_258
C3 VSS_13 VSS_75 M26 W15 VSS_136 VSS_198 AJ5 AU8 VSS_259
C32 VSS_14 VSS_76 M28 W17 VSS_137 VSS_199 AJ13 AU11 VSS_260
D16 VSS_15 VSS_77 M32 W19 VSS_138 VSS_200 AJ15 AU13 VSS_261
D18 VSS_16 VSS_78 N4 W23 VSS_139 VSS_201 AJ17 AU15 VSS_262
D20 VSS_17 VSS_79 N5 W26 VSS_140 VSS_202 AJ19 AU18 VSS_263
E7 VSS_18 VSS_80 N8 Y5 VSS_141 VSS_203 AK5 AU20 VSS_264
E8 VSS_19 VSS_81 N11 Y11 VSS_142 VSS_204 AK8 AU22 VSS_265
E10 VSS_20 VSS_82 N13 Y12 VSS_143 VSS_205 AK11 AU25 VSS_266 RSVD_1 B20
E11 VSS_21 VSS_83 N15 Y14 VSS_144 VSS_206 AK12 AU28 VSS_267 RSVD_5 G3
E12 VSS_22 VSS_84 N17 Y16 VSS_145 VSS_207 AK14 AV1 VSS_268 RSVD_7 J20
E13 VSS_23 VSS_85 N19 Y18 VSS_146 VSS_208 AK16 AV5 VSS_269 RSVD_8 K3
E14 VSS_24 VSS_86 N22 Y20 VSS_147 VSS_209 AK18 AV7 VSS_270 RSVD_9 K6
E15 VSS_25 VSS_87 N25 AA1 VSS_148 VSS_210 AK20 AV10 VSS_271 RSVD_10 K20
E16 VSS_26 VSS_88 N28 AA5 VSS_149 VSS_211 AK22 AV12 VSS_272 RSVD_11 M3
E18 VSS_27 VSS_89 P1 AA13 VSS_150 VSS_212 AK25 AV14 VSS_273 RSVD_12 M6
E19 VSS_28 VSS_90 P5 AA15 VSS_151 VSS_213 AL1 AV16 VSS_274 RSVD_13 M13
E20 VSS_29 VSS_91 P14 AA17 VSS_152 VSS_214 AL5 AV19 VSS_275 RSVD_22 P6
E21 VSS_30 VSS_92 P16 AA19 VSS_153 VSS_215 AL7 AV21 VSS_276 RSVD_23 P22
E22 VSS_31 VSS_93 P18 AB14 VSS_154 VSS_216 AL10 AV23 VSS_277 RSVD_30 T3
E26 VSS_34 VSS_96 P26 AB20 VSS_157 VSS_219 AL23 AV32 VSS_280 RSVD_44 W6
E27 VSS_35 VSS_97 P28 AC5 VSS_158 VSS_220 AL26 AW5 VSS_281 RSVD_49 W21
F5 VSS_36 VSS_98 P32 AC8 VSS_159 VSS_221 AM5 AW28 VSS_282 RSVD_50 W22
C F28 VSS_37 VSS_99 R5 AC11 VSS_160 VSS_222 AM8 AY6 VSS_283 RSVD_57 Y21 C
G1 VSS_38 VSS_100 R11 AC12 VSS_161 VSS_223 AM15 AY7 VSS_284 RSVD_58 Y27
G5 VSS_39 VSS_101 R12 AC13 VSS_162 VSS_224 AM20 AY8 VSS_285 RSVD_59 AA3
G16 VSS_40 VSS_102 R13 AC15 VSS_163 VSS_225 AM22 AY10 VSS_286 RSVD_60 AA6
G19 VSS_41 VSS_103 R15 AC17 VSS_164 VSS_226 AM25 AY11 VSS_287 RSVD_69 AC29
G21 VSS_42 VSS_104 R17 AC19 VSS_165 VSS_227 AM28 AY12 VSS_288 RSVD_70 AD3
G23 VSS_43 VSS_105 R19 AD1 VSS_166 VSS_228 AN1 AY13 VSS_289 RSVD_71 AD6
G26 VSS_44 VSS_106 R22 AD5 VSS_167 VSS_229 AN5 AY14 VSS_290 RSVD_74 AF3
H5 VSS_47 VSS_109 R30 AD18 VSS_170 VSS_232 AN15 AY18 VSS_293 RSVD_79 AJ6
H13 VSS_48 VSS_110 T1 AD20 VSS_171 VSS_233 AN18 AY19 VSS_294 RSVD_80 AJ24
H18 VSS_49 VSS_111 T5 AE5 VSS_172 VSS_234 AN21 AY20 VSS_295 RSVD_81 AK23
H20 VSS_50 VSS_112 T14 AE11 VSS_173 VSS_235 AN23 AY21 VSS_296 RSVD_82 AK27
H22 VSS_51 VSS_113 T16 AE12 VSS_174 VSS_236 AN26 AY22 VSS_297 RSVD_83 AL3
H25 VSS_52 VSS_114 T18 AE13 VSS_175 VSS_237 AN28 AY23 VSS_298 RSVD_87 AN29
H28 VSS_53 VSS_115 T20 AE15 VSS_176 VSS_238 AN32 AY25 VSS_299 RSVD_88 AN31
K1 VSS_54 VSS_116 T23 AE17 VSS_177 VSS_239 AP5 AY26 VSS_300
K5 VSS_55 VSS_117 T26 AE19 VSS_178 VSS_240 AP8 AY27 VSS_301
K16 VSS_56 VSS_118 T28 AF1 VSS_179 VSS_241 AP13 BB1 VSS_302
K19 VSS_57 VSS_119 U13 AF5 VSS_180 VSS_242 AP15 BB20 VSS_303
K21 VSS_58 VSS_120 U15 AF14 VSS_181 VSS_243 AP18 BB32 VSS_304 RSVD_14 M14
K22 VSS_59 VSS_121 U17 AF16 VSS_182 VSS_244 AP20 BD3 VSS_305 RSVD_84 AL6
K26 VSS_60 VSS_122 U19 AF18 VSS_183 VSS_245 AP25 BD7 VSS_306 RSVD_85 AL11
K28 VSS_61 VSS_123 V5 AF20 VSS_184 VSS_246 AP28 BD10 VSS_307 RSVD_86 AN16
FP5 REV 0.90 AG5 VSS_185 VSS_247 AR1 BD12 VSS_308
PART 7 OF 13 FP5 REV 0.90 BD14 VSS_309
PART 8 OF 13 FP5 REV 0.90
FP5_BGA_1140P
PART 11 OF 13
B @ FP5_BGA_1140P B
@ FP5_BGA_1140P
@
UC1M UC1L
CAMERAS RSVD
T11 RSVD_32 RSVD_62 AA9
A18 CAM0_CSI2_CLOCKP CAM0_CLK B15 RSVD_61 AA8
C18 CAM0_CSI2_CLOCKN AC7 RSVD_66 RSVD_65 AC6
CAM0_I2C_SCL D15
A15 CAM0_CSI2_DATAP0 CAM0_I2C_SDA C14
C15 CAM0_CSI2_DATAN0 Y9 RSVD_55
CAM0_SHUTDOWN B13 Y10 RSVD_56 RSVD_72 AD11
B16 CAM0_CSI2_DATAP1
C16 CAM0_CSI2_DATAN1 W11 RSVD_47 RSVD_67 AC9
W12 RSVD_48 RSVD_63 AA11
C19 CAM0_CSI2_DATAP2
B18 CAM0_CSI2_DATAN2 V9 RSVD_38 RSVD_33 T12
V10 RSVD_39 RSVD_73 AD12
B17 CAM0_CSI2_DATAP3
D17 CAM0_CSI2_DATAN3 RSVD_53 Y6
RSVD_54 Y7
D12 CAM1_CSI2_CLOCKP CAM1_CLK B10
B12 CAM1_CSI2_CLOCKN AA12 RSVD_64 RSVD_45 W8
CAM1_I2C_SCL A11 AC10 RSVD_68 RSVD_46 W9
C13 CAM1_CSI2_DATAP0 CAM1_I2C_SDA C11
A13 CAM1_CSI2_DATAN0
A A
CAM1_SHUTDOWN D11 FP5 REV 0.90
B11 CAM1_CSI2_DATAP1 PART 12 OF 13
C12 CAM1_CSI2_DATAN1 CAM_PRIV_LED D13 FP5_BGA_1140P
CAM_IR_ILLU D10
J13 @
RSVD_6 FP5 REV 0.90
PART 13 OF 13
FP5_BGA_1140P Issued Date 2018/ 12/18 Deciphered Date 2019/12/18 Title
@
FP5_(7/7)_GND/RSVD/CSI
Custom 1A
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1A
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
A B C D E
Reverse Type-4H
2-3A to 1 DIMMs/channel
JDIMM1A
DDR_A_CLK0 DDR_A_DQ0 DDR_A_DQ[7..0] 7
137 REVERSE 8
7 DDR_A_CLK0 DDR_A_CLK0# 139 CK0(T) DQ0 7 DDR_A_DQ1
7 DDR_A_CLK0# DDR_A_CLK1 138 CK0#(C) DQ1 20 DDR_A_DQ2 +1.2V +1.2V
7 DDR_A_CLK1 DDR_A_CLK1# 140 CK1(T) DQ2 21 DDR_A_DQ3 JDIMM1B
1
Address : A0 7
7
DDR_A_CLK1#
DDR_A_CKE0
DDR_A_CKE0
DDR_A_CKE1
109
110
CK1#(C)
CKE0
DQ3
DQ4
DQ5
4
3
16
DDR_A_DQ4
DDR_A_DQ5
DDR_A_DQ6
Follow CRB design
111
112
REVERSE
VDD1 VDD11
141
142
1
7 DDR_A_CKE1 CKE1 DQ6 17 DDR_A_DQ7 117 VDD2 VDD12 147
+3VS DDR_A_CS0# 149 DQ7 13 DDR_A_DQS0 +1.2V 118 VDD3 VDD13 148
7 DDR_A_CS0# DDR_A_CS1# 157 S0# DQS0(T) 11 DDR_A_DQS0# DDR_A_DQS0 7 123 VDD4 VDD14 153
7 DDR_A_CS1# S1# DQS0#(C) DDR_A_DQS0# 7 VDD5 VDD15
162 124 154
S2#/C0 DDR_A_DQ[15..8] 7 VDD6 VDD16
2
165 28 DDR_A_DQ8 129 159
S3#/C1 DQ8 VDD7 VDD17
1
29 DDR_A_DQ9 RD3 130 160

DQ9 +3VS VDD8 VDD18 +0.6VS
0_0402_5%
RD5
0_0402_5%
RD6
0_0402_5%
RD7
DDR_A_ODT0 155 41 DDR_A_DQ10 1K_0402_1% 135 163

7 DDR_A_ODT0 DDR_A_ODT1 161 ODT0 DQ10 42 DDR_A_DQ11 +VREFA_CA 136 VDD9 VDD19
7 DDR_A_ODT1 ODT1 DQ11 DDR_A_DQ12 VDD10 +2.5V
24
1
@ @ @ DDR_A_BG0 115 DQ12 25 DDR_A_DQ13 255 258
7 DDR_A_BG0
2
DDR_A_BG1 113 BG0 DQ13 38 DDR_A_DQ14 VDDSPD VTT

7 DDR_A_BG1 DDR_A_BA0 150 BG1 DQ14 37 DDR_A_DQ15
15mil 164 257
DDR_A_SA2 7 DDR_A_BA0 DDR_A_BA1 145 BA0 DQ15 34 DDR_A_DQS1 VREFCA VPP1 259
7 DDR_A_BA1 BA1 DQS1(T) DDR_A_DQS1 7 VPP2
CD19 1000P_0402_50V7K
CD20 4.7U_0402_6.3V6M
CD22 0.1U_0201_10V6K
CD21 0.1U_0201_10V6K
DDR_A_SA1 32 DDR_A_DQS1#
7 DDR_A_MA[13..0] DQS1#(C) DDR_A_DQS1# 7
CD31 1U_0201_6.3V6M
DDR_A_SA0 DDR_A_MA0 144 1 99
A0 DDR_A_DQ[23..16] 7 VSS VSS
2
DDR_A_MA1 133 50 DDR_A_DQ16 2 102
A1 DQ16 1 2 2 1 VSS VSS
1
1
DDR_A_MA2 132 49 DDR_A_DQ17 RD4 5 103

A2 DQ17 VSS VSS 1
RS@
0_0402_5%
RD10
RS@
0_0402_5%
RD8
RS@
0_0402_5%
RD9
DDR_A_MA3 131 62 DDR_A_DQ18 1K_0402_1% 6 106

DDR_A_MA4 128 A3 DQ18 63 DDR_A_DQ19 9 VSS VSS 107
DDR_A_MA5 126 A4 DQ19 46 DDR_A_DQ20 2 1 1 2 10 VSS VSS 167
1
DDR_A_MA6 127 A5 DQ20 45 DDR_A_DQ21 14 VSS VSS 168 2
2
2

CD1 @EMC@ DDR_A_MA8 125 A7 DQ22 59 DDR_A_DQ23 18 VSS VSS 172
.1U_0402_16V7K DDR_A_MA9 121 A8 DQ23 55 DDR_A_DQS2 19 VSS VSS 175
2 1 DDR_A_RST# DDR_A_MA10 146 A9 DQS2(T) 53 DDR_A_DQS2# DDR_A_DQS2 7 22 VSS VSS 176
DDR_A_MA11 120 A10_AP DQS2#(C) DDR_A_DQS2# 7 23 VSS VSS 180
DDR_A_MA12 119 A11 70 DDR_A_DQ24 DDR_A_DQ[31..24] 7 26 VSS VSS 181 CRB use 1uF x1
DDR_A_MA14_WE# 151 A13 DQ25 83 DDR_A_DQ26 30 VSS VSS 185
Note:
7
7
DDR_A_MA14_WE#
DDR_A_MA15_CAS#
DDR_A_MA15_CAS#
DDR_A_MA16_RAS#
156 A14_WE#
A15_CAS#
DQ26
DQ27
84 DDR_A_DQ27
DDR_A_DQ28
Place near to SO-DIMM connector. 31 VSS
VSS
VSS
VSS
188
Layout Note: 152 66 35 189
Check voltage tolerance of 7 DDR_A_MA16_RAS# A16_RAS# DQ28 67 DDR_A_DQ29 36 VSS VSS 192
Place near JDIMM1 VREF_DQ at the DIMM socket DDR_A_ACT# 114 DQ29 79 DDR_A_DQ30 39 VSS VSS 193
7 DDR_A_ACT# ACT# DQ30 DDR_A_DQ31 VSS VSS
80 40 196
2 DDR4 support Even Parity check in DRAMs. DDR_A_PAR 143 DQ31 76 DDR_A_DQS3 43 VSS VSS 197 2
7 DDR_A_PAR DDR_A_ALERT# 116 PARITY DQS3(T) 74 DDR_A_DQS3# DDR_A_DQS3 7 44 VSS VSS 201
CRB use 0.1uF x12 (6 pop,6 unpop),180pF x1,100uF x2 7 DDR_A_ALERT# DDR_A_EVENT# 134 ALERT# DQS3#(C) DDR_A_DQS3# 7 47 VSS VSS 202
7 DDR_A_EVENT# DDR_A_RST# 108 EVENT# 174 DDR_A_DQ32 DDR_A_DQ[39..32] 7 48 VSS VSS 205
+1.2V 7 DDR_A_RST# RESET# DQ32 DDR_A_DQ33 VSS VSS
173 51 206
DQ33 187 DDR_A_DQ34 52 VSS VSS 209
SMB_0_SDA 254 DQ34 186 DDR_A_DQ35 56 VSS VSS 210
9,24 SMB_0_SDA SMB_0_SCL 253 SDA DQ35 170 DDR_A_DQ36 57 VSS VSS 213
9,24 SMB_0_SCL SCL DQ36 VSS VSS
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
169 DDR_A_DQ37 60 214

DDR_A_SA2 166 DQ37 183 DDR_A_DQ38 61 VSS VSS 217
1 1 1 1 1 1 SA2 DQ38 VSS VSS
CD2
CD3
CD4
CD5
CD6
CD7
DDR_A_SA1 260 182 DDR_A_DQ39 64 218

DDR_A_SA0 256 SA1 DQ39 179 DDR_A_DQS4 65 VSS VSS 222
SA0 DQS4(T) 177 DDR_A_DQS4# DDR_A_DQS4 7 68 VSS VSS 223
2 2 2 2 2 2 DQS4#(C) DDR_A_DQS4# 7 69 VSS VSS 226
DDR_A_DQ40 DDR_A_DQ[47..40] 7 VSS VSS
92 195 72 227
91 CB0_NC DQ40 194 DDR_A_DQ41 73 VSS VSS 230
+1.2V 104 CB6_NC DQ46 204 DDR_A_DQ47 86 VSS VSS 243
97 CB7_NC DQ47 200 DDR_A_DQS5 89 VSS VSS 244
Follow MA51 95 DQS8(T) DQS5(T) 198 DDR_A_DQS5# DDR_A_DQS5 7 90 VSS VSS 247
DQS8#(C) DQS5#(C) DDR_A_DQS5# 7 VSS VSS
93 248
216 DDR_A_DQ48 DDR_A_DQ[55..48] 7 94 VSS VSS 251
1 7 DDR_A_DM[7..0] DQ48 VSS VSS
@ DDR_A_DM0 12 215 DDR_A_DQ49 98 252
DM0#/DBI0# DQ49 VSS VSS
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
+ CD18 DDR_A_DM1 33 228 DDR_A_DQ50

1 1 1 1 1 1 1 DM1#/DBI1# DQ50
CD10
CD11
CD12
CD13
CD14
CD15
CD98
330U_D2_2V_Y DDR_A_DM2 54 229 DDR_A_DQ51 262 261

DDR_A_DM3 75 DM2#/DBI2# DQ51 211 DDR_A_DQ52 GND GND
2 DDR_A_DM4 178 DM3#/DBI3# DQ52 212 DDR_A_DQ53
2 2 2 2 2 2 2 SGA00009S00 DDR_A_DM5 199 DM4#/DBI4# DQ53 224 DDR_A_DQ54 LOTES_ADDR0206-P001A
330U 2V H1.9 DDR_A_DM6 220 DM5#/DBI5# DQ54 225 DDR_A_DQ55
CONN@
9mohm POLY DDR_A_DM7 241 DM6#/DBI6# DQ55 221 DDR_A_DQS6
DM7#/DBI7# DQS6(T) DDR_A_DQS6# DDR_A_DQS6 7 SP07001EGA0
96 219
3 DM8#/DBI8# DQS6#(C) DDR_A_DQS6# 7 3
237 DDR_A_DQ56 DDR_A_DQ[63..56] 7

+1.2V DQ56 236 DDR_A_DQ57
DQ57 249 DDR_A_DQ58
DQ58 250 DDR_A_DQ59
DQ59 232 DDR_A_DQ60
DQ60 233 DDR_A_DQ61
DQ61
180P_0402_50V8J
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
245 DDR_A_DQ62
2 2 2 2 2 DQ62
CD65
DDR_A_DQ63
CD61
CD62
CD63
CD64
246
DQ63 242 DDR_A_DQS7
DQS7(T) 240 DDR_A_DQS7# DDR_A_DQS7 7
1 1 1 1 1 DQS7#(C) DDR_A_DQS7# 7
LOTES_ADDR0206-P001A
CONN@ Layout Note:
SP07001EGA0 Place near JDIMM1.258
CRB use 4.7uF x1,0.1uF x1
+0.6VS
Layout Note: Layout Note:
Place near JDIMM1.257,259 Place near JDIMM1.255
1U_0201_6.3V6M
1U_0201_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1 1 1 1
CD28
CD29
CD30
CD27
CRB use 0.1uF x2,180pF x1 CRB use 1uF x1
+2.5V +3VS 2 2 2 2
4 4
1U_0201_6.3V6M
1U_0201_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1 1 1 1
CD23
CD24
CD25
CD26
2 2 2 2

DDR4_DIMMA
Custom 1A
A B C D E
A B C D E
Stand Type-4H
2-3A to 1 DIMMs/channel
JDIMM2A
DDR_B_CLK0 DDR_B_DQ0 DDR_B_DQ[7..0] 7
137 STD 8
7 DDR_B_CLK0 DDR_B_CLK0# 139 CK0(T) DQ0 7 DDR_B_DQ1
7 DDR_B_CLK0# DDR_B_CLK1 138 CK0#(C) DQ1 20 DDR_B_DQ2 +1.2V +1.2V
7 DDR_B_CLK1 DDR_B_CLK1# 140 CK1(T) DQ2 21 DDR_B_DQ3 JDIMM2B
1
Address : A2 7
7
DDR_B_CLK1#
DDR_B_CKE0
DDR_B_CKE0
DDR_B_CKE1
109
110
CK1#(C)
CKE0
DQ3
DQ4
DQ5
4
3
16
DDR_B_DQ4
DDR_B_DQ5
DDR_B_DQ6
Follow CRB design
111
112 VDD1
STD
VDD11
141
142
1
7 DDR_B_CKE1 CKE1 DQ6 17 DDR_B_DQ7 117 VDD2 VDD12 147
+3VS DDR_B_CS0# 149 DQ7 13 DDR_B_DQS0 +1.2V 118 VDD3 VDD13 148
7 DDR_B_CS0# DDR_B_CS1# 157 S0# DQS0(T) 11 DDR_B_DQS0# DDR_B_DQS0 7
123 VDD4 VDD14 153
7 DDR_B_CS1# S1# DQS0#(C) DDR_B_DQS0# 7 VDD5 VDD15
162 124 154
S2#/C0 DDR_B_DQ[15..8] 7 VDD6 VDD16
2
165 28 DDR_B_DQ8 129 159
S3#/C1 DQ8 VDD7 VDD17
1
1
10K_0402_5%
RD244
29 DDR_B_DQ9 RD243 130 160

DQ9 +3VS VDD8 VDD18 +0.6VS
0_0402_5%
RD247
0_0402_5%
RD248
DDR_B_ODT0 155 41 DDR_B_DQ10 1K_0402_1% 135 163

7 DDR_B_ODT0 DDR_B_ODT1 161 ODT0 DQ10 42 DDR_B_DQ11 +VREFB_CA 136 VDD9 VDD19
7 DDR_B_ODT1 ODT1 DQ11 DDR_B_DQ12 VDD10 +2.5V
24
1
@ @ DDR_B_BG0 115 DQ12 25 DDR_B_DQ13 255 258
7 DDR_B_BG0
2
DDR_B_BG1 113 BG0 DQ13 38 DDR_B_DQ14 VDDSPD VTT

7 DDR_B_BG1 DDR_B_BA0 150 BG1 DQ14 37 DDR_B_DQ15
15mil 164 257
DDR_B_SA2 7 DDR_B_BA0 DDR_B_BA1 145 BA0 DQ15 34 DDR_B_DQS1 VREFCA VPP1 259
7 DDR_B_BA1 BA1 DQS1(T) DDR_B_DQS1 7 VPP2
CD84 4.7U_0402_6.3V6M
CD76 0.1U_0201_10V6K
CD80 0.1U_0201_10V6K
CD87 1000P_0402_50V7K
DDR_B_SA1 32 DDR_B_DQS1#
7 DDR_B_MA[13..0] DQS1#(C) DDR_B_DQS1# 7
CD89 1U_0201_6.3V6M
DDR_B_SA0 DDR_B_MA0 144 1 99
A0 DDR_B_DQ[23..16] 7 VSS VSS
2
DDR_B_MA1 133 50 DDR_B_DQ16 2 102
A1 DQ16 1 2 2 1 VSS VSS
1
DDR_B_MA2 132 49 DDR_B_DQ17 RD251 5 103

A2 DQ17 VSS VSS 1
RS@
0_0402_5%
RD252
RS@
0_0402_5%
RD246
0_0402_5%
RD249
DDR_B_MA3 131 62 DDR_B_DQ18 1K_0402_1% 6 106

CD73 @EMC@ DDR_B_MA4 128 A3 DQ18 63 DDR_B_DQ19 9 VSS VSS 107
.1U_0402_16V7K DDR_B_MA5 126 A4 DQ19 46 DDR_B_DQ20 2 1 1 2 10 VSS VSS 167
1
@ 2 1 DDR_B_RST# DDR_B_MA6 127 A5 DQ20 45 DDR_B_DQ21 14 VSS VSS 168 2
2
DDR_B_MA7 122 A6 DQ21 58 DDR_B_DQ22 15 VSS VSS 171

DDR_B_MA9 121 A8 DQ23 55 DDR_B_DQS2 19 VSS VSS 175
DDR_B_MA10 146 A9 DQS2(T) 53 DDR_B_DQS2# DDR_B_DQS2 7 22 VSS VSS 176
DDR_B_MA11 120 A10_AP DQS2#(C) DDR_B_DQS2# 7 23 VSS VSS 180
DDR_B_MA12 119 A11 70 DDR_B_DQ24 DDR_B_DQ[31..24] 7 26 VSS VSS 181 CRB use 1uF x1
DDR_B_MA14_WE# 151 A13 DQ25 83 DDR_B_DQ26 30 VSS VSS 185
Note:
7
7
DDR_B_MA14_WE#
DDR_B_MA15_CAS#
DDR_B_MA15_CAS#
DDR_B_MA16_RAS#
156 A14_WE#
A15_CAS#
DQ26
DQ27
84 DDR_B_DQ27
DDR_B_DQ28
Place near to SO-DIMM connector. 31 VSS
VSS
VSS
VSS
188
Layout Note: 152 66 35 189
Check voltage tolerance of 7 DDR_B_MA16_RAS# A16_RAS# DQ28 67 DDR_B_DQ29 36 VSS VSS 192
Place near JDIMM2 VREF_DQ at the DIMM socket DDR_B_ACT# 114 DQ29 79 DDR_B_DQ30 39 VSS VSS 193
7 DDR_B_ACT# ACT# DQ30 DDR_B_DQ31 VSS VSS
80 40 196
2 DDR_B_PAR 143 DQ31 76 DDR_B_DQS3 43 VSS VSS 197 2
7 DDR_B_PAR DDR_B_ALERT# 116 PARITY DQS3(T) 74 DDR_B_DQS3# DDR_B_DQS3 7 44 VSS VSS 201
CRB use 0.1uF x12 (6 pop,6 unpop),180pF x1,100uF x2 7 DDR_B_ALERT# DDR_B_EVENT# 134 ALERT# DQS3#(C) DDR_B_DQS3# 7 47 VSS VSS 202
7 DDR_B_EVENT# DDR_B_RST# 108 EVENT# 174 DDR_B_DQ32 DDR_B_DQ[39..32] 7 48 VSS VSS 205
+1.2V 7 DDR_B_RST# RESET# DQ32 DDR_B_DQ33 VSS VSS
173 51 206
DQ33 187 DDR_B_DQ34 52 VSS VSS 209
SMB_0_SDA 254 DQ34 186 DDR_B_DQ35 56 VSS VSS 210
9,23 SMB_0_SDA SMB_0_SCL 253 SDA DQ35 170 DDR_B_DQ36 57 VSS VSS 213
9,23 SMB_0_SCL SCL DQ36 VSS VSS
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
169 DDR_B_DQ37 60 214

DDR_B_SA2 166 DQ37 183 DDR_B_DQ38 61 VSS VSS 217
1 1 1 1 1 1 SA2 DQ38 VSS VSS
CD67
CD81
CD78
CD86
CD93
CD71
DDR_B_SA1 260 182 DDR_B_DQ39 64 218

DDR_B_SA0 256 SA1 DQ39 179 DDR_B_DQS4 65 VSS VSS 222
SA0 DQS4(T) 177 DDR_B_DQS4# DDR_B_DQS4 7 68 VSS VSS 223
2 2 2 2 2 2 DQS4#(C) DDR_B_DQS4# 7 69 VSS VSS 226
DDR_B_DQ40 DDR_B_DQ[47..40] 7 VSS VSS
92 195 72 227
91 CB0_NC DQ40 194 DDR_B_DQ41 73 VSS VSS 230
+1.2V 104 CB6_NC DQ46 204 DDR_B_DQ47 86 VSS VSS 243
97 CB7_NC DQ47 200 DDR_B_DQS5 89 VSS VSS 244
95 DQS8(T) DQS5(T) 198 DDR_B_DQS5# DDR_B_DQS5 7 90 VSS VSS 247
DQS8#(C) DQS5#(C) DDR_B_DQS5# 7 VSS VSS
93 248
216 DDR_B_DQ48 DDR_B_DQ[55..48] 7 94 VSS VSS 251
7 DDR_B_DM[7..0] DDR_B_DM0 12 DQ48 215 DDR_B_DQ49 98 VSS VSS 252
DM0#/DBI0# DQ49 VSS VSS
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
DDR_B_DM1 33 228 DDR_B_DQ50

1 1 1 1 1 1 1 DM1#/DBI1# DQ50
CD96
CD68
CD88
CD99
CD82
CD77
CD90
DDR_B_DM2 54 229 DDR_B_DQ51 262 261

DDR_B_DM3 75 DM2#/DBI2# DQ51 211 DDR_B_DQ52 GND GND
DDR_B_DM4 178 DM3#/DBI3# DQ52 212 DDR_B_DQ53
2 2 2 2 2 2 2 DDR_B_DM5 199 DM4#/DBI4# DQ53 224 DDR_B_DQ54 LOTES_ADDR0205-P001A
DDR_B_DM6 220 DM5#/DBI5# DQ54 225 DDR_B_DQ55
DM6#/DBI6# DQ55 CONN@
DDR_B_DM7 241 221 DDR_B_DQS6
DM7#/DBI7# DQS6(T) DDR_B_DQS6# DDR_B_DQS6 7
96 219
3 DM8#/DBI8# DQS6#(C) DDR_B_DQS6# 7 3
237 DDR_B_DQ56 DDR_B_DQ[63..56] 7

+1.2V DQ56 236 DDR_B_DQ57
DQ57 249 DDR_B_DQ58
DQ58 250 DDR_B_DQ59
DQ59 232 DDR_B_DQ60
DQ60 233 DDR_B_DQ61
DQ61
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
180P_0402_50V8J
0.1U_0201_10V6K
261 245 DDR_B_DQ62

2 2 2 2 2 GND1 DQ62
CD91
CD66
CD85
CD94
DDR_B_DQ63
CD97
262 246
GND2 DQ63 242 DDR_B_DQS7
DQS7(T) 240 DDR_B_DQS7# DDR_B_DQS7 7
1 1 1 1 1 DQS7#(C) DDR_B_DQS7# 7
LOTES_ADDR0205-P001A
CONN@ Layout Note:
Place near JDIMM2.258
CRB use 4.7uF x1,0.1uF x1
+0.6VS
Layout Note: Layout Note:
Place near JDIMM2.257,259 Place near JDIMM2.255
1U_0201_6.3V6M
1U_0201_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1 1 1 1
CD70
CD74
CD92
CD72
CRB use 0.1uF x2,180pF x1 CRB use 1uF x1
+2.5V +3VS 2 2 2 2
4 4
1U_0201_6.3V6M
1U_0201_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1 1 1 1
CD79
CD83
CD75
CD95
2 2 2 2

DDR4_DIMMB
Custom 1A
A B C D E
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
D D
UV1B @
symbol2
PEG_ATX_GRX_P0 DIS@ 1 2 CV312 0.22U_0402_16V7K PEG_ATX_C_GRX_P0 AT41 AV35 PEG_ARX_C_GTX_P0 DIS@ 1 2 CV1 0.22U_0402_16V7K PEG_ARX_GTX_P0
6 PEG_ATX_GRX_P0 PEG_ATX_GRX_N0 PEG_ATX_C_GRX_N0 AT40 PCIE_RX0P PCIE_TX0P PEG_ARX_C_GTX_N0 PEG_ARX_GTX_N0 PEG_ARX_GTX_P0 6
DIS@ 1 2 CV306 0.22U_0402_16V7K AU35 DIS@ 1 2 CV2 0.22U_0402_16V7K
6 PEG_ATX_GRX_N0 PCIE_RX0N PCIE_TX0N PEG_ARX_GTX_N0 6
PEG_ATX_GRX_P1 DIS@ 1 2 CV308 0.22U_0402_16V7K PEG_ATX_C_GRX_P1 AR41 AU38 PEG_ARX_C_GTX_P1 DIS@ 1 2 CV3 0.22U_0402_16V7K PEG_ARX_GTX_P1
6 PEG_ATX_GRX_P1 PEG_ATX_GRX_N1 PEG_ATX_C_GRX_N1 AR40 PCIE_RX1P PCIE_TX1P PEG_ARX_C_GTX_N1 PEG_ARX_GTX_N1 PEG_ARX_GTX_P1 6
DIS@ 1 2 CV305 0.22U_0402_16V7K AU39 DIS@ 1 2 CV4 0.22U_0402_16V7K
PEG_ATX_GRX_P2 DIS@ 1 2 CV307 0.22U_0402_16V7K PEG_ATX_C_GRX_P2 AP41 AR37 PEG_ARX_C_GTX_P2 DIS@ 1 2 CV5 0.22U_0402_16V7K PEG_ARX_GTX_P2
6 PEG_ATX_GRX_P2 PEG_ATX_GRX_N2 PEG_ATX_C_GRX_N2 AP40 PCIE_RX2P PCIE_TX2P PEG_ARX_C_GTX_N2 PEG_ARX_GTX_N2 PEG_ARX_GTX_P2 6
DIS@ 1 2 CV309 0.22U_0402_16V7K AR38 DIS@ 1 2 CV6 0.22U_0402_16V7K
PEG_ATX_GRX_P3 DIS@ 1 2 CV313 0.22U_0402_16V7K PEG_ATX_C_GRX_P3 AM41 AN37 PEG_ARX_C_GTX_P3 DIS@ 1 2 CV7 0.22U_0402_16V7K PEG_ARX_GTX_P3
6 PEG_ATX_GRX_P3 PEG_ATX_GRX_N3 PEG_ATX_C_GRX_N3 AM40 PCIE_RX3P PCIE_TX3P PEG_ARX_C_GTX_N3 PEG_ARX_GTX_N3 PEG_ARX_GTX_P3 6
DIS@ 1 2 CV304 0.22U_0402_16V7K AN38 DIS@ 1 2 CV8 0.22U_0402_16V7K
PEG_ATX_GRX_P4 DIS@ 1 2 CV2710 0.22U_0402_16V7K PEG_ATX_C_GRX_P4 AL41 AL37 PEG_ARX_C_GTX_P4 DIS@ 1 2 CV2715 0.22U_0402_16V7K PEG_ARX_GTX_P4
6 PEG_ATX_GRX_P4 PEG_ATX_GRX_N4 PEG_ATX_C_GRX_N4 AL40 PCIE_RX4P PCIE_TX4P PEG_ARX_C_GTX_N4 PEG_ARX_GTX_N4 PEG_ARX_GTX_P4 6
DIS@ 1 2 CV2707 0.22U_0402_16V7K AL38 DIS@ 1 2 CV2708 0.22U_0402_16V7K
PEG_ATX_GRX_P5 DIS@ 1 2 CV2711 0.22U_0402_16V7K PEG_ATX_C_GRX_P5 AK41 AJ37 PEG_ARX_C_GTX_P5 DIS@ 1 2 CV2713 0.22U_0402_16V7K PEG_ARX_GTX_P5
6 PEG_ATX_GRX_P5 PEG_ATX_GRX_N5 PEG_ATX_C_GRX_N5 AK40 PCIE_RX5P PCIE_TX5P PEG_ARX_C_GTX_N5 PEG_ARX_GTX_N5 PEG_ARX_GTX_P5 6
DIS@ 1 2 CV2709 0.22U_0402_16V7K AJ38 DIS@ 1 2 CV2703 0.22U_0402_16V7K
PEG_ATX_GRX_P6 DIS@ 1 2 CV2717 0.22U_0402_16V7K PEG_ATX_C_GRX_P6 AJ41 AG37 PEG_ARX_C_GTX_P6 DIS@ 1 2 CV2705 0.22U_0402_16V7K PEG_ARX_GTX_P6
6 PEG_ATX_GRX_P6 PEG_ATX_GRX_N6 PEG_ATX_C_GRX_N6 AJ40 PCIE_RX6P PCIE_TX6P PEG_ARX_C_GTX_N6 PEG_ARX_GTX_N6 PEG_ARX_GTX_P6 6
DIS@ 1 2 CV2714 0.22U_0402_16V7K AG38 DIS@ 1 2 CV2712 0.22U_0402_16V7K
PEG_ATX_GRX_P7 DIS@ 1 2 CV2704 0.22U_0402_16V7K PEG_ATX_C_GRX_P7 AH41 AE37 PEG_ARX_C_GTX_P7 DIS@ 1 2 CV2716 0.22U_0402_16V7K PEG_ARX_GTX_P7
6 PEG_ATX_GRX_P7 PEG_ATX_GRX_N7 PEG_ATX_C_GRX_N7 AH40 PCIE_RX7P PCIE_TX7P PEG_ARX_C_GTX_N7 PEG_ARX_GTX_N7 PEG_ARX_GTX_P7 6
DIS@ 1 2 CV2706 0.22U_0402_16V7K AE38 DIS@ 1 2 CV2702 0.22U_0402_16V7K
C CLK_PEG_P4 AV33 AV41 PLT_RST_VGA# C

10 CLK_PEG_P4 PCIE_REFCLKP PERSTB
CLK_PEG_N4 AU33
10 CLK_PEG_N4 PCIE_REFCLKN AC41 PX_EN1TP@
PX_EN T218
For BACO mode(AMD PowerXpress) use, NC if not use
RV371 DIS@
200_0402_1%
AU41 1 2
PCIE_ZVSS
REV 0.91
2160896088A1R16M_FCBGA769P-NH
+3VSDGPU
UV2 SA00000OH00
MC74VHC1G08DFT2G_SC70-5
5
DIS@ +3VSDGPU
1
P
B 9,51,52,68 APU_PCIE_RST# IN1 PLT_RST_VGA# B

4
2 O UV3 SA00000OH00
10 PE_GPIO0 IN2
G
1
5
+3VSDGPU DIS@
3
1
RV4 PLT_RST_VGA# 1
P
RV370 100K_0402_5% IN1 4
DGPU_PW RGOOD_R 2 O DGPU_PW ROK 92
2.2K_0402_5% DIS@ UV1005 SA00000OH00
IN2
G
DIS@ MC74VHC1G08DFT2G_SC70-5
2
1
DIS@
2
3
1 RV374
P
92 VDDCI_PG IN1 DGPU_PW RGOOD_R

4 100K_0402_5%
2 O DIS@
10,92,94 DGPU_PW RGOOD IN2
G
2
RV1659
3
100K_0402_5%
DIS@
2
PLT_RST_VGA# RV1654 1 @ 2 0_0402_5% DGPU_PW ROK

DGPU_PW RGOOD RV1660 1 @ 2 0_0402_5% DGPU_PW RGOOD_R
VDDCI_PG RV1661 1 @ 2 0_0402_5%
A A

R18M-G1-90_(1/9)_PCIE
Custom 1A
5 4 3 2 1
5 4 3 2 1
R17M-G1-50/70
Function Support Pin R18M-M2-60 R17M-P1-50/70
R18M-G1-90
+3VSDGPU
SCL use 47k, CRB use 4.7k AC/DC Mode GPIO5 Yes Yes
AMD Confirm List_1027 use PU-47k H:AC L:DC
+3VSDGPU
Thermal VR_HOT# GPIO6 No Yes
1
10mA UV1E @ (Fan tachometer)
RV507 RV508 AM31 symbol5 W40 GPIO_0
5
47K_0402_5% 47K_0402_5% VDD_33 GPIO_0 AA40 Peak Current Control GPIO21 No Yes
1
G
DIS@ DIS@ DIS@ GPIO_1 AA35 GPIO_2 +3VSDGPU
CV26 GPIO_2
2
1U_0201_6.3V6M
3 4 VGA_SMB_DA3 2 AA34 VGA_AC_BATT RV409 1 DIS@ 2 5.1K_0402_1%
S
8,58,66 EC_SMB_DA2 GPIO_5_REG_HOT_AC_BATT GPIO_6_TACH#
U35 RV1652 1 DIS@ 2 5.1K_0402_1% DV1 DIS@
D
QV1B GPIO_6_TACH RB751V-40_SOD323-2
2
2N7002KDW_SOT363-6 AP25 GPIO_8 RV1644 1 @ 2 33_0402_5% VGA_AC_BATT 2 1
G
D GPIO_8_ROMSO GPIO_9 GPU_ACIN 58 D
SB00000EO00 DIS@ AM25 RV1645 1 @ 2 33_0402_5%
GPIO_9_ROMSI AM27 GPIO_10 RV1646 1 @ 2 33_0402_5%
GPIO_10_ROMSCK W41 GPIO_11
6 1 VGA_SMB_CK3 GPIO_11 Y40 GPIO_12 DV2 DIS@
S
8,58,66 EC_SMB_CK2 GPIO_12 GPIO_13
Y41 RB751V-40_SOD323-2
D
QV1A GPIO_13 AU21 1TP@ 2 1
GPIO_14_HPD2 GPIO_15 T237 GPU_PROCHOT# 92
2N7002KDW_SOT363-6 AA41
SB00000EO00 DIS@ GPIO_15 U34
GPIO_16_8P_DETECT R37
Vgs=1.0-2.5V GPIO_17_THERMAL_INT AV25 1TP@ +3VSDGPU
GPIO_18_HPD3 GPIO_19_CTF T239
R38
GPIO_19_CTF AB40 GPIO_20
GPIO_20 GPIO_21_PCC# RV91 APU_PROCHOT#_D 84
AC35 AB41 1 DIS@ 2 5.1K_0402_1%
AC34 SCL GPIO_21 AP27 GPIO_22 RV1647 1 @ 2 33_0402_5%
SDA GPIO_22_ROMCSB W37 GPIO_29
VGA_SMB_CK3 AW40 GPIO_29 W38 RV1650 DV4 DIS@
VGA_SMB_DA3 AW41 SMBCLK GPIO_30 BA38 PLL_ANALOG_IN 1TP@ 0_0402_5% RB751V-40_SOD323-2
SMBDAT GENERICA T231 GPIO_6_TACH#
AV29 2 RX560@ 1 2 1
GENERICB GPU_THERMAL# 58
AU31
GENERICC AV31
GENERICD AU25 1TP@
GPU_SVC GENERICE_HPD4 T241
RV155 1 DIS@ 2 0_0402_5% AU17 AV23 1TP@
92 GPU_SVC GPU_SVD GPIO_SVC GENERICF_HPD5 T240
RV156 1 DIS@ 2 0_0402_5% AV17 AM29
+1.8VSDGPU +1.8VSDGPU 92 GPU_SVD GPU_SVT RV157 1 DIS@ 2 0_0402_5% AR17 GPIO_SVD GENERICG RV1651
92 GPU_SVT GPIO_SVT AV21 1TP@ 0_0402_5%
HPD1 T234 GPIO_21_PCC#
AN34 2 @ 1
DDCVGACLK GPU_PCC# 58
AP31
DDCVGADATA
10K_0402_5%
10K_0402_5%
10K_0402_5%
SCL PU-1k
1 DIS@ 2
2 RX560@ 1
2 DIS@ 1
CRB PU-10k/PD-1uF
1K_0402_5%
1K_0402_5%
56109_Compatible List:
RV84
RV87
RV410
RV412
RV413
RV153
R535 PD, and Lexa PU.
@
0_0402_5%
AV40 CLKREQ_PEG#4_R 2 @ 1
TEST_PG CLKREQB CLKREQ_PEG#4 10
AY13 AU40 WAKEB
1
GPU_SVC TEST_PG_BACO BA13 TEST_PG WAKEB RV368

GPU_SVD TEST_PG TEST_PG_BACO 10K_0402_5%
GPU_SVT TEST_PG_BACO 2 @ 1
1U_0201_6.3V6M
AC40
1U_0201_6.3V6M
1
1
DIGON
@
10K_0402_5%
10K_0402_5%
10K_0402_5%
1K_0402_5%
1
2
2
1 DIS@ 2
AC37
CV314
RV1653
BL_ENABLE
@
RV411
RV89
RV88
CV315
K41 AC38
2 RSVD#K41 BL_PWM_DIM
@
@
56109_Compatible List: R34

C 2 RSVD#R34 C
R535 don't care, and Lexa PU. W34 HSYNC
2
HSYNC W35 VSYNC

1
VSYNC
AG34
SWAPLOCKA AE34
SWAPLOCKB AR29
GENLK_CLK AP29
GENLK_VSYNC
REV 0.91
Boot-VID Code
2160896088A1R16M_FCBGA769P-NH
Voltage
SVC SVD Selected (V)
0 0 1.1
+3VSDGPU +1.8VSDGPU +3VSDGPU
0 1 1.0
1 0 0.9
1
1 1 0.8 RV502 RV152 RV162
@ 10K_0201_5% @ 10K_0201_5% 4.7K_0402_5%
@
2
GPIO_19_CTF WAKEB
VDD_33 SCL can leave nc
1
RX560 Strap DIS@
RV151
10K_0201_5%
RV430
4.7K_0402_5%
@
2
+3VSDGPU GPIO_2 can't use on R535
B B
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
1
2 RX560@ 1
2 RX560@ 1
2 RX560@ 1
2 RX560@ 1
1
1
1
1
1
@
@
@
@
RV416
RV424
RV429
RV414
RV418
RV420
RV422
RV426
RV432
RV434
RV436
RV438
RV440
2
2
2
2
2
GPIO_0 TX_HALF_SWING[0:disable,1:enable]
GPIO_2 BIF_GEN3_EN_A[0:disable,1:enable]
GPIO_11 ROM_CONFIG_[0]/MemoryAperture
GPIO_15 Reserved [PD for default]

GPIO_20 TX_DEEMPH_EN[0:disable,1:enable]
GPIO_29 BIF_VGA_DIS[0:VGA,1:Headless]
HSYNC Special Usage[1] GPUdefault
VSYNC Special Usage[0] GPUdefault
GPIO_8 BIF_CLK_PM_EN[0:disable,1:enable]
GPIO_9 Reserved [PD for production]
GPIO_22 BIOS_ROM_EN[0:disable,1:enable]
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
2 RX560@ 1
2 RX560@ 1
2 RX560@ 1
2 RX560@ 1
2 RX560@ 1
1
1
2 RX560@ 1
@
@
RV417
RV415
RV419
RV425
RV427
RV431
RV433
RV421
RV423
RV428
RV435
RV437
RV439
2
2
2
A A

R18M-G1-90_(2/9)_MSIC-1
Custom 1A
5 4 3 2 1
5 4 3 2 1
+3VSDGPU
+1.8VSDGPU
JTAG_TDI_GPU RV1655 2 @ 1 10K_0201_5%

JTAG_TDO_GPU RV1656 2 @ 1 10K_0201_5%
JTAG_TMS_GPU RV1657 2 @ 1 10K_0201_5%
10K_0201_5%
10K_0201_5%
1 DIS@ 2
1 DIS@ 2
JTAG_TCK_GPU RV1658 2 @ 1 10K_0201_5%
RV468
RV467
UV1A @
RV101 33_0201_5% symbol1
1 DIS@ 2 AA38 AF41 JTAG_TDO_GPU +3VSDGPU
1 DIS@ 2 AA37 BP_0 JTAG_TDO AD40 JTAG_TDI_GPU
RV100 33_0201_5% BP_1 JTAG_TDI AD41 JTAG_TMS_GPU
JTAG_TMS AE41 JTAG_TCK_GPU JTAG_TRSTB_GPU RV369 2 DIS@ 1 10K_0201_5%
JTAG_TCK RV1630 2 @ 1 10K_0201_5%
D D
RV469 1 DIS@ 2 B2 AE40 JTAG_TESTEN_GPU
10K_0402_5% TEST6 TESTEN AF40 JTAG_TRSTB_GPU
JTAG_TRSTB
+3VSDGPU
REV 0.91
2160896088A1R16M_FCBGA769P-NH JTAG_TESTEN_GPU RV470 2 @ 1 5.1K_0201_1%

RV471 2 DIS@ 1 1K_0201_5%
UV1F @
symbol6 BA39 XTALIN +1.8VSDGPU
XTALIN
XTALIN_R XTALOUT_R SI_SS_SEL RV154 1 DIS@ 2 5.1K_0402_1%
YV1 DIS@
SJ10000UI00 RV505 1 @ 2 5.1K_0402_1%
27MHZ_10PF_XRCGB27M000F2P18R0
ESR:40ohm (Max)
3 1
AY39 3 1
XTALOUT
1
DIS@ NC NC
1
CV450 DIS@
15P_0402_50V8J 4 2 CV451
2
15P_0402_50V8J
2
AV15 1TP@
C PLLCHARZ_L T229 C
AU15 1TP@
PLLCHARZ_H T230
+1.8VSDGPU
REV 0.91 AY38
ANALOGIO RX560@
UV4
1
XTALOUT_R 3 2 XTALIN_R LV7 RX560@
2160896088A1R16M_FCBGA769P-NH RV83 XOUT XIN/CLKIN BLM15BD121SN1D_0402
@ 16.2K_0402_1% RV506 1 +1.8VSDGPU_VDD 1 2
0_0402_5% VDD
0.1U_0201_10V6K
CV2723
10U_0402_6.3V6M
CV449
XTALIN 2 RX560@ 1 XTALIN_100M 4 1 1
2
DNI SSCLK1/REFCLK/FSEL/SSONb/OE
5 SI_SS_SEL
SSCLK2/OE/SSONb/PD 2 @ 2
RX560@
6
VSS
SI51214-A1FAGMR_TDFN6_1P2X1P4
SA0000A4K00
S IC SI51214-A1FAGMR TDFN 6P CLK GEN
B +1.8VSDGPU B
AUD_PORT_CONN[2:0]
* 111: No usable endpoints
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
2 RX560@ 1
1
2 RX560@ 1
2 RX560@ 1
2 RX560@ 1
UV1K @ 110: One usable endpoint

symbol11 101: Two usable endpoints
100: Three usable endpoints
@
L40 DBGDATA_0
RV456
RV453
RV457
RV459
RV461
RV463
RV465
RV442
DBGDATA_0 DBGDATA_1 011: Four usable endpoints

L41 010: Five usable endpoints
DBGDATA_1 M40 DBGDATA_2 001: Six usable endpoints
2
2
2
DBGDATA_2 M41 DBGDATA_3 000: All endpoints are usable

DBGDATA_3 N40 DBGDATA_4 DBGDATA_0 AUD_PORT_CONN[0]
DBGDATA_4 N41 DBGDATA_5 DBGDATA_1 AUD_PORT_CONN[1] BOARD_CONFIG[2:0]
DBGDATA_5 P40 DBGDATA_6 DBGDATA_2 AUD_PORT_CONN[2] 000:SAM 256Mx32 (8Gb)
DBGDATA_6 P41 DBGDATA_7 001:Hynix 256Mx32 (8Gb)
DBGDATA_7 R40 DBGDATA_8 1TP@ DBGDATA_3 BOARD_CONFIG[0] 010:
DBGDATA_8 DBGDATA_9 1TP@ T221 DBGDATA_4 011:
R41 BOARD_CONFIG[1]
DBGDATA_9 DBGDATA_101TP@ T222 DBGDATA_5 100:
T40 BOARD_CONFIG[2] 101:
DBGDATA_10 DBGDATA_111TP@ T223
T41 110:
DBGDATA_11 DBGDATA_121TP@ T224 DBGDATA_6
U40 SMBUS_ADDR[0] 111:
DBGDATA_12 DBGDATA_131TP@ T225 DBGDATA_7
U41 SMBUS_ADDR[1] (BOM at Page33)
DBGDATA_13 V40 DBGDATA_141TP@ T226
DBGDATA_14 DBGDATA_151TP@ T227
V41
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
DBGDATA_15 T228
1
1
2 RX560@ 1
1
DBGDATA_[7:6]
REV 0.91 00: 0×40
@
* 01: 0×41
RV455
RV454
RV458
RV460
RV462
RV464
RV466
RV441
2160896088A1R16M_FCBGA769P-NH 10: 0×42

11: 0×43
2
2
2
A A

R18M-G1-90_(3/9)_MSIC-2
Custom 1A
5 4 3 2 1
5 4 3 2 1
UV1C @ UV1D @
35 MA0_D[0..31] MA1_D[0..31] 35 36 MB0_D[0..31] MB1_D[0..31] 36
symbol3 symbol4
MA0_D0 L34 B27 MA1_D0 MB0_D0 C2 AH1 MB1_D0
MA0_D1 L37 DQA0_0 DQA1_0 A27 MA1_D1 MB0_D1 C1 DQB0_0 DQB1_0 AH2 MB1_D1
MA0_D2 L38 DQA0_1 DQA1_1 B26 MA1_D2 MB0_D2 D2 DQB0_1 DQB1_1 AJ2 MB1_D2
MA0_D3 J35 DQA0_2 DQA1_2 A26 MA1_D3 MB0_D3 D1 DQB0_2 DQB1_2 AK1 MB1_D3
MA0_D4 G37 DQA0_3 DQA1_3 A24 MA1_D4 MB0_D4 F1 DQB0_3 DQB1_3 AL2 MB1_D4
MA0_D5 E38 DQA0_4 DQA1_4 B23 MA1_D5 MB0_D5 G2 DQB0_4 DQB1_4 AM1 MB1_D5
MA0_D6 E35 DQA0_5 DQA1_5 A23 MA1_D6 MB0_D6 G1 DQB0_5 DQB1_5 AM2 MB1_D6
D DQA0_6 DQA1_6 DQB0_6 DQB1_6 D
MA0_D7 D35 B22 MA1_D7 MB0_D7 H2 AN2 MB1_D7
MA0_D8 H41 DQA0_7 DQA1_7 B20 MA1_D8 MB0_D8 K2 DQB0_7 DQB1_7 AR1 MB1_D8
MA0_D9 H40 DQA0_8 DQA1_8 A20 MA1_D9 MB0_D9 K1 DQB0_8 DQB1_8 AR2 MB1_D9
MA0_D10 G41 DQA0_9 DQA1_9 B19 MA1_D10 MB0_D10 L2 DQB0_9 DQB1_9 AT1 MB1_D10
MA0_D11 G40 DQA0_10 DQA1_10 A19 MA1_D11 MB0_D11 L1 DQB0_10 DQB1_10 AT2 MB1_D11
MA0_D12 E40 DQA0_11 DQA1_11 B17 MA1_D12 MB0_D12 N2 DQB0_11 DQB1_11 AV2 MB1_D12
MA0_D13 D41 DQA0_12 DQA1_12 A16 MA1_D13 MB0_D13 P2 DQB0_12 DQB1_12 AW1 MB1_D13
MA0_D14 D40 DQA0_13 DQA1_13 B16 MA1_D14 MB0_D14 P1 DQB0_13 DQB1_13 AW2 MB1_D14
MA0_D15 C41 DQA0_14 DQA1_14 A15 MA1_D15 MB0_D15 R2 DQB0_14 DQB1_14 AY3 MB1_D15
MA0_D16 C40 DQA0_15 DQA1_15 B15 MA1_D16 MB0_D16 R1 DQB0_15 DQB1_15 BA3 MB1_D16
MA0_D17 B39 DQA0_16 DQA1_16 A14 MA1_D17 MB0_D17 T2 DQB0_16 DQB1_16 AY4 MB1_D17
MA0_D18 A39 DQA0_17 DQA1_17 B14 MA1_D18 MB0_D18 T1 DQB0_17 DQB1_17 BA4 MB1_D18
MA0_D19 B38 DQA0_18 DQA1_18 B13 MA1_D19 MB0_D19 U2 DQB0_18 DQB1_18 AY5 MB1_D19
MA0_D20 B36 DQA0_19 DQA1_19 A11 MA1_D20 MB0_D20 W1 DQB0_19 DQB1_19 BA7 MB1_D20
MA0_D21 A36 DQA0_20 DQA1_20 B11 MA1_D21 MB0_D21 W2 DQB0_20 DQB1_20 AY7 MB1_D21
MA0_D22 B35 DQA0_21 DQA1_21 A10 MA1_D22 MB0_D22 Y1 DQB0_21 DQB1_21 AY8 MB1_D22
MA0_D23 A35 DQA0_22 DQA1_22 B10 MA1_D23 MB0_D23 Y2 DQB0_22 DQB1_22 BA8 MB1_D23
MA0_D24 B33 DQA0_23 DQA1_23 B8 MA1_D24 MB0_D24 AB2 DQB0_23 DQB1_23 AR4 MB1_D24
MA0_D25 B32 DQA0_24 DQA1_24 A7 MA1_D25 MB0_D25 AC1 DQB0_24 DQB1_24 AR5 MB1_D25
MA0_D26 A32 DQA0_25 DQA1_25 B7 MA1_D26 MB0_D26 AC2 DQB0_25 DQB1_25 AU4 MB1_D26
MA0_D27 B31 DQA0_26 DQA1_26 A6 MA1_D27 MB0_D27 AD1 DQB0_26 DQB1_26 AU7 MB1_D27
MA0_D28 A30 DQA0_27 DQA1_27 A4 MA1_D28 MB0_D28 AF1 DQB0_27 DQB1_27 AN8 MB1_D28
MA0_D29 B29 DQA0_28 DQA1_28 B4 MA1_D29 MB0_D29 AF2 DQB0_28 DQB1_28 AV11 MB1_D29
MA0_D30 B28 DQA0_29 DQA1_29 A3 MA1_D30 MB0_D30 AG1 DQB0_29 DQB1_29 AU11 MB1_D30
MA0_D31 A28 DQA0_30 DQA1_30 B3 MA1_D31 MB0_D31 AG2 DQB0_30 DQB1_30 AP11 MB1_D31
DQA0_31 DQA1_31 DQB0_31 DQB1_31
35 MA0_A[0..8] MA1_A[0..8] 35 36 MB0_A[0..8] MB1_A[0..8] 36
MA0_A0 G25 E15 MA1_A0 MB0_A0 R5 AE7 MB1_A0
MA0_A1 H25 MAA0_0 MAA1_0 H15 MA1_A1 MB0_A1 R8 MAB0_0 MAB1_0 AE8 MB1_A1
MA0_A2 E27 MAA0_1 MAA1_1 G13 MA1_A2 MB0_A2 N7 MAB0_1 MAB1_1 AG5 MB1_A2
MA0_A3 D27 MAA0_2 MAA1_2 D13 MA1_A3 MB0_A3 N4 MAB0_2 MAB1_2 AG4 MB1_A3
MA0_A4 D29 MAA0_3 MAA1_3 H11 MA1_A4 MB0_A4 L8 MAB0_3 MAB1_3 AJ4 MB1_A4
MA0_A5 H27 MAA0_4 MAA1_4 H13 MA1_A5 MB0_A5 N8 MAB0_4 MAB1_4 AG8 MB1_A5
MA0_A6 H23 MAA0_5 MAA1_5 H17 MA1_A6 MB0_A6 U8 MAB0_5 MAB1_5 AC8 MB1_A6
MA0_A7 E23 MAA0_6 MAA1_6 G17 MA1_A7 MB0_A7 U7 MAB0_6 MAB1_6 AC5 MB1_A7
C MA0_A8 D25 MAA0_7 MAA1_7 D15 MA1_A8 MB0_A8 R4 MAB0_7 MAB1_7 AE4 MB1_A8 C
H29 MAA0_8 MAA1_8 E11 L5 MAB0_8 MAB1_8 AJ8
MAA0_9 MAA1_9 MAB0_9 MAB1_9
MA0_WCK01 D33 A22 MA1_WCK01 MB0_WCK01 H1 AP1 MB1_WCK01

35 MA0_WCK01 MA0_WCK01# WCKA0_0 WCKA1_0 MA1_WCK01# MA1_WCK01 35 36 MB0_WCK01 MB0_WCK01# WCKB0_0 WCKB1_0 MB1_WCK01# MB1_WCK01 36
E33 B21 J2 AP2
35 MA0_WCK01# WCKA0B_0 WCKA1B_0 MA1_WCK01# 35 36 MB0_WCK01# WCKB0B_0 WCKB1B_0 MB1_WCK01# 36
MA0_WCK23 A34 A8 MA1_WCK23 MB0_WCK23 AB1 AN4 MB1_WCK23

35 MA0_WCK23 MA0_WCK23# WCKA0_1 WCKA1_1 MA1_WCK23# MA1_WCK23 35 36 MB0_WCK23 MB0_WCK23# WCKB0_1 WCKB1_1 MB1_WCK23# MB1_WCK23 36
B34 B9 AA2 AN5
35 MA0_WCK23# WCKA0B_1 WCKA1B_1 MA1_WCK23# 35 36 MB0_WCK23# WCKB0B_1 WCKB1B_1 MB1_WCK23# 36
MA0_EDC0 G38 B24 MA1_EDC0 MB0_EDC0 F2 AL1 MB1_EDC0

35 MA0_EDC0 MA0_EDC1 EDCA0_0 EDCA1_0 MA1_EDC1 MA1_EDC0 35 36 MB0_EDC0 MB0_EDC1 EDCB0_0 EDCB1_0 MB1_EDC1 MB1_EDC0 36
F41 A18 M2 AU2
35 MA0_EDC1 MA0_EDC2 EDCA0_1 EDCA1_1 MA1_EDC2 MA1_EDC1 35 36 MB0_EDC1 MB0_EDC2 EDCB0_1 EDCB1_1 MB1_EDC2 MB1_EDC1 36
B37 B12 V1 BA6
35 MA0_EDC2 MA0_EDC3 A31 EDCA0_2 EDCA1_2 B6 MA1_EDC3 MA1_EDC2 35 36 MB0_EDC2 MB0_EDC3 AD2 EDCB0_2 EDCB1_2 AV7 MB1_EDC3 MB1_EDC2 36
35 MA0_EDC3 EDCA0_3 EDCA1_3 MA1_EDC3 35 36 MB0_EDC3 EDCB0_3 EDCB1_3 MB1_EDC3 36
MA0_DBI#0 J38 B25 MA1_DBI#0 MB0_DBI#0 E2 AK2 MB1_DBI#0

35 MA0_DBI#0 MA0_DBI#1 DDBIA0_0 DDBIA1_0 MA1_DBI#1 MA1_DBI#0 35 36 MB0_DBI#0 MB0_DBI#1 DDBIB0_0 DDBIB1_0 MB1_DBI#1 MB1_DBI#0 36
F40 B18 M1 AV1
A38 A12 V2 AY6
B30 B5 AE2 AV9
35 MA0_DBI#3 DDBIA0_3 DDBIA1_3 MA1_DBI#3 35 36 MB0_DBI#3 DDBIB0_3 DDBIB1_3 MB1_DBI#3 36
MA0_ADBI H21 H19 MA1_ADBI MB0_ADBI W8 AA8 MB1_ADBI

35 MA0_ADBI ADBIA0 ADBIA1 MA1_ADBI 35 36 MB0_ADBI ADBIB0 ADBIB1 MB1_ADBI 36
MA0_CS# H31 E7 MA1_CS# MB0_CS# G5 AL8 MB1_CS#

35 MA0_CS# CSA0B_0 CSA1B_0 MA1_CS# 35 36 MB0_CS# CSB0B_0 CSB1B_0 MB1_CS# 36
MA0_CAS# D23 D17 MA1_CAS# MB0_CAS# U4 AC4 MB1_CAS#

35 MA0_CAS# MA0_RAS# CASA0B CASA1B MA1_RAS# MA1_CAS# 35 36 MB0_CAS# MB0_RAS# CASB0B CASB1B MB1_RAS# MB1_CAS# 36
D21 D19 W4 AA4
B
35 MA0_RAS# MA0_WE# G29 RASA0B RASA1B D11 MA1_WE# MA1_RAS# 35 36 MB0_RAS# MB0_WE# L4 RASB0B RASB1B AJ7 MB1_WE# MB1_RAS# 36 B
35 MA0_WE# WEA0B WEA1B MA1_WE# 35 36 MB0_WE# WEB0B WEB1B MB1_WE# 36
MA0_CKE G21 E19 MA1_CKE MB0_CKE W5 AA7 MB1_CKE

35 MA0_CKE CKEA0 CKEA1 MA1_CKE 35 36 MB0_CKE CKEB0 CKEB1 MB1_CKE 36
MA0_CLK E31 D7 MA1_CLK MB0_CLK G4 AL5 MB1_CLK
35 MA0_CLK MA0_CLK# D31 CLKA0 CLKA1 D9 MA1_CLK# MA1_CLK 35 36 MB0_CLK MB0_CLK# CLKB0 CLKB1 MB1_CLK# MB1_CLK 36
J4 AL4
35 MA0_CLK# CLKA0B CLKA1B MA1_CLK# 35 36 MB0_CLK# CLKB0B CLKB1B MB1_CLK# 36
RV39 1 DIS@ 2 120_0402_1% K15 K17 MA_VREFD RV1633 1 RX560@ 2 120_0402_1% R10 U10 MB_VREFD
MEM_CALRA MVREFDA MEM_CALRB MVREFDB
MA_VRAMRST#_G L32 MB_VRAMRST#_G AM11

DRAM_RSTA REV 0.91 DRAM_RSTB
REV 0.91
2160896088A1R16M_FCBGA769P-NH 2160896088A1R16M_FCBGA769P-NH
+1.5VSDGPU
+1.5VSDGPU
1
RV36 RV37 RV1641 RV1642
1
49.9_0402_1% 10_0402_1% DIS@ 49.9_0402_1% 10_0402_1%
1 DIS@ 2 2 DIS@ 1 MA_VRAMRST#_G RV32 1 RX560@ 2 2 RX560@ 1 MB_VRAMRST#_G DIS@
35 MA_VRAMRST# 36 MB_VRAMRST#
40.2_0402_1% RV1635
40.2_0402_1%
2
1
1
1 1
2
DIS@ DIS@ MA_VREFD RX560@ RX560@
CV96 RV38 CV2720 RV1643 MB_VREFD
120P_0402_50V8J 5.1K_0402_1% 120P_0402_50V8J 5.1K_0402_1%
1
2 DIS@ 2
1 DIS@
2
1
RV35 CV486 DIS@ 1 DIS@
100_0402_1% 1U_0201_6.3V6M RV1634 CV487
100_0402_1% 1U_0201_6.3V6M
2
2
A
2 A
2
Place close to GPU (within 25mm) Place close to GPU (within 25mm)
and place componment within (5mm) close to each other and place componment within (5mm) close to each other

R18M-G1-90_(4/9)_MEM
Custom 1A
5 4 3 2 1
5 4 3 2 1
UV1G @ UV1H @
D symbol7 symbol8 D
AY32 AY22
TX2P_DPB0P TX2P_DPD0P
BA32 BA22
TX2M_DPB0N TX2M_DPD0N
AY31 AY21
BA31 BA21
AY30 AY20
BA30 BA20
AY28 AY19
TXCBP_DPB3P TXCDP_DPD3P
BA28 BA19
TXCBM_DPB3N TXCDM_DPD3N
AY11
AUX1P
BA11
AUX1N
AM21 AY10
DDCAUX3P DDC1CLK
AP21 1TP@ BA10
DDCAUX3N T238 DDC1DATA
C C
UV1O @
symbol15
AY18
TX2P_DPE0P AY36 AY27
BA18 TX5P_DPA0P TX5P_DPC0P
TX2M_DPE0N BA36 BA27
AY16 TX5M_DPA0N TX5M_DPC0N
TXCEP_DPE3P AY33 AY24
BA14 TXCAP_DPA3P TXCCP_DPC3P
TXCEM_DPE3N BA33 BA24
TXCAM_DPA3N TXCCM_DPC3N
AP19 1TP@
AUX2P T236
AM19 1TP@
AUX2N T232
BA12
B AUX_ZVSS B
2
AU27 1TP@ DIS@

DDCAUX5P T243
RV372 AR23 AV19 1TP@
DDCAUX4P DDC2CLK T235
AV27 1TP@ 150_0402_1%
DDCAUX5N T242
REV 0.91
AP23 AU19 1TP@
T233
1
DDCAUX4N REV 0.91 DDC2DATA

REV 0.91
2160896088A1R16M_FCBGA769P-NH 2160896088A1R16M_FCBGA769P-NH 2160896088A1R16M_FCBGA769P-NH
Data Book:need
config even if not
use display function
A A

R18M-G1-90_(5/9)_DISPLAY
Custom 1A
5 4 3 2 1
5 4 3 2 1
+VGA_CORE R17M-P1-50(25W):30A R17M-P1-50(25W):8A SCL:22u x2, 1u x4 +VDDCI

R18M-M2-60:25A R18M-M2-60:Merge-VDDC
SCL:22u x8, 1u x7 R18M-G1-90:60A UV1I @ R18M-G1-90:12A UV1L @
N13 symbol9 L13 symbol12
N15 VDDC#0 VDDCI#0 L17 A2 J39
VDDC#1 VDDCI#1 VSS#0 VSS#58
CV62
N21 L21 A5 J40
CV323
CV324
CV325
CV326
CV327
CV328
CV329
CV330
CV317
CV318
CV319
CV321
CV320
CV322
CV334
CV333
CV332
CV331
CV336
CV335
N23 VDDC#2 VDDCI#2 L25 A9 VSS#1 VSS#59 J41
1 1 1 1 1 1 1 1 1 1 1
2
2
N29 VDDC#3 VDDCI#3 L29 A13 VSS#2 VSS#60 K21
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
N31 VDDC#4 VDDCI#4 N11 A17 VSS#3 VSS#61 K25
DIS@
DIS@
R13 VDDC#5 VDDCI#5 U11 A21 VSS#4 VSS#62 K29
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1
2 2 2 2 2 2 2 R15 VDDC#6 VDDCI#6 AA11 2 2 2 2 A25 VSS#5 VSS#63 K40
D R21 VDDC#7 VDDCI#7 AE11 A29 VSS#6 VSS#64 L3 D
R23 VDDC#8 VDDCI#8 A33 VSS#7 VSS#65 L7
R29 VDDC#9 A37 VSS#8 VSS#66 L11
R31 VDDC#10 A40 VSS#9 VSS#67 L15
U13 VDDC#11 B1 VSS#10 VSS#68 L19
U15 VDDC#12 B40 VSS#11 VSS#69 L23
U21 VDDC#13 B41 VSS#12 VSS#70 L27
U23 VDDC#14 C5 VSS#13 VSS#71 L31
W13 VDDC#17 C11 VSS#16 VSS#74 N1
W23 VDDC#20 C17 VSS#19 VSS#77 N17
W29 VDDC#21 C19 VSS#20 VSS#78 N19
W31 VDDC#22 C21 VSS#21 VSS#79 N25
AA13 VDDC#23 C23 VSS#22 VSS#80 N27
AA29 VDDC#27 C31 VSS#26 VSS#84 R3
AA31 VDDC#28 C33 VSS#27 VSS#85 R7
AC13 VDDC#29 C35 VSS#28 VSS#86 R11
AC23 VDDC#32 E1 VSS#31 VSS#89 R25
AE13 VDDC#35 E9 VSS#34 VSS#92 R35
AE15 VDDC#36 E13 VSS#35 VSS#93 R39
AE21 VDDC#37 E17 VSS#36 VSS#94 U1
AG13 VDDC#41 E39 VSS#40 VSS#98 U19
AG15 VDDC#42 E41 VSS#41 VSS#99 U25
AG21 VDDC#43 G3 VSS#42 VSS#100 U27
AJ13 VDDC#47 G19 VSS#46 VSS#104 W3
C VDDC#49 VSS#48 VSS#106 C
AJ17 G27 W11
AJ25 VDDC#53 J1 VSS#52 VSS#110 W27
AJ27 VDDC#54 J3 VSS#53 VSS#111 W39
AJ29 VDDC#55 J5 VSS#54 VSS#112 AA1
AJ31 VDDC#56 J34 VSS#55 VSS#113 AA3
AL13 VDDC#57 J37 VSS#56 VSS#114
AL15 VDDC#58 VSS#57
AL17 VDDC#59 REV 0.91
AL19 VDDC#60
AL21 VDDC#61 2160896088A1R16M_FCBGA769P-NH
AL23 VDDC#62
AL25 VDDC#63 C3
AL27 VDDC#64 FB_VMEMIO AV13 GPU_VDDCI_SEN
VDDC#65 FB_VDDCI GPU_VDDC_SEN GPU_VDDCI_SEN 92
AL29 AR13
VDDC#66 FB_VDDC GPU_VSS_SEN_L GPU_VDDC_SEN 92 UV1M @
AL31 AU13
VDDC#67 FB_VSS GPU_VSS_SEN_L 92
REV 0.91 symbol13
AA5 AN40
2160896088A1R16M_FCBGA769P-NH AA10 VSS#115 VSS#171 AN41
AA17 VSS#116 VSS#172 AP13
AA19 VSS#117 VSS#173 AP17
AA25 VSS#118 VSS#174 AR3
AC3 VSS#122 VSS#178 AR21
+1.8VSDGPU AC7 VSS#123 VSS#179 AR25
+1.5VSDGPU AC11 VSS#124 VSS#180 AR27
R17M-P1-50(25W):2A(1.35V) AC17 VSS#125 VSS#181 AR31
UV1N @ AC19 VSS#126 VSS#182 AR35
R18M-M2-60:2A(1.35V) VSS#127 VSS#183
SCL:22u x2, 1u x10 R18M-G1-90:2A(1.5V) symbol14 1A SCL:1u x3 AC25 AR39
K11 AM15 AC27 VSS#128 VSS#184 AU1
K13 VMEMIO#0 VDD_18#0 AP15 AC39 VSS#129 VSS#185 AU3
CV348
CV2730
Close to AM15, AP15, AR15

K19 VMEMIO#1 VDD_18#1 AR15 AE1 VSS#130 VSS#186 AU9
CV340
CV338
CV342
CV343
CV344
CV345
CV351
CV347
CV337
CV339
CV341
CV346
CV349
CV350
K23 VMEMIO#2 VDD_18#2 AE3 VSS#131 VSS#187 AU23
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
2
K27 VMEMIO#3 AE5 VSS#132 VSS#188 AU29

DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
K31 VMEMIO#4 AE10 VSS#133 VSS#189 AW3
L10 VMEMIO#5 AE17 VSS#134 VSS#190 AW5
10U_0402_6.3V6M
1U_0201_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
22U_0603_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1
2 2 2 2 2 2 2 2 2 2 2 2 N10 VMEMIO#6 2 2 2 AE19 VSS#135 VSS#191 AW7

W10 VMEMIO#7 +VDDCI AE25 VSS#136 VSS#192 AW9
DIS@
DIS@
B R17M-P1-50(25W):Merge-VDDCI B
AC10 VMEMIO#8 AE27 VSS#137 VSS#193 AW11
VMEMIO#9
R18M-M2-60:2A VSS#138 VSS#194
AG10 R18M-G1-90:Merge-VDDCI SCL:1u x7 AE32 AW13
VMEMIO#10 AC32 AE35 VSS#139 VSS#195 AW15
VDD_08#0 AG32 AE39 VSS#140 VSS#196 AW17
VDD_08#1 AG35 AG3 VSS#141 VSS#197 AW19
CV358
CV352
CV353
CV355
CV356
CV357
CV354
VDD_08#2 AJ32 AG7 VSS#142 VSS#198 AW21

VDD_08#3 1 1 1 1 1 1 1 VSS#143 VSS#199
AJ34 AG11 AW23
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
VDD_08#4 AL34 AG17 VSS#144 VSS#200 AW25

FH50P 2019/01/22 VDD_08#5 AG19 VSS#145 VSS#201 AW27
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
Replace 22U_0603 to 10U_0402 x 2 for layout placement W32 2 2 2 2 2 2 2 AG25 VSS#146 VSS#202 AW29
VDD_08 AG27 VSS#147 VSS#203 AW31
AG39 VSS#148 VSS#204 AW33
AM23 AG40 VSS#149 VSS#205 AW35
VSS AM17 AG41 VSS#150 VSS#206 AW37
VSS AJ1 VSS#151 VSS#207 AW39
REV 0.91
AJ3 VSS#152 VSS#208 AY1
2160896088A1R16M_FCBGA769P-NH AJ10 VSS#154 VSS#210 AY9
AL3 VSS#158 VSS#214 AY29
AL32 VSS#162 VSS#218 BA2
AN1 VSS#165 VSS#221 BA17
+1.8VSDGPU AN7 VSS#167 VSS#223 BA29
CV316 DIS@ UV1J @ VSS#170 VSS#226
1U_0201_6.3V6M 13mA symbol10
1 2 AM13 N35 REV 0.91
TSVDD DPLUS
DG:Thermal Die Temperature 2160896088A1R16M_FCBGA769P-NH
J8
TEMPIN0 N34
SCL:No need to implement. DMINUS
A J7 A
TEMPINRETURN
U38 GPIO_28_FDO Fan Drive Out option
N38 GPIO_28_FDO
2
TS_A
REV 0.91 RV21
10K_0201_5%
2160896088A1R16M_FCBGA769P-NH @
1

R18M-G1-90_(6/9)_PWR/GND
Custom 1A
5 4 3 2 1
5 4 3 2 1
PCIE_RST_L APU_PCIE_RST#
APU AND PLT_RST_VGA# PERSTB
EGPIO140 PE_GPIO0 GATE GPU
EGPIO141 PE_GPIO1
EGPIO143
AND
D GATE D
+3VALW +3VSDGPU
VGA_ON
DL SW 1
R18M-G1-90
Delay 3ms
Power Up LDO
Ready within +3VALW +1.8VSDGPU
20ms 2
VGA_ON
+3VSDGPU
+VDDCI
+1.8VSDGPU Delay 3ms
+19VB +VGA_CORE
+3VSDGPU
VGA_ON_B Delay +3VSDGPU 7ms
AND VGA_ON_B
PWM 4 DGPU_PWROK AND
DGPU_PWRGOOD
VGA_ON GATE Delay +3VSDGPU 7ms

+VDDCI DGPU_PWRGOOD GATE PLT_RST_VGA#
(0.8VSDGPU merge VDDCI)

+VGA_CORE
DGPU_PWRGOOD
+19VB +1.5VSDGPU
+1.5VSDGPU PWM 5
C
DGPU_PWRGOOD C
For AMD R18M-G1-90 VRAM Device ID: 67EF/C0 AMD GPU PN

DBGDATA_5 (H: RV463, L: RV464)
Memory ID/Vendor/Size Memory PN R3(ABO!) BOARD_CONFIG[2:0] DBGDATA_4 (H: RV461, L: RV462) R18M-G1-90 PN R1(ROH)
DBGDATA_3 (H: RV459, L: RV460)
UV1 RX560@
000 (8Gb) UV1001 X76_S4G@

UV1002 X76_S4G@
RV464
RV462
X76_S4G@
X76_S4G@
UV1003 X76_S4G@ RV460 X76_S4G@
SAMSUNG UV1004 X76_S4G@
S RES 1/20W 5.1K +-1% 0201
256M x32 S IC D5 256M32 K4G80325FB-HC25 FBGA ABO! SD000008900 S IC 215-0908004 A1 R18M-G1-90 ABO!
SA00009TA10 SA0000BFF10
001 (8Gb) UV1001

UV1002
X76_H4G@
X76_H4G@
RV464
RV462
X76_H4G@
X76_H4G@
UV1003 X76_H4G@ RV459 X76_H4G@
HYNIX UV1004 X76_H4G@
S RES 1/20W 5.1K +-1% 0201
256M x32 S IC D5 256M32 H5GC8H24AJR-R2C BGA ABO! SD000008900
SA0000C1700
010
SAMSUNG
128M x32
B B
011
HYNIX
128M x32
100
MICRON
256M x32
A A

R18M-G1-90_(7/9)_NOTE
1A
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
MA0_D[0..31]
30 MA0_D[0..31]
30 MA0_A[0..8]
MA0_A[0..8]
A0 Channel A1 Channel
MA1_D[0..31]
30 MA1_D[0..31]
MA1_A[0..8]
30 MA1_A[0..8]
UV1001 @ MF=0 UV1002 @ MF=1
MF=0 MF=1 MF=1 MF=0 MF=0 MF=1 MF=1 MF=0
A4 MA0_D6 A4 MA1_D7
MA0_EDC0 C2 DQ24 DQ0 A2 MA0_D7 MA1_EDC0 C2 DQ24 DQ0 A2 MA1_D5
30 MA0_EDC0 MA0_EDC1 EDC0 EDC3 DQ25 DQ1 MA0_D5 30 MA1_EDC0 MA1_EDC1 EDC0 EDC3 DQ25 DQ1 MA1_D6
C13 B4 C13 B4
30 MA0_EDC1 MA0_EDC2 EDC1 EDC2 DQ26 DQ2 MA0_D4 30 MA1_EDC1 MA1_EDC3 EDC1 EDC2 DQ26 DQ2 MA1_D4
R13 B2 R13 B2
+1.5VSDGPU 30 MA0_EDC2 MA0_EDC3 EDC2 EDC1 DQ27 DQ3 MA0_D2 +1.5VSDGPU 30 MA1_EDC3 MA1_EDC2 EDC2 EDC1 DQ27 DQ3 MA1_D3
R2 E4 Byte 0 R2 E4 Byte 0
30 MA0_EDC3 EDC3 EDC0 DQ28 DQ4 MA0_D0 30 MA1_EDC2 EDC3 EDC0 DQ28 DQ4 MA1_D2
E2 E2
DQ29 DQ5 F4 MA0_D1 DQ29 DQ5 F4 MA1_D0
D RV79 MA0_DBI#0 D2 DQ30 DQ6 F2 MA0_D3 RV1637 MA1_DBI#0 D2 DQ30 DQ6 F2 MA1_D1 D
30 MA0_DBI#0 MA0_DBI#1 DBI0# DBI3# DQ31 DQ7 MA0_D10 30 MA1_DBI#0 MA1_DBI#1 DBI0# DBI3# DQ31 DQ7 MA1_D8
60.4_0402_1% D13 A11 60.4_0402_1% D13 A11
MA0_CLK 30 MA0_DBI#1 MA0_DBI#2 DBI1# DBI2# DQ16 DQ8 MA0_D9 MA1_CLK 30 MA1_DBI#1 MA1_DBI#3 DBI1# DBI2# DQ16 DQ8 MA1_D10
1 DIS@ 2 P13 A13 1 DIS@ 2 P13 A13
30 MA0_DBI#2 MA0_DBI#3 DBI2# DBI1# DQ17 DQ9 MA0_D11 30 MA1_DBI#3 MA1_DBI#2 DBI2# DBI1# DQ17 DQ9 MA1_D9
P2 B11 P2 B11
30 MA0_DBI#3 DBI3# DBI0# DQ18 DQ10 MA0_D8 30 MA1_DBI#2 DBI3# DBI0# DQ18 DQ10 MA1_D11
RV80 B13 RV1636 B13
60.4_0402_1% MA0_CLK J12 DQ19 DQ11 E11 MA0_D15 Byte 1 60.4_0402_1% MA1_CLK J12 DQ19 DQ11 E11 MA1_D12 Byte 1
MA0_CLK# 30 MA0_CLK MA0_CLK# CK DQ20 DQ12 MA0_D12 MA1_CLK# 30 MA1_CLK MA1_CLK# CK DQ20 DQ12 MA1_D13
1 DIS@ 2 J11 E13 1 DIS@ 2 J11 E13
30 MA0_CLK# MA0_CKE CK# DQ21 DQ13 MA0_D14 30 MA1_CLK# MA1_CKE CK# DQ21 DQ13 MA1_D15
J3 F11 J3 F11
30 MA0_CKE CKE# DQ22 DQ14 MA0_D13 30 MA1_CKE CKE# DQ22 DQ14 MA1_D14
F13 F13
DQ23 DQ15 U11 MA0_D23 DQ23 DQ15 U11 MA1_D31
MA0_A2 H11 DQ8 DQ16 U13 MA0_D21 MA1_A4 H11 DQ8 DQ16 U13 MA1_D30
MA0_A5 K10 BA0/A2 BA2/A4 DQ9 DQ17 T11 MA0_D22 MA1_A3 K10 BA0/A2 BA2/A4 DQ9 DQ17 T11 MA1_D28
MA0_A4 K11 BA1/A5 BA3/A3 DQ10 DQ18 T13 MA0_D20 MA1_A2 K11 BA1/A5 BA3/A3 DQ10 DQ18 T13 MA1_D29
MA0_A3 H10 BA2/A4 BA0/A2 DQ11 DQ19 N11 MA0_D19 Byte 2 MA1_A5 H10 BA2/A4 BA0/A2 DQ11 DQ19 N11 MA1_D25 Byte 3
BA3/A3 BA1/A5 DQ12 DQ20 N13 MA0_D18 BA3/A3 BA1/A5 DQ12 DQ20 N13 MA1_D26
DQ13 DQ21 M11 MA0_D16 DQ13 DQ21 M11 MA1_D24
MA0_A7 K4 DQ14 DQ22 M13 MA0_D17 MA1_A0 K4 DQ14 DQ22 M13 MA1_D27
MA0_A1 H5 A8/A7 A10/A0 DQ15 DQ23 U4 MA0_D24 MA1_A6 H5 A8/A7 A10/A0 DQ15 DQ23 U4 MA1_D16
MA0_A0 H4 A9/A1 A11/A6 DQ0 DQ24 U2 MA0_D26 MA1_A7 H4 A9/A1 A11/A6 DQ0 DQ24 U2 MA1_D17
MA0_A6 K5 A10/A0 A8/A7 DQ1 DQ25 T4 MA0_D25 MA1_A1 K5 A10/A0 A8/A7 DQ1 DQ25 T4 MA1_D19
MA0_A8 J5 A11/A6 A9/A1 DQ2 DQ26 T2 MA0_D27 MA1_A8 J5 A11/A6 A9/A1 DQ2 DQ26 T2 MA1_D18
A12/RFU/NC DQ3 DQ27 N4 MA0_D28 Byte 3 A12/RFU/NC DQ3 DQ27 N4 MA1_D21 Byte 2
A5 DQ4 DQ28 N2 MA0_D29 A5 DQ4 DQ28 N2 MA1_D22
U5 VPP/NC DQ5 DQ29 M4 MA0_D31 +1.5VSDGPU U5 VPP/NC DQ5 DQ29 M4 MA1_D20
VPP/NC DQ6 DQ30 M2 MA0_D30 VPP/NC DQ6 DQ30 M2 MA1_D23
DQ7 DQ31 DQ7 DQ31
RV134 2 DIS@ 1 1K_0402_1% J1 +1.5VSDGPU RV131 2 DIS@ 1 1K_0402_1% J1 +1.5VSDGPU
RV474 2 DIS@ 1 1K_0402_1% J10 MF RV475 2 DIS@ 1 1K_0402_1% J10 MF
RV123 1 DIS@ 2 120_0402_1% J13 SEN B1 RV132 1 DIS@ 2 120_0402_1% J13 SEN B1
ZQ VDDQ D1 ZQ VDDQ D1
VDDQ F1 VDDQ F1
MA0_ADBI J4 VDDQ M1 MA1_ADBI J4 VDDQ M1
30 MA0_ADBI MA0_RAS# ABI# VDDQ 30 MA1_ADBI MA1_CAS# ABI# VDDQ
G3 P1 G3 P1
30 MA0_RAS# MA0_CS# RAS# CAS# VDDQ 30 MA1_CAS# MA1_WE# RAS# CAS# VDDQ
G12 T1 G12 T1
30 MA0_CS# MA0_CAS# CS# WE# VDDQ 30 MA1_WE# MA1_RAS# CS# WE# VDDQ
L3 G2 L3 G2
30 MA0_CAS# MA0_WE# CAS# RAS# VDDQ 30 MA1_RAS# MA1_CS# CAS# RAS# VDDQ
L12 L2 L12 L2
30 MA0_WE# WE# CS# VDDQ 30 MA1_CS# WE# CS# VDDQ
B3 B3
VDDQ D3 VDDQ D3
VDDQ F3 VDDQ F3
MA0_WCK01# D5 VDDQ H3 MA1_WCK01# D5 VDDQ H3
30 MA0_WCK01# MA0_WCK01 WCK01# WCK23# VDDQ 30 MA1_WCK01# MA1_WCK01 WCK01# WCK23# VDDQ
Can NC For GDDR5 Spec. D4 K3 Can NC For GDDR5 Spec. D4 K3
30 MA0_WCK01 WCK01 WCK23 VDDQ 30 MA1_WCK01 WCK01 WCK23 VDDQ
M3 M3
C MA0_WCK23# VDDQ MA1_WCK23# VDDQ C
P5 P3 P5 P3
30 MA0_WCK23# MA0_WCK23 WCK23# WCK01# VDDQ 30 MA1_WCK23# MA1_WCK23 WCK23# WCK01# VDDQ
+1.5VSDGPU P4 T3 +1.5VSDGPU P4 T3
30 MA0_WCK23 WCK23 WCK01 VDDQ 30 MA1_WCK23 WCK23 WCK01 VDDQ
E5 E5
VDDQ N5 VDDQ N5
RV52 1 DIS@ 2 2.37K_0402_1% VREFD1_A0 VREFD1_A0 A10 VDDQ E10 RV486 1 DIS@ 2 2.37K_0402_1% VREFD1_A1 VREFD1_A1 A10 VDDQ E10
RV53 1 DIS@ 2 5.49K_0402_1% VREFD2_A0 U10 VREFD VDDQ N10 RV487 1 DIS@ 2 5.49K_0402_1% VREFD2_A1 U10 VREFD VDDQ N10
VREFC_A0 J14 VREFD VDDQ B12 VREFC_A1 J14 VREFD VDDQ B12
DIS@ VREFC VDDQ D12 DIS@ VREFC VDDQ D12
CV394 1 2 1U_0201_6.3V6M VDDQ F12 CV407 1 2 1U_0201_6.3V6M VDDQ F12
VDDQ H12 VDDQ H12
MA_VRAMRST# J2 VDDQ K12 MA_VRAMRST# J2 VDDQ K12
30 MA_VRAMRST# RESET# VDDQ RESET# VDDQ
M12 M12
VDDQ P12 VDDQ P12
+1.5VSDGPU VDDQ T12 +1.5VSDGPU VDDQ T12
VDDQ G13 VDDQ G13
H1 VDDQ L13 H1 VDDQ L13
RV478 1 DIS@ 2 2.37K_0402_1% VREFD2_A0 K1 VSS VDDQ B14 RV482 1 DIS@ 2 2.37K_0402_1% VREFD2_A1 K1 VSS VDDQ B14
RV479 1 DIS@ 2 5.49K_0402_1% B5 VSS VDDQ D14 RV483 1 DIS@ 2 5.49K_0402_1% B5 VSS VDDQ D14
G5 VSS VDDQ F14 G5 VSS VDDQ F14
DIS@ L5 VSS VDDQ M14 DIS@ L5 VSS VDDQ M14
CV403 1 2 1U_0201_6.3V6M T5 VSS VDDQ P14 CV405 1 2 1U_0201_6.3V6M T5 VSS VDDQ P14
B10 VSS VDDQ T14 B10 VSS VDDQ T14
D10 VSS VDDQ D10 VSS VDDQ
G10 VSS G10 VSS
L10 VSS A1 L10 VSS A1
P10 VSS VSSQ C1 P10 VSS VSSQ C1
+1.5VSDGPU T10 VSS VSSQ E1 +1.5VSDGPU T10 VSS VSSQ E1
H14 VSS VSSQ N1 H14 VSS VSSQ N1
K14 VSS VSSQ R1 K14 VSS VSSQ R1
RV480 1 DIS@ 2 2.37K_0402_1% VREFC_A0 +1.5VSDGPU VSS VSSQ U1 RV484 1 DIS@ 2 2.37K_0402_1% VREFC_A1 +1.5VSDGPU VSS VSSQ U1
RV481 1 DIS@ 2 5.49K_0402_1% VSSQ H2 RV485 1 DIS@ 2 5.49K_0402_1% VSSQ H2
G1 VSSQ K2 G1 VSSQ K2
DIS@ L1 VDD VSSQ A3 DIS@ L1 VDD VSSQ A3
CV404 1 2 1U_0201_6.3V6M G4 VDD VSSQ C3 CV406 1 2 1U_0201_6.3V6M G4 VDD VSSQ C3
L4 VDD VSSQ E3 L4 VDD VSSQ E3
C5 VDD VSSQ N3 C5 VDD VSSQ N3
R5 VDD VSSQ R3 R5 VDD VSSQ R3
C10 VDD VSSQ U3 C10 VDD VSSQ U3
R10 VDD VSSQ C4 R10 VDD VSSQ C4
D11 VDD VSSQ R4 D11 VDD VSSQ R4
G11 VDD VSSQ F5 G11 VDD VSSQ F5
L11 VDD VSSQ M5 L11 VDD VSSQ M5
B B
P11 VDD VSSQ F10 P11 VDD VSSQ F10
G14 VDD VSSQ M10 G14 VDD VSSQ M10
L14 VDD VSSQ C11 L14 VDD VSSQ C11
VDD VSSQ R11 VDD VSSQ R11
VSSQ A12 VSSQ A12
VSSQ C12 VSSQ C12
VSSQ E12 VSSQ E12
VSSQ N12 VSSQ N12
VSSQ R12 VSSQ R12
170-BALL VSSQ U12 170-BALL VSSQ U12
VSSQ H13 VSSQ H13
SGRAM GDDR5 VSSQ K13 SGRAM GDDR5 VSSQ K13
VSSQ A14 VSSQ A14
VSSQ C14 VSSQ C14
VSSQ E14 VSSQ E14
VSSQ N14 VSSQ N14
VSSQ R14 VSSQ R14
VSSQ U14 VSSQ U14
VSSQ VSSQ
H5GC4H24AJR-R0C_BGA170 H5GC4H24AJR-R0C_BGA170
Decoupling Caps for single-sided Decoupling Caps for Clamshell

1x 10uF /per DRAM 1x 10uF /per Clamshell DRAM
8x 0.1uF /per DRAM
+1.5VSDGPU +1.5VSDGPU +1.5VSDGPU
CV238
CV465
CV445
CV2728
CV243
CV392
CV396
CV415
CV418
CV210
CV230
CV233
CV467
CV454
CV458
CV247
CV397
CV398
CV414
CV417
CV419
CV421
CV157
CV158
CV460
CV461
CV463
CV466
CV452
CV453
CV455
CV456
CV457
CV459
CV242
CV248
CV416
CV420
CV155
CV198
CV211
CV213
CV235
CV462
CV464
CV468
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
10U_0402_6.3V6M
1U_0201_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
A
10U_0402_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
A
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@

R18M-G1-90_(8/9)_CH A
Custom 1A
5 4 3 2 1
5 4 3 2 1
MB0_D[0..31]
30 MB0_D[0..31]
30 MB0_A[0..8]
MB0_A[0..8]
B0 Channel B1 Channel
MB1_D[0..31]
30 MB1_D[0..31]
MB1_A[0..8]
30 MB1_A[0..8]
UV1003 @ MF=0 UV1004 @ MF=1
MF=0 MF=1 MF=1 MF=0 MF=0 MF=1 MF=1 MF=0
A4 MB0_D15 A4 MB1_D7
MB0_EDC1 C2 DQ24 DQ0 A2 MB0_D14 MB1_EDC0 C2 DQ24 DQ0 A2 MB1_D5
30 MB0_EDC1 MB0_EDC0 EDC0 EDC3 DQ25 DQ1 MB0_D12 30 MB1_EDC0 MB1_EDC1 EDC0 EDC3 DQ25 DQ1 MB1_D6
C13 B4 C13 B4
30 MB0_EDC0 MB0_EDC2 EDC1 EDC2 DQ26 DQ2 MB0_D13 30 MB1_EDC1 MB1_EDC2 EDC1 EDC2 DQ26 DQ2 MB1_D4
R13 B2 R13 B2
+1.5VSDGPU 30 MB0_EDC2 MB0_EDC3 EDC2 EDC1 DQ27 DQ3 MB0_D10 +1.5VSDGPU 30 MB1_EDC2 MB1_EDC3 EDC2 EDC1 DQ27 DQ3 MB1_D3
R2 E4 Byte 1 R2 E4 Byte 0
30 MB0_EDC3 EDC3 EDC0 DQ28 DQ4 MB0_D9 30 MB1_EDC3 EDC3 EDC0 DQ28 DQ4 MB1_D2
E2 E2
DQ29 DQ5 F4 MB0_D11 DQ29 DQ5 F4 MB1_D0
D RV473 MB0_DBI#1 D2 DQ30 DQ6 F2 MB0_D8 RV1638 MB1_DBI#0 D2 DQ30 DQ6 F2 MB1_D1 D
30 MB0_DBI#1 MB0_DBI#0 DBI0# DBI3# DQ31 DQ7 MB0_D0 30 MB1_DBI#0 MB1_DBI#1 DBI0# DBI3# DQ31 DQ7 MB1_D8
60.4_0402_1% D13 A11 60.4_0402_1% D13 A11
MB0_CLK 30 MB0_DBI#0 MB0_DBI#2 DBI1# DBI2# DQ16 DQ8 MB0_D1 MB1_CLK 30 MB1_DBI#1 MB1_DBI#2 DBI1# DBI2# DQ16 DQ8 MB1_D10
1 RX560@ 2 P13 A13 1 RX560@ 2 P13 A13
30 MB0_DBI#2 MB0_DBI#3 DBI2# DBI1# DQ17 DQ9 MB0_D3 30 MB1_DBI#2 MB1_DBI#3 DBI2# DBI1# DQ17 DQ9 MB1_D9
P2 B11 P2 B11
30 MB0_DBI#3 DBI3# DBI0# DQ18 DQ10 MB0_D2 30 MB1_DBI#3 DBI3# DBI0# DQ18 DQ10 MB1_D11
RV472 B13 RV1639 B13
60.4_0402_1% MB0_CLK J12 DQ19 DQ11 E11 MB0_D6 Byte 0 60.4_0402_1% MB1_CLK J12 DQ19 DQ11 E11 MB1_D12 Byte 1
MB0_CLK# 30 MB0_CLK MB0_CLK# CK DQ20 DQ12 MB0_D5 MB1_CLK# 30 MB1_CLK MB1_CLK# CK DQ20 DQ12 MB1_D13
1 RX560@ 2 J11 E13 1 RX560@ 2 J11 E13
30 MB0_CLK# MB0_CKE CK# DQ21 DQ13 MB0_D7 30 MB1_CLK# MB1_CKE CK# DQ21 DQ13 MB1_D15
J3 F11 J3 F11
30 MB0_CKE CKE# DQ22 DQ14 MB0_D4 30 MB1_CKE CKE# DQ22 DQ14 MB1_D14
F13 F13
DQ23 DQ15 U11 MB0_D23 DQ23 DQ15 U11 MB1_D20
MB0_A2 H11 DQ8 DQ16 U13 MB0_D21 MB1_A4 H11 DQ8 DQ16 U13 MB1_D22
MB0_A5 K10 BA0/A2 BA2/A4 DQ9 DQ17 T11 MB0_D22 MB1_A3 K10 BA0/A2 BA2/A4 DQ9 DQ17 T11 MB1_D21
MB0_A4 K11 BA1/A5 BA3/A3 DQ10 DQ18 T13 MB0_D20 MB1_A2 K11 BA1/A5 BA3/A3 DQ10 DQ18 T13 MB1_D23
MB0_A3 H10 BA2/A4 BA0/A2 DQ11 DQ19 N11 MB0_D19 Byte 2 MB1_A5 H10 BA2/A4 BA0/A2 DQ11 DQ19 N11 MB1_D16 Byte 2
BA3/A3 BA1/A5 DQ12 DQ20 N13 MB0_D18 BA3/A3 BA1/A5 DQ12 DQ20 N13 MB1_D19
DQ13 DQ21 M11 MB0_D16 DQ13 DQ21 M11 MB1_D17
MB0_A7 K4 DQ14 DQ22 M13 MB0_D17 MB1_A0 K4 DQ14 DQ22 M13 MB1_D18
MB0_A1 H5 A8/A7 A10/A0 DQ15 DQ23 U4 MB0_D24 MB1_A6 H5 A8/A7 A10/A0 DQ15 DQ23 U4 MB1_D25
MB0_A0 H4 A9/A1 A11/A6 DQ0 DQ24 U2 MB0_D26 MB1_A7 H4 A9/A1 A11/A6 DQ0 DQ24 U2 MB1_D24
MB0_A6 K5 A10/A0 A8/A7 DQ1 DQ25 T4 MB0_D25 MB1_A1 K5 A10/A0 A8/A7 DQ1 DQ25 T4 MB1_D26
MB0_A8 J5 A11/A6 A9/A1 DQ2 DQ26 T2 MB0_D27 MB1_A8 J5 A11/A6 A9/A1 DQ2 DQ26 T2 MB1_D27
A12/RFU/NC DQ3 DQ27 N4 MB0_D28 Byte 3 A12/RFU/NC DQ3 DQ27 N4 MB1_D29 Byte 3
A5 DQ4 DQ28 N2 MB0_D29 A5 DQ4 DQ28 N2 MB1_D31
U5 VPP/NC DQ5 DQ29 M4 MB0_D31 +1.5VSDGPU U5 VPP/NC DQ5 DQ29 M4 MB1_D30
VPP/NC DQ6 DQ30 M2 MB0_D30 VPP/NC DQ6 DQ30 M2 MB1_D28
DQ7 DQ31 DQ7 DQ31
RV116 2 RX560@ 1 1K_0402_1% J1 +1.5VSDGPU RV117 2 RX560@ 1 1K_0402_1% J1 +1.5VSDGPU
RV476 2 RX560@ 1 1K_0402_1% J10 MF RV477 2 RX560@ 1 1K_0402_1% J10 MF
RV120 1 RX560@ 2 120_0402_1% J13 SEN B1 RV121 1 RX560@ 2 120_0402_1% J13 SEN B1
ZQ VDDQ D1 ZQ VDDQ D1
VDDQ F1 VDDQ F1
MB0_ADBI J4 VDDQ M1 MB1_ADBI J4 VDDQ M1
30 MB0_ADBI MB0_RAS# ABI# VDDQ 30 MB1_ADBI MB1_CAS# ABI# VDDQ
G3 P1 G3 P1
30 MB0_RAS# MB0_CS# RAS# CAS# VDDQ 30 MB1_CAS# MB1_WE# RAS# CAS# VDDQ
G12 T1 G12 T1
30 MB0_CS# MB0_CAS# CS# WE# VDDQ 30 MB1_WE# MB1_RAS# CS# WE# VDDQ
L3 G2 L3 G2
30 MB0_CAS# MB0_WE# CAS# RAS# VDDQ 30 MB1_RAS# MB1_CS# CAS# RAS# VDDQ
L12 L2 L12 L2
30 MB0_WE# WE# CS# VDDQ 30 MB1_CS# WE# CS# VDDQ
B3 B3
VDDQ D3 VDDQ D3
VDDQ F3 VDDQ F3
MB0_WCK01# D5 VDDQ H3 MB1_WCK01# D5 VDDQ H3
30 MB0_WCK01# MB0_WCK01 WCK01# WCK23# VDDQ 30 MB1_WCK01# MB1_WCK01 WCK01# WCK23# VDDQ
Can NC For GDDR5 Spec. D4 K3 Can NC For GDDR5 Spec. D4 K3
30 MB0_WCK01 WCK01 WCK23 VDDQ 30 MB1_WCK01 WCK01 WCK23 VDDQ
M3 M3
C MB0_WCK23# VDDQ MB1_WCK23# VDDQ C
P5 P3 P5 P3
30 MB0_WCK23# MB0_WCK23 WCK23# WCK01# VDDQ 30 MB1_WCK23# MB1_WCK23 WCK23# WCK01# VDDQ
+1.5VSDGPU P4 T3 +1.5VSDGPU P4 T3
30 MB0_WCK23 WCK23 WCK01 VDDQ 30 MB1_WCK23 WCK23 WCK01 VDDQ
E5 E5
VDDQ N5 VDDQ N5
RV498 1 RX560@ 2 2.37K_0402_1% VREFD1_B0 VREFD1_B0 A10 VDDQ E10 RV492 1 RX560@ 2 2.37K_0402_1% VREFD1_B1 VREFD1_B1 A10 VDDQ E10
RV499 1 RX560@ 2 5.49K_0402_1% VREFD2_B0 U10 VREFD VDDQ N10 RV493 1 RX560@ 2 5.49K_0402_1% VREFD2_B1 U10 VREFD VDDQ N10
VREFC_B0 J14 VREFD VDDQ B12 VREFC_B1 J14 VREFD VDDQ B12
RX560@ VREFC VDDQ D12 RX560@ VREFC VDDQ D12
CV413 1 2 1U_0201_6.3V6M VDDQ F12 CV410 1 2 1U_0201_6.3V6M VDDQ F12
VDDQ H12 VDDQ H12
MB_VRAMRST# J2 VDDQ K12 MB_VRAMRST# J2 VDDQ K12
30 MB_VRAMRST# RESET# VDDQ RESET# VDDQ
M12 M12
VDDQ P12 VDDQ P12
+1.5VSDGPU VDDQ T12 +1.5VSDGPU VDDQ T12
VDDQ G13 VDDQ G13
H1 VDDQ L13 H1 VDDQ L13
RV494 1 RX560@ 2 2.37K_0402_1% VREFD2_B0 K1 VSS VDDQ B14 RV488 1 RX560@ 2 2.37K_0402_1% VREFD2_B1 K1 VSS VDDQ B14
RV495 1 RX560@ 2 5.49K_0402_1% B5 VSS VDDQ D14 RV489 1 RX560@ 2 5.49K_0402_1% B5 VSS VDDQ D14
G5 VSS VDDQ F14 G5 VSS VDDQ F14
RX560@ L5 VSS VDDQ M14 RX560@ L5 VSS VDDQ M14
CV411 1 2 1U_0201_6.3V6M T5 VSS VDDQ P14 CV408 1 2 1U_0201_6.3V6M T5 VSS VDDQ P14
B10 VSS VDDQ T14 B10 VSS VDDQ T14
D10 VSS VDDQ D10 VSS VDDQ
G10 VSS G10 VSS
L10 VSS A1 L10 VSS A1
P10 VSS VSSQ C1 P10 VSS VSSQ C1
+1.5VSDGPU T10 VSS VSSQ E1 +1.5VSDGPU T10 VSS VSSQ E1
H14 VSS VSSQ N1 H14 VSS VSSQ N1
K14 VSS VSSQ R1 K14 VSS VSSQ R1
RV496 1 RX560@ 2 2.37K_0402_1% VREFC_B0 +1.5VSDGPU VSS VSSQ U1 RV490 1 RX560@ 2 2.37K_0402_1% VREFC_B1 +1.5VSDGPU VSS VSSQ U1
RV497 1 RX560@ 2 5.49K_0402_1% VSSQ H2 RV491 1 RX560@ 2 5.49K_0402_1% VSSQ H2
G1 VSSQ K2 G1 VSSQ K2
RX560@ L1 VDD VSSQ A3 RX560@ L1 VDD VSSQ A3
CV412 1 2 1U_0201_6.3V6M G4 VDD VSSQ C3 CV409 1 2 1U_0201_6.3V6M G4 VDD VSSQ C3
L4 VDD VSSQ E3 L4 VDD VSSQ E3
C5 VDD VSSQ N3 C5 VDD VSSQ N3
R5 VDD VSSQ R3 R5 VDD VSSQ R3
C10 VDD VSSQ U3 C10 VDD VSSQ U3
R10 VDD VSSQ C4 R10 VDD VSSQ C4
D11 VDD VSSQ R4 D11 VDD VSSQ R4
G11 VDD VSSQ F5 G11 VDD VSSQ F5
L11 VDD VSSQ M5 L11 VDD VSSQ M5
B B
P11 VDD VSSQ F10 P11 VDD VSSQ F10
G14 VDD VSSQ M10 G14 VDD VSSQ M10
L14 VDD VSSQ C11 L14 VDD VSSQ C11
VDD VSSQ R11 VDD VSSQ R11
VSSQ A12 VSSQ A12
VSSQ C12 VSSQ C12
VSSQ E12 VSSQ E12
VSSQ N12 VSSQ N12
VSSQ R12 VSSQ R12
170-BALL VSSQ U12 170-BALL VSSQ U12
VSSQ H13 VSSQ H13
SGRAM GDDR5 VSSQ K13 SGRAM GDDR5 VSSQ K13
VSSQ A14 VSSQ A14
VSSQ C14 VSSQ C14
VSSQ E14 VSSQ E14
VSSQ N14 VSSQ N14
VSSQ R14 VSSQ R14
VSSQ U14 VSSQ U14
VSSQ VSSQ
H5GC4H24AJR-R0C_BGA170 H5GC4H24AJR-R0C_BGA170
Decoupling Caps for single-sided Decoupling Caps for Clamshell

8x 0.1uF /per DRAM
+1.5VSDGPU +1.5VSDGPU For Layout Antenna Effect +1.5VSDGPU For Layout Antenna Effect
CV2727
CV2729
CV2726
CV440
CV441
CV442
CV446
CV447
CV448
CV435
CV436
CV437
CV438
CV439
CV422
CV424
CV425
CV427
CV428
CV430
CV482
CV480
CV485
CV477
CV483
CV484
CV469
CV470
CV472
CV473
CV474
CV475
CV432
CV433
CV434
CV423
CV429
CV431
CV479
CV478
CV471
CV481
CV443
CV444
CV426
CV476
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
10U_0402_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
A
10U_0402_6.3V6M
10U_0402_6.3V6M
A
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
RX560@
DIS@
DIS@
R18M-G1-90_(9/9)_CH B
Custom 1A
5 4 3 2 1
5 4 3 2 1
RV406
0_0402_5%
2 @ 1
+3VALW
UV5 SA00000OH00
5
DIS@
RV807 1
P
0_0402_5% IN1 4 VGA_ON
D VGA_ON 96 D
1 RS@ 2 PE_GPIO1_R 2 O
10 PE_GPIO1 IN2 1
G
DIS@
2
1 CV2698
3
@ @ 0.1U_0201_10V6K
RV913 CV626 2
100K_0402_5% 0.22U_0402_16V7K
2
1
+3VALW
UV6 SA00000OH00
5
DIS@
RV833 VGA_ON 1
P
33K_0402_5% IN1 4 VGA_ON_B
O VGA_ON_B 92
+3VSDGPU 1 DIS@ 2 2
IN2
G
1 2
@
3
DIS@ CV2701 CV2722
0.22U_0402_16V7K Vih 2.1V 1U_0201_6.3V6M
2 1
Delay 7ms
C C
+3VALW TO +3VSDGPU
IMAX(per channel)=6A,Rds=18mohm
+1.8VS
UV8
1 14 +1.8VS_LS J9 JP@
+1.8VALW VIN1 VOUT1
C2751 @ 2 1 C24 1 2 2 13 1
0.1U_0201_10V6K 1U_0201_6.3V6M VIN1 VOUT1 JUMP_43X79
1 RS@ 2 1.8VS_ON 3 12 1 2 C26
58,78,84,86 SUSP# ON1 CT1
R1669 0_0402_5% C21 4700P_0402_50V7K 0.1U_0201_10V6K
4 11 2
+5VALW VBIAS GND
VGA_ON RV1648 1 RS@ 2 0_0402_5% VGA_ON_R 5 10 1 2 DIS@ +3VSDGPU
B ON2 CT2 CV621 1000P_0402_50V7K J2504 JP@ B
CV2724 2 1 6 9 +3VSDGPU_LS 1 2
+3VALW VIN2 VOUT2 1 2
@ CV260 1 2 7 8 2
0.22U_0402_16V7K 1U_0201_6.3V6M VIN2 VOUT2 JUMP_43X39
15 CV2725 DIS@
GPAD
20mil(10mA) 1
0.1U_0201_10V6K
EM5209VF_DFN14_3X2
DIS@
SA00007PM00
A A

R18M-G1-90_DC/DC Interface
5 4 3 2 1
5 4 3 2 1
LCD POWER CIRCUIT W=60mils +INVPW R_B+

+3VS +LCDVDD Place closed to JEDP1 LX1 LED PANEL Conn.
UX1 W=60mils HCB2012KF-221T30_0805 W=60mils
1U_0201_6.3V6M +LCDVDD
CX22
5 1 +19VB_CPU 1 2 W=60mils JEDP1
IN OUT 1
1 +INVPW R_B+ 1
2 1 1 SM01000EJ00 3000ma 2
GND 3 2
220ohm@100mhz 3
10U_0402_6.3V6M
4 3 CX21 1 1 4
2 EN OC 0.1U_0201_10V6K
DCR 0.04 5 4
1 1 5
CX23 2 2@
CX1
68P_0402_50V8J
CX24 @EMC@
1000P_0402_50V7K
CX25 @EMC@
SY6288C20AAC_SOT23-5 CX26 INVTPW M 6
8 INVTPW M 6
SA000079400 4.7U_0402_6.3V6M 0.1U_0201_10V6K BKOFF# 7
2 2@ 58 BKOFF# EDP_HPD 7
D 8 D
8 ENVDD Vih=1.5 2 2 8 EDP_HPD 8
+LCDVDD 9
10 9
11 10
PANEL_OD#_R 12 11
13 12
EDP_AUXN_C 14 13
EDP_AUXP_C 15 14
16 15
EDP_TXP0_C 17 16
EDP_TXN0_C 18 17
19 18
EDP_TXP1_C 20 19
RX11 10K_0402_5% EDP_TXN1_C 21 20
2 @ 1 22 21
+LCDVDD 22
EDP_TXP2_C 23
EDP_HPD RX13 1 2 100K_0402_5% RX12 10K_0402_5% EDP_TXN2_C 24 23
1 @ 2 25 24
INVTPW M RX14 1 @ 2 100K_0402_5% EDP_TXP3_C 26 25
EDP_TXN3_C 27 26
@EMC@ 28 27
CX27 1 2 220P_0402_50V7K RX21 1 RS@ 2 0_0402_5% PANEL_OD#_R 29 28
9 PANEL_OD# 29
@EMC@ 30
BKOFF# CX28 1 2 220P_0402_50V7K DX2 1 2 31 30
@ 32 31
+TS_PW R 32
RX15 1 @ 2 10K_0402_5% RB751V-40_SOD323-2 33
TS_EN 34 33
58 TS_EN 34
+3VS_CAM 35 41
USB20_N0_L 36 35 GND 42
C USB20_P0_L 37 36 GND 43 C
38 37 GND 44
For Camera 38 GND
DMIC_CLK_R 39 45
56 DMIC_CLK_R DMIC_DATA_R 39 GND
40 46
Touch Screen 56 DMIC_DATA_R 40 GND
ACES_50203-04001-002
+5VS +3VS +TS_PW R CONN@
CX11 1 2 0.1U_0201_10V6K EDP_TXP0_C RX16 1 @ 2 0_0603_5% SP010014B10

8 EDP_TXP0 EDP_TXN0_C
CX12 1 2 0.1U_0201_10V6K RX17 1 RS@ 2 0_0603_5%
8 EDP_TXN0 EDP_TXP1_C
CX13 1 2 0.1U_0201_10V6K
8 EDP_TXP1
3
CX14 1 2 0.1U_0201_10V6K EDP_TXN1_C
CX15 1 2 0.1U_0201_10V6K
8 EDP_TXP2 EDP_TXN2_C
CX16 1 2 0.1U_0201_10V6K
CX17 1 2 0.1U_0201_10V6K
8 EDP_TXP3 EDP_TXN3_C +3VS +3VS_CAM
CX18 1 2 0.1U_0201_10V6K DX1
8 EDP_TXN3
@EMC@
YSLC05CH_SOT23-3
RX18 1 RS@ 2 0_0603_5%
SCA00000U10
1
W=20mils
0.1U_0201_10V6K
CX30
1U_0201_6.3V6M
CX31
1 1
8 EDP_AUXP CX19 1 2 0.1U_0201_10V6K EDP_AUXP_C @

8 EDP_AUXN CX20 1 2 0.1U_0201_10V6K EDP_AUXN_C
2 2
B B
Place closed to JEDP1
RX19 1 2 15_0402_1%
LX2
CX32 1 2 470P_0402_50V8J USB20_P0_RC 4 3 USB20_P0_L
10 USB20_P0
CX33 1 2 470P_0402_50V8J USB20_N0_RC 1 2 USB20_N0_L

10 USB20_N0
RX20 1 2 15_0402_1%
DLM0NSN900HY2D_4P
EMC@
SM070005U00
A A

EDP/CAMERA/DMIC
Custom 1A
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
C2736 +3VS +1.2V_HDMI

10U_0402_6.3V6M +5VS_DISP
2 1 8 1 U74 W=40mils ZZZ
VIN VOUT
1
C2737 +5VALW 7 2 +5VS 3
1U_0201_6.3V6M NC ADJ R4012 OUT
10U_0402_6.3V6M
10U_0402_6.3V6M
2 1 6 3 4.99K_0402_1% 1 1
VDD PGOOD IN
5 4 1 1 2 C543 HDMI_ROYALTY
+3VS
2
EN GND 9 GND 0.1U_0201_10V6K ROYALTY HDMI W/LOGO+HDCP
C2738
C2752
PGND 2
RO0000003HM
1
U1302 AP2330W-7_SC59-3 45@
RT9041E-15GQW_WDFN8_2X2 R4013 2 2
SA00004ZA00
SA00006K300 10K_0402_1%
D D
2
+3VS
HDMI_RT_CLKN R756 1 RS@ 2 0_0402_5% HDMI_L_CLKN For HDMI DDC Capacitance Leakage issue
Improve Intra-pair Skew on CLK+/-
+1.2V_HDMI
0.1U_0201_10V6K
0.01U_0402_16V7K
0.01U_0402_16V7K
L2512
1 1 1 @ SM070003V00
2 1 2
D2016 @EMC@
C2746
C2749 HDMI_RT_HPD 6 3 HDMI_CTRL_CLK
C2745
C2744
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.01U_0402_16V7K
0.01U_0402_16V7K
1 1 1 1 1 0.01U_0402_16V7K 1
2 2 2 3 4 @ 3.3P_0402_50V8
I/O4 I/O2
1
U2615
C2740
C2748
C2739
6 1 HCM1012GH900BP_4P 5 2
C2742
C2741
C2743
2 2 2 2 2 2 30 VDD12 VDD33 24 HDMI_RT_CLKP R765 1 RS@ 2 0_0402_5% HDMI_L_CLKP VDD GND

11 VDD12 VDD33
43 VDDA12
46 VDDRX12 23 HDMI_RT_TX_P2 4 1 HDMI_CTRL_DAT
VDDRX12 OUT_D2p HDMI_RT_TX_N2 HDMI_RT_TX_N0 HDMI_L_TX_N0 +5VS_DISP I/O3 I/O1
15 22 R769 1 RS@ 2 0_0402_5%
18 VDDTX12 OUT_D2n AZC099-04S.R7G_SOT23-6
37 VDDTX12 20 HDMI_RT_TX_P1
POWERSWITCH OUT_D1p L2513 SC300001G00
19 HDMI_RT_TX_N1 @ SM070003V00
C505 1 2 .1U_0402_16V7K HDMI_TX_P2 38 OUT_D1n 2 1
8 APU_DP0_P0 HDMI_TX_N2 IN_D2p HDMI_RT_TX_P0
C506 1 2 .1U_0402_16V7K 39 17
8 APU_DP0_N0 IN_D2n OUT_D0p HDMI_RT_TX_N0
16
C507 1 2 .1U_0402_16V7K HDMI_TX_P1 41 OUT_D0n 3 4
8 APU_DP0_P1 HDMI_TX_N1 IN_D1p HDMI_RT_CLKP D2017
C508 1 2 .1U_0402_16V7K 42 14 @EMC@
8 APU_DP0_N1 IN_D1n OUT_CLKp HDMI_RT_CLKN HDMI_L_CLKN HDMI_L_CLKN
13 1 1 10 9
C509 1 2 .1U_0402_16V7K HDMI_TX_P0 44 OUT_CLKn HCM1012GH900BP_4P
8 APU_DP0_P2 HDMI_TX_N0 IN_D0p APU_DP0_CTRL_DATA HDMI_RT_TX_P0 HDMI_L_TX_P0 HDMI_L_CLKP HDMI_L_CLKP
C510 1 2 .1U_0402_16V7K 45 33 R779 1 RS@ 2 0_0402_5% 2 2 9 8
8 APU_DP0_N2 IN_D0n SDA_SRC/AUXN APU_DP0_CTRL_CLK APU_DP0_CTRL_DATA 8
34
HDMI_CLKP SCL_SRC/AUXP HDMI_CTRL_DAT APU_DP0_CTRL_CLK 8 HDMI_L_TX_N0 HDMI_L_TX_N0
C511 1 2 .1U_0402_16V7K 47 8 4 4 7 7
8 APU_DP0_P3 HDMI_CLKN IN_CLKp SDA_SNK HDMI_CTRL_CLK
C512 1 2 .1U_0402_16V7K 48 7
8 APU_DP0_N3 IN_CLKn SCL_SNK HDMI_L_TX_P0 HDMI_L_TX_P0
5 5 6 6
R4018 0_0402_5% HDMI_RT_TX_N1 R781 1 RS@ 2 0_0402_5% HDMI_L_TX_N1
C HDMI_DCIN_EN 3 40 HDMI_HPD 2 RS@ 1 3 3 C
HDMI_EQ DCIN_ENB HPD_SRC HDMI_RT_HPD
APU_DP0_HPD 8
5 21
HDMI_I2C_ADDR EQ HPD_SNK L2514
31 @ SM070003V00 8
+3VS I2C_ADDR HPD_SNK internal PD 150K ohm 2 1
10 L05ESDL5V0NA-4 SLP2510P8
25 RSV1 32 HDMI_ID
NC HDMI_ID SC300003Z00
2
26 9 3 4
R4004 RSV2 HDMI_CEC 12
R4006 should be placed close to REXT pin. CEC_EN D2018 @EMC@
10K_0402_5% HCM1012GH900BP_4P
R4006 1 2 4.99K_0402_1% 36 29 T4958 HDMI_L_TX_N1 1 1 10 9 HDMI_L_TX_N1
4 REXT CSCL 28 T4959 HDMI_RT_TX_P1 R782 1 RS@ 2 0_0402_5% HDMI_L_TX_P1
1
35 PDB CSDA HDMI_L_TX_P1 2 2 HDMI_L_TX_P1

RESET# RESET#
RESETB 9 8
Enhance Vswing HDMI_PRE 27
2 PRE 49 HDMI_L_TX_N2 4 4 HDMI_L_TX_N2
1 TESTMODEB EPAD 7 7
C2747
1U_0201_6.3V6M HDMI_RT_TX_N2 R783 1 RS@ 2 0_0402_5% HDMI_L_TX_N2 HDMI_L_TX_P2 5 5 6 6 HDMI_L_TX_P2
2 PS8409AQFN48GTR2-A0_QFN48_6X6 3 3
SA0000AC320 L2515
@ SM070003V00
S IC PS8409AQFN48GTR2-A2 QFN48P REPEATER 2 1 8
L05ESDL5V0NA-4 SLP2510P8
3 4
SC300003Z00
HDMI_DCIN_EN HDMI_PRE
HCM1012GH900BP_4P
DC coupling enable; Internal pull up, 3.3V I/O. Output pre-emphasis setting;Internal pull-up 3.3V I/O
1
HDMI_RT_TX_P2 R794 1 RS@ 2 0_0402_5% HDMI_L_TX_P2

@ L: DC coupling input L: Pre-emphasis =2.5dB
R4005 H: Default,AC coupling input @ R4007 H: Default, No Pre-emphasis
4.7K_0402_5% 4.7K_0402_5% HDMI connector
2
JHDMI1
HDMI_RT_HPD 19
+5VS_DISP +3VS 18 HP_DET
+5VS_DISP +5V
17
B HDMI_CTRL_DAT 16 DDC/CEC_GND B
HDMI_CTRL_CLK 15 SDA
+3VS 14 SCL
13 Reserved
HDMI_L_CLKN 12 CEC 20
CK- GND
1
+3VS 11 21
CK_shield GND
1
1
1
@ HDMI_L_CLKP 10 22
R4009 R4014 R4015 R4016 R4017 HDMI_L_TX_N0 9 CK+ GND 23
D0- GND
1
4.7K_0402_5% Receiver equalization setting(Internal 150K PD) 2K_0402_5% 2K_0402_5% 47K_0402_5% @ 47K_0402_5% @ 8
@
HDMI_ID enable ; Internal pull down;3.3V I/O HDMI_L_TX_P0 7 D0_shield
(*) L: programmable EQ for channel loss up to 5.3dB L: Default, HDMI ID enable
2
HDMI_EQ R4008 HDMI_L_TX_N1 6 D0+
2
2
2
( ) H: programmable EQ for channel loss up to 10dB 4.7K_0402_5% H: HDMI ID disable 5 D1-
D1_shield
1
HDMI_CTRL_DAT APU_DP0_CTRL_DATA HDMI_L_TX_P1 4

( ) M: programmable EQ for channel loss up to 14dB
2
@ HDMI_ID HDMI_L_TX_N2 3 D1+

R4010 2 D2-
4.7K_0402_5% HDMI_CTRL_CLK APU_DP0_CTRL_CLK HDMI_L_TX_P2 1 D2_shield
D2+
2
ACON_HMR2E-AK120D
CONN@
DC232000Y00
+3VS
1
@
I2C Slave Address selection; Internal pull down;3.3V I/O
R4011 L: Default, Slave address 0x10-0x2F.
4.7K_0402_5% H: Alternative salve address 0x90-0x9F, 0xD0-0xDF.
2
HDMI_I2C_ADDR
A A

HDMI REDRIVER (PS8409)
Custom 1A
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
+5VALW +5VALW _MUX
US14
5 1
IN OUT
10U_0402_6.3V6M
0.1U_0201_10V6K
2 1 1
GND
D D
CS116
CS15
4 3
58,72,73 USB_EN EN OC
SY6288C20AAC_SOT23-5 2 2
Close to Pin19
+5VALW _MUX +USB3_VCCC
CC1_VCONN CS130 1 2 220P_0402_50V8J

CC2_VCONN CS129 1 2 220P_0402_50V8J
1
RS134
RS20 200K_0402_1%
4.7K_0402_5%
US3
2
OCP_DET# VMON
1
VMON 17 12 CC1_VCONN
VMON CC1 CC1_VCONN 43
RS128 RS135 14 CC2_VCONN
CC2 CC2_VCONN 43
10K_0402_1% 10K_0402_1% OCP_DET# 16
43 OCP_DET# OCP_DET
USBC_EN 15
2
43 USBC_EN VBUS_EN Type-C Port Side

C 11 USB3_CC_TX_P2 CS112 1 2 .1U_0402_16V7K USB3_CC_TX_P2_C C
USB3.0 (Port 3) System side C_TX2_1P/2N 10 USB3_CC_TX_N2 CS113 1 2 .1U_0402_16V7K USB3_CC_TX_N2_C USB3_CC_TX_P2_C 43
C_TX2_1N/2P USB3_CC_TX_N2_C 43
CS125 1 2 0.22U_0201_6.3V6K USB3_ARX_C_DTX_P3 4
10 USB3_ARX_DTX_P3 USB3_ARX_C_DTX_N3 SSRX_1P/2N USB3_CC_RX_P2
CS126 1 2 0.22U_0201_6.3V6K 5 24 CS121 1 2 0.33U_0201_6.3V6M USB3_CC_RX_P2_C USB3_CC_RX_P2_C 43
10 USB3_ARX_DTX_N3 SSRX_1N/2P C_RX2_1P/2N USB3_CC_RX_N2
1 CS122 1 2 0.33U_0201_6.3V6M USB3_CC_RX_N2_C USB3_CC_RX_N2_C 43
C_RX2_1N/2P
CS127 1 2 0.22U_0201_6.3V6K USB3_ATX_C_DRX_P3 6 10 Gbps 2:1 MUX 8 USB3_CC_TX_P1 CS114 1 2 .1U_0402_16V7K USB3_CC_TX_P1_C
10 USB3_ATX_DRX_P3 SSTX_1P/2N C_TX1_1P/2N USB3_CC_TX_P1_C 43
CS128 1 2 0.22U_0201_6.3V6K USB3_ATX_C_DRX_N3 7 9 USB3_CC_TX_N1 CS115 1 2 .1U_0402_16V7K USB3_CC_TX_N1_C
10 USB3_ATX_DRX_N3 SSTX_1N/2P C_TX1_1N/2P USB3_CC_TX_N1_C 43
2 USB3_CC_RX_P1 CS123 1 2 0.33U_0201_6.3V6M USB3_CC_RX_P1_C

C_RX1_1P/2N USB3_CC_RX_P1_C 43
3 USB3_CC_RX_N1 CS124 1 2 0.33U_0201_6.3V6M USB3_CC_RX_N1_C
C_RX1_1N/2P USB3_CC_RX_N1_C 43
PLUG_ORI 23
M1 21 GPIO
M0 22 CURRENT_M1
CURRENT_M0
USB3_CC_RX_P2_C
USB3_CC_RX_N2_C
VCON_IN
LDO_3V3
18
REXT
2
5V_IN
1
RS129 25 RS130 RS131

6.2K_0402_1% E-PAD 220K_0201_1% 220K_0201_1%
RTS5441E-GRT_QFN24_4X4
20
19
13
+3VO_MUX +3VO_MUX
1
2
+3VO_MUX +5VALW _MUX

B B
1
1
1 1
1
CS14 CS117 USB3_CC_RX_P1_C

RS1 RS3 4.7U_0402_6.3V6M 0.1U_0201_10V6K USB3_CC_RX_N1_C
RS114 @ 10K_0402_5% 10K_0402_5%
10K_0402_5% 2 2
Close to Pin13
2
2
2
2
2
PLUG_ORI M1 M0 1 2 RS132 RS133

TYPEC_1P5A 43,58
RS137 0_0402_5% 220K_0201_1% 220K_0201_1%
1
1
1
RS115 RS2 @ RS4 @
10K_0402_5% 10K_0402_5% 10K_0402_5%
2
5441E Current Limit RTS5441 M0 truth table by 2018 BIOS spec

M1 M0 MODE TYPEC_1P5A_EC MODE limit point Condition
L H 0.9A H 3A 3.5A AC mode or Battery >30%
H L 1.5A L 1.5A 1.92A Battery <30% when DC mode
A H H 3A A
confirm realtek hand-shake

CC+ USB MUX
Custom 1A
5 4 3 2 1
5 4 3 2 1
+5VALW +USB3_VCCC
RSET
SGA00003700
150U_D2_6.3VY_R15M
CS95
1
1
0.1U_0201_10V6K
0.1U_0402_25V6
22U_0805_25V6M
22U_0805_25V6M
1 1 1 1
CS96
CS97 @
CS98 @
CS99 @
+ RS113 RS109 RS110
6.2K_0402_5% 4.3K_0402_5% 8.2K_0402_5%
2 2 2 2 2
3 2
US11
D
D 6 1 5 TYPEC_3A 58 D
IN OUT G
RSET 5 2 S QS2B
4
SET GND 1 @ 2 2N7002KDW _SOT363-6
OCP_DET# 42
6
RS136 0_0402_5% D
4 3 2 TYPEC_1P5A 42,58
42 USBC_EN EN FLAG G
1
SY6861B1ABC_TSOT23-6 1
RB77 S QS2A
1
47K_0402_5% footprint : G518 CS100 2N7002KDW _SOT363-6
0.1U_0201_10V6K
PN : SA0000BDN00(SILERGY SY6861B1) 2 @
2
SILERGY SY6861B1 MOS Current Limit
For ESD request
TYPEC_1P5A TYPEC_3A RSET(kΩ) MODE limit point
DS3 EMC@
1 9 USB3_CC_TX_P1_C
42 USB3_CC_TX_P1_C L L 6.2 0.9A 1.09A
2 8 USB3_CC_TX_N1_C
42 USB3_CC_TX_N1_C L H 3.53 1.5A 1.92A
CC1_VCONN 4 7 CC1_VCONN
H L 2.54 2A 2.67A
TBTA_SBU1 5 6 TBTA_SBU1
*H H 1.94 3A 3.5A
C C
3
TVW DF1004AD0_DFN9
SC300003Z00
DS4 EMC@
1 9
2 8
4 7 USB3_CC_TX_N2_C
42 USB3_CC_TX_N2_C
5 6 USB3_CC_TX_P2_C +USB3_VCCC +USB3_VCCC
42 USB3_CC_TX_P2_C
3
JTYPEC1
TVW DF1004AD0_DFN9 A1 B12
GND GND
SC300003Z00 USB3_CC_TX_P1_C A2 B11 USB3_CC_RX_P1_C
USB3_CC_TX_N1_C A3 SSTXP1 SSRXP1 B10 USB3_CC_RX_N1_C
0.1U_0402_25V6 2 1 CS84 SSTXN1 SSRXN1
DS6 EMC@ A4 B9 CS87 1 2 0.1U_0402_25V6
USB20_P3_L 1 9 USB20_P3_L VBUS VBUS
1
CS13 A5 B8 TBTA_SBU2
42 CC1_VCONN CC1 SBU2
USB20_N3_L 2 8 USB20_N3_L 10U_0603_25V6M
B USB20_P3_L A6 B7 USB20_N3_L B
4 7 USB3_CC_RX_N2_C 2 USB20_N3_L A7 DP1 DN2 B6 USB20_P3_L
42 USB3_CC_RX_N2_C DN1 DP2
3
5 6 USB3_CC_RX_P2_C 2 TBTA_SBU1 A8 B5 CC2_VCONN 42

42 USB3_CC_RX_P2_C SBU1 CC2
0.1U_0402_25V6
2 1 CS86 A9 B4 CS85 1 2 0.1U_0402_25V6
DS19 EMC@ VBUS VBUS
3 PESD24VS2UT_SOT23-3 USB3_CC_RX_N2_C A10 B3 USB3_CC_TX_N2_C
SCA00004500 USB3_CC_RX_P2_C A11 SSRXN2 SSTXN2 B2 USB3_CC_TX_P2_C
1
TVW DF1004AD0_DFN9 SSRXP2 SSTXP2
SC300003Z00 A12 B1
GND GND
DS5 EMC@ 1 5
CC2_VCONN 1 9 CC2_VCONN 2 GND GND 6
3 GND GND 7
TBTA_SBU2 2 8 TBTA_SBU2 4 GND GND 8
GND GND
4 7 USB3_CC_RX_N1_C DEREN_40-42407-0246300RHF
42 USB3_CC_RX_N1_C
CONN@
5 6 USB3_CC_RX_P1_C
42 USB3_CC_RX_P1_C DC23300RC00
3
CC1_VCONN & CC2_VCONN need 20miil trace width.
TVW DF1004AD0_DFN9
SC300003Z00
A A
RS144 1 2 15_0402_1%
LS10 EMC@
CS141 1 2 470P_0402_50V8J USB20_P3_RC 2 1 USB20_P3_L
10 USB20_P3 2 1
CS142 1 2 470P_0402_50V8J USB20_N3_RC 3 4 USB20_N3_L 2018/ 12/18 2019/12/18 Title
10 USB20_N3 3 4 Issued Date Deciphered Date
RS145 1 2 15_0402_1% DLM0NSN900HY2D_4P
USB TYPE C
SM070005U00 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1A
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
A B C D E
+3V_LAN Rising time (10%~90%) must >0.5mS and <100mS

RTL8111H LDO mode
+3VALW +3V_LAN
RTL8118ASA SWR mode
RL2 @
0_0805_5% LDO@
1 2 W=60mil RL1 1 2 0_0603_5% W=60mil Place near Pin 11,32
+LAN_VDD +3V_LAN
60mil 60mil 300mA 300mA W=60mil
UL1 SWR@
5 1 +REGOUT LL1 1 2
1 IN OUT 1
2 2.2UH_HPC252012NF-2R2M_20%
GND
1 IDC=1200mA 1 1 1 1 1 1 1 1 1 1 1 1 1 1
0.1U_0201_10V6K
CL1
4.7U_0402_6.3V6M
CL2
0.1U_0201_10V6K
CL3
0.1U_0201_10V6K
CL4
0.1U_0201_10V6K
CL5
0.1U_0201_10V6K
CL6
0.1U_0201_10V6K
CL7
0.1U_0201_10V6K
CL8
1U_0201_6.3V6M
CL9
0.1U_0201_10V6K
CL10
0.1U_0201_10V6K
CL11
4.7U_0402_6.3V6M
CL12 SWR@
0.1U_0201_10V6K
CL13 SWR@
4.7U_0402_6.3V6M
CL14 @
4.7U_0402_6.3V6M
CL15 @
4 3
EN OC
2
SY6288C20AAC_SOT23-5 Using for Switch mode
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
SWR@
SWR@
LDO@
CL16
1U_0201_6.3V6M The trace length from
1 LAN_PWR_EN Lx to PIN48 (REGOUT)
LAN_PWR_EN 58
and from C to Lx must
< 200mils.
Place near Pin 3,8,22,30 Place near Pin 22
11/27: P/N change to SH00000RT00 Place near Pin 11,32
From EC
( S COIL 2.2UH +-20%
High active. HPC252012NF-2R2M 1.3A) Using for Switch mode
Reserve for surge improvement
EN threshold voltage min:1.2V The trace length
typ:1.6V max:2.0V from C to Place near Pin 11,32
Current limit threshold 1.5~2.8A
PIN46,47(VDDREG)
+3V_LAN Rising time must >0.5ms and <100ms must < 200mils.
+3VS UL2
1
RL3
2 1K_0402_5% 2
+3V_LAN +LAN_VDD LAN_MIDI0+ 1 17 PCIE_ARX_C_DTX_P4 .1U_0402_16V7K 2 1 CL17

2
LAN_MIDI0- 2 MDIP0 HSOP 18 PCIE_ARX_C_DTX_N4 PCIE_ARX_DTX_P4 6

ISOLATEB .1U_0402_16V7K 2 1 CL18
3 MDIN0 HSON 19 PCIE_ARX_DTX_N4 6
AVDD10 PERSTB APU_PCIE_RST# 9,27,52,68
2
LAN_MIDI1+ 4 20 ISOLATEB
RL5 LAN_MIDI1- 5 MDIP1 ISOLATEB 21 LAN_PME# 0_0402_5% 1 RS@ 2 RL4
LAN_MIDI2+ MDIN1 LANWAKEB LAN_WAKE# 58
15K_0402_5% 6 22 10K_0402_5% 2 1 RL6
LAN_MIDI2- MDIP2 DVDD10 +LAN_VDD +3V_LAN
7 23
MDIN2 VDDREG +3V_LAN
8 24 +REGOUT reserve EC_PME# pull high 47K to +3VLP_EC
1
LAN_MIDI3+ 9 AVDD10 REGOUT 25 LAN_LED2 T4963 @

LAN_MIDI3- 10 MDIP3 LED2 26 LAN_LED1_GPO 2 @ 1
LAN_CLKREQ# pull up at PCH side 11 MDIN3 LED1/GPIO 27 LAN_LED0 T4964 @ 0_0402_5% RL7
LAN_GPO 58
12 AVDD33 LED0 28 XTLI for disable PHY
10 CLKREQ_PCIE#3 13 CLKREQB CKXTAL1 29 XTLO reserve 0 ohm
6 PCIE_ATX_C_DRX_P4 HSIP CKXTAL2
14 30
6 PCIE_ATX_C_DRX_N4 HSIN AVDD10 LAN_RST
YL1 15 31 1 2
10 CLK_PCIE_P3 16 REFCLK_P RSET 32
25MHZ_20PF_XRCGB25M000F2P34R0 RL8
10 CLK_PCIE_N3 REFCLK_N AVDD33 33 2.49K_0402_1%
XTLI 3 1 XTLO_R RL14 1 2 XTLO GND
3 1 680_0402_5%
NC NC
1 1
CL21 4 2 CL22 +3V_LAN
18P_0402_50V8J 18P_0402_50V8J
2 2 RTL8118ASA-CG_QFN32_4X4 LAN_LED1_GPO 10K_0402_5% 2 @ 1 RL9
SA0000B9F20
P/N: SJ10000UP00 (S CRYSTAL 25MHZ 10PF XRCGB25M000F2P34R0) SA0000B9F20, S IC RTL8118ASA-CG QFN 32P E-LAN CTRL
3 3
LAN Connector
JRJ45
TL1
LAN_TERMAL 1 24 RJ45_MIDI3- 8
LAN_MIDI3- 2 TCT1 MCT1 23 RJ45_MIDI3- PR4-
LAN_MIDI3+ 3 TD1+ MX1+ 22 RJ45_MIDI3+ RJ45_MIDI3+ 7
TD1- MX1- PR4+
4 21 RJ45_MIDI1- 6
LAN_MIDI2+ 6 TD2+ MX2+ 19 RJ45_MIDI2+ RJ45_MIDI2- 5
TD2- MX2- PR3-
7 18 RJ45_MIDI2+ 4
LAN_MIDI1- 8 TCT3 MCT3 17 RJ45_MIDI1- PR3+
LAN_MIDI1+ 9 TD3+ MX3+ 16 RJ45_MIDI1+ RJ45_MIDI1+ 3
TD3- MX3- PR2+
10 15 RJ45_MIDI0- 2
LAN_MIDI0+ 12 TD4+ MX4+ 13 RJ45_MIDI0+ RJ45_MIDI0+ 1 CL23
TD4- MX4- PR1+ 12
40mil 40mil
10P_0402_50V8J
GND 11 LANGND 2 1 RJ45_GND
GND 10
GST5009-E GND 9
GND
2
75_0402_1%
75_0402_1%
75_0402_1%
75_0402_1%
SP050006B10
1
1
1
AZ5125-02S_SOT23-3
1 SANTA_130460-5 JP@
CONN@ DL1
RL10
RL13
RL11
RL12
EMC@ JPL1
CL24 DC234007W00 JUMP_43X118
0.1U_0201_10V6K 2
2
2
2
4 4
LANGND
1
RJ45_GND

LAN RTL8118ASA
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1A
A B C D E
A B C D E
Wireless LAN
RS146 1 2 15_0402_1%
CS143 1 2 470P_0402_50V8J USB20_P5_RC

+3VS 60mil +3VS_W LAN 10 USB20_P5
1 @ 2 CS144 1 2 470P_0402_50V8J USB20_N5_RC

10 USB20_N5
1 RM101 1 1 1 1
0_0805_5% CM68 @ RS147 1 2 15_0402_1%
CM69 CM70
4.7U_0402_6.3V6M 0.1U_0201_10V6K 0.1U_0201_10V6K
2 2 2
+1.8VS
KEY E +3VS_W LAN

CM79 @
UART_0_ATXD_R_DRXD RM1121
UART_0_ARXD_R_DTXD RM1131
@
@
2 1K_0402_5%
2 1K_0402_5%
+3VS_W LAN JNGFF1 10U_0603_6.3V6M
+3VALW 1 2 1 2
UM3 USB20_P5_RC 3 GND_1 3.3VAUX_2 4
W=60mils USB_D+ 3.3VAUX_4
1U_0201_6.3V6M
CM71
5 1 USB20_N5_RC 5 6
IN OUT 7 USB_D- LED1# 8
1 GND_7 PCM_CLK
2 9 10
GND 11 SDIO_CLK PCM_SYNC 12
4 3 13 SDIO_CMD PCM_OUT 14
2 EN OC 15 SDIO_DAT0 PCM_IN 16
SY6288C20AAC_SOT23-5 17 SDIO_DAT1 LED2# 18
19 SDIO_DAT2 GND_18 20
SA000079400 SDIO_DAT3 UART_WAKE
21 22 UART_0_ARXD_R_DTXD RM1141 @ 2 0_0402_5%
Vih=1.5 SDIO_WAKE UART_TX UART_0_ARXD_DTXD 10
23
58 W LAN_ON SDIO_RST
24 UART_0_ATXD_R_DRXD RM1151 @ 2 0_0402_5%
UART_RX UART_0_ATXD_DRXD 10
25 26
27 GND_33 UART_RTS 28
6 PCIE_ATX_C_DRX_P5 PET_RX_P0 UART_CTS E51TXD_P80DATA_R
29 30 RM106 2 RS@ 1 0_0402_5%
2 NGFF WL+BT (KEY E) 6 PCIE_ATX_C_DRX_N5
31
33
PET_RX_N0
GND_39
CLink_RST
CLink_DATA
32
34
E51RXD_P80CLK_R RM107 2 RS@ 1 0_0402_5%
EC_TX 58
EC_RX 58
2
6 PCIE_ARX_DTX_P5 PER_TX_P0 CLink_CLK

35 36 2 1
6 PCIE_ARX_DTX_N5 PER_TX_N0 COEX3
37 38 RM108 100K_0402_5%
39 GND_45 COEX2 40
10 CLK_PCIE_P2 REFCLK_P0 COEX1
41 42 T4947 TP@
10 CLK_PCIE_N2 REFCLK_N0 SUSCLK(32KHz) W L_RST#_R
43 44 RM109 2 RS@ 1 0_0402_5%
GND_51 PERST0# BT_ON APU_PCIE_RST# 9,27,51,68
45 46
10 CLKREQ_PCIE#2 CLKREQ0# W_DISABLE2# W L_OFF# BT_ON 58
47 48
PEWAKE0# W_DISABLE1# W L_OFF# 58
49 50
51 GND_57 I2C_DAT 52
RM110 53 RSVD/PCIE_RX_P1 I2C_CLK 54
2 1 10K_0402_5% 55 RSVD/PCIE_RX_N1 I2C_IRQ 56
+3VS_W LAN GND_63 RSVD_64
57 58
59 RSVD/PCIE_TX_P1 RSVD_66 60 CM80 @
61 RSVD/PCIE_TX_N1 RSVD_68 62 10U_0603_6.3V6M
63 GND_69 RSVD_70 64 1 2
65 RSVD_71 3.3VAUX_72 66
67 RSVD_73 3.3VAUX_74
GND_75 68
69 GND1
GND2
BELLW _80152-3221
CONN@
SP070013E00
3 3
4 4

M.2 KEY-E (WLAN)
Custom 1A
A B C D E
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
A B C D E
HD Audio Codec 2000mA 600ohm@100MHz

DCR 0.1
+5VS LA1
40mil +5VS_PVDD
TAI-TECH HCB1608KF-601T20
1 2
SM01000UN00
+5VS
1 1 1 1
10U_0402_6.3V6M
CA1
0.1U_0201_10V6K
CA2
10U_0402_6.3V6M
CA29
0.1U_0201_10V6K
CA3
+5VS_AVDD
20mil
2 2 2 2 RA1 1 RS@ 2
0_0402_5%
1 1 1 1
0.1U_0201_10V6K
CA5
10U_0402_6.3V6M
CA6
2 2
near Pin41 near Pin46
near Pin9 GNDA
CA7 1 2 0.1U_0201_10V6K
near Pin26 +1.8VS
Pin9 need to matching with SOC HDA
interface. CA8 1 2 10U_0402_6.3V6M
+1.8VS_VDDA RA3 1 RS@ 2 0_0402_5%
RA2 1 RS@ 2 0_0402_5% +1.8VS_DVDDIO
+1.8VS 1 1
0.1U_0201_10V6K
CA11
10U_0402_6.3V6M
CA12
+3VS_DVDD
Int. Speaker Conn.
+3VS 2 2
RA4 1 RS@ 2 0_0402_5%
20mil
GNDA
1 1
10U_0402_6.3V6M
CA9
0.1U_0201_10V6K
CA10
40mil
JSPK2
2 2 HDA_BIT_CLK_R SPKL+ LA4 EMC@1 2 PBY160808T-121Y-N_2P SPK_L+ 1
SPKL- LA5 EMC@1 2 PBY160808T-121Y-N_2P SPK_L- 2 1
near Pin1 Place near Pin40 2
2
3
41
46
26
40
G1
9
10P_0402_50V8J 2 1 CA27 DMIC_CLK UA1 RA5 4
G2
0_0402_5%
DVDD
DVDD-IO
PVDD1
PVDD2
AVDD1
AVDD2
@EMC@ CVILU_CI4202M2HR0-NH
Reserved for RF CONN@
1
@EMC@
LINE1_L 22 43 SPKL- SP02001CK00
LINE1-L(PORT-C-L) SPK-OUT-L- 2
LINE1_R 21 42 SPKL+ GND
LINE1-R(PORT-C-R) SPK-OUT-L+ CA13
24 45 SPKR+ SPKR+ 73 22P_0402_50V8J
2 23 LINE2-L(PORT-E-L) SPK-OUT-R+ 44 SPKR- 1 2
+MICBIAS LINE2-R(PORT-E-R) SPK-OUT-R- SPKR- 73
@EMC@
31
30 LINE1-VREFO-L 32 HP_LEFT
LINE1-VREFO-R HPOUT-L(PORT-I-L) 33 HP_RIGHT
+3VS RING2 17 HPOUT-R(PORT-I-R)
2 1 SENSE_A SLEEVE 18 MIC2-L(PORT-F-L) /RING
RA13 100K_0402_1%
40mil MIC2-R(PORT-F-R) /SLEEVE 10 HDA_SYNC_R
DMIC_DATA 2 SYNC 6 HDA_BIT_CLK_R HDA_SYNC_R 9
DMIC_CLK 3 GPIO0/DMIC-DATA BCLK 5 HDA_SDOUT_R HDA_BIT_CLK_R 9
GPIO1/DMIC-CLK SDATA-OUT 8 HDA_SDIN0_AUDIO 1 2 HDA_SDOUT_R 9
58 EC_MUTE#
47
PDB
SDATA-IN RA10 33_0402_5%
HDA_SDIN0 9
Digital MIC
48
11 SPDIF-OUT/GPIO2
9 HDA_RST#_R RESETB 16 MIC BOM upload by Audio Team
MONO_IN 12 MONO-OUT
PCBEEP +MIC2_VREFO
Close codec
RA12 2 1 200K_0402_1% SENSE_A 13 29
73 HP_PLUG# HP/LINE1 JD(JD1) MIC2-VREFO
14
RA17 2 @ 1 20K_0402_5% 15 MIC2/LINE2 JD(JD2)
SPDIFO/FRONT JD(JD3)/GPIO3 7 CA14 1 2 10U_0402_6.3V6M
1 LDO3-CAP GND
37 39 CA16 1 2 10U_0402_6.3V6M TO eDP cable
CA15 35 CBP LDO2-CAP 27 CA17 1 2 10U_0402_6.3V6M DMIC_DATA 2 1 DMIC_DATA_R
GNDA CBN LDO1-CAP DMIC_DATA_R 38
2.2U_0402_6.3V6M 10mil RA14 1 2 100K_0402_5% RA7 0_0402_5%
2
CODEC_VREF
GNDA
+3VS_DVDD
36 28
CPVDD VREF
CA20 1 2 2.2U_0402_6.3V6M
20
+3VALW VD33 STB CA21 @1 2 0.1U_0201_10V6K
GNDA CA19 1 2 19 34 CPVEE
MIC CAP CPVEE
CA22
1U_0201_6.3V6M
DMIC_CLK 2 1 DMIC_CLK_R
1
10U_0402_6.3V6M LA6 EMC@ BLM15PX221SN1D_2P DMIC_CLK_R 38
GNDA
SM01000Q500
RA19 2 RS@ 1 0_0402_5% 4 25 change PN to SM01000Q500
3 49 DC DET AVSS1 38 2 3
Thermal PAD AVSS2
ALC255-CG_MQFN48_6X6
GND SA000082700
GNDA
Headphone Out
+MIC2_VREFO
TO IO/B
RA15 1 2 2.2K_0402_5% SLEEVE SLEEVE 73
RA18 1 2 2.2K_0402_5% RING2 RING2 73
HP_LEFT RA20 1 @ 2 0_0603_5% HPOUT_L_1 HPOUT_L_1 73

HP_RIGHT RA21 1 @ 2 0_0603_5% HPOUT_R_1
HPOUT_R_1 73
LINE1_L CA23 1 2 4.7U_0402_6.3V6M

RA22
22K_0402_5% CA25 LINE1_R CA24 1 2 4.7U_0402_6.3V6M
1U_0201_6.3V6M
2 1 BEEP#_R 1 2 MONO_IN RA25 1 RS@ 2 0_0402_5% RA26 1 RS@ 2 0_0402_5%
58 EC_BEEP#
+MICBIAS DA3
2
RA27 @EMC@ 1 RA29 1 RS@ 2 0_0402_5% RA30 1 RS@ 2 0_0402_5% 2 2 RA23 1

22K_0402_5% 4.7K_0402_5%
CA26
100P_0402_50V8J
4 2 1 RA24 1 4
9 APU_SPKR 4.7K_0402_5% RA31 1 RS@ 2 0_0402_5% RA32 1 RS@ 2 0_0402_5%
2 3 2 RA28 1
1
4.7K_0402_5%
RA33 1 RS@ 2 0_0402_5% RA34 1 RS@ 2 0_0402_5% BAT54A-7-F_SOT23-3
SCSBAT54100
GND
GND GNDA GND GNDA
HD Audio Codec ALC255
Custom 1A
A B C D E
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
+EC_VCC
1
Board ID / Rb R1562
+3VLP
JP2
+EC_VCC L44
FBM-11-160808-601-T_0603
+EC_VCCA
EVT 0
R1564 EVT@
0_0402_5%
Ra 100K_0402_5%
2
1 2 1 2 SD028000080
1 2 AD_BID
0.1U_0201_10V6K
C1255
0.1U_0201_10V6K
C1256
0.1U_0201_10V6K
C1257
0.1U_0201_10V6K
C1258
1000P_0402_50V7K
C1261
1000P_0402_50V7K
C1259
JUMP_43X39 2 R1564 PVT@
1
JP@ C1262 PVT 1 12K_0402_1%
2 2 2 2 1 1 2
0.1U_0201_10V6K SD034120280 R1564 C1269
D
@ @ 1 R1564 MP@
Rb @ 20K_0402_1% 0.1U_0201_10V6K
@
D
1 1 1 1 2 2 ECAGND 83 1
MP 2 15K_0402_1%
2
SD034150280
111
125
ECAGND
22
33
96
67
9
VCC_LPC
VCC
VCC
VCC
VCC
AVCC
VCC0
SPOK_5V 1 21 LAN_PWR_EN +RTC_APU_R
85 SPOK_5V GATEA20/GPIO00 EC_VCCST_PG/GPIO0F EC_BEEP# LAN_PWR_EN 51
KBRST# 2 23
10 KBRST# KBRST#/GPIO01 BEEP#/GPIO10 FAN_PWM1 EC_BEEP# 56
SERIRQ 3 26
10 SERIRQ LPC_FRAME# SERIRQ EC_FAN_PWM/GPIO12 FAN_PWM2 FAN_PWM1 77
4 PWM Output 27
10 LPC_FRAME# LPC_FRAME# AC_OFF/GPIO13 FAN_PWM2 77
1
LPC_AD3_R 5 D
10 LPC_AD3_R LPC_AD2_R LPC_AD3 EC_RTCRST
7 2 Q91
10 LPC_AD2_R LPC_AD1_R LPC_AD2 BATT_TEMP
8 63 G L2N7002WT1G_SC-70-3
10 LPC_AD1_R LPC_AD1 VCIN1_BATT_TEMP/AD0/GPIO38 BATT_TEMP 83,84
1
LPC_AD0_R 10 64 VCIN1_BATT_DROP
10 LPC_AD0_R LPC & MISC VCIN1_BATT_DROP 83 S SB00001GE00
3
LPC_AD0 VCIN1_BATT_DROP/AD1/GPIO39 65 ADP_I R1563
LPC_CLK0_EC ADP_I/AD2/GPIO3A AD_BID ADP_I 83,84
12 AD Input 66 10K_0402_5%
LPC_CLK0_EC 10 LPC_CLK0_EC LPC_RST# CLK_PCI_EC AD_BID/AD3/GPIO3B VRAM_TEMP
1 2 1 2 13 75
10 LPC_RST# EC_RST# PCIRST#/GPIO05 AD4/GPIO42 LAN_WAKE# VRAM_TEMP 83
C1263 @EMC@ R1560 @EMC@ 37 76
77 EC_RST# LAN_WAKE# 51
2
22P_0402_50V8J 10_0402_1% EC_SCI# 20 EC_RST# AD5/GPIO43
10 EC_SCI# WLAN_ON EC_SCI#/GPIO0E
38
52 WLAN_ON CLKRUN#/GPIO1D
C819 1 2 0.1U_0201_10V6K EC_RST# 68 TS_EN Reserve TS_EN
DA0/GPIO3C GPU_THERMAL# TS_EN 38 +3VS
DA Output EN_DFAN1/DA1/GPIO3D 70
63 KSI[0..7] TP_SENOFF# GPU_THERMAL# 28
EMC@ KSI0 55 71 New Add for GPU Thermal
56 KSI0/GPIO30 DA2/GPIO3E 72 SPOK_3V TP_SENOFF# 63 EC_MUTE#
KSI1
SPOK_3V 85 R1565 1 @ 2 10K_0402_5%
KSI2 57 KSI1/GPIO31 DA3/GPIO3F TP_I2C_INT# R116 1 @ 2 1K_0402_5%
1 @ 2 LPC_RST# KSI3 58 KSI2/GPIO32 83 TYPEC_1P5A
KSI3/GPIO33 EC_MUTE#/PSCLK1/GPIO4A TYPEC_3A TYPEC_1P5A 42,43
R207 100K_0402_5% KSI4 59 84 New Add for PW I Limit
KSI4/GPIO34 USB_EN#/PSDAT1/GPIO4B EC_SMB_CK3 TYPEC_3A 43
1 2 @EMC@ KSI5 60 85 +EC_VCC
KSI5/GPIO35 PSCLK2/GPIO4C EC_SMB_DA3 EC_SMB_CK3 63
C1279 100P_0402_50V8J KSI6 61 PS2 Interface 86
KSI6/GPIO36 PSDAT2/GPIO4D TP_CLK EC_SMB_DA3 63 EC_SMB_DA1
KSI7 62 87 R1577 1 2 2.2K_0402_5%
C 63 KSO[0..17] KSI7/GPIO37 TP_CLK/GPIO4E TP_DATA TP_CLK 63 EC_SMB_CK1 C
KSO0 39 88 PS2 R1574 1 2 2.2K_0402_5%
KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA 63 LID_SW#
KSO1 40 R344 1 2 47K_0402_5%
KSO2 41 KSO1/GPIO21
KSO3 42 KSO2/GPIO22 97 CHG_CTL1 Change for New Charger IC
KSO3/GPIO23 ENKBL/GPXIOA00 GPU_ACIN CHG_CTL1 71
KSO4 43 98
KSO4/GPIO24 WOL_EN/GPXIOA01 0.9VS_PWR_EN# GPU_ACIN 28
KSO5 44 99
KSO6 45 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 109 9022_PH1 0.9VS_PWR_EN# 78
KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH1/GPXIOD00 9022_PH1 83 +5VALW
KSO8 47 KSO7/GPIO27
KSO8/GPIO28 SPI Device Interface EC_RTCRST EC_SMB_CK3
KSO9 48 119 RB79 1 2 4.7K_0402_5%
KSO10 49 KSO9/GPIO29 MISO/GPIO5B 120 BT_ON RB80 1 2 4.7K_0402_5% EC_SMB_DA3
KSO10/GPIO2A MOSI/GPIO5C BT_ON 52
KSO11 50 SPI Flash ROM 126
KSO12 51 KSO11/GPIO2B SPICLK/GPIO58 128 FP_PWR_EN
KSO12/GPIO2C SPICS#/GPIO5A FP_PWR_EN 66
KSO13 52 Reserve for FP
KSO14 53 KSO13/GPIO2D
KSO15 54 KSO14/GPIO2E 73 CHG_EN Change for New Charger IC
KSO15/GPIO2F EC_CIR_RX/AD6/GPIO40 CHG_EN 71
KSO16 81 74 VGATE VGATE 88
KSO17 82 KSO16/GPIO48 SYS_PWROK/AD7/GPIO41 89 BATT_4S
KSO17/GPIO49 GPIO50 90 BATT_BLUE_LED# BATT_4S 84
BATT_CHG_LED#/GPIO52 GPU_ALERT# BATT_BLUE_LED# 73
91 GPU_ALERT# 83
EC_SMB_CK1 77 CAPS_LED#/GPIO53 92 PWR_LED#
83,84 EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CLK1/GPIO44 GPIO PWR_LED#/GPIO54 BATT_AMB_LED# PWR_LED# 73 BATT_TEMP
78 93 1 2
83,84 EC_SMB_DA1 EC_SMB_CK2 79 EC_SMB_DAT1/GPIO45 BATT_LOW_LED#/GPIO55 95 BATT_AMB_LED# 73
SYSON C1265 100P_0402_50V8J
8,28,66 EC_SMB_CK2 EC_SMB_DA2 80 EC_SMB_CLK2/GPIO46 SYSON/GPIO56 121 VR_ON SYSON 86 1 2
ACIN
8,28,66 EC_SMB_DA2 EC_SMB_DAT2/GPIO47 VR_ON/GPIO57 0.9_1.8VALW_PWREN VR_ON 87,88
127 C1266 100P_0402_50V8J
DPWROK_EC/GPIO59 0.9_1.8VALW_PWREN 87
SM Bus EC_RSMRST# R3907 1 @ 2 47K_0402_5%
SLP_S3# 6 100 EC_RSMRST# SYSON R1675 1 @ 2 100K_0402_5%
9 SLP_S3# TP_I2C_INT# 14 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 101 CHG_ILMSEL EC_RSMRST# 9 Change for New Charger IC 3V_EN 1 2 1M_0402_5%
R940
63 TP_I2C_INT# CHG_CTL3 GPIO07 GPXIOA04 9022_VCIN CHG_ILMSEL 71
15 102 9022_VCIN 83
71 CHG_CTL3 TP_3V_EN 16 GPIO08 VCIN1_ADP_PROCHOT/GPXIOA05 103 EC_THERM
63 TP_3V_EN WL_OFF# 17 GPIO0A VCOUT1_PROCHOT#/GPXIOA06 104 MAINPWON
52 WL_OFF# EC_MUTE# 18 GPIO0B VCOUT0_MAIN_PWR_ON/GPXIOA07 105 MAINPWON 77,85
BKOFF#
56 EC_MUTE# USB_EN 19 GPIO0C BKOFF#/GPXIOA08 106 LAN_GPO BKOFF# 38
42,72,73 USB_EN KBL_EN AC_PRESENT/GPIO0D GPIO GPO GPXIOA09 3V_EN_R_EC LAN_GPO 51
25 107
63 KBL_EN FAN_SPEED1 28 PWM2/GPIO11 PCH_PWR_EN/GPXIOA10 108
B THERMTRIP# B
77 FAN_SPEED1 FAN_SPEED2 FAN_SPEED1/GPIO14 PWR_VCCST_PG/GPXIOA11 THERMTRIP# 8
29 R1690
77 FAN_SPEED2 EC_TX 30 FANFB1/GPIO15 EC_THERM 1 RS@ 2 0_0402_5%
52 EC_TX EC_RX EC_TX/GPIO16 APU_PROCHOT# 8,84,88
31 110 ACIN
52 EC_RX SYS_PWRGD_EC EC_RX/GPIO17 VCIN1_AC_IN/GPXIOD01 EC_ON ACIN 84
SYS_PWRGD_EC is OD-Pin 32 112
9 SYS_PWRGD_EC PWR_SUSP_LED# 34 PCH_PWROK/GPIO18 EC_ON/GPXIOD02 114 EC_ON 85
ON/OFFBTN#
73 PWR_SUSP_LED# GPU_PCC# 36 SUSP_LED#/GPIO19 ON/OFF#/GPXIOD03 115 LID_SW# ON/OFFBTN# 63
28 GPU_PCC# NUM_LED#/GPIO1A GPI LID_SW#/GPXIOD04 LID_SW# 66
116 SUSP#
SUSP#/GPXIOD05 117 SUSP# 37,78,84,86
ENBKL
GPXIOD06 THERMAL_ALERT# ENBKL 8
118
PBTN_OUT# PECI/GPXIOD07 THERMAL_ALERT# 66
122
9 PBTN_OUT# SLP_S5# 123 PBTN_OUT#/GPIO5D 124
9,84 SLP_S5# PM_SLP_S4#/GPIO5E V18R/VCC_IO2 +EC_VCC
AGND
GND
GND
GND
GND
GND
MAINPWON 1 2 3V_EN
3V_EN 85
11
24
35
94
113
69
U44 D2012 @
KB9022QD_LQFP128_14X14 L43 RB751V-40_SOD323-2
FBM-11-160808-601-T_0603
2 1 3V_EN_R_EC R3926 1 2 1K_0402_5%
ECAGND
20mil
SPOK_3V 1 2 EC_RSMRST#
D2013 @
RB751V-40_SOD323-2
A 1 2 SYS_PWRGD_EC A
D2014 @
RB751V-40_SOD323-2

EC ENE-KB9022
Custom 1A
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
2.2K
+3VS
UM4
PCIE Clock Buffer
2.2K
SMB_0_SCL
I2C2_SCL/EGPIO113/SCL0
SMB_0_SDA SO-DIMM A & B

I2C2_SDA/EGPIO114/SDA0
D D
47K
Picasso 1K +3VSDGPU
47K
APU +3VS
1K
+3VSDGPU
APU_SIC EC_SMB_CK2 VGA_SMB_CK3
SIC
(RC616,RC617) (QV1)
APU_SID R-short EC_SMB_DA2 2N7002KDW VGA_SMB_DA3
SID
AMD
R18M-G1-90
THERMAL SENSOR
2.2K
+EC_VCC
2.2K
EC_SMB_CK1 100 ohm EC_SMB_CK1-1

BATTERY
EC_SMB_DA1 100 ohm EC_SMB_DA1-1 CONN
C C
KB9022 EC_SMB_CK1-R
(PR316,PR314) EC_SMB_DA1-R Charger

R-short
EC_SMB_CK2
EC_SMB_DA2
4.7K 2.2K
+5VALW +5VS_BL
4.7K 2.2K
+5VS_BL
EC_SMB_CK3 EC_SMB_CK3_LEDDRV
(QE62)
EC_SMB_DA3 EC_SMB_DA3_LEDDRV LED driver
2N7002DW
(RE1,RE2)
R-short
B B
A A

SMBUS Diagram
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
ON/OFF BTN TP/B Conn.
+TP_VCC
I2C_3_SDA_R R812 1 2 2.2K_0402_5%

+3VALW +TP_VCC I2C_3_SCL_R R813 1 2 2.2K_0402_5%
20mil 0.1A U13 SA000079400
SY6288C20AAC_SOT23-5 +3VS
4.7U_0402_6.3V6M
R534 5 1
100K_0402_5% IN OUT TP_I2C_INT#_APU R814 1 2 2.2K_0402_5% +TP_VCC
1
+TP_VCC
1U_0201_6.3V6M
C2563
2 1 2
+3VLP GND
C2562
TP_I2C_INT# R633 2 1 10K_0402_5%
2
C663 4 3
ON/OFFBTN# JTP1 0.1U_0201_10V6K EN OC 2
58 ON/OFFBTN#
1 1 2
1 2 TP_CLK @ 1 Vih=1.5
2 3 TP_DATA
3 4
4 I2C_3_SDA_R TP_3V_EN 58
5
4 3 5
6
6
7
I2C_3_SCL_R
TP_I2C_INT# TP_I2C_INT# 58
To EC
Test Only SWK1 EVT@ 7 8 TP_SENOFF# TP_I2C_INT# 1 2 TP_I2C_INT#_APU
BOT NTC013-AA1J-A160T_4P 8
GND
9
TP_SENOFF# 58 TP_I2C_INT#_APU 9 To APU
2 1 SN10000CV00 10 D22
GND RB751V-40_SOD323-2
JXT_FP202DH-008M10M
CONN@
+TP_VCC
SP010020L00 +TP_VCC
Vgs=1.0-2.5V
5
G
1
1
Q2509B
R2507 R2509 2N7002KDW_SOT363-6
4.7K_0402_5% 4.7K_0402_5% SB00000EO00
I2C_3_SCL_R 4 3
S
I2C_3_SCL 9
D
2
2
G
TP_CLK
TP_DATA TP_CLK 58
Q2509A To APU
2N7002KDW_SOT363-6
TP_DATA 58 I2C_3_SDA_R 1 6 SB00000EO00
S
I2C_3_SDA 9
D
R2622 1 @ 2 0_0402_5%
R2623 1 @ 2 0_0402_5%
LED driver +5VS_BL +5VS_BL

1
1
2.2K_0402_5%
RE69 @
2.2K_0402_5%
RE70 @
5
G
QE62B @
KB Conn. / Backlight
2
2N7002KDW_SOT363-6
+5VS
4 3 EC_SMB_CK3_LEDDRV +5VALW
S
58 EC_SMB_CK3
D
JKB1
R41 1 2 0_0603_5% 30
KBLED@ +5VS_BL 29 GND2
GND1
2
U2616 KSO16 28
G
R42 1LED14P@ 2 0_0603_5% 5 1 KSI[0..7] KSO17 27 28

IN OUT KSI[0..7] 58 27
KSO0 26
26
0.1U_0201_10V6K
change to @ at EVT only 2 KSO[0..17] KSO1 25
GND KSO[0..17] 58 25
C32
1 6 EC_SMB_DA3_LEDDRV KSO2 24
S
58 EC_SMB_DA3 24
D
58 KBL_EN
4 3 1 KSO3 23
QE62A @ EN OC KSO4 22 23
SY6288C20AAC_SOT23-5 @ KSO5 21 22
2N7002KDW_SOT363-6 21
KSO6 20
2 KSO7 19 20
KSO8 18 19
+5VS_BL KSO9 17 18
JBL1 KSO10 16 17
1 KSO11 15 16
2 1 KSO12 14 15
3 2 KSO13 13 14
4 3 KSO14 12 13
4 KSO15 11 12
5 KSI0 10 11
6 GND KSI1 9 10
GND KSI2 8 9
ACES_51524-0040N-001 KSI3 7 8
CONN@ KSI4 6 7
KSI5 5 6
SP010022M00 KSI6 4 5
KSI7 3 4
2 3
ON/OFFBTN# 1 2
1
+5VS_BL +5VS_BL ACES_85201-2805

CONN@
SP01000GO00
1
RE65 LED14P@
JBL2
4.7K_0402_1% 1
CE3 LED14P@ 16
UE4 0.1U_0201_10V6K 15 GND
+5VS_BL GND
2
KB Conn.
24 27 2
RESET Vcc
3 KB_A_LED_R_DRV# 14
EC_SMB_CK3 RE1 2 RS@ 1 0_0402_5% EC_SMB_CK3_LEDDRV 25 OUT0 4 KB_A_LED_G_DRV# 13 14
EC_SMB_DA3 RE2 2 RS@ 1 0_0402_5% EC_SMB_DA3_LEDDRV 26 SCL OUT1 5 KB_A_LED_B_DRV# KB_A_LED_R_DRV# 12 13
SDA OUT2 12
AD0
AD1
AD2
31
32
1
A0
A1
OUT3
OUT4
OUT5
6
8
9
10
KB_B_LED_R_DRV#
KB_B_LED_G_DRV#
KB_B_LED_B_DRV#
KB_C_LED_R_DRV#
AD0
AD1
AD2
KB_A_LED_G_DRV#
KB_A_LED_B_DRV#
KB_B_LED_R_DRV#
KB_B_LED_G_DRV#
11
10
9
8
11
10
9
KB BackLight
AD3 2 A2 OUT6 11 KB_C_LED_G_DRV# AD3 KB_B_LED_B_DRV# 7 8
A3 OUT7 14 KB_C_LED_B_DRV# KB_C_LED_R_DRV# 6 7
OUT8 6
1
1
12 15 KB_D_LED_R_DRV# KB_C_LED_G_DRV# 5
13 N.C. OUT9 16 KB_D_LED_G_DRV# RE75 RE74 RE73 RE72 KB_C_LED_B_DRV# 4 5
28 N.C. OUT10 17 KB_D_LED_B_DRV# 4.7K_0402_1% 4.7K_0402_1% 4.7K_0402_1% 4.7K_0402_1% KB_D_LED_R_DRV# 3 4
29 N.C. OUT11 19 LED14P@ LED14P@ LED14P@ LED14P@ KB_D_LED_G_DRV# 2 3
30 N.C. OUT12 20 KB_D_LED_B_DRV# 1 2
2
2
N.C. OUT13 21 1
OUT14
1
22
RE64 OUT15 ACES_51522-01401-P01
@ 10K_0402_5% 7 23 CONN@
18 GND GND 33
GND GND SP01001R800
set RE7 to 10k / output = 1.875mA
2
TLC59116FIRHBR_VQFN32_5X5
LED14P@

Raptor: NC for 59116F THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
KB/TP
Custom 1A
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
THERMAL SENSOR
To Hall sensor/B
Close to UF2 +3VS
+3VLP RF24
REMOTE1+ +3VS 10K_0402_5%
JHS1 1 THERMAL_ALERT# 2 TMS@ 1
1 CF21 TMS@ CF20 TMS@
LID_SW # 2 1 2200P_0402_50V7K 0.1U_0201_10V6K UF2
58 LID_SW# 2
D 3 2 1 PU +3VS with 1K at APU side D
4 3 2 REMOTE1-
4 1 10
VCC SCL EC_SMB_CK2 8,28,58
5 REMOTE2+
6 GND REMOTE1+ 2 9
GND 1 DP1 SDA EC_SMB_DA2 8,28,58
CF22 TMS@
ACES_51524-0040N-001 2200P_0402_50V7K REMOTE1- 3 8 THERMAL_ALERT#
DN1 ALERT# THERMAL_ALERT# 58
CONN@
2 REMOTE2- REMOTE2+ 4 7 TH1_THERM# 2 TMS@ 1
SP010022M00 DP2 THERM# 10K_0402_5% RF23
+3VS
REMOTE2- 5 6
DN2 GND
Place near UV1
REMOTE1+ F75303M_MSOP10
+3VLP
TMS@
1
C
EMC@ 2 QF1 TMS@ SMBUS ADDRESS
C2754 1 2 0.1U_0201_10V6K B MMBT3904W H_SOT323-3
E 1001_101xb
3
EMC@ REMOTE1-
LID_SW # C2753 1 2 0.1U_0201_10V6K REMOTE1,2(+/-):
Place near UC1
Trace length: <8"
Close to JHS1
Reserved for ESD require at 2019 REMOTE2+
1
C
2 QF2 TMS@
B MMBT3904W H_SOT323-3
C E C
3
REMOTE2-
PIN ETU801 FA577E-1200

1 +FP_VCC(5V) +FP_VCC(3V)
Finger Print 2 USBP D+
3 USBN D-
4 GND GND
5 NC NC
6 NC NC
7 NC
Power Souce Check 8 NC
EGIS ETU801 +FP_VCC=5V
ELAN SA464K-2200 +FP_VCC=3.3V +FP_VCC
+3VALW RK16 1 FP@ 2 0_0603_5% UK6

B RK17 1 @ 2 0_0603_5% 5 1 B
+5VALW IN OUT
2 1
FP@ 2 FP@
CK11 GND CK12
1U_0201_6.3V6M 4 3 4.7U_0402_6.3V6M
1 EN OC 2
SY6288C20AAC_SOT23-5
FP@
58 FP_PWR_EN SA000079400
+FP_VCC
JFP1
8
RK19 1 RS@ 2 0_0402_5% HUB_USB20_P3_L 7 8 10
RK18 1 RS@ 2 0_0402_5% HUB_USB20_N3_L 6 7 G2 9
5 6 G1
4 5
3 4
DK2 @EMC@ 2 3
6 3 HUB_USB20_N3_L 1 2
I/O4 I/O2 1
ACES_51522-00801-001
CONN@
+FP_VCC 5 2 SP01001AE00
VDD GND
A A
4 1 HUB_USB20_P3_L
I/O3 I/O1
AZC099-04S.R7G_SOT23-6
SC300001G00

Sensors/FP
5 4 3 2 1
A B C D E F G H
SATA Re-Driver and cable HDD Conn.

+5VS_HDD
100mils
FFC Type
B_EQ1
A_EQ2
A_EQ1
10U_0402_6.3V6M
CO12
1
DEW
1
1 CO13 1
CO1 +3VS 0.1U_0201_10V6K JHDD1
2
0.01U_0402_16V7K 2 @ 14
2 1 +5VS +5VS_HDD 13 GND
GND
RO4 1 @ 2 0_0805_5% 12
20
19
18
17
16
11 12
10 11
DEW
VDD2
B_EQ1
A_EQ2
A_EQ1
RO25 1 2 0_0402_5% JHDD_P9 9 10
8 9
SATA_ATX_DRX_P0 CO4 2 1 0.01U_0402_16V7K SATA_ATX_C_RD_DRX_P0 1 15 SATA_ATX_RD_DRX_P0 7 8
6 SATA_ATX_DRX_P0 SATA_ATX_DRX_N0 SATA_ATX_C_RD_DRX_N0 A_INP A_OUTP SATA_ATX_RD_DRX_N0 SATA_ARX_RD_DTX_P0 SATA_ARX_C_DTX_P0 7
CO5 2 1 0.01U_0402_16V7K 2 14 CO7 2 1 0.01U_0402_16V7K 6
6 SATA_ATX_DRX_N0 A_INN A_OUTN B_EQ2 SATA_ARX_RD_DTX_N0 SATA_ARX_C_DTX_N0 6
3 13 CO6 2 1 0.01U_0402_16V7K 5
SATA_ARX_DTX_N0 CO8 2 1 0.01U_0402_16V7K SATA_ARX_C_RD_DTX_N0 4 GND1 B_EQ2 12 SATA_ARX_RD_DTX_N0 4 5
6 SATA_ARX_DTX_N0 SATA_ARX_DTX_P0 CO14 2 1 0.01U_0402_16V7K SATA_ARX_C_RD_DTX_P0 5 B_OUTN B_INN 11 SATA_ARX_RD_DTX_P0 SATA_ATX_RD_DRX_N0 CO3 2 1 0.01U_0402_16V7K SATA_ATX_C_DRX_N0 3 4
6 SATA_ARX_DTX_P0 21 B_OUTP B_INP SATA_ATX_RD_DRX_P0 CO2 2 1 0.01U_0402_16V7K SATA_ATX_C_DRX_P0 2 3
GND2 2
VDD1
REXT
1
B_DE
A_DE
1
EN
UO1 ACES_51625-01201-001
PS8527CTQFN20GTR2A_TQFN20_4X4 CONN@
6
7
8
9
10
SA00007JU10 SP010028W00
+3VS RO7 2 1
+3VS
0.1U_0201_10V6K
+3VS 4.99K_0402_1%
B_DE
A_DE
1
RO6 1 @ 2 4.7K_0402_5% A_DE
RO15 1 @ 2 4.7K_0402_5% A_DE A DE: M -3.5dB 1 RO9 @ 2
CO10
4.7K_0402_5%
RO11 1 @ 2 4.7K_0402_5% A_EQ1 2
RO18 1 2 4.7K_0402_5% A_EQ1 2 1
CO15
RO12 1 @ 2 4.7K_0402_5% A_EQ2 0.1U_0201_10V6K
RO19 1 @ 2 4.7K_0402_5% A_EQ2 A EQ: 9.4dB (ML) @
2 2
RO8 1 @ 2 4.7K_0402_5% B_DE
RO16 1 @ 2 4.7K_0402_5% B_DE B DE: M -3.5dB
RO10 1 @ 2 4.7K_0402_5% B_EQ1
RO17 1 2 4.7K_0402_5% B_EQ1
RO13 1 @ 2 4.7K_0402_5% B_EQ2

RO20 1 2 4.7K_0402_5% B_EQ2 B EQ: 7.4dB (LL)
RO14 1 @ 2 4.7K_0402_5% DEW
3 3
4 4

HDD/SSD
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 1A
A B C D E F G H
5 4 3 2 1
SATA SSD Conn.

+3VS_SSD2 +3VS_SSD2 +3VS
JSSD2
M.2 SSD2
1 2 RO26 1 @ 2 0_0805_5%
3 GND 3P3VAUX 4
GND 3P3VAUX
22U_0603_6.3V6M
0.1U_0201_10V6K
5 6 1 1
7 PERn3 NC 8
PERp3 NC 1
CM14
CM13
9 10
D 11 GND DAS/DSS# 12 + CM58 D
13 PETn3 3P3VAUX 14 2 2 150U_D2_6.3VY_R15M
15 PETp3 3P3VAUX 16 SGA00003700
17 GND 3P3VAUX 18 2 @
19 PERn2 3P3VAUX 20
21 PERp2 NC 22
23 GND NC 24
25 PETn2 NC 26
27 PETp2 NC 28
29 GND NC 30
31 PERn1 NC 32
33 PERp1 NC 34 LON:If system didn't support DEVSLP, set Device Sleep Signal high and
35 GND NC 36 keep (from power on), device will ignore.
37 PETn1 NC 38 DEVSLP1_R RM21 1 2 0_0402_5%
39 PETp1 DEVSLP 40 DEVSLP1 9
CM7 1 2 0.01U_0402_16V7K SATA_ARX_C_DTX_P1 41 GND NC 42 RM20 1 @ 2 0_0402_5%
69 SATA_ARX_RD_DTX_P1 SATA_ARX_C_DTX_N1 43 PERn0/SATA-B+ NC 44
CM8 1 2 0.01U_0402_16V7K
69 SATA_ARX_RD_DTX_N1 45 PERp0/SATA-B- NC 46
SATA SSD GND NC
CM9 1 2 0.01U_0402_16V7K SATA_ATX_C_DRX_N1 47 48
69 SATA_ATX_RD_DRX_N1 SATA_ATX_C_DRX_P1 49 PETn0/SATA-A- NC 50
CM10 1 2 0.01U_0402_16V7K
69 SATA_ATX_RD_DRX_P1 51 PETp0/SATA-A+ PERST# 52
53 GND CLKREQ# 54
55 REFCLKN PEWake# 56
57 REFCLKP NC 58
GND NC
67 68 SUSCLK_SSD2 @ T4962
SSD2_DET# 69 NC SUSCLK(32kHz) 70
T210 @ PEDET(NC-PCIE/GND-SATA) 3P3VAUX
71 72
73 GND 3P3VAUX 74
C 75 GND 3P3VAUX C
GND 76
GND1 77
GND2
LOTES_APCI0079-P005A
CONN@
SP07001EZ00
M.2 SSD1 +3VS_SSD1 +3VS_SSD1 +3VALW
JSSD1 SA00000OH00 UM5

1 2 MC74VHC1G08DFT2G_SC70-5
GND 3P3VAUX
5
3 4 @
PCIE_ARX_DTX_N3 GND 3P3VAUX
22U_0603_6.3V6M
0.1U_0201_10V6K
5 6 1 1 1 1
P
6 PCIE_ARX_DTX_N3 PCIE_ARX_DTX_P3 7 PERn3 NC 8 SSD1_PCIE_RST# 4 IN1 AGPIO40 9
6 PCIE_ARX_DTX_P3 PERp3 NC O
CM18
CM20
9 10 + CM59 2 APU_PCIE_RST#
GND DAS/DSS# IN2
G
PCIE_ATX_C_DRX_N3 11 12 150U_D2_6.3VY_R15M
6 PCIE_ATX_C_DRX_N3 PCIE_ATX_C_DRX_P3 13 PETn3 3P3VAUX 14 2 2 SGA00003700
3
6 PCIE_ATX_C_DRX_P3 15 PETp3 3P3VAUX 16 2
PCIE_ARX_DTX_N2 17 GND 3P3VAUX 18 RM135
6 PCIE_ARX_DTX_N2 PCIE_ARX_DTX_P2 19 PERn2 3P3VAUX 20 100K_0402_5% RM28
B 6 PCIE_ARX_DTX_P2 21 PERp2 NC 22 1 2 1 2 0_0402_5% B
@
PCIE_ATX_C_DRX_N2 23 GND NC 24 APU_PCIE_RST# 9,27,51,52
6 PCIE_ATX_C_DRX_N2 PCIE_ATX_C_DRX_P2 25 PETn2 NC 26
6 PCIE_ATX_C_DRX_P2 27 PETp2 NC 28
PCIE SSD GND NC
PCIE_ARX_DTX_N1 29 30
6 PCIE_ARX_DTX_N1 PCIE_ARX_DTX_P1 31 PERn1 NC 32
6 PCIE_ARX_DTX_P1 33 PERp1 NC 34
PCIE_ATX_C_DRX_N1 35 GND NC 36
6 PCIE_ATX_C_DRX_N1 PCIE_ATX_C_DRX_P1 37 PETn1 NC 38
6 PCIE_ATX_C_DRX_P1 39 PETp1 DEVSLP 40
PCIE_ARX_DTX_N0 41 GND NC 42
6 PCIE_ARX_DTX_N0 PCIE_ARX_DTX_P0 43 PERn0/SATA-B+ NC 44 Place close to JSSD pin 50
6 PCIE_ARX_DTX_P0 PERp0/SATA-B- NC ESD request to reserve.
45 46 @EMC@ CM17 1 2 100P_0402_50V8J
PCIE_ATX_C_DRX_N0 47 GND NC 48
6 PCIE_ATX_C_DRX_N0 PCIE_ATX_C_DRX_P0 49 PETn0/SATA-A- NC 50 SSD1_PCIE_RST#
6 PCIE_ATX_C_DRX_P0 PETp0/SATA-A+ PERST# CLKREQ_PCIE#0_R
51 52 RM27 1 RS@ 2 0_0402_5% CLKREQ_PCIE#0 10
CLK_PCIE_N0 53 GND CLKREQ# 54
10 CLK_PCIE_N0 CLK_PCIE_P0 55 REFCLKN PEWake# 56
10 CLK_PCIE_P0 57 REFCLKP NC 58
GND NC
67 68 SUSCLK_SSD1 @ T4961
69 NC SUSCLK(32kHz) 70
71 PEDET(NC-PCIE/GND-SATA) 3P3VAUX 72
73 GND 3P3VAUX 74
75 GND 3P3VAUX
GND 76
GND1 77
GND2
LOTES_APCI0079-P005A
A A
CONN@
SP07001EZ00

M.2 SSD
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev
5 4 3 2 1
5 4 3 2 1
SATA Re-Driver for M.2 Connector
B2_EQ1
A2_EQ2
A2_EQ1
DEW2
CM72 +3VS
2 1
D D
0.01U_0201_6.3V7K
20
19
18
17
16
VDD2
B_EQ1
A_EQ2
A_EQ1
DEW
SATA_ATX_DRX_P1 CM73 2 1 0.01U_0402_16V7K SATA_ATX_C_RD_DRX_P1 1 15 SATA_ATX_RD_DRX_P1
6 SATA_ATX_DRX_P1 A_INP A_OUTP SATA_ATX_RD_DRX_P1 68
SATA_ATX_DRX_N1 CM74 2 1 0.01U_0402_16V7K SATA_ATX_C_RD_DRX_N1 2 14 SATA_ATX_RD_DRX_N1
6 SATA_ATX_DRX_N1 A_INN A_OUTN SATA_ATX_RD_DRX_N1 68
3 13 B2_EQ2
SATA_ARX_DTX_N1 CM75 2 1 0.01U_0402_16V7K SATA_ARX_C_RD_DTX_N1 4 GND1 B_EQ2 12 SATA_ARX_RD_DTX_N1
6 SATA_ARX_DTX_N1 B_OUTN B_INN SATA_ARX_RD_DTX_N1 68
SATA_ARX_DTX_P1 CM76 2 1 0.01U_0402_16V7K SATA_ARX_C_RD_DTX_P1 5 11 SATA_ARX_RD_DTX_P1
6 SATA_ARX_DTX_P1 B_OUTP B_INP SATA_ARX_RD_DTX_P1 68
21
GND2
REXT
VDD1
B_DE
A_DE
EN
UM4
PS8527CTQFN20GTR2A_TQFN20_4X4
6
7
8
9
10
SA00007JU10
RM133 2 1 +3VS
+3VS +3VS
0.1U_0201_10V6K
B2_DE
A2_DE
4.99K_0402_1% 1
RM1261 @ 2 4.7K_0402_5% A2_DE 1 @ 2
CM77
RM1201 @ 2 4.7K_0402_5% A2_DE A DE: M -3.5dB 4.7K_0402_5%
RM134 2
RM1291 @ 2 4.7K_0402_5% A2_EQ1 2 1
RM1231 2 4.7K_0402_5% A2_EQ1 CM78
0.1U_0201_10V6K
RM1301 @ 2 4.7K_0402_5% A2_EQ2 @
RM1241 @ 2 4.7K_0402_5% A2_EQ2 A EQ: 9.4dB (ML)
C C
RM1271 @ 2 4.7K_0402_5% B2_DE
RM1211 @ 2 4.7K_0402_5% B2_DE B DE: M -3.5dB
RM1281 @ 2 4.7K_0402_5% B2_EQ1
RM1221 @ 2 4.7K_0402_5% B2_EQ1
RM1311 @ 2 4.7K_0402_5% B2_EQ2

RM1251 2 4.7K_0402_5% B2_EQ2 B EQ: 2.4dB (LM)
RM1321 @ 2 4.7K_0402_5% DEW 2
B B
A A

M.2 SATA Redriver
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
A B C D E
USB3.0
DS1 EMC@
CS2 1 2 0.22U_0402_16V7K USB3_ATX_C_DRX_P1 RS86 1 RS@ 2 0_0402_5% USB3_ATX_L_DRX_P1 USB3_ATX_L_DRX_P1 1 9 USB3_ATX_L_DRX_P1
10 USB3_ATX_DRX_P1
CS3 1 2 0.22U_0402_16V7K USB3_ATX_C_DRX_N1 RS89 1 RS@ 2 0_0402_5% USB3_ATX_L_DRX_N1 USB3_ATX_L_DRX_N1 2 8 USB3_ATX_L_DRX_N1
10 USB3_ATX_DRX_N1
USB3_ARX_L_DTX_P1 4 7 USB3_ARX_L_DTX_P1
CS131 1 2 0.33U_0402_10V6K USB3_ARX_C_DTX_P1 RS90 1 RS@ 2 0_0402_5% USB3_ARX_L_DTX_P1
10 USB3_ARX_DTX_P1 USB3_ARX_L_DTX_N1 USB3_ARX_L_DTX_N1
1 5 6 1
CS132 1 2 0.33U_0402_10V6K USB3_ARX_C_DTX_N1 RS91 1 RS@ 2 0_0402_5% USB3_ARX_L_DTX_N1 +USB3_VCCA
10 USB3_ARX_DTX_N1
W=100mils
3
1 2
TVW DF1004AD0_DFN9
CS5 + CS6 EMC@
SC300003Z00 150U_D2_6.3VY_R15M 0.1U_0201_10V6K
SGA00003700 1
2
USB3.0 Conn.
JUSB1
1
CHR_USB20_N1_R 2 VBUS
CHR_USB20_P1_R 3 D-
4 D+
USB3_ARX_L_DTX_N1 5 GND
USB3_ARX_L_DTX_P1 6 StdA-SSRX- 10
7 StdA-SSRX+ GND 11
USB3_ATX_L_DRX_N1 8 GND-DRAIN GND 12
RS138 1 2 15_0402_1% DS2 EMC@ USB3_ATX_L_DRX_P1 9 StdA-SSTX- GND 13
LS3 EMC@ 6 3 CHR_USB20_N1_R StdA-SSTX+ GND
CS135 1 2 470P_0402_50V8J USB20_P1_RC CHR_USB20_P1 2 1 CHR_USB20_P1_R I/O4 I/O2 ACON_TARAC-9V1391
10 USB20_P1 2 1 +USB3_VCCA CONN@
10 USB20_N1
CS136 1 2 470P_0402_50V8J USB20_N1_RC CHR_USB20_N1 3
3 4
4 CHR_USB20_N1_R 5
VDD GND
2 DC23300AG00
2 RS139 1 2 15_0402_1% DLM0NSN900HY2D_4P 2
SM070005U00 CHR_USB20_P1_R 4 1
I/O3 I/O1
AZC099-04S.R7G_SOT23-6
SC300001G00
+5VALW
3 3
USB Host Charger
22U_0603_6.3V6M
0.1U_0201_10V6K
1 1
CS9
CS7
@
+USB3_VCCA
+5VALW 2 2 US12
1 12
VIN VOUT
RS14 1 2 10K_0402_5% CHG_CTL2 USB20_N1_RC 2
USB20_P1_RC 3 DM_OUT
DP_OUT 10 CHR_USB20_P1
13 DP_IN 11 CHR_USB20_N1
RS15 1 @ 2 10K_0402_5% CHG_ILMSEL FAULT# DM_IN
CHG_ILMSEL 4
58 CHG_ILMSEL ILIM_SEL
5 15
58 CHG_EN EN ILIM_L 16
ILIM_HI
1
6
58 CHG_CTL1 CTL1
22.1K_0402_1%
39K_0402_1%
CHG_CTL2 7 9
CTL2 NC
RS12
RS13
8 14
58 CHG_CTL3 CTL3 GND 17 ILM R vaule
Thermal Pad @
Ios(mA)=50250/R(Kohm)
2
SLGC55544CVTR_TQFN16_3X3 ILIM_Hi=2273mA
USB Host Charger Truth Table ILIM_L=1288mA(reserve)
4 CHG_EN CTL1 CTL2 CTL3 ILIM_SEL MODE Current Limit Note 4
Setting
0 0 1 0 1 SDP1-OFF ILIM_H Port power off
1 0 1 0 1 SDP1 ILIM_H Data Lines Connected
1 0 1 1 1 DCP ILIM_H Data Lines Disconnected
Auto Issued Date 2018/ 12/18 Deciphered Date 2019/12/18 Title
1 1 1 1 1 CDP ILIM_H Data Lines Connected THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB3.0 Conn/USB Charger
Custom 1A
A B C D E
5 4 3 2 1
USB3.0
+5VALW
For ESD request +USB3_VCCB
D CS109 1 2 0.22U_0402_16V7K USB3_ATX_C_DRX_P2 RS124 1 RS@ 2 0_0402_5% USB3_ATX_L_DRX_P2 CS107 EMC@ D
10 USB3_ATX_DRX_P2 DS20 EMC@ 0.1U_0201_10V6K US13
CS108 1 2 0.22U_0402_16V7K USB3_ATX_C_DRX_N2 RS123 1 RS@ 2 0_0402_5% USB3_ATX_L_DRX_N2 USB3_ATX_L_DRX_P2 1 9 USB3_ATX_L_DRX_P2 1 2 5 1 W=60mils
10 USB3_ATX_DRX_N2 IN OUT
USB3_ATX_L_DRX_N2 2 8 USB3_ATX_L_DRX_N2 2
CS133 1 2 0.33U_0402_10V6K USB3_ARX_C_DTX_P2 RS126 1 RS@ 2 0_0402_5% USB3_ARX_L_DTX_P2 GND
10 USB3_ARX_DTX_P2 USB3_ARX_L_DTX_P2 4 7 USB3_ARX_L_DTX_P2 4 3
USB3_ARX_C_DTX_N2 RS125 USB3_ARX_L_DTX_N2 42,58,73 USB_EN EN OC
CS134 1 2 0.33U_0402_10V6K 1 RS@ 2 0_0402_5%
10 USB3_ARX_DTX_N2 USB3_ARX_L_DTX_N2 5 6 USB3_ARX_L_DTX_N2 SY6288C20AAC_SOT23-5
TVWDF1004AD0_DFN9
SC300003Z00 +USB3_VCCB
W=100mils
1 2
CS111 + CS110 EMC@
150U_D2_6.3VY_R15M 0.1U_0201_10V6K
SGA00003700 1
2
USB3.0 Conn.
DS21 EMC@ JUSB2
U2DN2_L 6 3 1
RS142 1 2 15_0402_1% I/O4 I/O2 U2DN2_L 2 VBUS
LS13 EMC@ +USB3_VCCB U2DP2_L 3 D-
C CS139 1 2 470P_0402_50V8J USB20_P2_RC USB20_N2_RC 3 4 U2DN2_L 4 D+ C
10 USB20_P2 3 4 5 2 USB3_ARX_L_DTX_N2 5 GND
VDD GND USB3_ARX_L_DTX_P2 6 StdA-SSRX- 10
CS140 1 2 470P_0402_50V8J USB20_N2_RC USB20_P2_RC 2 1 U2DP2_L 7 StdA-SSRX+ GND 11
10 USB20_N2 2 1 USB3_ATX_L_DRX_N2 8 GND-DRAIN GND 12
RS143 1 2 15_0402_1% DLM0NSN900HY2D_4P 4 1 U2DP2_L USB3_ATX_L_DRX_P2 9 StdA-SSTX- GND 13
I/O3 I/O1 StdA-SSTX+ GND
SM070005U00 AZC099-04S.R7G_SOT23-6 ACON_TARAC-9V1391
SC300001G00 CONN@
DC23300AG00
B B
A A

USB3.0 Conn
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev
5 4 3 2 1
A B C D E
IO/B CONN
JIO2
26
GND2
25
HPOUT_L_1 24 GND1
56 HPOUT_L_1 24
HPOUT_R_1 23
56 HPOUT_R_1 23
56 SLEEVE SLEEVE 22
RING2 21 22
1 56 RING2 1
HP_PLUG# 20 21
56 HP_PLUG# 20
GNDA 19
RS140 1 2 15_0402_1% LS12 EMC@ 18 19
56 SPKR+ 18
DLM0NSN900HY2D_4P 17
CS137 1 2 470P_0402_50V8J USB20_P4_RC 1 2 USB20_P4_L 16 17
10 USB20_P4 1 2 56 SPKR- 16
15
BATT_AMB_LED# 14 15
58 BATT_AMB_LED# 14
CS138 1 2 470P_0402_50V8J USB20_N4_RC 4 3 USB20_N4_L BATT_BLUE_LED# 13
10 USB20_N4 4 3 58 BATT_BLUE_LED# 13
PWR_SUSP_LED# 12
58 PW R_SUSP_LED# 12
RS141 1 2 15_0402_1% PW R_LED# 11
58 PW R_LED# 11
10
SM070005U00 +5VALW
9 10
8 9
7 8
6 7
USB_EN 5 6
42,58,72 USB_EN 5
4
USB20_P4_L 3 4
USB20_N4_L 2 3
1 2
1
CVILU_CF35242D0RD-NH
CONN@
2 2
3 3
4 4

IO/B Interface
A B C D E
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
FAN Conn Screw Hole
Stand Off
@ H2 @ H3 @ H4 @ H5 @ H17 @ H20 @ H18 @ H19

H_3P0 H_3P0 H_3P0 H_3P0 H_2P5N H_3P0X2P5N H_3P2 H_3P2
+5VS
1 @ 2 +VCC_FAN1
1
RF4 0_0603_5% 40mil
1 @ 2 +VCC_FAN2
1 1 RF7 0_0603_5%
@ H6 @ H7 @ H8 @ H9
CF6 CF5 H_4P0 H_4P0 H_4P0 H_4P0
1000P_0402_50V7K 10U_0402_6.3V6M
2 2
@ @
1
@ H11 @ H12 @ H13
H_3P3 H_3P3 H_3P3
FD1 FD2
1
@ @
1
+3VS FIDUCIAL_C40M80 FIDUCIAL_C40M80
@ H14 @ H15 @ H16 FD3 FD4

1
1 H_3P8 H_3P8 H_3P8

RF3 CF13
10K_0402_5% 4.7U_0402_6.3V6M @ @
1
1
1
2 JFAN1 FIDUCIAL_C40M80 FIDUCIAL_C40M80
2
+VCC_FAN1 1
2 1
58 FAN_SPEED1 FAN_PW M1 3 2
58 FAN_PW M1
1 4 3
CF7 5 4
1000P_0402_50V7K 6 G1
@EMC@ G2
2 ACES_50278-00401-001 +3VLP 1 @ 2
MAINPWON 58,85
CONN@ R23 0_0402_5%
SP02000RR00 Reset Circuit 1 RS@ 2
EC_RST# 58
2
R24 0_0402_5%
R25
10K_0402_5%
+3VS
6
Q1A D
1
1 BI_GATE# 2
RF5 CF12 BI_GATE PH to +RTCVCC at PWR G Reset Button
10K_0402_5% 4.7U_0402_6.3V6M 2N7002KDW _SOT363-6
side S @
SW 3
1
2 JFAN2 1
2
+VCC_FAN2 1 BI_GATE 1 2 BI_GATE

1
3
2 Q1B D C40
58 FAN_SPEED2 FAN_PW M2 2 BI_GATE
3 5 0.1U_0201_10V6K
58 FAN_PW M2 3 83 BI_GATE G 2
1 4
CF10 5 4 3 4
2N7002KDW _SOT363-6
1000P_0402_50V7K 6 G1 S
4
@EMC@ G2
2 ACES_50278-00401-001 SKRPABE010_4P
CONN@ SN10000CV00
SP02000RR00
change PN to SN10000CV00

FAN & Screw Hole
Custom 1A
A B C D E
+3VALW TO +3VS
(VBIAS=5V),IMAX(per channel)=6A,Rds=18mohm
+3VS
U2
J7 JP@
C2750 @ 1 14 +3VS_LS
+3VALW VIN1 VOUT1
2 1 0.1U_0201_10V6K 1 2 2 13 1
C12 VIN1 VOUT1 JUMP_43X118
R1667 1 RS@ 2 0_0402_5% 3VS_ON 1U_0201_6.3V6M 3 12 1 2 C13
37,58,84,86 SUSP# ON1 CT1
C10 0.1U_0201_10V6K
4 11 560P_0402_50V7K 2
+5VALW VBIAS GND
1 1
5 10
ON2 CT2
6 9
7 VIN2 VOUT2 8
VIN2 VOUT2
15
GPAD
EM5209VF_DFN14_3X2
SA00007PM00
+5VALW TO +5VS
+3VALW TO +3VS_SSD1
+3VALW (VBIAS=5V),IMAX(per channel)=6A,Rds=18mohm
CM33
U3
1U_0201_6.3V6M J10 JP@
CM32 @ 1 2 1 14 +3VS_SSD_1
VIN1 VOUT1 +3VS_SSD1
2 1 0.1U_0201_10V6K 2 13 2
VIN1 VOUT1 JUMP_43X118
SUSP# RM53 1 RS@ 2 0_0402_5% +3V_NGFF_GATE 3 12 1 2 CM35
ON1 CT1 CM38 0.1U_0201_10V6K
4 11 1000P_0402_50V7K 1
+5VALW VBIAS GND
2 2
SUSP# R1668 1 RS@ 2 0_0402_5% 5VS_ON 5 10 1 2
ON2 CT2 C9 +5VS
+5VALW 6 9 330P_0402_50V7K J8 JP@
1 2 7 VIN2 VOUT2 8 +5VS_LS
C11 VIN2 VOUT2
1
1U_0201_6.3V6M 15 JUMP_43X118
GPAD C14
EM5209VF_DFN14_3X2 0.1U_0201_10V6K
2
SA00007PM00
SB00001IY00
S TR EMB04N03G 1N SOP-8
+0.9VALW U4 +0.9VS
EMB04N03G 1N SOIC8
8 1 160mils(4.0A)
1 7 2
4.7U_0402_6.3V6M
C939
1U_0201_6.3V6M
C46
C940 6 3 1 1
4.7U_0402_6.3V6M 5
2
4
3 2 @2 3
+5VALW
1 2 0.9VS_GATE
R1674 1
4.7K_0402_5%
C16
D
1
0.1U_0201_10V6K
2 Q84 2
58 0.9VS_PW R_EN#
G
S L2N7002W T1G_SC-70-3
3
SB00001GE00
4 4

DC INTERFACE
Custom 1A
A B C D E
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
A B C D
1 +19V_ADPIN +19V_VIN 1
EMI@ PL101
NA_2P
@ ACES_50299-00601-001 +19V_ADPIN 1 2
2
1 EMI@ PL102
1 2 PR102 NA_2P PR103
2 3 1 2
3 4.7_1206_5% 4.7_1206_5%
1
4
7 4 5 PC101 EMI@ EMI@ PC102
1
1
8 G7 5 6 100P_0402_50V8J 1000P_0402_50V7K
2
G8 6
2
2
PJP101
EMI@ PC103 EMI@ PC104
0.1U_0603_25V7K 0.1U_0603_25V7K
1
1
2 2
3 3
@ PR101
0_0603_5%
1 2
+3VLP +CHGRTC
4 4

DCIN
Custom 1A
A B C D
A B C D
PR201 100_0402_1%
1 2
EC_SMB_DA1 58,84
PR202 100_0402_1%
1 2
EC_SMB_CK1 58,84
+3VLP
PR203
200K_0402_1%
@ 1 2
PJP201 +3VLP
1 VGA@
1
1
2 1 2 PC202
1
2 3 EC_SMB_DA1-1 BATT_TEMP 58,84 1
1
4 EC_SMB_CK1-1 PR204 1K_0402_1% 0.1U_0603_25V7K
2
4 5 BATT_TS @ VGA@
5
1
6 BATT_B/I VGA@ PR205 PR206
6 7 PR207 10K_0402_1% 10K_0402_1%
7 8 100K_0402_1%
2
8 9 +RTCVCC VGA@
GND 10 PU201
2
GND 1 8
VCC TMSNS1
1
CVILU_CI9908M2HR0-NH 2 7 2 1
PR208 GND RHYST1
1
100K_0402_5% GPU_ALERT# 3 6 VGA@
D PQ201 58 GPU_ALERT# OT1 TMSNS2 PR209 VGA@
2
2 4 5 47K_0402_1% PH201
77 BI_GATE G OT2 RHYST2 100K_0402_1%_NCP15WF104F03RC
S LBSS139LT1G_SOT23-3 G718TM1U_SOT23-8
2
EMI@ PL201
3
+17.4V_BATT+ NA_2P
1 2
EMI@ PL202
NA_2P
1 2
+17.4V_BATT
1
1
1 PR212
EMI@ PC201 EMI@ PC203 0_0402_5%
1000P_0402_50V7K 1000P_0402_50V7K
2
For KB9022 For KB9012

Active Recovery Active Recovery
2
2 2
OTP sense 20mΩ
VCIN0_PH(V) 92C, 1V 56C, 2.V SR 45W 58.5W, 0.61V 58.5W, 0.61V
PH202(ohm) 7.3092K 26.11K BR 65W 84.5W, 0.61V 84.5W, 0.61V
PH202 under CPU botten side :

CPU thermal protection at 96 degree C ( shutdown )
Recovery at 56 degree C +EC_VCCA
ADP_I 58,84
2013/10/02 Recovery at 56 degree C +EC_VCCA

Add for ENE9022 Battery Voltage drop detection.
3
Connect to ENE9022 pin64 AD1. 3
1
PR210
PR211
Reserve for 2-cell design 16.9K_0402_1%
1
10K_0402_1%
PR218 VGA@
2
16.5K_0402_1%
58 9022_PH1
+19VB_5V
2
58 VRAM_TEMP
9022_VCIN 58
1
PH202
1
Metapod@ 100K_0402_1%_B25/50 4250K

1
PR213
750K_0402_1% VGA@ PH203 B value:4250K±1%
2
Metapod@ 100K_0402_1%_B25/50 4250K
PR214
2
0_0402_5% B value:4250K±1%
2
1 2 VCIN1_BATT_DROP 58 @
T1
1
@
T2 PR215
1
Metapod@ Metapod@ 10K_0402_1%

2
1
PC204 PR216
0_0402_5%
PR217
0.1U_0402_25V6 150K_0402_1%
2
1
2
4 4
ECAGND

BATTERY CONN / OTP
Custom 1A
A B C D
5 4 3 2 1
Module model information

ISL95520_Hybrid_Boost_V2.mdd
Protection for reverse input
Vgs = 20V
Vds = 60V max Power loss 0.22W for 90W;0.12W for 65W system;0.05W for 45W
Id = 250mA CSR rating: 1W
VCSIP-VCSIN spec < 81mV
1
D
2 PQ301 +19VB
G L2N7002WT1G_SC70-3 MB1.0 只只只UMA (ISN Chock 還還還bead)
S MB1.B ISN Chock還bead只只DIS
3
D D
1 2 1 2
PR301 PR302
1M_0402_1% 3M_0402_5%
PQ310 +19V_P1 PQ311

EMP21N03HC_EDFN5X6-8-5 AON7380_DFN3X3-8-5 PR303
Need check the SOA for inrush 1 1 +19V_P2 0.005_1206_1% EMI@ PL302 +19VB_CHG
2 2 FBMA-L11-201209-800LMA50T
5 3 3 5 1 4 1 2
+19V_VIN
EMI@
PC305 @EMI@
2 3 Isat: 10A
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_25V7K
CSIP_CHG_R
DCR: 14mohm
1
0.1U_0402_25V7K
CSIN_CHG_R
6 VIA
1
PC302
PC303
PC304
@ PC322
2
1 2
2
1000P_0402_25V
1
PR304
2_0402_5%
1_0402_5%
PR305
1
2
PR306
2
499K_0402_1%
PC306
0.1U_0402_25V6
2
PC323 1 2 @ PC324 PQ312
4.02K_0402_1%
4.02K_0402_1%
1
0.033U_0402_25V7K 0.1U_0402_25V6 AON7380_DFN3X3-8-5
1
1
2
2
5 3
Range:2V~3.5V PR309
4
0.22U_0603_25V7K
100_0402_1%
PR308
PR307
20*49.9/(392+49.9)=2.55V
1 2 +17.4V_BATT
0x3CH <BIT9> PSYS current gain
64.9K_0402_1%
1
CMSRC_CHG
Rs1 = 10mΩ and Rs2 = 5mΩ or Rs1 = 10mΩ and Rs2 = 10mΩ
2200P_0402_50V7K
1
PR310
PC301
BIT0 = 1.14uA/W
1
ASGATE_CHG 1 2
BIT1 = 0.285uA/W
PC307
=========================================================
2
@ PC308
2
OPCN_CHG 2
Rs1 = 20mΩ and Rs2 = 10mΩ or Rs1 = 20mΩ and Rs2 = 20mΩ 0.1U_0402_25V7K
BGATE_CHG
BIT0 = 2.28uA/W
OPCP_CHG
VBAT_CHG
CSIN_CHG
CSIP_CHG
BIT1 = 0.57uA/W PD302
1 VDD_CHG
C 1 2 VDDP_CHG PQ305 C
5
RB751V-40_SOD323-2
AON7506_DFN33-8-5
support Turbo boost : 2200P Support max charge 3.5A
32
31
30
29
28
27
26
25
100K_0402_1%
no support Turbo boost : 0.1u PU301 Choke 4.7uH SH00000YC00 Power loss: 0.245W
PR311
CSIN
CMSRC
OPCN
(Common Part)
CSIP
ASGATE
QPCP
BGATE
VBAT
@ PR312 PC309 4 CSR rating: 1W
0_0603_5% 0.47U_0603_16V7K (Size:6.6 x 7.3 x 3 mm) VCSPP-VCSON spec < 81mV
ACIN_CHG 1 24 BST_CHG 1 2 BST_CHG_R 1 2 (DCR:28m~33m)
2
ACIN BOOT
Ipsys = KPSYS x (VADP x IADP + VBAT x IBAT) PR315
R_Psys = 1.2V / Ipsys 2 23 UG_CHG PL301 0.01_1206_1%
3
2
1
KPSYS = 1.14uA/W 58 ACIN @ PR314 0_0402_5% ACOK UGATE 4.7UH_PCMB063T-4R7MS_8A_20% +17.4V_BATT
1
1 2 EC_SMB_DA1-R
3 22 LX_CHG 1 2 +17.4V_BATT_CHG 1 4
adapter wattage = 45W
158K_0402_1%
58,83 EC_SMB_DA1 @ PR316 0_0402_5% SDA PHASE

PR313
Battery wattage = 40Wh 1 2 EC_SMB_CK1-R

4 ISL88739AHRZ-T_QFN32_4X4 21 LG_CHG 2 3
4.7_1206_5%
Ipsys = 1.14 x (45+40) = 96.9uA 58,83 EC_SMB_CK1 SCL LGATE
1
@ PR317 0_0402_5% PQ306
EMI@ PR320
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
R_Psys = 1.2V / 96.9uA = 12.3K-ohm.
5
1 2 5 20 VDDP_CHG
2
===================================== 8,58,88 APU_PROCHOT# PROCHOT# VDDP
1
1
2 1K_0402_1% AMON_ISL95520 VDD_CHG
AON7506_DFN33-8-5
adapter wattage = 65W PR318 1 6 19 1 2
PC311
PC312
PC310
Battery wattage = 40Wh 58,83 ADP_I AMON VDD
2
Ipsys = 1.14 x (65+40) = 119.7uA PR321 1 2 1K_0402_1% 7 18 PR319 4.7_0402_5%
2
2
BMON DCIN
1
1
R_Psys = 1.2V / 96.9uA = 10K-ohm. 4
BATGONE
Close to EC. 8 17 PC313 PC314
680P_0402_50V7K
NC NTC 1U_0402_16V6K 2.2U_0402_16V6K
**Design Notes**
EMI@ PC315
CCLIM
ACLIM
2
2
COMP
PROG
1
AGND
CSON
CSOP
FSET
PR323
For 45W/65W /90W system, 2S/3S/4S battery
1
1
100K_0402_1%
Maximum Charging current 3.5A
3
2
1
1
PC316 PC317 @ PR322
2
Maximum Battery discharge power 55W 0.1U_0402_25V6 0.1U_0402_25V6 0_0402_5% PR324
33
10
11
12
13
14
15
16
#Register Setting 10_1206_5%
2
1 2
1. 0X3DH bit10 set 0 (default 1) to enable turbo boost function
2
2
Close to EC.
2. Disable turbo when AC only
2
VF = 0.38V
FSET_CHG
1U_0603_25V6
#Circuit Design 3 PR326
PC318
+19V_VIN
1
1. ACLIM and CCLIM are devider voltage control. 1 0_0603_5%
1
PR325 2 1 2
2. Use 7X7 choke and 3X3 H/L side MOSFET +17.4V_BATT
10K_0402_1%
Charge current 3A VDD=5V VDD_CHG PD301 @ PR327
Power loss : 1.79W (H/S=0.227W,L/S=1.2738W,Choke=0.297W) S SCH DIO BAS40CW SOT-323 0_0603_5%
2
Power density : 0.61 (23X16) 1 2

CCLIM_CHG BA
#Protect function
200K_0402_1%
200K_0402_1%
1
1. ACOVP : VCC voltage > 24V ACLIM_CHG PR330

2. SMBus timeout : 0X3DH bit15 set 0 (default 0) to enable 175s(default). 2_0402_5%
PR328
PR329
PROG_CHG CSOP_CHG 1 2 CSOP_CHG_R

3. ACOC : OX3CH bit4 set1 release adapter limit function (default:Enable).
4. CHGOCP : based on charge current setting COMP_CHG PC319
2
3
1
5. BATOVP : 4.6V/Cell 0.1U_0402_25V6
@ PR331
6. BATLOWV : No. PR333=0 ohm, Fs=500KHZ ~ +/- 15% @ PQ309
1
7. TSHUT : 150C 76.8K_0402_1% @ PR334 LMUN5113T1G_SOT323-3

100_0402_1%
2
B B
1 2 0_0402_5% 2
PR332
CSON_CHG 1 2 CSON_CHG_R
1
@ PQ316 OCCP setting
2
1
D
Battery current limimed by CCLIm ~ 3.89A.
1
1
ACIN 2
4 cell@ PR335
Adapter current limimed by ACLIm ~ 4.33A.

232K_0402_1%
150K_0402_1%
100K_0402_1%
1
G 9,58 SLP_S5#
(PR779 and PQ741 are for change ACLIm when AC in)
1
BATT_TEMP 58,83 2
135W@ PR336
PR337
S
560P_0402_50V7K
3
0.015U_0402_25V7K
(Rs1 = 10mΩ and Rs2 = 5mΩ or Rs1 = 20mΩ and Rs2 = 10mΩ). L2N7002WT1G_SC70-3 PR333 BATGONE(BATT_TEMP)
1
0_0402_5%
PC321
CC_LIM = VccLIM / 64 x Rs2 logic high: above 2.4V

2
2
@ @ PQ313
PC320
============================================================= logic low: under 0.8V
BA
(Rs1 = 10mΩ and Rs2 = 10mΩ or Rs1 = 20mΩ and Rs2 = 20mΩ). @ LTC015EUBFS8TL_UMT3F
2
2
2
2
3
CC_LIM = VccLIM / 32 x Rs2 65W@ PR336 @
============================================================= 80.6K_0402_1%
AC_LIM = Vac_LIM / 32 x Rs1 BA
+3VS
Hybrid boost power mode

45W@ PR336 Cell = 4s
57.6K_0402_1%
ICClimit : 7.73A
Delta I : 1.44A
1C charge current :6.48A
For 4S per cell 4.35V battery

1
1
ACIN_CHG @ PR343 @ PR342

10K_0402_1% 10K_0402_1%
2
2
1
PR339
2M_0402_1% APU_PROCHOT#_D 28
2 2
@ PQ315A
6
@ PR341 D 2N7002KDW_SOT363-6
0_0402_5% 2
G
1
S
1
@ PQ314
1
RUM001L02_VMT3
A PQ307 APU_PROCHOT# 2 A
PR340 LTC015EUBFS8TL_UMT3F
100K_0402_1%
1 2 2
58 BATT_4S
3
3
1
D
2 PQ308
37,58,78,86 SUSP#
G L2N7002WT1G_SC70-3
S @ PQ315B
3
D 2N7002KDW_SOT363-6
ACIN 5
G
S
4
Issued Date 2018/ 12/18 2019/12/18 Title

Deciphered Date
PWR_CHARGER
5 4 3 2 1
A B C D E
PR402
499K_0402_1%
ENLDO_3V5V 1 2
+19VB
1
150K_0402_1%
PR404
EN1 and EN2 dont't floating
2
PU401
1 +19VB EMI@ PL401 SY8288BRAC_QFN20_3X3 @ PR401 PC401 1
HCB2012KF-121T50_0805 0_0603_5% 0.1U_0603_25V7K
2200P_0402_50V7K
1 2 +19VB_3V BST_3V 1 2 1 2 Choke 2.2uH SH00000YV00 (Common Part)
(Size:7.3 x 6.6 x 3 mm)
10U_0805_25V6K
EMI@ PC431
@EMI@ PC403
EMI@ PC404
0.1U_0402_25V6
0.1U_0402_25V6
1
1
(DCR:14m~16m)
PC405
BS
IN
IN
IN
IN
PL402
2
LX_3V6 20 LX_3V 1 2
LX LX +3VALWP
7 19 2.2UH_9A_20%_7X7X3_M
GND LX
@EMI@
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
PR405
1
1
680P_0402_50V7K 4.7_1206_5%
8 18
+3VALWP GND GND
PC408
PC407
PC409
PC410
@ PC429
@ PC430
9 17
+3VLP
2
PG LDO
1
1 3V_SN
10 16
2
NC NC
1
Check pull up resistor of SPOK at HW side PC411
OUT
EN2
EN1
21 4.7U_0402_6.3V6M
NC
FF
PR406 GND 2
100K_0402_5%
11
12
13
14
15
@EMI@
PC412
2
2
3.3V LDO 150mA~300mA Vout is 3.234V~3.366V
58 SPOK_3V
ENLDO_3V5V PC402 PR403
Ipeak=4.65A
3V_FB
1000P_0402_25V8J1K_0402_5% Imax=3.25A
1 2 1 2
58 3V_EN Iocp=10A
2 2
+19VB +19VB_5V
EMI@ PL403 PU402 @ PR408 PC418
HCB2012KF-121T50_0805 SY8288CRAC_QFN20_3X3 0_0603_5% 0.1U_0603_25V7K
1 2 +19VB_5V BST_5V
1 2 1 2
Choke 1.5uH SH000016700 (Common Part)
1
(Size:7.3 x 6.6 x 3 mm)
BS
IN
IN
IN
IN
(DCR:14m~15m)
EMI@ PC432
0.1U_0402_25V6
1
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
LX_5V 6
0.1U_0402_25V6
20
LX LX PL404
7 19 LX_5V 1 2 +5VALWP
2
GND LX
1
1
1
1
PC415
@EMI@ PC417
PC414
EMI@ PC416
8 18 1.5UH_9A_20%_7X7X3_M
GND GND PC419
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
2
2
2
1
1
1
9 17 1 2
PG VCC
PC422
PR409
PC420
PC421
PC423
@ PC424
@ PC425
4.7_1206_5%
+3VLP
@EMI@
10 16 4.7U_0402_6.3V6M
2
2
2
NC NC
OUT
LDO
EN2
EN1
21
FF
GND
1
2
11
12
13
14
15
PR413
VL
1 5V_SN
100K_0402_5% 1
5V LDO 150mA~300mA
2
680P_0402_50V7K
PC427
58 SPOK_5V ENLDO_3V5V 2
4.7U_0402_6.3V6M Vout is 4.998V~5.202V
PC426
@EMI@
Ipeak=9A
2
5V_EN
Imax=6.6A
3 Iocp=10A 3
PC413 PR407
1000P_0402_25V8J 1K_0402_5%
5V_FB 1 2 1 2
PR410
2.2K_0402_5%
1 2
58 EC_ON
@
PR411
0_0402_5% @ PJ401
1 2 +3VALWP 1 2 +3VALW
58,77 MAINPWON 1 2
JUMP_43X118
5V_EN
1M_0402_1%
4.7U_0402_6.3V6M
1
@ PJ402
1
PR412
PC428
+5VALWP 1 2 +5VALW
1 2
JUMP_43X118
2
2
4 4
Security Classification
2018/ 12/18
Compal Secret Data
2019/12/18 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
3.3VALWP/5VALWP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1A
A B C D E
5 4 3 2 1
0.6Volt +/- 5%
TDC 0.7A
@ PJ504
D 1 2 +19VB_1.2V PR501 Peak Current 1A D
+19VB 1 2 2.2_0603_5%
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
JUMP_43X79 BST_1.2V_R 1 2 BST_1.2V
+1.2VP
0.1U_0402_25V6
0.1U_0402_25V6
1
1
EMI@ PC525
@EMI@ PC501
EMI@ PC502
PC503
PC504
UG_1.2V +0.6VSP
0.1U_0603_25V7K
2
2
LX_1.2V
10U_0603_6.3V6M
10U_0603_6.3V6M
5
1
PC505
AON7408L_DFN8-5
PC506
PC507
16
17
18
19
20
2
PU501
2
PHASE
BOOT
VTT
UGATE
VLDOIN
4 21
PAD
PQ501
LG_1.2V 15 1
LGATE VTTGND
1
2
3
14 2
PL503 PR502 PGND VTTSNS
1UH_6.6A_20%_5X5X3_M 24.9K_0402_1%
1 2 1 2 CS_1.2V 13 3
+1.2VP PC508 CS RT8207PGQW_WQFN20_3X3 GND
1
1U_0402_10V6K
VTTREF_1.2V
AON7506_DFN3X3-8-5
1 2 12 4
VDDP VTTREF
5
@EMI@ PR503 PR504
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
4.7_1206_5% 5.1_0603_5%
1
1 2 1 2 VDD_1.2V 11 5
+5VALW VDD VDDQ +1.2VP
1
PC516
PC511
PC512
PC513
PC514
PC515
PGOOD
PC510 2 1 PC509
TON
2
PQ502
C @EMI@ PC517 4 1U_0402_10V6K 0.033U_0402_16V7K C
FB
S5
S3
2
2
680P_0402_50V7K 2 1 @ PD501
2
RB751V-40_SOD323-2
10
6
PR505
2.2_0603_5%
1
2
3
FB_1.2V
TON_1.2V
1
EN_0.6VSP
EN_1.2V
PR506
6.19K_0402_1%
+5VALW PR507 1 2 +1.2VP
470K_0402_1%
+19VB_1.2V 1 2
H/S AON7408 Rds(on) :typ:27mOhm, max:34mOhm
1
Mode Level +0.6VSP VTTREF_1.2V Idsm(TA=25)=7.5A, Idsm(TA=70)=5.5A
S5 L off off
@
PR509 PR508 0.75*(1+6.19/10)=1.21
S3 L off on L/S AON7506 Rds(on) :typ:13mOhm, max:15.8mOhm 0_0402_5% 10K_0402_1%
S0 H on on Idsm(TA=25)=12A, Idsm(TA=70)=10.5A 58 SYSON
1 2
2
Note: S3 - sleep ; S5 - power off
1
Choke: 5x5x3 @ PC518
Rdc=13mohm(Typ), 14mohm(Max) 0.1U_0402_10V7K
2
Switching Frequency: 530kHz
@
Ipeak=9.5A PR510
0_0402_5%
Iocp~11.4A 1 2 @ PJ501
OVP: 110%~120% 37,58,78,84 SUSP# 1 2
+1.2VP 1 2 +1.2V
1
JUMP_43X118
@ PC519
+5VALW 0.1U_0402_10V7K
2
B B
+3VALW
Due to buyer command. @ PJ502
1 2
PC508,PC510 need change to SE00000QL10. +0.6VSP 1 2 +0.6VS
@ PJ505 Because 0603 change to 0402, PVT need change footprint. JUMP_43X39
1
1 2 VIN_2.5V
1 2
1
PC524
JUMP_43X39 1U_0201_6.3V6M
2
PC521
2
4.7U_0402_6.3V6M @ PJ503
1 2
+2.5VP 1 2 +2.5V
JUMP_43X39
PU502 G9661MF11U_SO8
@
PR515 4 5
0_0402_5% 3 VDD NC 6
SYSON 1 2 EN_2.5V 2 VIN VOUT 7 +2.5VP
GND
EN ADJ 8
22U_0603_6.3V6M
0.01U_0402_25V7K
1
PGOOD GND
1
0.1U_0402_16V7K
PC522
PR512
9
1
1
PC520
PC523
PR511
21.5K_0402_1%
Rup
2
1M_0402_5%
2
2
2
@ FB_2.5V
1
PR513
10K_0402_1%
Rdown
2
A A
Vout=0.8V* (1+(21.5/10)) = 2.52V 0.8%

1.2VP/0.6VSP/2.5VP
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 1A
5 4 3 2 1
5 4 3 2 1
D D
@ PJ601
+0.9VALWP 1 2
1 2 +0.9VALW
JUMP_43X118
EN pin don't floating

If have pull down resistor at HW side, pls delete PR2
LDO_VDDP +19VB @ PJ604 PU601

1 2 +19VB_VDDP 2 9 @ PR603 PC602 @EMI@ PR602 @EMI@ PC603
1 2 IN PG 0_0603_5% 0.1U_0603_25V7K 4.7_1206_5% 680P_0402_50V7K
1
3 1 BST_VDDP 1 2 1 2 1 2SNB_VDDP 1 2
0.1U_0402_25V6
0.1U_0402_25V6
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_50V7K
1
1
JUMP_43X79 IN BS
EMI@ PC623
@EMI@ PC604
@ PR604 4 6
EMI@ PC601
IN LX
0_0402_5%
2
5 19 PL602
PC605
PC622
2
ILMT_VDDP IN LX 1UH_6.6A_20%_5X5X3_M
7 20 LX_VDDP 1 2
+0.9VALWP
1
GND LX
8 14 FB_VDDP
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
@ PR605 GND FB
330P_0402_50V7K
1
0_0402_5% @ PR601 18 17 LDO_VDDP
1
0_0402_5% GND VCC
PC606
PC607
PC609
PC611
PC608
PC610
2
1
58 0.9_1.8VALW_PWREN 1 2 11 10 PC612 PR610
PC613
2
EN NC 2.2U_0402_6.3V6M 10_0402_1%
ILMT_VDDP 13 12
2
ILMT NC
2
1
15 16
PR607
1
@ PC614 +3VALW BYP NC
1M_0402_1% 0.22U_0402_10V6K 21 PR606
1
PAD 13.7K_0402_1% 1 2
2
PC615 SY8288RAC_QFN20_3X3 1 2 VR_ON 58,88

2
1U_0201_6.3V6M @ PR623
2
0_0402_5%
C FB = 0.6V
(R1) C
1 2 1 3
APU_VDDP_SEN_H 8
1
@ PR622
PR609 0_0402_5% @ PQ601
(R2) 24.3K_0402_1% LSK3541G1ET2L_VMT3
2
1 2
APU_VDDP_SEN_L 8
@ PR621
0_0402_5%
VFB=0.6V
Vout=0.6V*(1+R1/R2)=0.9V
@
PR611
0_0402_5%
1 2
0.9_1.8VALW_PWREN 58,87
FB=0.6V
0.1U_0402_16V7K
1
1
PR612
Note:Iload(max)=3.5A 1M_0402_5%
PC616
Note:Iload(max)=2.5A
2
PU602 @
9
1 PGND 8
FB SGND
B B
2 7 PL603
@ PJ602 PG EN 1UH_2.8A_30%_4X4X2_F
+3VALW 1 2IN_1.8VALW 3 6 LX_1.8VALW 1 2
1 2 IN LX +1.8VALWP
4 5
68P_0402_50V8J
1
JUMP_43X79 PGND NC @ PJ603

@EMI@ PR613
4.7_0603_5%
+1.8VALWP
1
1 2
PC618
22U_0603_6.3V6M
22U_0603_6.3V6M
1 2 +1.8VALW
1
SY8003ADFC_DFN8_2X2 PR614
PC617 20K_0402_1%
Rup
PC619
PC620
2
22U_0603_6.3V6M JUMP_43X79
2
FB_1.8VALW
1
680P_0402_50V7K
FB=0.6V
@EMI@ PC621
1
Note:Iload(max)=3A PR615
Rdown
10K_0402_1%
2
2
Note:
When design Vin=5V, please stuff snubber Vout=0.6V* (1+Rup/Rdown)
to prevent Vin damage
A A

0.9VALW/1.8VALW
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 1A
5 4 3 2 1
5 4 3 2 1
Module model information

RT8880C_CZ35W_V2A.mdd for IC portion
8 APU_VSS_SEN_L APU_CORE_SEN_H 8 RT8880C_CZ35W_V2B.mdd for SW portion +19VB_CPU

+5VS +5VS +19VB_CPU
PR817 EMI@ PL801
ISEN3N_CPU
ISEN3P_CPU
1
0_0603_5% NA_2P
PR801 PR802 PC802 UG2_CPU 1 2 UG2_CPU_R 1 2
10_0402_5% 10_0402_5% 0.01U_0402_50V7K +19VB
CORE SW= 430KHz
2
1 2 1 2 EMI@ PL802
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
+APU_CORE
33U_25V_NC_6.3X4.5
33U_25V_NC_6.3X4.5
NA_2P
@EMI@ PC821
@EMI@ PC822
1 1
2200P_0402_50V7K
1 2
1
+ +
15W_CPU@ PR844
35W_CPU@ PR843
35W_CPU@ PR845
15W_CPU@ PR846
PC819
PC818
PC820
PC834
88.7K_0402_1%
2
2
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
2
2 2
PR807
D D
2
LL CORE(Rdroop)=2.079m
1 2
G1
D1
1
1
PR820 PC824
@ PC801 2.2_0603_5% 0.22U_0603_25V7K
330P_0402_50V7K BST2_CPU1 2 BST2_CPU_R1 2 7 PQ802
PR805 PR806 D2/S1 AON6962_DFN5X6D-8-7
10K_0402_1% 52.3K_0402_1% PL804
1 2 1 2 2 1 0.22UH_24A_20%_ 7X7X4_M
G2
S2
S2
S2
+5VS LX2_CPU 1 4
15W_CPU@ PR848 +APU_CORE APU_core
3
PC807 PC808 0_0402_5% ISEN2P_CPU_R2 3
@EMI@ PR824
4.7_1206_5%
270P_0402_50V7K 68P_0402_50V8J 2 1 PW M3_CPU TDC 35A (15W & 25W), 53A (35W)
1
1 2 1 2 PR826
35W_CPU@ PR847 LG2_CPU 2.7K_0402_1%
EDC 45A (15W & 25W), 70A (35W)
0_0402_5% 1 2 1 2 OCP current 63A (15W & 25W), 98A (35W)
PC825 Load line -0.7mV/A
680P_0402_50V7K
1 2
SNB_APU 0.1U_0402_25V6 FSW=430kHz
@EMI@ PC826
ISEN3N_CPU_IC
ISEN3P_CPU_IC
PWM3_CPU_IC
TONSET_CPU
ISEN1N_CPU
ISEN2N_CPU
ISEN1P_CPU
ISEN2P_CPU
DCR 0.98mohm +/-5%
COMP_CPU
BST2_CPU
UG2_CPU
TYP MAX
FB_CPU
2
H/S Rds(on) :11.7mohm , 14mohm
L/S Rds(on) :2.7mohm , 3.3mohm
PU801
Iocp_spikea = (3.19375 - 0.64)* PR755/ (2*DCR*Rimona)
13
12
11
10
1
RT3663BCGQW _W QFN52_6X6
ISEN2N_CPU_R
ISEN2P_CPU
TONSET
PWM3
BOOT2
UGATE2
VSEN
ISEN3N
ISEN1N
ISEN2N
COMP
FB
ISEN3P
ISEN1P
ISEN2P
Iocp_TDCA has relation between ocp_spikea and ΔVSET1 +5VALW
53 PR811
ΔVSET1 = +5VS*( PR788//PR784 ) GND 2.2_0402_5% PR830
14 52 LX2_CPU PVCC_CPU 1 2 1.1K_0402_1%
RGND PHASE2 ISEN2N_CPU 1 2
IMON_CPU 15 51 LG2_CPU
0.1U_0402_25V6
IMON LGATE2 VCC_CPU 1 2
PC832
1
+1.8VS VREF_CPU 16 50 PVCC_CPU
V064/SET3 PVCC PR812
2.2U_0603_10V6K
2.2U_0603_10V6K
1
1
IMONA_CPU17 49 LG1_CPU 10_0603_5% @
PC814
PC815
2
IMONA LGATE1
SVD_CPU and SVC_CPURC filter put CPU side. 1 2 PC813 18 48 LX1_CPU
SVT_CPU RC filter put controller side.
2
1U_0201_6.3V6M VDDIO PHASE1
15W_CPU@ 19 47 UG1_CPU
8 APU_PW ROK PWROK UGATE1
PR816
16.5K_0402_1% APU_SVC 20 46 BST1_CPU
C 8 APU_SVC SVC BOOT1 C
APU_SVD 21 45 LG1_NB PR838 +19VB_CPU
8 APU_SVD SVD LGATEA1 0_0603_5% 35W_CPU@
1 2APU_SVT 22 44 LX1_NB UG1_CPU 1 2 UG1_CPU_R PR853
8 APU_SVT_R SVT PHASEA1 +19VB_CPU
0_0603_5%
PR815 23
0_0402_5% 43 UG1_NB UG3_CPU 1 2 UG3_CPU_R
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
15W_CPU@ OFS UGATEA1
@EMI@ PC809
@EMI@ PC810
2200P_0402_50V7K
2
PR821 35W_CPU@ 24 42 BST1_NB 35W_CPU@ 35W_CPU@
35W_CPU@ PC847
35W_CPU@ PC848
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
2200P_0402_50V7K
OFSA BOOTA1
1
8.66K_0402_1% PR816 PR818 PR860 PC846
PC839
PC840
@EMI@ PC816
@EMI@ PC817
25.5K_0402_1% SET1_CPU 25 41 PR819 2.2_0603_5% 0.22U_0603_25V7K
7.87K_0402_1% SET1 PWMA2 +5VS
1
100K_0402_1% 1 2 BST3_CPU_R 1 2
2
1
2
SET2_CPU 26 40 1 2 +19VB_CPU
BST3_CPU
1
SET2 TONSETA
PGOODA
ISENA2N
ISENA1N
ISENA2P
ISENA1P
G1
D1
2
PGOOD
COMPA
PL805 35W_CPU@
VSENA
35W_CPU@ PR839 PC841 35W_CPU@ PQ805
OCP_L
2
IBIAS
PR821 PR822 2.2_0603_5% 0.22U_0603_25V7K 0.22UH_24A_20%_ 7X7X4_M PU802 AON6962_DFN5X6D-8-7

VCC
FBA
BST1_CPU1 2 BST1_CPU_R
EN
15W_CPU@ 12.1K_0402_1% 5.9K_0402_1% 1 2 7 PQ804 1 4
G1
D1
D2/S1 +APU_CORE
PR825 1 2 1 2 AON6962_DFN5X6D-8-7 4 3 35W_CPU@ PL806
ISEN1P_CPU_R BOOT UGATE
100K_0402_1%_B25/50 4250K
17.8K_0402_1% 2 3 0.22UH_24A_20%_ 7X7X4_M
@EMI@ PR840
4.7_1206_5%
27
28
1 IBIAS_CPU 29
COMPA_CPU 30
31
32
33
34
35
36
37
38
39
PW M3_CPU LX3_CPU
100K_0402_1%_B25/50 4250K
Confirm HW side the pull high resistor 5 2 7 1 4
G2
S2
S2
S2
1
1
LX1_CPU PR841 PWM PHASE D2/S1
@EMI@ PR855
VGATE 58 +APU_CORE
VCC_CPU
ISEN3P_CPU_R
ISENA1N_CPU
ISENA1P_CPU
35W_CPU@ PR823 2.7K_0402_1% 1 6 2 3
PH801
PH802
4.7_1206_5%
6
3
FBA_CPU
PR825 20.5K_0402_1% 1 2 1 2 EN PGND 35W_CPU@
G2
S2
S2
S2
1
PR859 14.3K_0402_1% 8 7 LG3_CPU PR856
APU_PROCHOT# 8,58,84 +5VS VCC LGATE
43K_0402_1% 1 2 PC842 9 2.7K_0402_1%
680P_0402_50V7K
+3VS
1 2
2
3
VCC_CPU 1 2 VREF_CPU LG1_CPU SNB_APU2 0.1U_0402_25V6 GND 1 2 1 2
PC843
Pull high at HW side
2
PR828 35W_CPU@ RT9610CGQW_W DFN8_2X2
100K_0402_1%
48.7K_0402_1%
2
1 +5VS 100K_0402_5% PC845 35W_CPU@
680P_0402_50V7K
1 2
0.47U_0402_6.3V6K
0.47U_0402_6.3V6K
VR_ON 58,87 1U_0603_10V6K SNB_APU3 PC850

PR858
PR827
PC849
2
1
1
1
PC852 0.1U_0402_25V6
@EMI@
PC828
PC827
2
0.022U_0402_25V7K EN: high > 2V, Low < 0.8V
Can't be floating.
1
2
2
2
@ @
@EMI@
0.1U_0402_25V6
1
ISEN1N_CPU_R
1
PC829 PC830 @ PR829
PC831
68P_0402_50V8J 330P_0402_50V7K ISEN1P_CPU
10K_0402_5%
PC852靠IC Pin16 1 2 1 2
ISEN3N_CPU_R
2
@
2
ISEN3P_CPU
Iocp_spike = (3.19375 - 0.64)* PR709/ (DCR*Rimon) PR842
PR831 PR832 1.1K_0402_1%
110K_0402_1% 10K_0402_1% ISEN1N_CPU 1 2
Iocp_TDC has relation between ocp_spike and ΔVSET1 1 2 1 2 35W_CPU@ PR857
@ PC833 1.1K_0402_1%
0.1U_0402_25V6
1
330P_0402_50V7K ISEN3N_CPU 1 2
PC844
ΔVSET1 = +5VS*( PR788//PR784 ) 1 2
B B
0.1U_0402_25V6
2
1
@
@35W_CPU@ PC851
SVD and SVC RC filter put CPU side.
2
SVT RC filter put controller side.
APU_SVC
LL_SOC(Rdroop)=3.992m
APU_VSS_SEN_L
+19VB_CPU
APU_SVD PR803
0_0603_5%
1
UG1_NB 1 2UG1_NB_R
@ PC854 PC855 @
10P_0402_25V8J 10P_0402_25V8J
10U_0805_25V6K
10U_0805_25V6K
2
1
1
APU_SVT_R PR833
PC804
PC803
10_0402_5%
1
1 2
SET1_CPU
+APU_CORE_SOC
2
2
PC853 @
1
2
10P_0402_25V8J PR834 PR835
2
8.2K_0402_1% 124K_0402_1% PC838
G1
D1
1 2 1 2 0.01U_0402_50V7K PR804 PC805 PQ801 PL803 +APU_CORE_SOC
2
2.2_0603_5% 0.22U_0603_25V7K AON6962_DFN5X6D-8-7 0.22UH_24A_20%_ 7X7X4_M

PR836 PR837 VCC_CPU
BST1_NB
1 2 BST1_NB1_R
1 2 7
D2/S1
1 4
+APU_CORE_SOC TDC 10A (15W & 25W &35W)
APU_CORESOC_SEN_H
470_0402_1% 33K_0402_1%
1 2 1 2 ISENA1P_CPU_R 2 3 EDC 13A (15W & 25W &35W)
1
PR809 OCP current 18.2A (15W & 25W &35W)
G2
PC811 @EMI@ PR808

S2
S2
S2
680P_0402_50V7K 4.7_1206_5%
LX1_NB 2.7K_0402_1%
SET2_CPU
1 2 1 2 Load line -2.1mV/A
3
PC806
FSW=400kHz
2
0.1U_0402_25V6 DCR 0.98mohm +/-5%
LG1_NB SNB_APU_NB
TYP MAX
1
H/S Rds(on) :11.7mohm , 14mohm
2
@EMI@
ISENA1N_CPU-1
ISENA1P_CPU
ISENA1N_CPU 1 2
A A
PR810
0.1U_0402_25V6
1
845_0402_1%
PC812
2
@

+APU_CORE
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
A
B
C
D
2
1
+
PC9095
330U_D2_2V_Y PC9048 PC9029 PC9001
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2
1
+
2 1 2 1 2 1 2 1 2 1
Under CPU PC9096
220U_D7_2VM_R4.5M PC9081 PC9056 PC9052 PC9030 PC9002
180P_0402_50V8J 0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2
1
+
2 1 2 1 2 1 2 1
+APU_CORE
@
Bot PC9097
5
5
+APU_CORE
330U_D2_2V_Y PC9057 PC9046 PC9031 PC9003

0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2
1
+
2 1 2 1 2 1 2 1
PC9098
330U_D2_2V_Y PC9058 PC9050 PC9032 PC9004
0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2
1
+
2 1 2 1 2 1 2 1
PC9094
330U_D2_2V_Y PC9059 PC9051 PC9033 PC9005
0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1
PC9060 PC9047 PC9034 PC9006

0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1
2
1
+
Under CPU PC9021 PC9061 PC9049 PC9035 PC9007
220U_D7_2VM_R4.5M 0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1
PC9062 PC9036 PC9008

0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1
+APU_CORE
PC9063 PC9037 PC9009

0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1
PC9038 PC9010
22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1
4
4
180pF*1
22uF*27
330uF*5
0.22uF*8
APU_CORE
330u is common part SGA00009S00
Issued Date
3
3
2018/ 12/18
2
1
+
PC9099 PC9039 PC9011

330U_D2_2V_Y 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1
2
1
+
2 1 2 1
PC9100 PC9040 PC9012
near CPU
330U_D2_2V_Y PC9082 PC9064 22U_0603_6.3V6M 22U_0603_6.3V6M

180P_0402_50V8J 0.22U_0402_16V7K 2 1 2 1
2 1
PC9041 PC9013
PC9065 22U_0603_6.3V6M 22U_0603_6.3V6M
0.22U_0402_16V7K 2 1 2 1
2 1
PC9042 PC9014
+APU_CORE_SOC
PC9066 22U_0603_6.3V6M 22U_0603_6.3V6M
Compal Secret Data

Deciphered Date
0.22U_0402_16V7K 2 1 2 1
2 1
PC9043 PC9015
PC9067 22U_0603_6.3V6M 22U_0603_6.3V6M
180pF*1
22uF*18
330uF*2
0.22uF*8
0.22U_0402_16V7K 2 1 2 1
2 1
PC9044 PC9016
PC9068 22U_0603_6.3V6M 22U_0603_6.3V6M
0.22U_0402_16V7K 2 1 2 1
2
2
2 1
PC9045 PC9017
2019/12/18
PC9069 22U_0603_6.3V6M 22U_0603_6.3V6M

APU_CORE_SOC
0.22U_0402_16V7K 2 1 2 1
2 1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PC9053 PC9018
330u is common part SGA00009S00
PC9070 22U_0603_6.3V6M 22U_0603_6.3V6M

0.22U_0402_16V7K 2 1 2 1
2 1
PC9019
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
PC9071 22U_0603_6.3V6M
0.22U_0402_16V7K 2 1
PC9020
Size
Title
Date:
+APU_CORE_SOC
22U_0603_6.3V6M
2 1
Custom
Document Number
W ednesday, May 15, 2019

1
1
Sheet
FH50P M/B LA-H901P
90
+APU_CORE Cap
of
99
Rev
1A
A
B
C
D
5 4 3 2 1
D D
C C
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
VGA_EMI@ PL1406
FBMA-L11-201209-800LMA50T
1 2
GPU_B+ GPU_B+
VGA@ PC1401 VGA@ PR1405
330P_0402_50V7K 2K_0402_1% +19VB
2 1 2 1
2200P_0402_50V7K
32 GPU_VDDCI_SEN
GPU_UGATE1
VGA@ PR1407 VGA@ PR1408 VGA@ PC1409 @ PR1409
@EMI@ PC1432
VGA_EMI@ PC1433
10U_0805_25V6K
0.1U_0402_25V6
1K_0402_1% 37.4K_0402_1% 390P_0402_50V7K 32.4K_0402_1%
GPU_UGATE2
10U_0805_25V6K
1
1
2 1 2 1 2 1 2 1
VGA_EMI@ PC1420
VGA@ PC1435
VGA@ PC1431
2200P_0402_50V7K
0.1U_0402_25V6K
@EMI@ PC1419
10U_0805_25V6K
10U_0805_25V6K
VGA@
VGA@ PC1417
VGA@ PC1418
2
1
1
PR1401 @VGA@ PR1410 VGA@ PC1410 VGA@ PC1411
100_0402_1% 0_0402_5% 1000P_0402_50V7K 220P_0402_50V8J
2 1 1 2 2 1 2 1 2 1
+VDDCI
2
60W_VGA@ PL1403 60W_VGA@ PL1404
2
@ PC1412 VGA@ PR1411 0.22UH_MMD-06DZER22MEM2L__32A_20% 0.22UH_MMD-06DZER22MEM2L__32A_20%
G1
D1
VSUMP_NB 1000P_0402_50V7K 301_0402_1% VGA@ PR1444 VGA@ PC1441
G1
D1
1
VGA@ PR1425 VGA@ PC1425 2.2_0603_5% 0.22U_0603_25V7K VGA@ PQ1403

2 1 VGA@ PR1468 2.2_0603_5% 0.22U_0603_25V7K GPU_BOOT1 1 2 1 2 7 AON6962_DFN5X6D-8-7
VGA@ PR1412
(DCR:0.98± 5%)
2.61K_0402_1%
GPU_BOOT2 D2/S1
10K +-5% 0402 B25/50 4250K
100K_0402_1% 1 2 1 2 7 VGA@ PQ1402

D
1 2 D2/S1 AON6962_DFN5X6D-8-7 25W_40W_50W_VGA@
D
+3VS
.047U_0402_16V7K
0.022U_0402_25V7K
2
PL1404
G2
VGA@ PR1413
VGA@ PC1413
VGA@ PC1414
S2
S2
S2
(DCR:0.98± 5%)
2
2
GPU_PHASE1 0.22UH_24A_20%_ 7X7X4_M
G2
S2
S2
S2
11K_0402_1%
25W_40W_50W_VGA@ 1 4
3
1
VDDCI_PG 27 PL1403 +VGA_CORE

VGA@
PH1401
3
60W@ 0.22UH_24A_20%_ 7X7X4_M VGA@ PR1438 2 3
1
PR1414 FCCM_NB GPU_PHASE2 1 4 10K_0402_1%

+VGA_CORE GPU_LGATE1
1
2.74K_0402_1% EMI@ PR1437 GPU_ISEN11 2
VSUMN_NB 2 1 VGA@ PR1420 2 3 4.7_1206_5%
1 2
1
10K_0402_1% VGA@ PR1442
1
@ PR1416 @ PC1423 25W_40W_50W_60W_VGA@ VGA@ PR1415 EMI@ PR1419 GPU_ISEN21 2 3.65K_0603_1%
VGA@ PC1422 100_0402_1% 220P_0402_50V7K PR1417 10K_0402_1% 41.2K_0402_1% GPU_LGATE2 4.7_1206_5% VSUM+ 1 2
1 2
0.1U_0603_25V7K 2 1 2 1 2 1 GPU_LGATE3 VGA@ PR1423
2
3.65K_0603_1% EMI@ PC1442 PR1445
2
M260_VGA@ GPU_PHASE3 VSUM+ 1 2 680P_0402_50V7K 10_0402_1%
1 2
PR1466 0_0402_5% VSUM- 1 2
2
1 2 GPU_UGATE3 EMI@ PC1426 PR1426
+5VALW Due to buyer command.
After rev1.1 must change to 133k 680P_0402_50V7K 10_0402_1% VGA@
PC1428,PC1429 need change to SE00000QL10. VSUM- 1 2
2
Because 0603 change to 0402, PVT need change footprint.
48
47
46
45
44
43
42
41
40
39
38
37
2
PU1401 VGA@
2
VGA@ PR1418
ISEN1_NB
ISUMP_NB
ISUMN_NB
VSEN_NB
FB_NB
COMP_NB
PGOOD_NB
FCCM_NB
PWM2_NB
LGATEX
PHASEX
UGATEX
133K_0402_1% VGA@ PC1424 VGA_EMI@ PL1407
1000P_0402_25V6K FBMA-L11-201209-800LMA50T
1
VGA@ PR1421 VGA@ PR1422 1 36 GPU_BOOT3 @VGA@ PR1424 GPU_B+ 1 2

+5VALW
1
27.4K_0402_1% 10.5K_0402_1% ISEN2_NB BOOTX 0_0603_5%

2 1 2 1 2 35 2 1 GPU_B1+
NTC_NB VIN
VGA@ PH1402 3 34 GPU_BOOT2
IMON_NB BOOT2 +19VB
1
470K_0402_5%_TSM0B474J4702RE
2200P_0402_50V7K
GPU_SVC GPU_UGATE2
40W_50W_60W_VGA_EMI@
2 1 4 33 VGA@ PC1427
@EMI@ PC1405
SVC UGATE2
40W_50W_60W_VGA@
40W_50W_60W_VGA@
0.22U_0603_25V7K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
2
5 32 GPU_PHASE2
GPU_UGATE3
1
VR_HOT_L PHASE2
PC1403
PC1404
PC1406
28 GPU_PROCHOT#
2
VGA@ PR1467 GPU_SVD 6 31 GPU_LGATE2 @VGA@ PR1428

2.2_0402_5% SVD S IC ISL6277AHRZ-T QFN 48P LGATE2 0_0603_5%
2
VGA@ PR1427 1 2 VGA_VDDIO 7 30 2 1
VDDIO VDDP +5VALW
100K_0402_1% +1.8VSDGPU
1
GPU_SVT-1 8 29 2 1
1
VGA@ PC1468 @VGA@ PR1431 SVT VDD VGA@ PR1430

+3VS GPU_PW M3
1U_0402_10V6K 1
0_0402_5% 2ENABLE 9 28 1_0603_5% 60W_VGA@ PL1405
37 VGA_ON_B VGA_CORE
2
ENABLE PWM_Y 0.22UH_MMD-06DZER22MEM2L__32A_20%
VGA@ PC1428
VGA@ PC1429
1U_0402_10V6K
1U_0402_10V6K
1
2
VGA@ PR1433 27 DGPU_PWROK
DGPU_PWROK 10
PWROK LGATE1
27 GPU_LGATE1 TDC 30A (25W), 47A (40W), 55A (50W), 60A (60W)
133K_0402_1% 40W_50W_60W_VGA@40W_50W_60W_VGA@
EDC 45A (25W), 80A (40W), 105A (50W), 140A (60W)
G1
D1
1 2 11 26 GPU_PHASE1 PR1404 PC1407 40W_50W_60W_VGA@
2
IMON PHASE1
After rev1.1 must change to 133k
2 1 12 25 GPU_UGATE1 GPU_BOOT3 1
2.2_0603_5%
2
0.22U_0603_25V7K
1 2 7
PQ1401 OCP current 63A (25W), 120A (40W), 147A (50W), 200A (60W)
VGA@ PC1434 AON6962_DFN5X6D-8-7
NTC UGATE1 D2/S1 Load line -0.6mV/A
PGOOD
1000P_0402_25V6K VGA@ PR1434
BOOT1
(DCR:0.98± 5%)
ISUMN
ISUMP
COMP
ISEN3
ISEN2
ISEN1
VSEN
1 2 10.5K_0402_1% FSW=400kHz
RTN
FB2
40W_50W_VGA@
G2
FB
TP
S2
S2
S2
C C
VGA@ PR1435 25W_VGA@ PR1465 PL1405 DCR 0.98mohm +/-5%
27.4K_0402_1% 0_0402_5% GPU_PHASE3 0.22UH_24A_20%_ 7X7X4_M TYP MAX
13
14
15
16
17
18
19
20
21
22
23
24
49
3
2 1 1 2 1 4
+5VALW
40W_50W_60W_VGA@ VGA@ PR1436 40W_50W_60W_VGA@ +VGA_CORE H/S Rds(on) :11.7mohm , 14mohm
GPU_ISEN3
GPU_ISEN2
GPU_ISEN1
VGA@ PH1403 PC1436 100K_0402_1% PR1460 2 3

1
470K_0402_5%_TSM0B474J4702RE 0.22U_0402_6.3V6K 1 2 EMI@ PR1402 10K_0402_1%
GPU_BOOT1 +3VS GPU_LGATE3 GPU_ISEN3
2 1 2 1 4.7_1206_5% 1 2
40W_50W_60W_VGA@
VGA@ PC1437 DGPU_PWRGOOD 10,27,94 PR1461
0.22U_0402_6.3V6K 3.65K_0603_1%
1 2
2 1 VSUM+ 1 2
EMI@ PC1408
VGA@ PC1438 680P_0402_50V7K PR1462
0.22U_0402_6.3V6K 10_0402_1%
2
2 1 VSUM- 1 2
VGA@
VSUM+
1
VGA@ PC1439 VGA@ PR1440 VGA@ PC1440 @ PR1441 VGA_EMI@ PL1408

VGA@ PR1439
2.61K_0402_1%
10K +-5% 0402 B25/50 4250K
1000P_0402_25V6K 301_0402_1% 180P_0402_50V8J 32.4K_0402_1% FBMA-L11-201209-800LMA50T

2 1 2 1 2 1 2 1 1 2
PC1443
330P_0402_50V7K
0.047U_0402_25V7K
VGA@ PR1443
VGA@ PC1446
2
25W_VGA@ GPU_VDDCI
11K_0402_1%
1 2
25W_VGA@ PR1446 VGA@ PR1447 VGA@ PC1445

VGA@ PH1404
PC1444 1K_0402_1% 137K_0402_1% 390P_0402_50V7K +19VB

0.15U_0603_25V7K 2 1 2 1 2 1
VGA@
1
25W_40W_50W_60W_VGA@
25W_40W_50W_60W_VGA@
25W_VGA@
25W_40W_50W_60W_VGA_EMI@
1
PR1448
2200P_0402_50V7K
665_0402_1% VGA@ PR1449 VGA@ PC1447
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
2
VSUM- 2 1 2K_0402_1% 680P_0402_50V7K
1
2 1 2 1
@EMI@
PC1463
PC1462
PC1461
PC1460
1
@ PR1450 @ PC1449
2
VGA@ PC1448 100_0402_1%820P_0402_50V7K VGA@ PR1451
0.1U_0603_25V7K 2 1 2 1 100_0402_1% +VDDCI
2
SVD and SVC RC filter put VGA side. 2 1 +5VS

+VGA_CORE
SVT RC filter put controller side. @VGA@ PR1452 TDC 8A (25W & 40W & 50W & 60W)
0_0402_5%
EDC 12A (25W & 40W & 50W & 60W)
5
1 2 GPU_VDDC_SEN 32 25W_40W_50W_60W_VGA@
PQ1404 OCP current 18A (25W &50W)
1
25W_40W_50W_60W_VGA@ AON6380_DFN5X6-8-5
FSW=400kHz
2
40W_50W_60W_VGA@ 40W_VGA@ 40W_VGA@ @VGA@ PR1453 PC1465 25W_40W_50W_60W_VGA@
0.01UF_0402_25V7K
PC1444 PR1448 PR1446 0_0402_5% 1U_0402_10V6K PC1466 DCR 8.4mohm +/-5%
2
0.22U_0603_25V7K 732_0402_1% 1.24K_0402_1% 1 2 GPU_VSS_SEN_L 32 0.22U_0603_16V7K UGATE_NB1 4
28 GPU_SVC
1 1
TYP MAX
VGA@ PC1450
VGA@ PR1454 H/S Rds(on) :8.2mohm , 10.5mohm

1
100_0402_1% 25W_40W_50W_60W_VGA@
28 GPU_SVD
2 1 25W_40W_50W_60W_VGA@ PR1464 L/S Rds(on) :2.8mohm , 3.5mohm
3
2
1
PU1402 2.2_0603_5%
2
B UGATE_NB1 B
6 1 25W_40W_50W_60W_VGA@ chock 7*7*1.8 SH00000PX00 SH000016400
2
50W_VGA@ 50W_VGA@ VCC UGATE 0.47UH_PCMB061H-R47MS_11A_20%
PR1448 PR1446 FCCM_NB 7 2 BOOT_NB1
FCCM BOOT PL1402
1
825_0402_1% 1.43K_0402_1%
@ PC1471 PC1469 @ GPU_PW M3 3 8 PHASE_NB1 1 2
PWM PHASE
10P_0402_25V8J 10P_0402_25V8J +VDDCI
2
4 5 LGATE_NB1
GND LGATE
9
TP 從從從從從
1
25W_40W_50W_60W_VGA@
ISL6208BCRZ-T_QFN8_2X2 PQ1405 25W_40W_50W_60W_VGA@
60W_VGA@ 60W_VGA@ AON6314_N_DFN56-8-5 EMI@ PR1463 PR1403
1 2 GPU_SVT-1 PR1448 PR1446 4.7_1206_5% 3.65K_0603_1%
28 GPU_SVT VSUMP_NB 1
1.13K_0402_1% 1.87K_0402_1% 2
1 2
PR1469 0_0402_5% 4
EMI@ PC1467 PR1406
1
680P_0402_50V7K 10_0402_1%
PC1470 @ VSUMN_NB 1 2
2
10P_0402_25V8J
2
3
2
1
VGA@
A A

+VGA_CORE / +VDDCI
5 4 3 2 1
A
B
C
D
@VGA@ PC1523 VGA@ PC1517 VGA@ PC1507
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1
VGA@ PC1540
+VGA_CORE
220U_D2 SX_2VY_R9M @VGA@ PC1525 VGA@ PC1518 VGA@ PC1508
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2
1
+
2 1 2 1 2 1
5
5
60W_VGA@ PC1539 @VGA@ PC1524 VGA@ PC1519 VGA@ PC1509

+VGA_CORE
330U_D1_2VY_R9M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

2 1 2 1 2 1
2
1
+
@VGA@ PC1522 VGA@ PC1520 VGA@ PC1510
VGA@ PC1501 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
220U_D2 SX_2VY_R9M 2 1 2 1 2 1
2
1
+
VGA@ PC1521 VGA@ PC1511
22U_0603_6.3V6M 22U_0603_6.3V6M
VGA@ PC1502 2 1 2 1
220U_D2 SX_2VY_R9M
VGA@ PC1543 VGA@ PC1512
2
1
+
2.2U_0402_6.3V6M 22U_0603_6.3V6M
2 1 2 1
VGA@ PC1504
220U_D2 SX_2VY_R9M VGA@ PC1544 VGA@ PC1513
2.2U_0402_6.3V6M 22U_0603_6.3V6M
2
1
+
2 1 2 1
Non 60W_VGA@
PC1505 VGA@ PC1514
220U_D2 SX_2VY_R9M 22U_0603_6.3V6M
2 1
2
1
+
VGA@ PC1515
22U_0603_6.3V6M
2 1
VGA@ PC1516
22U_0603_6.3V6M
4
4
2 1
330U_D1_2VY_R9M
60W_VGA@ PC1505
Issued Date
3
3
2018/ 12/18
Compal Secret Data
Deciphered Date
2019/12/18
2
2
+VDDCI
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
25W_40W_50W_60W_VGA@ PC1545
330U_D1_2VY_R9M
2
1
+
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Title
Date:
@25W_40W_50W_60W_VGA@ PC1546
22U_0603_6.3V6M
2 1
@25W_40W_50W_60W_VGA@ PC1547
22U_0603_6.3V6M
2 1
Document Number
Wednesday, May 15, 2019

+VGA_CORE CAP
1
1
Sheet
FH50P M/B LA-H901P
93
of
99
Rev
1A
A
B
C
D
5 4 3 2 1
EN pin don't floating Module model information

If have pull down resistor at HW side, pls delete PR2
SY8208D_V1.mdd
D D
VGA@
+19VB @ PJ1001 PU1001
1 2 +19VB_1.5V 2 9 @VGA@ PR1001 VGA@ PC1003 VGA_EMI@ PR1002 VGA_EMI@ PC1004
1 2 IN PG 0_0603_5% 0.1U_0603_25V7K 4.7_1206_5% 680P_0402_50V7K
VGA_EMI@ PC1017
@VGA_EMI@ PC1005
3 1 BST_1.5V 1 2 1 2 1 2SNUB_1.5V 1 2
VGA_EMI@ PC1001
2200P_0402_50V7K
JUMP_43X79 IN BS
1
VGA@ PC1006
VGA@ PC1002
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
0.1U_0402_25V6
4 6
IN LX VGA@ chock 7*7*3
2
5 19 PL1002
IN LX 0.68UH_PCMC063T-R68MN_15.5A_20%
7
GND LX
20 LX_1.5V 1 2
+1.5VSDGPUP
8 14 FB_1.5V
330P_0402_50V7K
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
GND FB
VGA@ PC1014
VGA@ PC1007
VGA@ PC1008
VGA@ PC1009
VGA@ PC1010
VGA@ PC1012
VGA@ PC1011
1
1
@VGA@ PR1004 18 17 LDO_3V_1.5
0_0402_5% GND VCC (R1)
LDO_3V_1.5
1
1 2 1.5V_EN 11 10 VGA@ PC1013 VGA@
2
EN NC
1
10,27,92 DGPU_PWRGOOD 2.2U_0402_6.3V6M PR1006
C ILMT_1.5V 13 12 15.4K_0402_1% C
2
ILMT NC
1
2
1
15 16
+3VALW
2
BYP NC
1
@VGA@ PR1003 VGA@ PR1007 @VGA@
0_0402_5% 1M_0402_1% PC1015 21
PAD
1
0.22U_0402_16V7K VGA@
2
2
ILMT_1.5V PC1016 SY8288RAC_QFN20_3X3
2
1U_0201_6.3V6M
2
1
FB = 0.6V
@VGA@ PR1005 @ PJ1002
0_0402_5% +1.5VSDGPUP 1 2 +1.5VSDGPU
1 2
2
1
JUMP_43X118
VGA@ PR1009
10K_0402_1%
(R2)
2
VFB=0.6V
B B
Vout=0.6V*(1+R1/R2)=1.524V
A A

+1.35VSDGPUP
Custom 1A
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
+5VALW
+3VALW
@ PJ701
1 2 VIN_1.8VSDGPUP
1 2
1
VGA@
1
JUMP_43X39 PC701
VGA@ 1U_0402_6.3V6K
2
PC703
2
4.7U_0402_6.3V6M
D
VGA@ D
PU701 G9661MF11U_SO8
4 5
PR701 VDD NC 6
3
1 2 EN_1.8V 2 VIN VOUT 7 +1.8VSDGPUP
GND
37 VGA_ON 1 EN ADJ 8 VGA@
22U_0603_6.3V6M
0.01U_0402_25V7K
PGOOD GND
1
33K_0402_1%
0.33U_0402_10V6K
VGA@ PC702
VGA@ VGA@ PR702 @ PJ702
9
1
1
1 2
VGA@ PC704
VGA@ PC705
PR704 +1.8VSDGPUP
12.7K_0402_1%
Rup 1 2 +1.8VSDGPU
2
1M_0402_5% JUMP_43X39
2
2
FB_1.8V
1
PR703
10K_0402_1%
Rdown
2
VGA@
Vout=0.8V* (1+(12.4/10)) = 1.792V
Vout=0.8V* (1+(12.7/10)) = 1.816V
Vout=0.8V* (1+(13/10)) = 1.84V
C C
B B
A A

+1.8VSDGPUP
1A
5 4 3 2 1
5 4 3 2 1
Version change Page 1 of 1 for

list (P.I.R. List) PWR
Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase
PQ310: EMB04N03H_SB00001C500__->__EMP21N03HC_SB00001LC00
01 Design Update POWER Module design Change PC313: 1U_0402_10V6K_SE00000QL10__->__1U 16V K X5R 0402_SE00000OU00 2019/03/22 A
0.1 PC314: 1U_0402_10V6K_SE00000QL10__->__2.2U 16V K X5R 0402_SE000013780
02 PC830: 270P_0402_50V7K_SE074271K80__->__330P_0402_50V7K_SE074331K80
PR831: 97.6K_0402_1%_SD034976280__->__110K_0402_1%_SD034110380 2019/03/22 A
Design Update CPU_CORE transient and load line test 0.1 Pr806: 34.8K_0402_1%_SD034348280__->__52.3K_0402_1%_SD034523280
D D
PC9097: 330U_D2_2V_Y_SGA00009S00__->__Unpop
03
PR212: 0_0402_5%_SD028000080__->__R-SHORT
PR333: 0_0402_5%_SD028000080__->__R-SHORT
04 Design Update reduce part count 0.1 PR314: 0_0402_5%_SD028000080__->__R-SHORT 2019/03/22 A
PR316: 0_0402_5%_SD028000080__->__R-SHORT
PR317: 0_0402_5%_SD028000080__->__R-SHORT
05 Design Update reduce part count 0.1 Del colay PJ1401 PJ1402 PJ1403 2019/03/22 A
PR304:change R-SHORT SD028000080 0_0402_5%_--> SD028100B80 1_0402_5%

PC323: add NA _--> SE000006O00 0.033U_0402_25V7K 2019/04/26 C
06 Design Update prochot 調調 0.3
PC324: add NA _-->@ SE00000G880 0.1U_0402_25V6
PR211: change SD034200280 20K_0402_1% _--> SD034100280 10K_0402_1%
PR310: change SD034665280 66.5K_0402_1% _--> SD034649280 64.9K_0402_1%
Design Update PR1437,PR1419,PR1402,PR1463: unpop_-->SD001470B804.7_1206_5%

EMI 需需 0.3 PC1442,PC1426,PC1408,PC1467: unpop_-->SE074681K80680P_0402_50V7K 2019/05/07 C
07
08
09
C C
10
11
12
13
14
15
16
B B
17
18
19
20
21
22
23
24
A A

Deciphered Date
PWR_PIR1
Custom 1A
5 4 3 2 1
5 4 3 2 1
Version change Page 1 of 1 for

list (P.I.R. List) PWR
Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase
01
02
D D
03
04
05
06
07
08
09
C C
10
11
12
13
14
15
16
B B
17
18
19
20
21
22
23
24
A A

Deciphered Date
PWR_PIR2
Custom 1A
5 4 3 2 1
A B C D E
Version change list (P.I.R. List) Page 1 of 2 for HW
Item Page Title Date Issue Description Solution Description Phase Rev.
1 03/28 Change 0 ohm to R-Short R1667, R1669, RM53, RX21 change to R-Short PVT 1.0
2 10 CPU 03/28 ESPI_ALERT_L PU to VDD Add RC6168 and PU to +3VS PVT 1.0
1 1
3 29 CLK GEN 03/28 27MHz Crystal Correlation Update CV450,CV451 change to 15P_0402 PVT 1.0
4 38 Panel 03/28 144Hz Panel OD Function Circuit Update Rename PANEL_OD_EN to PANEL_OD# PVT 1.0
UN-POP RX11
5 40 HDMI 03/28 Mask un-use co-lay component L2512, L2513, L2514, L2515 footprint change to INPAQ_HCM1012GH900BP_4P-NPM PVT 1.0
RS109 change to 4.3K_0402

6 43 TypeC 03/28 TypeC current limiting adjust RS110 change to 8.2K_0402 PVT 1.0
Correct YL1 Value YL1 update vale to XRCGB25M000F2P34R0

7 51 LAN 03/28
PVT 1.0
Change DL1 Material DL1 change from SCA00002M00 to SCA00001A00
M.2 SSD1 03/28 Change RM28 to 0_0402

Reserved Circuit for PCIE compatibility
Add RM135, UM5
8 68 PVT 1.0
2 BOM change Pop RM21, un-pop RM20, CM58 2
M.2 SSD2 03/28 M.2 SSD2 power need a break point Add RO26, JSSD2 power change to +3VS_SSD2
9 75 HUB 03/28 BOM change Change RS154, RS152 with HUB@ PVT 1.0
10 77 Others 03/28 Screw hole change H11, H12, H13 change from H_3P8 to H_3P3 PVT 1.0
11 78 DC-DC 03/28 Material Change U4 change to SB00001IY00 PVT 1.0
12 06 CPU 03/29 Add R5/ R7 CPU PN Add SA0000CCR60/ SA0000C7680 PVT 1.0
13 06 CPU 04/01 Material Change YC2 Change from SJ10000AF00 to SJ10000JP00 PVT 1.0
14 09 CPU 04/02 BOM change Un-Pop RC693 PVT 1.0
15 10 CPU 04/02 BOM change YC3 change to SJ10000PW00

CC686 change to 12P_0402 PVT 1.0
3
CC682 change to 10P_0402 3
16 28,38, 04/02 Material Change DV1,DV2,DV4, DX2, D2012,D2013,D2014,D22 change to SCS00009P00 PVT 1.0
58,63
17 58 EC 04/26 Add Board ID for MP Add R1564 15K_0402_1% for MP MP 1A
18 75 HUB 04/30 Remove Hub and other component/net Delete RS148 ~ RS158, CS145 ~ CS153, YS1, US15 MP 1A
52 Move RS146, RS147, CS143, CS144 to page52 and POP
38 Delete net HUB_USB20_P2/HUB_USB20_N2 (JEDP1 pin 29,30)
66 Delete net HUB_USB20_P3/HUB_USB20_N3 (RK19, RK18 pin 1)
58 Delete net USB_HUB_RESET# (U44 pin 126)
19 52 M.2 SSD1 04/30 Reserved 10U_0603 on WLAN Power Reserved CM79, CM80 MP 1A
20 52 M.2 SSD2 05/14 WLAN power path change Un-Pop RM101 MP 1A
POP UM3, CM71
21 37 DC-DC 05/14 Adjust C21 for +1.8VS Sequence Change C21 to 4700pF MP 1A
4 4

HW PIR
Custom 1A
A B C D E

Acer Nitro AN515-43 FH50P LA-H901P Schematic Diagram

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Acer Nitro AN515-43 FH50P LA-H901P Schematic Diagram

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A B C D E

AMD Picasso Platform

Security Classification Compal Secret Data Compal Electronics, Inc.

(Channel A) page 23 (Channel B) page 24

USB3.0 Port 3 Port 2 Port 1

Port 0, 1, 2, 3 Port 4 Port 5 page 6~12

SPI SATA III

Power On/Off CKT.

DC/DC Interface CKT.

LS-H502 Hall Sensor/B BLOCK DIAGRAMS

Voltage Rails BOARD ID Table Board ID / SKU ID Table for AD channel

RX560@ R18M-G1-90 GPU / Circuit EC_ON

PJP201 250mA +3VS

SATA Redriver*2 (M.2 & HDD)

RL2 LAN RTL8118ASA

10mA To VGA M.2 SATA SSD

+19VB 140000mA +VGA_CORE

AMD Picasso Platform Power Sequence

AC-IN G3 --> S0 S0 --> S3 S3 --> S0

0.9_1.8VALW_PWREN 93.9ms 9.166ms 0.9_1.8VALW_PWREN

PBTN_OUT# 5.422ms 99.42ms 8.190s PBTN_OUT#

VGATE 2.393ms 2.391ms VGATE

VGA Sequence VGA Sequence

VGA_ON_B 5.351ms 11.1ms 5.354ms 10.97ms VGA_ON_B

Security Classification Compal Secret Data Compal Electronics, Inc.

Main Func = CPU

PEG_ARX_GTX_P0 P8 P_GFX_RXP0 P_GFX_TXP0 N1 PEG_ATX_GRX_P0

PCIE_ARX_DTX_P0 N10 P_GPP_RXP0 P_GPP_TXP0 N2 PCIE_ATX_DRX_P0 CC1204 1 2 0.22U_0402_16V7K

PCIE_ARX_DTX_P4 V6 P_GPP_RXP4 P_GPP_TXP4 W2 PCIE_ATX_DRX_P4 CC1 1 2 .1U_0402_16V7K

FP5 REV 0.90

UC1 R5APUQC@ UC1 R7APUQC@ UC1 R5APU@ UC1 R7APU@

Main Func = CPU

EVENT# pull high

RC1 1 2 1K_0402_5% DDR_B_EVENT#

RC2 1 2 1K_0402_5% DDR_A_EVENT#

Security Classification Compal Secret Data Compal Electronics, Inc.

Main Func = CPU

TEST4 AP14 APU_TEST4 TP@

RC109 1 @ 2 1K_0402_5% APU_SVT_R

+1.8VALW DP_STEREOSYNC RC155 1 2 1K_0402_5%

Security Classification Compal Secret Data Compal Electronics, Inc.

Main Func = CPU

UC1D I2C_0_SCL RC6139 1 @ 2 2.2K_0402_5%

AGPIO5/DEVSLP0 AP9 AGPIO5

AGPIO6/DEVSLP1 AU10 DEVSLP1

AGPIO7 AR6 AGPIO7/FCH_ACP_I2S_SDIN_BT 3.3VS input FANIN0/AGPIO84 AR18

L RSV RSV DMIC x2 RSV

APU_PCIE_RST#_C RC700 1 RS@ 2 0_0402_5% APU_PCIE_RST#_U

APU_PCIE_RST#_U RC30 1 RS@ 2 0_0402_5% APU_PCIE_RST#

@ MC74VHC1G08DFT2G_SC70-5 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%

AGPIO5 AGPIO7 AGPIO3 AGPIO4

HDA Strap Pin

USE 48MHZ CRYSTAL NORMAL RESET MODE

AGPIO7 AGPIO4 AGPIO11

RC696 1 @ 2 10K_0402_5% HDA_SDIN2 RC6146 RC6138 RC6171 RC6169 RC6134 RC6173

Issued Date 2018/ 12/18 Deciphered Date 2019/12/18 Title

Main Func = CPU

+3VS M.2 SSD1 CLKREQ_PCIE#0 AV18 CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92

32.768KHz CRYSTAL 32K_X1 AY1 X32K_X1 EGPIO141/UART1_RXD

32K_X1 +1.8VALW +SPI_VCC

RC94 1 2 4.7K_0402_5% APU_USBC_SCL

USB20_P0 AE7 USB_0_DP0 USBC0_A2/USB_0_TXP0/DP3_TXP2 AD2

Security Classification Compal Secret Data Compal Electronics, Inc.

Main Func = CPU