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equence Pair Representation

Since the introduction of sequence pair representation [Murata et al., 1995],


VLSI CAD community has seen a huge volume of works on efficient repre-
sentation of non-slicing floorplans including Bounded Slice-line Grid (BSG),
O-tree, B*-tree, Corner Block List (CBL), Transitive Closure Graph (TCG), T-
tree, Adjacent Constraint Graph (ACG), Q sequence, MP-tree, etc. In addition,
many studies have been done on how to exploit these representation meth-
ods to satisfy various geometric constraints in the floorplan such as adjacency,
boundary, alignment, etc. Comprehensive reviews of these methods and com-
parisons are provided in [Yao et al., 2001; Cong et al., 2004a; Chen and Chang,
2007]. The following works are strictly related to Sequence Pair extension and
application.
The original paper on sequence pair [Murata et al., 1995] did not discuss
how to handle soft modules or pre-placed modules. A sequence pair based
non-slicing floorplanning problem with a mixture of soft, hard, and pre-placed
modules is solved by the authors of [Murata and Kuh, 1998]. Given a sequence
pair, they first formulated a convex programming to determine the width and
height of the soft modules under the area constraint. The solution to this sub-
problem is then used in Simulated Annealing framework to obtain the sequence
pair that results in the best possible floorplan area. They also perform a fea-
sibility test to see if the given sequence pair satisfies the pre-placed module
constraint.
The time complexity of obtaining a block placement from a given sequence
pair is significantly improved by the authors of [Tang et al., 2001]. Since this
process is repeated many times during Simulated Annealing, this runtime sav-
ing translates to significantly more sequence pairs we can explore. The main
idea is to compute the longest common subsequence in a pair of weighted
sequences. With the help of sophisticated data structure, the complexity of
placement construction from a given sequence pair is reduced from O(n 2 ) to
O(n log log n).
The authors of [Adya and Markov, 2003] studied the fixed-outline floorplan

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