cognitive Radio _ 2-5 SDR Architecture
[23] Basic sor
«A basic SDR system may consist of a personal computer equipped with a sound card or other
analog-to-digital converter, preceded by some form of RF front end. Significant amounts of signal
processing are handed over. to the general-purpose eprocessor, rather. than being “done in
special-purpose hardware (electronic circuits). Such a design produces a radio which can receive and
transmit widely different radio protocols (sometimes referred to as waveforms) based solely on the
software used.
«Software radios have significant utility for the military and cell phone services, both of which must “
serve a wide variety of changing radio protocols in real time. We are all aware that the SDR is the
combination of hardware and software, significantly it is necessary to define an atchitecture so as to
build an entire system. This section deals with the software and hardware architecture of an SDR.
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«Today's SDR, in contrast, is a general-purpose device in which the same radio tuner and processors
‘are used to implement many waveforms at many frequencies. The advantage of this approach is that
the equipment is more versatile and costéffective. Additionally, it can be upgraded with new software
for new waveforms and new applications after sale, delivery, and installation,
« Architecture - it is defined as the process of designing or defining the structure for the building
blocks of a technology for optimal utilization of the critical resources and other benefits. a
2.3.1] Hardware Architecture of SDR
«The basic SDR must include the radio front-end, the modem, the cryptographic security function, and
the application function. In’ addition, some radios will also include support for network devices
connected to either the plain text side or the modem side of the radio, allowing the radio to provide
network services and to be remotely controlled over the local Ethernet. °
«The hardware architecture of SDR defines the basic building blocks of Hardware section of SDR. The
basic hardware architecture provides sufficient resources to define carrier frequency, bandwidth,
modulation, any necessary cryptography and source coding in software. The hardware resources may
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include mixtures of GPs, DSPs, Field-Programmable Gate Arrays (FPGAs), and other computational
Tesourees, sufficient to include a wide range of modulation types.
* The basic SDR must include the radio front-end, the modem, the cryptographic security function and
the application function, Most of the advanced SDR Units may also include modules to remotely
contiol over the: local Ethemet, antenna management functions, coax switches, power amplifiers etc.,
+ The basic hardware architecture of SDR is divided into two sections namely : (i) RF Front End and
(ii) Digital Back End. The following Fig. 23.2 shows the hardware architecture of a basic SDR.
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Fig. 2.3.2 Basic hardware architecture of a modern SDR
@ RF Front End (RFFE) : This section deals with antennas for transmit and receive functions, RF to IF
conversion process, amplitiers ete.
The main function of the receive mode is to capture the desired signal by properly supressing the out
of band signals (undesired signals) to a practically possible extent. Similarly the main function of the
transmit mode is to synthesize the RF signal without introducing noise and spurious emissions at any
other frequencies that might interfere with other users in the spectrum,
‘The various modules that supports the transmit and receive functions of RFFE are as follows -
+ Antenna matching unit
+ Low noise amplifier / Power Amplifiers
+ Filter
+ Local oscillators
+ Analog to Digital and Digital to Analog Converters
RFFE - Receive Mode Proces:
“The modem processes the. received signal or synthesizes the transmitted signal, or both for a full
Guplex radio. Firstly, the carrier frequency of the received signal is shifted to the frequency nearly
equivalent to heterodyne shifting frequency as perceived by the digital processors to enable the digital
filtering, :
+The digital filters in the next stage provides high level of suppression of interfering signals, The
modem then timealigns and de-spreads the signal as required, and refilters the signal to the
information bandwidth, Next the modem time-aligns the signal to the symbol or baud time so that it
cen optimally align the demodulated signal with expected models of the demodulated signal
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Fig. 2.3.3 Digital signal receiver block diagram
+The modem may include an equalizer to correct for channel multipath artifacts, and for filtering and
delay distortions. It may also optionally include rake filtering to optimally cohere multipath
components for demodulation. The modem will compare the received symbols with the possible
received symbols and make a best possible estimate of which symbols were transmitted if there is a
weak signal or strong interference, some symbols may be received in error. If the waveform includes
FEC coding, the modem will decode the received. sequence of encoded symbols by usitig the
structured redundancy introduced in the coding process to detect and correct the encoded symbols
that were received in error.
RFFE - Transmit Mode Process :
+ The important property of these circuits is to synthesize the RF signal without introducing noise and
spurious emissions at any other frequencies that might interfere with other users in the spectrum.
‘Signal processing at the transmit side is the inverse of that the receiver side. The bits of information
to be transmitted are grouped as packets and adds the structured redundancy to provide the error
correction at the receiver. These group of bits are now converted into symbols, selects a wave shape
to represent each symbol. These wave forms are synthesized and filtered so as to keep the signal
within the bandwidth. The final waveform is filtered to match the desired transmit signal bandwidth.
It may spread the signal to a much wider bandwidth by multiplying the symbol by a wideband
waveform which is also generated by similar methods. The final waveform is filtered to match the
desired transmit signal bandwidth.
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Fig. 2.3.4 Digital signal transmitter block diagram
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+The power amplifier and local oscillator jointly
works to produce the desired carrier frequency. The
antenna matching circuits are used to minimize the
Voltage Standing Wave Radio (VSWR). The
cryptographic security function must encrypt
any information to be transmitted.’ This
processes cannot be generalised because the
encryption process is unique for each applications.
+The several standards for the encryption are
Digital Encryption Standard (DES), Advanced
Encryption Standard (AES) and US National
Institute of Standards and Technology (NIST).
(i) Digital Back End : This section deals with the
computational processing resources such as GPP's,
DSP's, FPGA's and other special function Processors.
The application processor will typically implement a
vocoder, a video coder, and/or a data coder, as well,
as selected web browser functions. The Compression
factors are typically in the range of 10:1 are achieved
in voice coding, and up to 100:1 in video coding.
This section also takes care of the User interface and
power management. Processors are selected based on
the nature of application. Typically, speech and video
processing runs on DSP processors. Text and web
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based operations runs on GPP. As the technology
advances the speech and video processing
applications requires for a Key board and displays.
The architecture should have the capability to
incorporate additional modules as per the demand,
The various computational processing resources are
briefly discussed in later sections.
2.3.2 | Software Architecture of SDR q
‘ln the basic software architecture of a moder.
SDR, the application programming interfaces
(APIs) are defined for the major interfaces to assure
software portability across many very different
hardware platform implementations, as well as to
assure that the basic software infrastructure
supports a wide diversity of waveform applications
‘without havinig to be rewritten for each waveform
or application. The software has the ability to
allocate computational resources to specific
waveforms, It is norinal for an SDR to support
many waveforms in order to interface to any
networks and thus to have a library of waveforms
and protocols. The SDR radio is decomposed into a
stack of hardware ‘and software functions, with
‘open standard interfaces.
APIs
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TECHCAL PUBLICATIONS™ Anup roto knwo# The objective of the software architecture in an SDR
is to place waveforms and applications onto a
software-based radio platform in a standardized
‘way. These waveforms and applications are
installed, used, and replaced by other applications
as required to achieve the user's objectives. To make
the waveform and application interfaces
standardized, it is necessary to make the hardware
platform present a set of highly standardized
interfaces. The waveform development proceeds by
assuming a standardized set of interfaces (APIs)
for the radio hardware, and the radio
hardware translates commands and _ status
messages crossing those interfaces tothe
unique underlying hardware through a set of
common drivers. In addition, the method by which
a waveform is installed into a radio, activated,
deactivated, and de-installed, and the way in which
radios use the standard interfaces must be
standardized so. that waveforms are reasonably
portable to more than one hardware platform
implementation.
* The Software' Architecture stack starts with the
hhardware and the one or more data buses that
move information among the various processors. On
top of the hardware, several standardized layers of
software are installed. This includes the boot loader,
the Operating System (OS); the Board Support
Package (BSP, which consists of input/output
drivers that know how to control each interface);
and a layer called the Hardware Abstraction Layer
(HAL). The HAL provides a method for GPPs to
communicate with DSPs and FPGA processors.
‘The US Government has defined “a standardized
software architecttire, Known as the Software
‘Communication Architecture (SCA), The SCA is a
core framework to provide a standardized process
for identifying the available computational resources
of the radio, matching those resources to the
required resources for an application. The SCA is
built upon a standard set of OS features called The
Portable Operating System Interface (POSIX),
which also has standardized APIs to perform OS
functions such as file management and
computational thread/task scheduling.
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SDR Architecture
‘= The SCA also specifies a Common Object Request
Broker Architecture (CORBA) middleware, which is
‘used to provide a standardized method for software
objects to communicate with each other, regardless
‘of which processor they have been installed.
+The SCA also provides a standardized method of
defining the requirements for each application,
perforined in eXtensible Markup Language (XML),
The XML is parsed and helps to determine how to
distribute and install the software objects
Jn summary, these. applications will have many
reasons to interact with the Internet as- well as
many local networks; therefore, it is also common to
provide a collection of standardized radio services,
network services and security services, s0 that each
application does not need to have its own copy of
Internet Protocol and other commonly used
functions.
Challenges :
«The hardware and software architectures should
allow RF external features to be added if or when
required for a particular installation or customer
requirement,
Reason for Separate Architectures :
*The independence in the hardware and software
architecture enables porting the software to an
arbitrary hardware platform. Also this indépendent
nature allows the hardware to separately evolve its
architecture from software and thus frees the
hardware to continue to evolve and improve after
delivery of the initial product.
[24] computational Processing Resources
USOT AORTALIT
+The design of an SDR must anticipate the’
computational resources needed to implement its
most complex application. The computational
resources may consist of GPPs, DSPs, FPGAs, and
occasionally will include other chips that extend the
computational capacity. Generally, the SDR design
engineer will avoid inclusion of application specific
non-programmable chips as they reduce the
flexibility to support various waveforms and
applications.