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FGDH
FGDH
(Autonomous)
(ISO/IEC - 27001 - 2013 Certified)
(b) Name the circuit to obtain D.C. signal from A.C. signal 2M
Page 1/
MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION
(Autonomous)
(ISO/IEC - 27001 - 2013 Certified)
Ans: Rectifier circuit is used to obtain D.C. signal from A.C. signal. 2M
(c) State relation between emitter current (IE), base current (IB) and collector 2M
current (IC) of BJT
Ans: The relation between emitter current (IE), base current (IB) and collector current (IC) 2M
of BJT is
IE = IB + IC
(d) Draw pin configuration of IC723 2M
Ans: 2M
i) +5V
Page 2/
MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION
(Autonomous)
(ISO/IEC - 27001 - 2013 Certified)
ii) -12V
1M:
Truth
table
Ans:
V-I Characteristics:
Page 3/
MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION
(Autonomous)
(ISO/IEC - 27001 - 2013 Certified)
2M:
Charact
eristics
Explanation :
2M:
1. When the PN junction diode is in forward bias, Explan
At zero voltage, zero current will flow through the diode. ation
If the applied voltage is less than the barrier potential, a small current flows
through the diode.
When the applied voltage exceeds the barrier potential, the current starts
flowing through the diode and increases rapidly. This is known as forward
voltage or VF of a diode or knee voltage.
2. When the PN junction diode is in reverse bias,
At the zero reverse voltage no current flows through it.
If the reverse voltage increases a very small current starts flowing through the
diode, that known as reverse leakage current.
After a certain point when reverse voltage further increases, the diode starts
conducting heavily in the reverse direction and the current starts flowing
rapidly through the diode. This is known as Reverse breakdown voltage.
b) Explain center tapped full wave rectifier with the help of circuit diagram and 4M
draw input, output waveforms.
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MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION
(Autonomous)
(ISO/IEC - 27001 - 2013 Certified)
1M :
circuit
diagra
m
2M:
Worki
ng
1M :
Working:
1) During the positive half cycle, point A is positive with respect to point B ,so wavefo
diode D1 is forward biased and diode D2 is reverse biased. rms
2) Due to this, diode D1 will conduct acting as a short circuit and D2 will not
conduct acting as an open circuit. Therefore the flow of current ‘I’ will be
through diode D1 and load resistor RL.
3) During the negative half cycle, point A is negative with respect to point B,
sothe diode D1 is reverse biased and diode D2 is forward biased. When D2
diode is conducting, the flow of current ‘I’ will be through diode D2 and load
resistor RL.
4) Thus in a full wave rectifiers, DC voltage is obtained for both positive and
negative half cycle.
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MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION
(Autonomous)
(ISO/IEC - 27001 - 2013 Certified)
Ans: 4M
Characteristics CB CE CC
(any
Common
Emitter Collector
Terminal for Base Terminal four
Terminal Terminal
Input and Output
points,
Base and Base and
Input voltage Emitter and 1M
Emitter Collector
applied between Base terminal
Terminal Terminal each)
Collector and Emitter and
Output Voltage Collector and
Emitter Collector
taken across Base Terminal
Terminal Terminal
Very high(200
Very Low(only Medium(500
Input Impedance to 750 kilo
50 to 500 ohm) to 5000 ohm)
ohm)
Output Very High(1 to Medium(50 to Very Low( up
Impedance 10 Mega Ohm) 500 kilo ohm) to 50 ohm)
High
RF Signal Switching
Application Frequency
Processing Circuits
Circuits
d) Explain with circuit diagram operation of zener diode as a voltage regulator 4M
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MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION
(Autonomous)
(ISO/IEC - 27001 - 2013 Certified)
2M:
Explan
ation
Operation:
1) For proper operation, the input voltage Vi must be greater than the Zener
voltage Vz. This ensures that the Zener diode operates in the reverse breakdown
condition. The unregulated input voltage Vi is applied to the Zener diode.
2) The output voltage is given by,
Vo = VL = Vz ……… (1)
3) The input current is given by,
𝑉i−𝑉𝑧 𝑉i−𝑉𝑜
Is = = …….(2)
𝑅𝑠 𝑅𝑠
4) Also the input current Isis the sum of Zener current Iz and load current IL
Is = Iz + IL…….(3)
According to Kirchhoff’s voltage law, the output voltage is given by
Vo = Vi – Is.Rs……. (4)
5) As the input voltage increases, more Zener current will flow through the Zener
diode. This increases the input voltage Is, and also the voltage drop across the
resistor Rs, but the load voltage Vo would remain constant. Thus, a Zener diode
acts as a voltage regulator.
Page 7/
MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION
(Autonomous)
(ISO/IEC - 27001 - 2013 Certified)
OR
2M for
explaina
tion
Page 8/
MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION
(Autonomous)
(ISO/IEC - 27001 - 2013 Certified)
1 M for
express
ion
2 M for
Explain
ation
OR
Page 9/
MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION
(Autonomous)
(ISO/IEC - 27001 - 2013 Certified)
OR
Working :
1. From the circuit we can see that the control input Vin is given to base through
a current limiting resistor Rb and Rc is the collector resistor which limits the
current through the transistor or equivalent figure
2. When a sufficient voltage Vin is given to input, transistor becomes ON & it
goes into saturation.
3. During this condition the Collector Emitter voltage Vce will be approximately
equal to zero, ie the transistor acts as a short circuit & Vo = 0.
4. When input voltage Vin=0v, transistor becomes OFF & it goes into cutoff.
The transistor acts as an open circuit. During this condition the Collector
Emitter voltage Vce=Vcc. Therefore Vo = Vcc.
d) In full wave bridge rectifier Vm = 10V, RL = 10KΩ. Find out VDC, IDC, ripple 4M
Page
10/
MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION
(Autonomous)
(ISO/IEC - 27001 - 2013 Certified)
2 * 𝑉𝑚 value
𝑉𝑑𝑐 =
𝜋
2*10
Vdc=
𝜋
𝑉𝑑𝑐 = 6. 366𝑣
𝑉𝑑𝑐
𝐼𝑑𝑐 =
𝑅𝐿
6.366
𝐼𝑑𝑐 =
10 * 103
𝐼𝑑𝑐 = 0. 6366𝑚𝐴
𝑉𝑚
𝐼𝑚 =
𝑅𝐿
10
𝐼𝑚 =
10 * 103
𝐼𝑚 = 1𝑚𝐴
𝐼𝑟𝑚𝑠 2
𝑅i𝑝𝑝𝑙𝑒 𝐹𝑎𝑐𝑡𝑜𝑟 = √( ) −1
𝐼𝑑𝑐
𝐼𝑚
( )
𝑅i𝑝𝑝𝑙𝑒 𝐹𝑎𝑐𝑡𝑜𝑟 = √( √2 )2 − 1
𝐼𝑑𝑐
1*10−3
( )
𝑅i𝑝𝑝𝑙𝑒 𝐹𝑎𝑐𝑡𝑜𝑟 = √( √2 )2 − 1
0.6366 * 10−3
𝑅i𝑝𝑝𝑙𝑒 𝐹𝑎𝑐𝑡𝑜𝑟 = 0. 48
𝐹𝑜𝑟 𝐵𝑟i𝑑𝑔𝑒 𝑅𝑒𝑐𝑡i𝑓i𝑒𝑟 𝑃𝐼𝑉 i𝑠 𝑉𝑚 = 10𝑣
OR
Page
11/
MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION
(Autonomous)
(ISO/IEC - 27001 - 2013 Certified)
Page
12/
MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION
(Autonomous)
(ISO/IEC - 27001 - 2013 Certified)
(b) Draw the circuit diagram of bridge rectifier with Π filter. Draw its input and 4M
output waveform
Ans:
Circuit diagram of bridge rectifier with π filter :
2 M for
Diagra
m
2M for
input
and
output
wavefor
m)
or equivalent figure
Page
13/
MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION
(Autonomous)
(ISO/IEC - 27001 - 2013 Certified)
(c) In a common base connection, current amplification factor (α) is 0.9. If the 4M
emitter current is 1MA, determine the value of base current and collector current.
Ans: 2M
Given Data : each
correct
α = 0.9
answer
IE = 1mA
Αs α= IC /IE.
Therefore IC = 0.9 mA
IE = IC +IB ……(Assume ICBO = 0)
IB = 0.1mA
OR
IB = (1- α) IE
IB = 0.1mA
(d) Describe the working principle of photodiode with proper diagram 4M
Diagra
m
2 M for
explain
Page
14/
MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION
(Autonomous)
(ISO/IEC - 27001 - 2013 Certified)
ation
OR equivalent figure
1. When photons of energy greater than 1.1 eV hit the diode, electron-hole pairs are
created.
2. The intensity of photon absorption depends on the energy of photons .Lower the
energy of photons, the deeper the absorption is. This process is known as the inner
photoelectric effect.
3. If the absorption occurs in the depletion region of the p-n junction, these hole pairs are
swept from the junction due to the built-in electric field of the depletion region.
4. As a result, the holes move toward the anode and the electrons move toward the
cathode, thereby producing photocurrent.
Ans: 4M
(i) Highest rectifier efficiency : Center tapped & Bridge full wave Rectifier
(ii) Highest form factor : Center tapped & Bridge full wave Rectifier (1 M
(iii) Two diode rectifier circuit : Center tapped full wave Rectifier for
(iv) PIV = 2Vm : Center tapped full wave Rectifier
each)
Page
15/
MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION
(Autonomous)
(ISO/IEC - 27001 - 2013 Certified)
β = IC
IB
4M
derivat
ion
Page
16/
MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION
(Autonomous)
(ISO/IEC - 27001 - 2013 Certified)
b) Construct a dual regulated power supply capable of giving ±12V using 78XX and 6M
79XX IC’S.
Ans: 6M for
relevan
t
diagra
m
(other
suitabl
e
design
also
can be
OR conside
r)
c) Implement the fundamental logic gates ‘OR’ gate, ‘AND’ gate, ‘NOT’ gate using 6M
only NAND gates.
Page
17/
MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION
(Autonomous)
(ISO/IEC - 27001 - 2013 Certified)
Ans: 2M
each
Page
18/
MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION
(Autonomous)
(ISO/IEC - 27001 - 2013 Certified)
3M
3M
Page
19/
MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION
(Autonomous)
(ISO/IEC - 27001 - 2013 Certified)
Ans:
3M
Explanation : 3M
(1) Active Region:
In this region collector junction is reverse biased and emitter junction is forward
biased. It is the area to the right of VCE = 0.5 V and above IB= 0. In this region
transistor current responds most sensitively to IB. If transistor is to be used as an
amplifier, it must operate in this region.
Page
20/
MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION
(Autonomous)
(ISO/IEC - 27001 - 2013 Certified)
i) (11010010)2 = (?)8
ii) (109)10 = (?)2
iii) (6A)16 = (?)10
Ans: 2M
each
Page
21/