Floating Capacitor Voltage Regulation in Diode

Clamped Hybrid Multilevel Converters

James A. Ulrich, Member, IEEE and Ashish R. Bendre, Member, IEEE
DRS Power & Control Technologies, Inc.
Milwaukee, WI 53216 USA
Email: JamesAUlrich@drs-pct.com and AshishRBendre@drs-pct.com

Abstract—The family of hybrid topologies consisting primarily as a DCH-3/3 configuration for 9 level performance or DCH-
of a main Neutral Point Clamped (NPC) 3-phase inverter 3/3/3 configuration for 27 level performance [3]. The first “3”
followed by one or more series connected H-Bridges in each in the designation refers to the three levels provided by the
output phase show promise in medium voltage applications main NPC inverter with subsequent numbers referring to
requiring high power quality and minimal size and weight. voltage levels provided by the series connected H-Bridges.
Another distinct advantage of this topology is the ability to This paper will focus on floating capacitor regulation in the
supply the main NPC converter with a single independent fixed DCH-3/3/3 topology with a single DC source for the main
or variable DC source if floating capacitors are used in the series NPC based inverter section. Fig. 1 shows the basic DCH-
connected H-Bridge inverters. A new method is proposed for
3/3/3 topology with six floating capacitors requiring voltage
regulating floating capacitor voltages in the series connected H-
Bridge inverters. The proposed method provides independent
regulation to a value proportional to the main DC source
control of each capacitor by decoupling floating capacitor voltage.
voltage regulation of a particular capacitor from all other Regulation of the floating H-Bridge capacitors can be
floating capacitors within the converter. challenging and has been previously investigated with several
proposed methods [3, 4, 5, 6]. One such method includes
Keywords – hybrid converters, cascaded converters, H-Bridge selecting redundant modulation states at a given operating
cell, multilevel converter
point to force the H-Bridge into a mode that will charge,
discharge or maintain the capacitor voltage during a given
I. INTRODUCTION switching cycle [3]. This method, referred to as Redundant
The concept of utilizing multiple voltage levels to State Selection (RSS) has the potential negative side effect of
synthesize high voltage waveforms in power conversion higher switching frequencies in both the main NPC and series
systems was developed over twenty years ago. The first connected H-Bridge inverter stages. Another approach
topology introduced was the series H-bridge design [1,2]. This proposes phase shifting the main NPC inverter output relative
was followed by the diode clamped converter which utilized a to the desired voltage reference to achieve H-Bridge floating
bank of series capacitors. A later invention introduced the capacitor regulation [4].
flying capacitor design in which the capacitors were floating
rather than series-connected. Several combinational or hybrid
designs have also been proposed some involving cascading the
fundamental topologies. These hybrid designs can create
higher power quality for a given number of semiconductor
devices than the fundamental topologies alone due to a
multiplying effect of the number of levels. Areas of interest
going forward for these hybrid topologies will likely focus on
transformerless designs requiring one real power DC source,
floating capacitor voltage regulation, fault tolerance and
waveform quality. The subject of this paper deals with a
method for regulating voltage on the floating capacitors in a
hybrid multilevel topology. This paper will focus on the
family of hybrid topologies that consist primarily of a main
Neutral Point Clamped (NPC) 3-phase inverter followed by
one or more series connected H-Bridges in each output phase
of the converter. These topologies are generally referred to as Figure 1. Basic DCH-3/3/3 Inverter Topology
Diode Clamped Hybrid or DCH and are typically designated

978-1-4244-3439-8/09/$25.00 ©2009 IEEE 197

 This paper will describe a new technique to provide robust
and autonomous regulation of all H-Bridge floating capacitor
voltages in a DCH-3/3/3 topology. The proposed technique
provides independent control of each capacitor by decoupling
floating capacitor voltage regulation of a particular capacitor
from all other floating capacitors within the converter. The
proposed method is relatively simple and does not change in
complexity as the number of series connected H-Bridges
increases.

II. DCH-3/3/3 TOPOLOGY – FUNDAMENTALS OF

OPERATION
The per phase operation of the main NPC and series
connected H-Bridges for the proposed floating capacitor
regulation method is based on sub-harmonic modulation of the
series connected H-Bridge voltage references [4]. The main
NPC inverter generates a rectangular waveform relative to the
neutral point which is forced to remain at the same frequency
as the reference waveform. The duty cycle of the main NPC
inverter is fixed and selected such that zero magnitude 5th
harmonic is produced. This will occur with a duty cycle of 0.8
or when 72 electrical degrees per fundamental cycle of the Figure 2. Main NPC and H-Bridge Reference Voltages
main NPC output waveform is at the neutral point voltage.
The subsequent series connected H-Bridge voltage Va2(ref) will contain a small positive AC component at the
references are determined using the desired output voltage fundamental. The positive AC component combines with load
reference defined here as Va(ref) for Phase A and the current to produce positive real power resulting in a reduction
preceding measured bridge voltage feedbacks Va1 and Va2 in net capacitor voltage. Similarly, if the scalar is less than
for Phase A [4]. The desired voltage reference for the first unity magnitude, the resulting Va2(ref) will contain a small
stage H-Bridge inverter is calculated as follows. negative AC component at the fundamental. The negative AC
component combines with load current to produce negative
Va2(ref) = Va(ref) - Va1 (1)
real power resulting in an increase in net capacitor voltage.
Similarly, the desired voltage reference for the second stage
Fig. 4 (a), (b) and (c) show simulation results with scaling
H-Bridge inverter is calculated as follows.
factor values of unity magnitude, 1.1 and 0.9 respectively.
Va3(ref) = Va(ref) - Va2 (2) These simulations show the scaling factor influence on real
power supplied by the H-Bridge and the resulting capacitor
References for Phases B and C are calculated in a similar voltage control provided by the closed loop regulator. The
manner. Fig. 2 shows the desired output voltage reference upper trace shows the final per unit voltage reference
Va(ref) along with the resulting main NPC output voltage and Va2(ref), the center trace shows the H-Bridge output
H-Bridge voltage references. Sub-harmonic modulation is voltage/current and the lower trace shows average power
used to determine switching instances for the associated H- supplied by the H-Bridge. Simulation results show the real
Bridge based on the desired voltage references shown in Fig. 2 power control achieved and the ability to both charge and
[4]. Using this method for controlling switches in the DCH- discharge a specific H-Bridge capacitor without affecting
3/3/3 topology provides the needed decoupling between each
inverter stage which forms the basis for independent control of
each floating capacitor.

III. FLOATING CAPACITOR REGULATION

Regulation of each capacitor is a closed-loop process
involving feedback of the specific capacitor voltage along
with the previous inverter stage phase to neutral voltage. Fig.
3 shows a block diagram of the regulation process for
capacitor Vc1a in Fig. 1 assuming the capacitor is to be
regulated to one sixth the main NPC source voltage. As
shown in Fig. 3, the regulator produces a quantity used to
apply a near unity magnitude scaling factor to the per unit
main NPC bridge voltage feedback Va1 in Equation 1. The
scaling factor applies a slight magnitude modification to the
feedback Va1 relative to the reference waveform Va(ref). If
Figure 3. Floating Capacitor Regulator
the scalar is greater than unity magnitude, the resulting
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 Figure 4. H-Bridge real power control via scaling factor with (a) Scalar =1.0, (b) Scalar =1.1 and (c) Scalar =0.9
other capacitors within the converter.
In order to maintain the desired voltage, the floating
capacitors must not supply continuous real power in any one
direction to the load. For a given output voltage, the main DC
source voltage must therefore be adjusted slightly to match the
real power demand of the load. Recall that the main NPC
inverter operates with a fixed duty cycle to achieve minimal
5th harmonic magnitude. The net affect of adjusting the DC
source voltage for a given output voltage is similar to
changing the modulation index. The DC source voltage
adjustment is accomplished by regulating the scaling factor to
an average unity magnitude value. This is accomplished by
adding a correction factor to the DC source voltage reference
via closed loop control. Fig. 5 shows a simplified block
diagram of the proposed regulator. An average value of the
six scaling factors is used as the controller feedback which is
then regulated to unity magnitude. The PI regulator produces
a correction factor for the DC source voltage reference that
when in steady state, converges on a DC source voltage that
results in an average unity magnitude value for the six scaling
factors. This process essentially performs a fine adjustment
Figure 5. DC source voltage reference adjustment based on scaling
factor
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for the main NPC inverter modulation index to achieve the
proper fundamental voltage and power balance to the load.
The main NPC inverter operates at essentially a constant
modulation index regardless of the desired output voltage.
The overall purpose of the proposed average scaling factor
regulator is to apply a small correction factor to the
modulation index to achieve coarse voltage regulation of all
floating capacitors in steady state.
A. Practical Implementations
In practical implementations of the DCH-3/3/3 topology, it
may be desirable to minimize capacitance value to reduce size,
weight and cost of the series connected H-Bridge inverters.
Minimizing capacitance value can lead to significant ripple
voltage which is dependent on operating fundamental
frequency, switching frequency and load current. To achieve
good waveform quality, a closed loop output voltage regulator
could be used to minimize the affects of capacitor ripple
voltage, device turn on/off times, control dead time and device
forward drops. The DCH-3/3/3 can provide up to 27 level
performance for excellent control fidelity in closed loop
voltage regulated systems. Exceptional waveform quality can
be achieved with a relatively simple closed loop voltage
regulator. If an inner current loop is implemented, the DCH-
3/3/3 topology has the potential to provide excellent waveform
quality and would be suitable for both shipboard power supply
and motor drive applications.
In practical shipboard applications, the variable DC source
voltage can be obtained using a phase controlled rectifier or
other suitable means for achieving a variable DC source.
Motor control applications related to shipboard propulsion
may require a wide voltage range and could benefit from a
variable source voltage as excellent waveform quality can be
achieved throughout the entire speed range.

B. Detailed Simulation Results

Detailed simulations were performed to evaluate
performance of the proposed floating capacitor voltage
regulator. The simulation model was configured to provide a
fixed 4,160Vac output at 60Hz into a 3MW resistive load.
Voltage regulation is performed in the synchronous reference
frame and an inner current loop is included with a feed
forward component for improved transient performance. A
passive output filter is included consisting of 100uH inductors
per phase and a 50µF delta connected capacitor bank. Control
based active damping is included to mitigate output filter
resonance. Additional simulation model parameters and
characteristics include the following.
• IGCT based main NPC Bridge with 4µsec and 8µsec
device turn on/off delay respectively.
Figure 6. Simulated line-to-line output voltage with frequency spectrum
• IGBT based series connected H-Bridges with 1 µsec
and 1.2 µsec device turn on/off delay respectively. DCH-3/3/3 converter. The main NPC inverter is switching at
the fundamental frequency of 60Hz. Simulation results show
• Control dead time delays of 30µsec and 10µsec for the first and second stage H-Bridge IGBTs are switching at
the main NPC and H-Bridge devices respectively. approximately 1.5 KHz and 4.5 KHz respectively.
• 10,000µF first stage H-Bridge capacitor in each phase. IV. CONCLUSIONS
• 30,000µF second stage H-Bridge capacitor in each A new control method has been proposed for providing
phase. simultaneous and independent regulation of floating capacitor
voltages in a single DC source DCH-3/3/3 diode clamped
• Power device and anti-parallel diode forward voltage
hybrid multilevel converter consisting of a single three-phase
drops.
main NPC inverter and two series connected H-Bridge
• 5,640 Vdc nominal DC source voltage. inverters per phase. Simulation results show that robust and
independent regulation of floating capacitor voltages is
• First and second stage H-Bridge capacitors regulated achievable while maintaining exceptional waveform quality.
to 1/6 and 1/18 of the DC source voltage respectively. In practical applications, a variable DC source voltage is
Fig. 6 shows simulation results of the resulting line-to-line required and could be obtained using phase controlled
output voltage with frequency spectrum in steady state at rectification or other suitable means for achieving a variable
4,160Vac, 60Hz. The pre-filter output voltage shows frequent controlled DC source. Motor control applications related to
voltage spikes characteristic of this family of multilevel shipboard propulsion systems may require a wide voltage
topologies. The spikes occur as a result of switching instance range and could benefit from a variable source voltage as
mismatch caused by control dead time, power device turn- excellent waveform quality can be achieved throughout the
on/off delay and device rise/fall times. A suitable output filter entire speed range.
can greatly mitigate distortion caused by these voltage spikes
as shown in the post-filter voltage plot of Fig. 6. An output
filter coupled with closed loop voltage regulation can achieve
excellent waveform quality as shown. Simulation results
show the final line-to-line output voltage contains a 0.2
percent or -54dB maximum individual harmonic distortion
(IHD) and a total harmonic distortion (THD) of 0.47 percent.
Figs. 7 and 8 show simulation results of the proposed
capacitor regulation method with the parameters described
above. Fig. 7 shows simulation results when the Phase A
capacitor voltage reference in the first stage H-Bridge (Vc1a
in Fig. 1) is increased 20 percent between 200ms and 500ms.
Similarly, Fig. 8 shows simulation results when the Phase A
capacitor voltage reference in the second stage H-Bridge
(Vc2a in Fig. 1) is increased 20 percent between 200ms and
500ms. Simulation results show the independent and robust
control of each floating capacitor within the single DC source

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 Figure 7. Simulation results – regulate first stage Phase A H-Bridge capacitor 20 percent high

Figure 8. Simulation results – regulate second stage Phase A H-Bridge capacitor 20 percent high

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