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DLD Assignment Draft
DLD Assignment Draft
w x y z Term LED#
0 0 0 0 m0 0, 1, 2, 3, 4, 5
0 0 0 1 m1 1, 2
0 0 1 0 m2 0, 1, 3, 4, 6
0 0 1 1 m3 0, 1, 2, 3, 6
0 1 0 0 m4 1, 2, 5, 6
0 1 0 1 m5 0, 2, 3, 5, 6,
0 1 1 0 m6 0, 2, 3, 4, 5, 6
0 1 1 1 m7 0, 1, 2
1 0 0 0 m8 0, 1, 2, 3, 4, 5, 6
1 0 0 1 m9 0, 1, 2, 5, 6
Truth table:
Inputs Outputs
w x y z 0 1 2 3 4 5 6
0 0 0 0 1 1 1 1 1 1 0
0 0 0 1 0 1 1 0 0 0 0
0 0 1 0 1 1 0 1 1 0 1
0 0 1 1 1 1 1 1 0 0 1
0 1 0 0 0 1 1 0 0 1 1
0 1 0 1 1 0 1 1 0 1 1
0 1 1 0 1 0 1 1 1 1 1
0 1 1 1 1 1 1 0 0 0 0
1 0 0 1 1 1 1 1 1 1 1
1 0 0 1 1 1 1 0 0 1 1
For 0 -
K-map:
yz
00 01 11 10
wx
00 1 1 1
01 1 1 1
11 x x x x
10 1 1 x x
F = w + y + xyz’ + w’x’z’
Circuit diagram:
For 1 -
K-map:
yz
00 01 11 10
wx
00 1 1 1 1
01 1 1
11 x x x x
10 1 1 x x
F = w + w’x’ + y’z’ + yz
Circuit diagram:
For 2 -
K-map:
yz
00 01 11 10
wx
00 1 1 1
01 1 1 1 1
11 x x x x
10 1 1 x x
F = y’ + z + w + x
Circuit diagram:
For 3 -
K-map:
yz
00 01 11 10
wx
00 1 1 1
01 1 1
11 x x x x
10 1 x x
For 4 -
K-map:
yz
00 01 11 10
wx
00 1 1
01 1
11 x x x x
10 1 x x
F = x’y’z’ + wx + wy + yz’
Circuit diagram:
For 5 -
K-map:
yz
00 01 11 10
wx
00 1
01 1 1 1
11 x x x x
10 1 1 x x
For 6 -
K-map:
yz
00 01 11 10
wx
00 1 1
01 1 1 1
11 x x x x
10 1 1 x x
yz
00 01 11 10
wx
00
01
11 x x x x
10 x x
F=
Circuit diagram: