Advanced Processors

T1. Barry B Brey, The Intel Microprocessors .Pearson, Eight Ed. 2009. Chapter 16-17

April 27th 2023

 16 bit Microprocessor

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 32 bit Microprocessor

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 Real and Protected
Modes

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 Difference between
Real and Protected
Modes

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 Real Mode

In real mode the First 1 MB memory is accessible

• i.e. Real/conventional memory

• Ex: DOS operating system- it can access only the first 1 MB

memory(real memory)

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 Real Mode

• In 8086/8088 –(20 bit address) operate only in real mode

• They can access only 1 MB memory.
• The concept of real mode and protected mode comes only in
80286 onwards. (80286, 80386, 80486)
• They can capable of working in real mode as well as protected
mode.

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 Real Mode

• To access the real memory, segment should be discussed

• Segment Registers:
 Code
 Data
 Stack
 Extra
 FS & GS
• Every address is going to have two parts: segment and offset.
• Maximum segment size 64 K
• Segments -Relocatability

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 Protected memory

Above 1M

• Windows operate
• Segment + Offset
• Segment Register –Selector –Selects Descriptor from Descriptor
Table
• Descriptor
• Location
• Length
• Access Rights
• Instructions don’t change as still it is segment-offset combo
• In 80386 & 80486 –32-bit pointers possible
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 How does it work?

Two Descriptor Tables

• Global / System
• Apply to all programs
• Local /Application
• Apply to particular appln
• Each Descriptor Table has 8192 entries
• 16,384 descriptors
• 16,384 segments

• Size of segment= 4G size (80386 have 32 bit offset)= Physical

• Virtually–4G x 16K=64T
• Program size can be 64 TB
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 Descriptor

Each descriptor is of 8 bytes

• Total memory for GDT /LDT – 8192X8=64K
• 80286 –upward compatible

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 Descriptor-80286

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 Descriptor-80286

Protected memory = not all applications can access the segment

due to Access Right byte

Base address= 3 bytes= 24 bits= 16 MB= beginning of segment

= starting address of the segment
Limits= 2 bytes= size of segment= 16 bit offset

Size of segment= 16 bit= 64 k= last offset adderess

Total virtual memory= 64KX8192X2= 64KX16K= 1GB

Physical

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 Descriptor-80386

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 Descriptor-80386

Protected memory = not all applications can access the segment

due to Access Right byte
Base address= 4 bytes= 3 2 bits= 4 GB= beginning of segment
= starting address of the segment
Limits= 20 bits= size of segment= 1 MB

Every segment can come upto 4 GB

How this 1 MB will come upto 4GB

Possible by G bit
Total virtual memory= 4GX8192X2= 4GX16K= 64TB
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 Descriptor-80386

AV bit = Available bit= 1 = segment is available in Physical

memory

AV bit = Available bit= 0 = segment is not available in Physical

memory (present in hard disk)

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 Descriptor-80386

D bit = determine the instruction size= 1 = 386 or 486 working in

32 bit mode of operation

D bit = determine the instruction size= 0 = 386 or 486 working in

16 bit mode of operation

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 Descriptor-80386

G bit = Granularity bit= 1 = changes the limit size 20 bit to 32 bit

G bit = Granularity bit= 0 = limit size 20 bit

Limit= 20 bit = 1 MB= size can be 1 MB
Limit= 32 bit = 4 GB= size can be as high as 4 GB

G bit = Granularity bit= 1 = limit multiplied by 4K= 1MBX4K

= 4GB

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 Example

 Base = Start = 1000 0000H

G = 0
 Limit –001FFH
 End = 1000 0000 + 001FFH = 1000 01FFH
 G =1
 End = 1000 0000 + 001FF FFF = 101F FFFFH

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 Access Rights Byte Format

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 Access Rights Byte Format

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 Address Translation- Segment

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 Invisible Registers

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 Example: GDT
MOV AX, [1000H]
DS:1000
DS = 0018
1st 13 bits –0000 0000 0001 1000 -GDT
GDTR + 0018 (entry no. 3)
GDTR –00 00 00 00
DS starts at –00 20 00 00
Size= 0FFFF= 64K
LIMIT BYTE= SIZE-1= 64k
ACCESS RIGHT =93= 10010011
Linear address= 00200000+1000H
= 00201000H

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 Example: LDT
(slightly more complicated)

MOV AX,[1000H]
 DS:1000
 DS = 001C
 1st13 bits –0000 0000 0001 1100 -LDT
 Selector –LDTR
 LDTR –0018 –0000 0000 0001 1000
 GDTR + 0018 (entry no. 3)
 GDTR –00 00 00
 LDT starts at –40 00 00

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 Invisible Registers

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 Example
 DS:1000

 DS = 001C

 1st13 bits –0000 0000 0001 1100 –LDT

 Selector –LDTR

 LDTR + 0018 (entry no. 3)

 GDTR –00 00 00
 DS starts at –80 00 00
 Linear Address –80 10 00
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 Memory: 8086 to 80486

 Segment (SR) -Offset

 8086 /8088 –Real mode
 Segment Value shifted left by 4 bits + offset –20 bit address

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 Memory: 8086 to 80486

 80286
 Real Mode
 Protected Mode
• Segment Register –Selector –points to descriptor
(LDT/GDT) –descriptor has starting address of
segment –Starting Address + Offset

• Linear address –Physical Address (24-bits)

• Segmentation: Process of conversion from virtual

address to linear address

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 Memory: 8086 to 80486

 80386/80486

 Real Mode
 Protected Mode

• Segment Register –Selector –points to descriptor

(LDT/GDT) –descriptor has starting address of segment –
Starting Address + Offset
• Segmentation=Virtual address to Linear Address (32-bits)
• Linear to Physical Address – one more translation=
Paging (80386 and 80486)

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 Descriptor: 80386 & 80486

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 Example: GDT
MOV AX, [1000H]
DS:1000
DS = 0018
1st 13 bits –0000 0000 0001 1000 -GDT
GDTR + 0018 (entry no. 3)
GDTR –00 00 00 00
DS starts at –00 20 00 00
Size= 0FFFF= 64K
LIMIT BYTE= SIZE-1= 64k
ACCESS RIGHT =93= 10010011
Linear address= 00200000

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 PD/PT Entry

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 Paging 80386 onwards
 Linear –physical
 Resources From Microprocessor
• CR0 –CR3 (4 control registers from 386 Microprocessor)
 Resources From Memory
• Page directory –1024 entries –every entries 4 bytes (32 bit) –
each point to Page Table
=>1024 * 4 = 4k
4 byte will give starting address of Paging table
So 1K paging table

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 Paging 80386 onwards
 Resources From Memory
• Page directory – 1 K page table

• Page table –1024 entries –every entries have 4 bytes –each

point towards Page (block of memory)
=>1024 *4 =4k

 Total no.pages =>1024 * 1024 = 1 M

 Page block of 4k size of page

 1 M pages X 4K= 4GB

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 Linear to Physical

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 CR0-3
CR0 –MSB PG bit

 CR3 –BITS 12 -31-base address of Page Directory

000000000000

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 PD/PT Entry

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 PD/PT Entry

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 Linear to Physical

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