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LMH66
LMH66
LMH6654, LMH6655
SNOS956E – JUNE 2001 – REVISED AUGUST 2014
LMH6654, LMH6655 Single and Dual Low Power, 250 MHz, Low Noise Amplifiers
1 Features 3 Description
1• (VS = ±5 V, TJ = 25 °C, Typical Values Unless The LMH6654 and LMH6655 single and dual high
Specified) speed voltage feedback amplifiers are designed to
have unity-gain stable operation with a bandwidth of
• Voltage Feedback Architecture 250 MHz. They operate from ±2.5 V to ±6 V and each
• Unity Gain Bandwidth 250 MHz channel consumes only 4.5 mA. The amplifiers
• Supply Voltage Range ±2.5V to ±6V feature very low voltage noise and wide output swing
to maximize signal-to-noise ratio, and possess a true
• Slew Rate 200 V/µsec
single supply capability with input common mode
• Supply Current 4.5 mA/channel voltage range extending 150 mV below negative rail
• Input Common Mode Voltage −5.15V to +3.7V and within 1.3 V of the positive rail. The high speed
• Output Voltage Swing (RL = 100 Ω) −3.6V to 3.4V and low power combination of the LMH6654 and
LMH6655 make these products an ideal choice for
• Input Voltage Noise 4.5 nV/√Hz many portable, high speed applications where power
• Input Current Noise 1.7 pA/√Hz is at a premium.
• Settling Time to 0.01% 25 ns The LMH6654 and LMH6655 are built on TI’s
Advance VIP10™ (Vertically Integrated PNP)
2 Applications complementary bipolar process.
• ADC Drivers The LMH6654 is packaged in 5-Pin SOT-23 and 8-
• Consumer Video Pin SOIC. The LMH6655 is packaged in 8-Pin
• Active Filters VSSOP (DGK) and 8-Pin SOIC.
• Pulse Delay Circuits Device Information(1)
• xDSL Receiver PART NUMBER PACKAGE BODY SIZE (NOM)
• Pre-amps LMH6654 SOIC (8) 4.90 mm x 3.91 mm
LMH6654 SOT-23 (5) 2.90 mm x 1.60 mm
LMH6655 SOIC (8) 4.90 mm x 3.91 mm
LMH6655 VSSOP (8) 3.00 mm x 3.00 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
10 10
en
in
1 1
100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LMH6654, LMH6655
SNOS956E – JUNE 2001 – REVISED AUGUST 2014 www.ti.com
Table of Contents
1 Features .................................................................. 1 7 Application and Implementation ........................ 16
2 Applications ........................................................... 1 7.1 Application Information............................................ 16
3 Description ............................................................. 1 7.2 Typical Application .................................................. 16
4 Revision History..................................................... 2 8 Power Supply Recommendations...................... 20
5 Pin Configuration and Functions ......................... 3 8.1 Power Dissipation ................................................... 20
6 Specifications......................................................... 4 9 Layout ................................................................... 20
6.1 Absolute Maximum Ratings ...................................... 4 9.1 Layout Guidelines ................................................... 20
6.2 Handling Ratings....................................................... 4 10 Device and Documentation Support ................. 21
6.3 Recommended Operating Conditions....................... 4 10.1 Documentation Support ........................................ 21
6.4 Thermal Information .................................................. 4 10.2 Electrostatic Discharge Caution ............................ 21
6.5 ±5V Electrical Characteristics ................................... 5 10.3 Glossary ................................................................ 21
6.6 5V Electrical Characteristics ..................................... 7 11 Mechanical, Packaging, and Orderable
6.7 Typical Characteristics .............................................. 9 Information ........................................................... 21
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
• Changed data sheet structure and organization. Added, updated, or renamed the following sections: Device
Information Table, Application and Implementation; Power Supply Recommendations; Device and Documentation
Support; Mechanical, Packaging, and Ordering Information. Deleted Switching Characteristics due to redundancy. ......... 1
• Changed from Junction Temperature Range to "Operating Temperature Range" ................................................................ 4
• Deleted TJ = 25°C................................................................................................................................................................... 5
• Deleted TJ = 25°C .................................................................................................................................................................. 7
5 + 1 8 1 8 +
1 V N/C N/C OUT A V
OUTPUT
A
2 7 +
-IN - V - +
2 7
- 2 -IN A OUT B
V
3 6
+IN + OUTPUT
+ -
3 6
+IN A B -IN B
3 4 4 5
+IN -IN - + -
V N/C
- 4 5
V +IN B
Pin Functions
PIN
LMH6654 LMH6655 I/O DESCRIPTION
NAME
DBV D DGK
-IN 4 2 I Inverting Input
+IN 3 3 I Non-inverting Input
-IN A 2 I ChA Inverting Input
+IN A 3 I ChA Non-inverting Input
-IN B 6 I ChB Inverting Input
+IN B 5 I ChB Non-inverting Input
N/C 1, 5, 8 –– No Connection
OUT A 1 O ChA Output
OUT B 7 O ChB Output
OUTPUT 1 6 O Output
V- 2 4 4 I Negative Supply
V+ 5 7 8 I Positive Supply
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
VIN Differential ±1.2 V
(2)
Output Short Circuit Duration See
Supply Voltage (V+ − V−) 13.2 V
V+ +0.5
Voltage at Input pins V
V- -0.5
(3)
Junction Temperature 150 °C
Infrared or Convection (20 sec.) 235 °C
Soldering Information
Wave Soldering (10 sec.) 260 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature
at 150°C.
(3) The maximum power dissipation is a function of TJ(MAX), RθJA and TA. The maximum allowable power dissipation at any ambient
temperature is PD = (TJ(MAX) − TA)/RθJA. All numbers apply for packages soldered directly onto a PC board.
(1) Human body model, 1.5 kΩ in series with 100 pF. Machine model: 0Ω in series with 100 pF.
(2) JEDEC document JEP155 states that 2000-V HBM allows safe manufacturing with a standard ESD control process.
(3) JEDEC document JEP157 states that 200-V MM allows safe manufacturing with a standard ESD control process.
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see the Electrical Characteristics Table.
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(5) Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature
at 150°C.
(5) Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature
at 150°C.
4 9
2 6
0 3
-2 0
-4 -3
GAIN (dB)
GAIN (dB)
VS = ±2.5V VS = ±2.5V
-6 -6
-8 -9
VS = ±5V VS = ±5V
-10 -12
-12 -15
-14 -18
-16 -21
1M 10M 100M 1G 1M 10M 100M 1G
FREQUENCY (Hz) FREQUENCY (Hz)
Figure 2. Closed Loop Bandwidth (G = +1) Figure 3. Closed Loop Bandwidth (G = +2)
24 25
19 20
VS = ±5V
14 VS = ±5V 15
9 10
4 5
GAIN (dB)
GAIN (dB)
-1 0
-6 -5
VS = ±2.5V VS = ±2.5V
-11 -10
-16 -15
-21 -20
-26 -25
1M 10M 100M 1G 1M 10M 100M 1G
FREQUENCY (dB) FREQUENCY (Hz)
Figure 4. Closed Loop Bandwidth (G = +5) Figure 5. Closed Loop Bandwidth (G = +10)
5 5.0
4.9 4.9
85°C
4.8
SUPPLY CURRENT (mA)
4.8
4.7
4.7
4.6 VS = ±5V
4.6
4.5
4.5
4.4
25°C
4.4
4.3
-40°C 4.3
4.2 VS = 5V
4.1 4.2
4 5 6 7 8 9 10 11 12 -60 -40 -20 0 20 40 60 80 100
SUPPLY VOLTAGE (V) TEMPERATURE (°C)
Figure 6. Supply Current per Channel Figure 7. Supply Current per Channel
vs. Supply Voltage vs. Temperature
-0.4 -0.2
25°C
VOS (mV)
VOS (mV)
-0.6 -0.3
85°C
85°C
-0.8 25°C -0.4
-1 -0.5
-1.2 -0.6
4 5 6 7 8 9 10 11 12 0 1 2 3 4 5 6 7 8
VSUPPLY (V) VCM (V)
0 7
VS = ±2.5V IBIAS
-0.1
6
-0.4
VOS (mV)
-40°C 4
-0.5
3
-0.6
25°C
-0.7 2
VOS
-0.8 85°C
1
-0.9
-1 0
0 0.5 1 1.5 2 2.5 3 3.5 -50 0 50 100
VCM (V) TEMPERATURE (°C)
Figure 10. Offset Voltage Figure 11. Bias Current and Offset Voltage
vs. Common Mode vs. Temperature
7
-40°C
VS = 5V
6
25°C
5
POSITIVE IBIAS (µA)
3 85°C
-1
0 0.5 1 1.5 2 2.5 3 3.5
VCM (V)
INPUT
110
AoL, PSRR, AND CMRR (dB)
100
CMRR
(1 V/div)
90
PSRR
80
OUTPUT
70
AoL @ ±5V
AoL @ 5V
60
-50 0 50 100
TEMPERATURE (°C) TIME (12.5 ns/div)
Figure 14. AOL, PSRR and CMRR Figure 15. Inverting Large Signal Pulse Response
vs. Temperature (VS = 5V)
INPUT
INPUT
(1 V/div)
(1 V/div)
OUTPUT
OUTPUT
(100 mV/div)
(1 V/div)
OUTPUT
OUTPUT
INPUT
INPUT
(100 mV/div)
(100 mV/div)
OUTPUT
OUTPUT
Figure 20. Non-Inverting Small Signal Pulse Response Figure 21. Inverting Small Signal Pulse Response
(VS = ±5V) (VS = 5V)
100 100
INPUT
10 10
en
OUTPUT
in
1 1
100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
TIME (12.5 ns/div)
-40
HARMONIC DISTORTION (dBc)
-50
-60
3RD
10 10
en -70
2ND
-80
-90
in -100
1 1 -110
100 1k 10k 100k 1M 10M 0.1 1 10 100
FREQUENCY (Hz)
FREQUENCY (MHz)
-60 -75
-70 -80
3RD
-80 -85
3RD
-90 2ND -90
-100 -95
-110 -100
0.1 1 10 100 -60 -40 -20 0 20 40 60 80 100
TEMPERATURE (°C)
FREQUENCY (MHz)
-60 -45
2ND
-50
-65
-55
-70
-60
-75 -65
3RD
-70
-80
3RD
-75
-85
-80
2ND
-90 -85
-95 -90
-95
-100 1 2 3 4 5 6 7 8 9 10
-60 -40 -20 0 20 40 60 80 100
GAIN (V/V)
TEMPERATURE (°C)
Figure 29. Harmonic Distortion
Figure 28. Harmonic Distortion
vs. Gain
vs. Temperature
VS = 5V, f = 5 MHz, VO = 2 VPP
VS = ±5V, f = 5 MHz, VO = 2 VPP
-45 -30
-50
-40
HARMONIC DISTORTION (dBc)
HARMONIC DISTORTION (dBc)
2ND
-55
-60 -50
2ND
-65
-60
-70
-75 -70
-80 -80
3RD
-85 3RD
-90
-90
-95 -100
1 2 3 4 5 6 7 8 9 10 0.0 0.5 1.0 1.5 2.0 2.5
GAIN (V/V) OUTPUT SWING (VPP)
-40
80
-50 70
PSRR (dB)
2ND 60
-60 POSITIVE
50
-70 40
30
-80
3RD
20
-90
10
-100 0
0 1 2 3 4 5 6 7 8 10 100 1k 10k 100k 1M 10M
3
60
2
40 VS = 5V
20 1
VS = ±5V
0
10 100 1k 10k 100k 1M 10M 0
1
.01 0.1 1 10 100
FREQUENCY k
OUTPUT SINKING CURRENT (mA)
4 -40
+
-50
3 -60
-70
VS = ±5V
2 -80
-90
1 -100
VS = 5V -110
0 -120
1
.01 0.1 1 10 100 100k 1M 10M 100M
k
OUTPUT SOURCING CURRENT (mA) FREQUENCY (Hz)
-
-40 80 +
× 1 k:
-50 70 CL
-60 60
-70 50
-80 40
-90 30
-100 20
-110 10
-120 0
100k 1M 10M 100M 0 10 20 30 40 50 60 70 80 90 100
FREQUENCY (Hz)
CAPACITIVE LOAD, CL (pF)
Figure 38. CrossTalk
vs. Frequency (LMH6655 only) Figure 39. Isolation Resistance
vs. Capacitive Load
100
90
80 180
PHASE
70 144
60 108
PHASE (°)
GAIN (dB)
50 72
40 36
30 0
20 -36
GAIN
10 -72
0 -108
-10 -144
-20 -180
1k 10k 100k 1M 10M 100M 500M
FREQUENCY (Hz)
- RISO
VOUT
VIN +
eni = en2 + (in+ · RSeq)2 + 4kTRSeq + (in- · (Rf || Rg))2 + 4kT(Rf || Rg) (3)
9 Layout
0.1 µF
0.1 µF
+
10 µF
-
V
10.3 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
www.ti.com 4-Jan-2016
PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com 4-Jan-2016
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com 6-Jan-2016
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 6-Jan-2016
Pack Materials-Page 2
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