2332
7, JULY 2010
A Space Vector Switching Strategy for Three-Level
Five-Phase Inverter Drives
Liliang Gao and John E. Fletcher
Abstract—A novel space vector modulation (SVM) technique
for a three-level five-phase inverter is described based on an
optimized five vectors concept. The concept utilizes a novel vector
minimization technique that reduces the number of vectors in
the d1 −q1 vector space by identifying candidate vectors in each
of the ten sectors that comprise the decagon vector space. The
candidate vectors are selected based on the inequality relationship
between the five-phase voltages during each switching cycle. Using
this technique, the original 243 inverter states are reduced to
113 candidate vectors, and from the remaining states ten possible
switching sequences in each sector are utilized to develop the
desired voltage reference in the d1 −q1 vector space while forcing
a null vector in the d3 −q3 vector space. A novel region determi-
nation technique is also introduced to identify the subregion that
the d1 −q1 voltage vector occupies. This technique significantly
reduces the computational overhead required when implementing
SVM techniques with multilevel and multiphase inverters. The
space vector technique can utilize redundant vectors to assist in
balancing subcycle variation of the dc-link capacitor voltage under
unbalanced load conditions. Experiments validate simulation re-
sults where the low-order voltage harmonics show that the d3 −q3
voltage vector is null.
Index Terms—d1 −q1 vector space, d3 −q3 vector space, opti-
mized five vectors (OFV), region, three level five phase.
I. I NTRODUCTION
I N 1981, Nabae et al. [1] introduced the three-level neutral-
point-clamped inverter, which is now one of the most
attractive in the field of medium-voltage and high-power ap-
plications. Multilevel topologies have attracted significant re-
search effort for many of the performance benefits they bestow
in medium-voltage drive and utility applications.
Researchers have mainly considered the multilevel inverter
with three phases [2]–[6]. However, multiphase drives are at-
tracting significant attention due to their potential value in high-
power drives, multimotor drives, and fault tolerant drives. Two
excellent papers [7], [8] give a comprehensive review of the
state-of-the-art in multiphase drives.
Compared with traditional three-phase systems the advan-
tages of the multiphase drive systems are [7]–[11]
1) reduced amplitude and increased frequency of torque
pulsation;
2) improved torque per ampere and power density of the
electrical machine;
Manuscript received March 4, 2009; revised July 8, 2009 and August 21,
2009; accepted September 4, 2009. Date of publication October 6, 2009; date
of current version June 11, 2010.
The authors are with the University of Strathclyde, G1 1XW Glasgow, U.K.
(e-mail: liliang.gao@eee.strath.ac.uk; john.fletcher@eee.strath.ac.uk).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TIE.2009.2033087
0278-0046/$26.00 © 2010 IEEE
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 57, NO.
3) improved fault tolerance since the loss of one or more
phases does not prevent the machine from starting and
running;
4) reduced dc-link current harmonics and rotor harmonic
currents;
5) improved division of power between inverter phase legs.
Given these advantages, researchers have made significant
research efforts in multiphase drive systems. Zhao and Lipo
[12] proposed a vector space decomposition technique where
the control and modeling of a six-phase induction machine
using a two-level inverter are decomposed into three 2-D or-
thogonal subspaces. Therefore, the machine variables can be
decoupled completely. In addition, a space vector pulsewidth
modulation (SVPWM) technique using vector space decompo-
sition is developed that eliminates the 5th, 7th, 17th, 19th, . . .
harmonics and produces sinusoidal phase current. de Silva et al.
[13] present a two-level SVPWM scheme to produce the volt-
age vectors in the d1 −q1 vector space while forcing the voltage
vectors in the d3 −q3 vector space to be null to produce a
sinusoidal flux pattern in the five-phase induction machine.
The d3 −q3 component is typically considered as distortion.
However, it can be employed to produce torque if appropriately
controlled. For example, Zheng et al. [14] present a paper
on improving the torque per rms current by up to 10% at
rated phase current, by controlling the relative position and
magnitude of the d1 −q1 and d3 −q3 flux in their corresponding
independent vector planes. This results in a quasi-trapezoidal
flux distribution in the air gap of the five-phase induction
machine. This better utilizes the stator iron saturation limit.
Research has generally concentrated on the two-level inverter
supply of a multiphase motor. However, it is necessary to
extend multiphase concepts from two level to three level, or
higher levels, for medium-voltage drives. For three-level five-
phase space vector modulation (SVM), a nearest three vector
algorithm was proposed [15]; however, it does not take the
d3 −q3 vector space into consideration and switching loss is
increased due to the selected switching strategy. Lopez et al.
[16], [17] proposed a multilevel multiphase modulator that can
be implemented from a two-level multiphase modulator via
displacement using a five-level five-phase cascaded full-bridge
inverter. However, the elimination of the d3 −q3 is not addressed
in this paper. Hutson et al. [18] presented a paper on an optimal
SVM switching strategy for multilevel multiphase machines
using a modified discrete particle swarm technique. This pro-
posed technique identifies an optimal switching sequence to
minimize the total harmonic distortion of phase voltage. Huang
and Corzine [19] proposed a “walking pattern” SVM technique.
GAO AND FLETCHER: SPACE VECTOR SWITCHING STRATEGY FOR THREE-LEVEL FIVE-PHASE INVERTER DRIVES 2333

Fig. 1. Three-level five-phase IGBT voltage source inverter.

Using this technique, vector selection is chosen so that the
pattern “walks” around the reference voltage with the goal of
minimizing the torque ripple.
A novel algorithm for three-level five-phase SVPWM tech-
nique is developed and described here, where the d3 −q3 voltage
component can be eliminated by controlling the voltage vector
in the d3 −q3 vector space to be zero, resulting in a sinusoidal
output voltage. In order to realize the proposed algorithm, the
vector space decomposition technique is used to decouple the
inverter states into the two vector spaces: one of them is respon-
sible for the d1 −q1 voltage reference and the other the d3 −q3
component. The d1 −q1 vector space is further partitioned by
employing switching sequences. A novel region determination
scheme is developed to determine the location of the reference
voltage vectors, hence the choice of the switching sequence.
Simulation and experimental results under different conditions
are presented and these demonstrate the effectiveness of the
proposed SVPWM strategy.
II. T HREE -L EVEL F IVE -P HASE S PACE
V ECTOR D ECOMPOSITION
Fig. 1 shows the topology of the three-level five-phase in-
sulated gate bipolar transistor (IGBT) inverter. The five-phase
voltages Vas, , Vbs , Vcs , Vds , and Ves are determined by the state
of the five-phase legs and expressed as switching vectors Vs1
and Vs3 in the d1 −q1 and d3 −q3 vector spaces, respectively
2
Vs1 = Vas + a5 Vbs + a25 Vcs + a35 Vds + a45 Ves
5
2
Vs3 = Vas + a5 Vcs + a25 Ves + a35 Vbs + a45 Vds
5 Therefore, in a similar fashion, it can be deduced that not
where a5 = ej2π/5 .
Each phase leg of the three-level five-phase inverter can have
three possible outputs hence there are total of 35 (243) output
voltage vectors. Each voltage vector can be mapped by (1) and
(2) onto the d1 −q1 vector space, as shown Fig. 2, and the d3 −q3
vector space, as shown in Fig. 3. There are three zero space
vectors and 240 nonzero space vectors which divide each vector
space into ten 36◦ sectors that form a decagon. There are 11
decagons and, according to the magnitude of the vertex voltage
space vectors, nine groups can be classified according to their
magnitude: 0.647Vdc , 0.524Vdc , 0.447Vdc , 0.4Vdc , 0.324Vdc ,
0.247Vdc , 0.2Vdc , 0.124Vdc , and 0.076Vdc .
III. R EDUCING THE N UMBER OF I NVERTER S TATES
The d3 −q3 vector space is similar to the d1 −q1 vector space
domain but with the d1 −q1 ABCDE phase order replaced
by a d3 −q3 ACEBD phase order system [12]. Hence, the
d3 −q3 vector space voltage represents a distortion voltage that
generates a d3 −q3 component in combination with the d1 −q1
component generated by the d1 −q1 vector space. It is generally
desired to eliminate the d3 −q3 voltage distortion by making
the d3 −q3 voltage vector null, resulting in sinusoidal voltages
hence a sinusoidal air-gap flux pattern in the induction machine.
For the two-level five-phase system, in order to null the d3 −q3
voltage component, it is known that combinations of null
vectors and vectors on the outermost and the middle decagons
can be used to implement the required output reference. The
 vectors on the innermost decagon are not utilized, as, if used,
(1) will cause distortion and increase the switching loss of the
 system.
(2)
all the space vectors in the decagon need be employed in
formulating the output voltage for a three-level five-phase
2334 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 57, NO. 7, JULY 2010

Fig. 2. (a) Two-hundred forty-three inverter states mapped onto the d1 −q1 vector space and (b) inverter states in the first sector.

inverter. A method to eliminate unnecessary vectors is desirable ponents are to be zero, Vd3 , Vq3 are zero hence
to reduce the number of voltage vectors (from 243) therefore
reduce the complexity of finding suitable switching sequences Vas = Vref cos(θ) (4)
to formulate the desired output voltage reference. The trans- Vbs = Vref (cos(θ) cos(α) + sin(θ) sin(α))
formation between decoupled reference frame and the phase
voltage reference frame is = Vref cos(θ − α) (5)
Vcs = Vref (cos(θ) cos(2α) + sin(θ) sin(2α))
⎡ ⎤ ⎡ ⎤ ⎡ ⎤ = Vref cos(θ − 2α) (6)
Vas 1 cos(α) cos(2α) cos(3α) cos(4α) T Vd1
Vds = Vref (cos(θ) cos(3α) + sin(θ) sin(3α))
⎢ Vbs ⎥ ⎢ 0 sin(α) sin(2α) sin(3α) sin(4α) ⎥ ⎢Vq1 ⎥
⎢ ⎥ ⎢ ⎥ ⎢ ⎥ = Vref cos(θ − 3α)
⎢ Vcs ⎥=⎢ 1 cos(3α) cos(6α) cos(9α) cos(12α)⎥ ⎢Vd3 ⎥ (7)
⎣ ⎦ ⎣ ⎦ ⎣ ⎦
Vds 0 sin(3α) sin(6α) sin(9α) sin(12α) Vq3 Ves = Vref (cos(θ) cos(4α) + sin(θ) sin(4α))
1 1 1 1 1
Ves n
2 2 2 2 2
(3) = Vref cos(θ − 4α). (8)

where α = 2π/5, and the d1 −q1 voltage reference components Taking the first sector into consideration (0 ≤ θ < π/5),
Vd1 = Vref cos(θ) and Vd1 = Vref sin(θ). Since the d3 −q3 com- from (4)–(8), the phase voltage magnitudes in this sector
GAO AND FLETCHER: SPACE VECTOR SWITCHING STRATEGY FOR THREE-LEVEL FIVE-PHASE INVERTER DRIVES 2335

Fig. 3. Two-hundred forty-three inverter states mapped onto the d3 −q3 vector space.

must satisfy Vas ≥ Vbs ≥ Ves ≥ Vcs ≥ Vds , hence the pole TABLE I
F IVE -P OLE VOLTAGE R ELATIONSHIPS
voltages must satisfy Vao ≥ Vbo ≥ Veo ≥ Vco ≥ Vdo . Each
inverter state represents a voltage space vector and also
a magnitude relationship between line and phase volt-
ages. For example, vector 22102 represents pole voltages
of [+Vdc , +Vdc , +Vdc /2, 0, +Vdc ]. This satisfies the required
property Vao ≥ Vbo ≥ Veo ≥ Vco ≥ Vdo in sector 1 therefore
is a candidate inverter state to formulate the desired reference
voltage in sector 1.
However, inverter state 12102, which appears in sector 1 of
the d1 −q1 vector space, generates voltage magnitudes Vbo ≥
Veo > Vao ≥ Vco > Vdo , and does not satisfy the phase voltage
relationship, therefore is not an obvious candidate to formulate
the reference voltage in sector 1. A total of 18 voltage vectors
out of the 36 vectors in the first sector (with the exception of the
null vectors) satisfy Vao ≥ Vbo ≥ Veo ≥ Vco ≥ Vdo . The phase
voltage relationships in all other sectors of the decagon can also be extended to the higher order multiphase inverter systems
be found, Table I, and candidate inverter states identified. The using more levels.
process of eliminating switching states that do not satisfy the
magnitude relationship for the associated sector greatly reduces
IV. D EVELOPMENT OF S WITCHING S EQUENCES
the quantity of space vectors in each sector of the decagon. Only
113 space vectors remain from the original 243. The simplified Sinusoidal excitation of the multiphase system is generated
d1 −q1 vector space is shown in Fig. 4. This methodology can by the five-phase inverter when the voltage vectors in the d1 −q1
2336 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 57, NO. 7, JULY 2010

Fig. 5. Location of vector states in the d1 −q1 and d3 −q3 vector space for
switching sequence 1 (11001-11101-11111-21111-22111).

TABLE II
P OTENTIAL S WITCHING S EQUENCES FOR THE SVM IN S ECTOR 1

Fig. 4. d1 −q1 vector space with simplified space vectors.

vector space are applied, but with the voltage vector in the
d3 −q3 vector space controlled to be the null vector. If not, the
current will be distorted by the excitation of the d3 −q3 vector
space [12]. The rules for the development of three-level five-
phase SVM strategy are as follows.
1) The space vectors utilized to formulate the desired vector
in the d1 −q1 vector space should be selected in a way that
the combination of the vectors in the d3 −q3 vector space
could result in cancellation over the switching cycle.
2) The inverter can only make one transition during a
switching event to minimize the switching loss during the
sequence.
3) Selection of redundant space vectors are preferable so
that the neutral point capacitor voltage ripple can be
balanced by adjusting the dwell time of the redundant
voltage vectors.
For a five-phase inverter, the minimum number of state
transitions in one switching cycle with continuous modulation
is ten. The converter cycles through six states in each switching
period. Optimized five vectors (OFV) modulation (instead of
near three vector modulation of the three-phase inverter) is Fig. 6. Location of vector states in the d1 −q1 and d3 −q3 vector space for
switching sequence 11 (11001-21001-21101-22101-22102).
employed, where there will be ten switching events during each
modulation cycle.
Fig. 5 shows the inverter states in the first sector of the 11001, and 11101 and 22111, is 1.618. Logically, if these pairs
simplified d1 −q1 vector space shown in Fig. 4. These are used of inverter states have dwell times in the ratio of 1/1.618,
to illustrate how to determine suitable switching sequences the vectors in the d3 −q3 vector space will cancel. However,
using the OFV technique. There are a total of 16 such switching with regard to switching sequence 11 which has a sequence
sequences, as shown in Table II that satisfy the aforementioned 11001-21001-21101-22101-22102 (Fig. 6) the inverter states
rules. Other switching sequences are possible but produce 21001 and 11001 are opposite in the d3 −q3 vector space as
multiple device switching transitions during the modulation are the projection of 22102 and 21101 onto the axis formed by
cycle. There are only ten switching sequences that can produce vectors 11001 and 21001, where vector magnitude cancellation
d3 −q3 vector space cancellation. For example, in the d3 −q3 can take place. However, the vectors 22101, 22102 and 21101
vector space, switching sequence 1 (Fig. 5) has a sequence cannot balance each other on an axis orthogonal to the axis
11001-11101-11111-21111-22111. Inverter states 21111 and formed by vectors 11001 and 21001. Hence, it is not possible
11001 are opposite in the d3 −q3 vector space, as are 22111 to produce a null voltage vector reference in the d3 −q3 vector
and 11101. The magnitude ratio between both 21111 and plane and d3 −q3 voltage will result.
GAO AND FLETCHER: SPACE VECTOR SWITCHING STRATEGY FOR THREE-LEVEL FIVE-PHASE INVERTER DRIVES 2337

By examining the distribution of vectors in the d3 −q3 space and d3 −q3 components of inverter state 11000 are
for each sequence from 1 to 16, it is found that the switching √
3+ 5
sequences from 1 to 10 in the Table II are potential candi- Vd12 = Vdc
date sequences that can be employed to formulate the desired 20
√
voltage reference with d3 −q3 voltage vector elimination. The 10 + 2 5
Vq12 = Vdc
remaining switching sequences 11–16 are not able to null
√ 20
the d3 −q3 voltage vector and can be eliminated as possible 3− 5
candidate sequences. Vd32 = Vdc
20
√
10 − 2 5
Vq32 = − Vdc (13)
V. DWELL T IME C ALCULATION AND 20
R EGION PARTITIONING if 11000 was vector 2 in the switching sequence.
In two-level three-phase systems, the output voltage refer- Similarly, the d1 , q1 , d3 , q3 components of each switching
ence is generated using the two vertex vectors of each sextant state in the switching sequence can be calculated. These are
of the hexagon and a zero voltage vector. The area enclosed substituted into (12) for switching sequence 1 initiated by
by these three states is the region where the output voltage ref- inverter state 00000 to give
erence can be synthesized. However, the multiphase system is ⎡ 1 √ √ √ ⎤−1
⎡ ⎤ 0 5 Vdc √ 20 Vdc
3+ 5 1+ 5 1+ 5
Vdc Vdc
different from the three-phase system as it is necessary to cancel T0 ⎢ √
10 √ 20
√ ⎥
d3 −q3 vector space component using appropriate dwell time ⎢ T1 ⎥ ⎢ Vdc⎥
10+2 5 10−2 5
⎢ 0 0 V dc 0 ⎥
⎢ ⎥⎢ 1 20√ √ √
20
⎥
ratios. This results in an accessible region that the candidate ⎢ T2 ⎥=⎢0 Vdc 3− 5
V 1− 5
V 1− 5
V ⎥
switching sequence can produce being smaller than the area ⎣ ⎦⎢ 5 √ 20
√
dc 10 dc
√ 20
√
dc
⎥
T3 ⎣ − 10−2 5 10+2 5 ⎦
enclosed by the vectors used in the sequence. The candidate T4 0 0 20 V dc 0 20 V dc
switching sequences are more complicated than the two-level 1 1 1 1 1
⎡ ⎤
five-phase inverter and the modulation strategy employed by Ts Vref cos θ
three-level three-phase inverter system cannot be utilized by the ⎢ Ts Vref sin θ ⎥
⎢ ⎥
three-level five-phase inverter system. It is important to define ×⎢ 0 ⎥ . (14)
⎣ ⎦
the accessible region of each of the ten switching sequence in 0
each sector. The following equations define the resultant space TS
vector volt-seconds in the d1 −q1 and d3 −q3 vector space:
From (14), the dwell time of each inverter state can be ex-
−−−−→ −
→ −
→ −
→ −
→ −
→ pressed as follows:
Ts Vdq1ref = T0 V0 + T1 V1 + T2 V2 + T3 V3 + T4 V4 (9)
−−−−→ −
→ −
→ −
→ −
→ −
→ π π
Ts Vdq3ref = T0 V0 + T1 V1 + T2 V2 + T3 V3 + T4 V4 = 0 (10) T0 = Ts − 4M TS cos cos θ − (15)
10 10
Ts = T 0 + T 1 + T 2 + T 3 + T 4 (11) π π
T1 = − 4M TS sin sin θ − (16)
5 5
where T0 , T1 , T2 , T3 , T4 , are the dwell times of the switching 2π
→ −
− → − → − → − → T2 = 4M TS sin θ sin (17)
sequence vectors V0 , V1 , V2 , V3 , V4 employed in the chosen 5
−−−−→ √ π π
switching sequence, Ts is the switching period, Vdq1ref is the T3 = M T S 5 cos θ − 4 cos cos sin θ (18)
−−−−→ 5 10
desired output voltage in the d1 −q1 vector space, Vdq3ref is π
the desired output voltage in the d3 −q3 vector space (which T4 = 4M TS sin θ sin (19)
5
should be null). From (9)–(11), the following 5 × 5 matrix is
derived: where 0 ≤ θ < (π/5), M = Vref /Vdc .
In order to generate a sinusoidal flux pattern in the multi-
⎡ ⎤ ⎡ ⎤ ⎡ ⎤
T0 Vd10 Vd11 Vd12 Vd13 Vd14 −1 Vd1 phase induction machine, it is necessary to ensure the d3 −q3
⎢ T1 ⎥ ⎢ Vq10 Vq11 Vq12 Vq13 Vq14 ⎥ ⎢ Vq1 ⎥ vector space voltage is the null vector by cancellation of the
⎢ ⎥ ⎢ ⎥ ⎢ ⎥
⎢ T2 ⎥ = ⎢ Vd30 Vd31 Vd32 Vd33 Vd34 ⎥ ⎢ Vd3 ⎥ opposite but collinear vectors. The dwell time of all the selected
⎣ ⎦ ⎣ ⎦ ⎣ ⎦ voltage vectors should be less than Ts and greater than zero to
T3 Vq30 Vq31 Vq32 Vq33 Vq34 Vq3
T4 1 1 1 1 1 Ts guarantee cancellation taking place in the d3 −q3 vector space.
(12) From (15)–(19), the dwell time of space vectors 10000, 11000,
11001, and 11101 is greater than zero. In order to satisfy the
where Vd10 , Vd11 , Vd12 , Vd13 , Vd14 , and Vq10 , Vq11 , Vq12 , Vq13 ,
aforementioned condition
Vq14 are the d1 −q1 components associated with the switching
→ −
− → − → − → −→ π π
sequence vectors V0 , V1 , V2 , V3 , V4 , respectively, while Vd30 , Ts − 4M TS cos cos θ − ≥ 0. (20)
Vd31 , Vd32 , Vd33 , Vd34 and Vq30 , Vq31 , Vq32 , Vq33 , Vq34 are the 10 10
d3 −q3 components associated with switching sequence vectors Thus
−
→ − → − → − → − →
V0 , V1 , V2 , V3 , V4 , respectively.
1
The d1 , q1 , d3 , q3 components of the each switching state M≤  . (21)
can be calculated using (1) and (2). For example, the d1 −q1 4 cos 10
π
cos θ − π
10
2338
Fig. 7. Accessible region defined by switching sequence 1 in sector 1 using
inverter states 00000, 10000, 11000, 11001, and 11101. Note that the accessible
region is not bounded by the inverter state vectors used in the switching
sequence but is a smaller region.
Fig. 8. Ten regions formulated by the ten switching sequences in sector 1 of
the d1 −q1 decagon.
According to (21), switching sequence 1 has an accessible
region for the output voltage shown as the shaded region in
Fig. 7. The accessible region formed by this switching sequence
is not the region bounded by the selected sequence vectors
but a smaller region. The compression of the region results
because of the need to cancel the d3 −q3 vector using dwell
times. Fig. 7 clearly shows this effect as the shaded region does
not extend to the vectors 11000 or 11001 used in the sequence.
In a similar way, other accessible regions are formed by the
remaining switching sequences. Regions A, B, C, D, E, H, F,
G, H, J, and K correspond to switching sequences 1 to 10 in
Table II, respectively (Fig. 8). The behavior of the ten candidate
switching sequences in other sectors can be derived in a similar
way. Fig. 9 shows the resulting 100 sectors and their partitions.
VI. S WITCHING S EQUENCE O PTIMIZATION
From the ten identified sequences in sector 1 there are total
of 21 inverter states used. The three zero space vectors (00000,
11111, and 22222) have no influence on the capacitor voltage
imbalance of the dc-link voltage because there is no current
drawn from the neutral point. Four pairs of redundant vectors
(10000/21111, 11000/22111, 11001/22112 and 11101/22212)
have opposite effects on the capacitor voltage balance since
the neutral point current produced by these vector has the
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 57, NO. 7, JULY 2010
Fig. 9. Overall partitioning of the d1 −q1 vector space showing ten sectors
and 100 regions accessed by 100 switching sequences.
same magnitude but opposite sign. Capacitor voltage balance
of the multilevel inverter is assisted by manipulating redundant
voltage vectors, thereby partly controlling the neutral point
current hence the neutral point voltage. There are two vectors
in sector 1 (22000 and 22002) that do not have any influence on
the capacitor voltage balance as they have no phase connection
with neutral point of the inverter. This assumes equal capaci-
tance values. There are six vectors that have an impact on the
capacitor voltage ripple that is determined by the phase current
sign and magnitude: 21101, 21001, 22102, 21000, 22101, and
22001. These have one- or two-phase connections with the
neutral point of the inverter.
The symmetrical OFV modulation technique employs five
inverter states to produce the desired reference voltage during
each switching sequence. The redundant voltage vector pairs
can be used to maintain the neutral point voltage balance, where
the selection of which redundant vector state is used is based
on the capacitor voltage imbalance. In order to control neutral
point voltage variation, the optimized switching sequence in
each subregion is initialized by redundant vectors. For region
F, G, J, and K, there is only one switching sequence initialized
by redundant vector 11000 or 11001. It can be found out that
there are four candidate switching patterns in region A1, four in
region B1, three in region C1 and D1, and two in region E1 and
H1 initialized by redundant vectors 10000, 11000, 11001, and
11101, respectively. In order to define the optimized switching
sequences, the following guidelines are followed.
1) A minimum number of transitions will minimize the
switching loss during the transition between regions and
sectors.
2) Switching patterns with zero vectors are avoided since
these vectors cannot be employed to balance the neutral
point voltage potential.
GAO AND FLETCHER: SPACE VECTOR SWITCHING STRATEGY FOR THREE-LEVEL FIVE-PHASE INVERTER DRIVES 2339

3) Switching states which have two- or three-phase connec-

tions with the neutral point are preferable to improve
the balance capability. They provide greater freedom to
control the neutral point variation.
It can be observed that the switching sequences in all the
regions are initiated with inverter state 11000 or 11001. This
means that when the voltage reference vector traverses between
regions A1, B1, C1, D1, and E1, if the switching sequences
are initiated by switching state 11000 or 11001, there will be
no multiple inverter state transitions; moreover, there will be
just one switching state transition when the voltage reference
rotates or moves into the regions F1, G1, H1, J1, and K1 (There
are fewer candidate switching sequences available in these
regions compared to regions A1, B1, C1, D1, and E1). There
are no other switching sequences which can further minimize
the switching state transitions between regions. The developed
optimized switching sequences are illustrated in Table II.

VII. D ETERMINING THE VOLTAGE R EFERENCE L OCATION

It is necessary to develop an effective and efficient method
of determining the location of the reference voltage vector with
respect to the accessible regions shown in Fig. 9. The reference
location then defines the required switching sequence. Each
triangular region is defined by three distinctive sides which
are uniquely determined by the centerlines of adjacent and
nonadjacent sectors and the sector where the reference vector
is located because all sides of the triangles in the sector are
perpendicular to sector centerlines. There are a total of five
sector centerlines involved if the sector 1 is considered. These
are “oa,” “ob,” “oe,” “ok,” and “om.” For example, in Fig. 10,
Fig. 10. Geometrical depiction of switching region determination.
one side of Region B1 “o3o4” is perpendicular to the centerline
of sector 2 “ob” and the point of intersection of these two TABLE III
lines is “n1”; one side of this region “o4o5” is perpendicular PARTITIONING L INE L ENGTHS IN S ECTOR 1
to the centerline of sector 1 “oe” and the point of intersection
is “e3”; another side of this region “o3o5” is perpendicular to
the centerline of sector 10. “ok” and the point of intersection
is “k1.” Region B1 can be determined by the length of “on1,”
“oe1,” and “ok1.” By observation in Fig. 10, there are a total
of nine lines, “od1,” “on1,” “oe,” “oe1,” “oe2,” “oe3,” “oe4,”
“ok1,” and “of1,” which can be used to determine the positions
of all the regions. The lengths of these nine lines are detailed in
Table III.
When the voltage reference sweeps different regions in the
first sector, the accessible region can be determined by com-
paring the line lengths in Table IV with the projections “op1,”
“op2,” “op3,” “op4,” and “op5” of the voltage reference onto
the five sector centerlines “oa,” “ob,” “oe,” “ok,” and “om” in
Table III. Table III summarizes the expressions that calculate
the projection components. The determination of the region that
the voltage vector occupies is then simply a set of magnitude induction motor model with parameters, as shown in Table V
comparisons, Table IV, which can be encoded in software. in the Appendix. The proposed three-level five-phase SVPWM
algorithm, the three-level five-phase inverter model, and the
five-phase induction model are coded using S-functions. As the
VIII. S IMULATION R ESULTS
space vector decagon is divided into 100 regions, it is necessary
In order to evaluate the described SVM technique for the to identify the behavior of these modulation methods when the
three-level five-phase inverter, MatLab simulations are per- voltage reference traverses different regions and sectors of the
formed on a five-phase inverter switching at 5 kHz and an decagon. Thus, the characteristics of the current, line voltages,
2340 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 57, NO. 7, JULY 2010

TABLE IV
R EGION D ETERMINATION IN S ECTOR 1

and capacitor voltage ripple can be examined with a modulation

index 0.45 (Region A), 0.75 (Region C, D, and E), and 0.95
(Region F, G, H, J, and K) hence verifying the algorithm. The
following observations are made.
1) The dc-link capacitor voltages converge under steady
state for each modulation index. There is no significant
neutral point potential voltage variation with a maximum
capacitor voltage ripple of 5 V which is 1.6% of the dc- Fig. 11. Simulation results with a modulation index of 0.95 for (a) and (c) line
link voltage. This occurs without any active balancing voltage between phase “a” and “b” and its frequency spectrum, (b) and (d) line
voltage between phase “a” and “c” and its frequency spectrum, (e) five-phase
method employed. The frequency of the capacitor voltage current waveforms, and (f) the detailed capacitor voltage ripples.
ripple is at a frequency of five times of the fundamental
frequency. This is demonstrated in Figs. 11(f), 12(e),
and 13(e).
2) Both adjacent line voltage and nonadjacent line voltages
have five levels when the voltage reference sweeps Re-
gions F, G, H, J, and K. This is shown in Fig. 11(a)
and (b). When the voltage vector is located in Regions
C, D, and E, the adjacent line voltage has three levels,
but the nonadjacent line voltage has five levels. This is
shown in Fig. 12(a) and (b). Both the adjacent line voltage
and nonadjacent line voltage have three levels when the
voltage reference sweeps through Region A, as shown
in Fig. 13(a) and (b). Therefore, line “o4o5” is a parti-
tion line where the nonadjacent voltage is transformed
from three to five levels while the adjacent line voltage
remains unchanged with three level. Likewise, the line
“o1o2” is a partition line where the adjacent line voltage
is transformed from five level to three level while the
nonadjacent line voltage remains unchanged with five
levels.
3) The d3 −q3 component in the adjacent and nonadja-
cent line voltage are greatly reduced. This can be ob-
served from the voltage spectra shown in Figs. 11(c) and
(d)–13(c) and (d). For example, the third and seventh
harmonics, which are typically associated with the d3 −q3
vector space, are low. For example, with M = 0.95, the
third and seventh components are 0.4% and 0.2% in the
adjacent line voltage, respectively. These results com-
pare well with carrier-based PWM techniques at similar Fig. 12. Simulation results with a modulation index of 0.75 for (a) and
(c) line voltage between phase “a” and “b” and its frequency spectrum,
switching frequencies. Similar results are obtained for (b) and (d) line voltage between phase “a” and “c” and its frequency spectrum,
lower modulation depths. and (e) the detailed capacitor voltage ripples.
GAO AND FLETCHER: SPACE VECTOR SWITCHING STRATEGY FOR THREE-LEVEL FIVE-PHASE INVERTER DRIVES 2341

Fig. 13. Simulation results with a modulation index of 0.45 for (a) and
(c) line voltage between phase “a” and “b” and its frequency spectrum, (b) and
(d) line voltage between phase “a” and “c” and its frequency spectrum,
and (e) the detailed capacitor voltage ripples. Fig. 14. Experimental results with a modulation index of 0.95 for (a) and
(c) line voltage between phase “a” and “b” and its frequency spectrum, (b) and
(d) phase current Ia and Ib, line voltage between phase “a” and “c” and its
frequency spectrum, and (e) the detailed capacitor voltage ripple.

IX. E XPERIMENTAL R ESULTS

In order to validate the proposed SVM scheme, a set of exper-
iments have been carried out using different modulation indices
with a full load current of 10 A and dead-time compensation
under open-loop control. Table V details the parameters of
induction machine as well as the three-level five-phase inverter.
The switching frequency is set to 5 kHz. An Infineon DSP
TC1796 is employed to generate the 20 PWM signals which
drive the IGBT devices of the inverter via a gate drive module
to each power device. The induction machine is connected to
a dc generator which is configured to apply rated load torque.
The experimental results under rated current conditions verify
the simulation results. While the experimental results deviate
slightly from the simulation data the following observations
are made:

1) The neutral point potential voltage variation with a mag-

nitude of 5 V is equivalent to 5 V in the simulation shown
in Figs. 14(e)–16(e).
2) Both adjacent and nonadjacent line voltages have five lev-
els with a modulation index of 0.95 [Fig. 14(a) and (b)].
With a modulation index of 0.75, the adjacent line voltage
has three levels while the nonadjacent line voltage has
five levels [Fig. 15(a) and (b)]. Both adjacent and nonad-
jacent line voltages have three levels with a modulation Fig. 15. Experimental results with a modulation index of 0.75 for (a) and
(c) line voltage between phase “a” and “b” and its frequency spectrum, (b) and
index of 0.45 [Fig. 16(a) and (b)]. These are the same as (d) phase current Ia and Ib, line voltage between phase “a” and “c” and its
the simulation results. frequency spectrum, and (e) the detailed capacitor voltage ripple.
2342
Fig. 16. Experimental results with a modulation index of 0.45 for (a) and
(c) line voltage between phase “a” and “b” and its frequency spectrum, (b) and
(d) line phase current Ia and Ib, voltage between phase “a” and “c” and its
frequency spectrum, and (e) the detailed capacitor voltage ripple.
3) The d3 −q3 voltage components (third and seventh) are
small both in the adjacent and nonadjacent line voltages.
With a modulation index of 0.95, 0.75, and 0.45, the
third and seventh harmonics are shown in Figs. 14(c)
and (d)–16(c)and (d). These are similar to those in the
simulation results in Figs. 11, 12(c) and (d), and 13(c) and
(d). The third harmonic is less than 0.8% and the seventh
is less than 0.4% in the adjacent line voltage. Both the
third and the seventh harmonics are less than 0.5% in
the nonadjacent line voltage. It is clear that the proposed
technique generates no appreciable d3 −q3 vector space
component.
X. C ONCLUSION
A novel optimal SVM technique for a three-level five-phase
inverter has been described, analyzed, and verified. It applies a
sinusoidal voltage waveform to the five-phase induction motor.
Due to the complexity of the three-level five-phase inverter
compared with the three-level three-phase inverter, a switching
state minimization method, which eliminates the undesired
switching vectors, is introduced to simplify the main vector
space domain. The 16 switching sequences which guarantee no
multiple simultaneous transitions during each inverter cycle are
identified from the simplified vector space. Then, each sector
is partitioned by restricting the voltage reference vector in the
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 57, NO. 7, JULY 2010
d3 −q3 space to be null, resulting in ten regions formulated in
sector 1 (a total of 100 in the decagon). Switching sequences
based on symmetrical SVM are developed with optimization of
the switching transition when the voltage vectors move between
regions and sectors. A novel region determination method is de-
scribed, where the complicated region identification algorithm
is simplified. MatLab simulation results of the SVM verify
that no significant low-order harmonics are generated by the
technique either in the adjacent or nonadjacent line voltages.
In addition, the neutral point potential of the inverter deviates
only slightly without employing any dc-link capacitor voltage
balancing techniques. This has been demonstrated under mod-
ulation indices varying from 0.45 to 0.95. Experimental results
confirm the validity of the technique.
A PPENDIX
TABLE V
D ISTANCE FACTOR OF M AIN G ROUND C ATEGORIES
R EFERENCES
[1] A. Nabae, I. Takahashi, and H. Akagi, “A new neutral-point clamped
PWM inverter,” IEEE Trans. Ind. Appl., vol. 1A-17, no. 5, pp. 518–523,
Sep./Oct. 1981.
[2] J. Pou, R. Pindado, D. Boroyevich, and P. Rodriguez, “Evaluation of
the low-frequency neutral-point voltage oscillations in the three-level
inverter,” IEEE Trans. Ind. Electron., vol. 52, no. 6, pp. 1582–1588,
Dec. 2005.
[3] D. Lalili, E. M. Berkouk, F. Boudjema, and N. Louci, “Self balancing of
dc-link capacitor voltages using redundant vectors for SVPWM controlled
five-level inverter,” in Proc. SSD, Amman, Jordan, Jul. 20–22, pp. 1–6.
[4] A. von Jouanne, S. Dai, and H. Zhuang, “A multilevel inverter approach
providing dc-link balancing, ride-through enhancement, and common-
mode voltage elimination,” IEEE Trans. Ind. Electron., vol. 49, no. 4,
pp. 739–745, Aug. 2002.
[5] L. G. Franquelo, J. Rodriguez, J. I. Leon, S. Kouro, R. Portillo, and
M. A. M. Prats, “The age of multilevel converters arrives,” IEEE Ind.
Electron. Mag., vol. 2, no. 2, pp. 28–29, Jun. 2008.
[6] J. Pou, R. Pindado, and D. Boroyevich, “Voltage-balance limits in four-
level diode-clamped converters with passive front ends,” IEEE Trans. Ind.
Electron., vol. 52, no. 1, pp. 190–196, Feb. 2005.
[7] E. Levi, “Multiphase electric machines for variable-speed applications,”
IEEE Trans. Ind. Electron., vol. 55, no. 5, pp. 1893–1909, May 2008.
[8] E. Levi, R. Bojoi, F. Profumo, H. Toliyat, and S. Williamson, “Multiphase
induction motor drives: A technology status review,” IET Elect. Power
Appl., vol. l, no. 4, pp. 489–516, Jul. 2007.
[9] Y. Zhao and T. A. Lipo, “Modeling and control of a multi-phase induction
machine with structural unbalance, Part 1: Machine modeling and multi-
dimensional current regulation,” IEEE Trans. Energy Convers., vol. 11,
no. 3, pp. 570–577, Sep. 1996.
[10] Y. Zhao and T. A. Lipo, “Modeling and control of a multi-phase induction
machine with structural unbalance, Part II: Field-oriented control and
experimental verification,” IEEE Trans. Energy Convers., vol. 11, no. 3,
pp. 578–584, Sep. 1996.
GAO AND FLETCHER: SPACE VECTOR SWITCHING STRATEGY FOR THREE-LEVEL FIVE-PHASE INVERTER DRIVES
[11] H. M. Ryu, J. W. Kim, and S. K. Sul, “Synchronous-frame current control
of multiphase synchronous motor under asymmetric fault condition due
to open phases,” IEEE Trans. Ind. Appl., vol. 42, no. 4, pp. 1062–1070,
Jul./Aug. 2006.
[12] Y. Zhao and T. A. Lipo, “Space vector PWM control of dual three phase
induction machine using vector space decomposition,” IEEE Trans. Ind.
Appl., vol. 31, no. 5, pp. 1100–1109, Sep./Oct. 1995.
[13] P. S. N. de Silva, J. E. Fletcher, and B. W. Williams, “Development of
space vector modulation strategies for five phase voltage source inverters,”
in Proc. IET Power Electron. Mach. Drives Conf., 2004, pp. 650–655.
[14] L. B. Zheng, J. E. Fletcher, B. W. Williams, and X. He, “Dual-plane
vector control for a five-phase induction machine for an improved flux
pattern,” IEEE Trans. Ind. Electron., vol. 55, no. 5, pp. 1996–2005,
May 2008.
[15] Q. Song, X. Zhang, F. Yu, and C. Zhang, “Research on space vector PWM
of five-phase three-level inverter,” in Proc. 8th ICEMS, Sep. 27–29, 2005,
vol. 2, pp. 1418–1421.
[16] O. Lopez, J. Alvarez, J. Doval-Gandoy, and F. D. Freijedo, “Multilevel
multiphase space vector PWM algorithm,” IEEE Trans. Ind. Electron.,
vol. 55, no. 5, pp. 1933–1942, May 2008.
[17] O. Lopez, J. Alvarez, J. Doval-Gandoy, and F. D. Freijedo, “Multi-
level multiphase space vector PWM algorithm with switching state re-
dundancy,” IEEE Trans. Ind. Electron., vol. 56, no. 3, pp. 792–804,
Mar. 2009.
[18] C. M. Hutson, G. K. Venayagamoorthy, and K. A. Corzine, “Optimal
SVM switching for a multilevel multiphase machine using modified
discrete PSO,” in Proc. IEEE Swarm Intell. Symp., St. Louis, MO,
Sep. 21–23, 2008, pp. 1–6.
[19] J. Huang and K. A. Corzine, “A new walking pattern SVM technique
for five-phase motor drives,” in Conf. Rec. IEEE IAS Annu. Meeting,
Oct. 5–9, 2008, pp. 1–8.
2343
Liliang Gao received the College Diploma from
Shandong University of Technology, Zibo, China,
in 1993 and the M.Sc. degree (with distinction)
in embedded systems from Heriot-Watt University,
Edinburgh, U.K., in 2005. He is currently work-
ing toward the Ph.D. degree in power electronics
and machine drives at the University of Strathclyde,
Glasgow, U.K.
He was an R&D Mechanical Engineer with
Shandong Binzhou Bohai Piston Company, Ltd.,
China. He is the coholder of three patents. His re-
search interests are power electronics and machine control.
Mr. Gao is the recipient of the 2005 Shandong Science and Technology
Improvement Award.
John E. Fletcher received the B.Eng. (first-class
honors) and Ph.D. degrees in electrical and electronic
engineering from Heriot-Watt University, Edinburgh,
U.K., in 1991 and 1995, respectively.
He was with Heriot-Watt University until 2007
and is currently a Senior Lecturer with the University
of Strathclyde, Glasgow, U.K. His research inter-
ests include power electronics, drives and energy
conversion, and manages research projects includ-
ing distributed and renewable integration, silicon-
carbide electronics, pulsed-power applications of
power electronics, and the design and control of electrical machines.
Dr. Fletcher is a Chartered Engineer in the U.K. and a fellow of the Institution
of Engineering and Technology.