8 7 6 5 4 3 2 1

THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC. IT IS JUMPER TABLE REVISIONS
NOT TO BE REPRODUCED OR COPIED, IN WHOLE OR IN PART, OR REV DESCRIPTION DATE APPROVED
USED IN FURNISHING INFORMATION TO OTHERS, OR FOR ANY OTHER
JP# ON OFF A INITIAL RELEASE 15NOV17 K. ABHISHEK
PURPOSE DETRIMENTAL TO THE INTERESTS OF ANALOG DEVICES.
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS 1
OWNED OR CONTROLLED BY ANALOG DEVICES.
2

3
RELAY CONTROL CHART

D 4 D
CONTROL CODE DEVICE FUNCTION CONNECTOR 5

* SEE ASSEMBLY INSTRUCTIONS

C C

B B

TEMPLATE ENGINEER DATE

A N A LOG
N/A
HARDWARE SERVICES
SCHEMATIC DEV CES
K. JABATAN 15NOV17
HARDWARE SYSTEMS
HW TYPE : Customer Evaluation Z
N/A Product(s): SmartMesh,LTP590x
TEST ENGINEER : ADuCM3029/4050 COG
N/A
PACKAGE : N/A-lead N/A N/A-family
A COMPONENT ENGINEER A
A. CAUILAN 15NOV17 : Pitch-pitch StyleVendor Style
TEST PROCESS
<User Define>
N/A
<User Define>
HARDWARE RELEASE
R. AMARILLE 15NOV17 <User Define>
MASTER PROJECT TEMPLATE TESTER TEMPLATE
DESIGNER
M. JOSE 15NOV17
TBD no_template DRAWING NO. REV.
PTD ENGINEER
K. ABHISHEK 15NOV17
UNLESS OTHERWISE SPECIFIED DIMENSIONS ARE IN INCHES

TOLERANCES
02_048367 A
DECIMALS FRACTIONS ANGLES
P.O SPEC. BK/BD SPEC. SOCKET OEM OEM PART# HANDLER CHECKER
X.XX +-0.010
SIZE SCALE CODE ID NO.
N/A X.XXX +-0.005
+-1/32 +-2
D
D 1:1 CodeID SHEET 1 OF 2
8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1
REVISIONS
REV DESCRIPTION DATE APPROVED

SW1
TH1
DNI
UART_TX 6 UART_RX_MCU

1
2
3
IO
5 TSW-103-08-G-S
4
D
IO
UARTC0_TX TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8 TP9 TP10
D IO

IO
UART_RX 3
2
UART_TX_MCU
1 1 1 1 1 1 1 1 1 1
IO
UARTC0_RX 1 IO

UART_TX_RTSN

UART_TX_CTSN

UART_RX_RTSN

UART_RX_CTSN
UARTC0_TX
UARTC0_RX
CAS-220B1

VSUPPLY

UART_TX

UART_RX
RESETN

TIMEN
IO

IO
IO

IO

IO

IO

IO

IO

IO

IO

IO
GND
GND

DNI TC1

IO VSUPPLY 1 2 TMS IO
IO RESETN 3 4 TCK IO

5 6 TDO IO

LTP5901IPC-IPMA#PBF M1
1 66 TC2030-IDC-NL
GND GND
2 65
RESERVED NC GND
3 64 RADIO_INHIBIT
NC RADIO_INHIBIT/GPIO15 IO
4 63 TIMEN
GPIO17 TIMEN/GPIO1 IO
5 62 UART_TX
GPIO18 UART_TX IO
6 61 UART_TX_CTSN P1 P1
GPIO19 UART_TX_CTSN IO
7 60 UART_TX_RTSN VSUPPLY VSUPPLY
AI_2 UART_TX_RTSN IO
IO
1 2 IO
8 59 UART_RX
C 9
AI_1
AI_3
UART_RX
UART_RX_CTSN
58 UART_RX_CTSN
IO

IO
IO UART_RX_MCU
3
5 6
4
JMP_TX_RTSN IO
C
10 57 UART_RX_RTSN UART_TX_MCU RADIO_INHIBIT
AI_0 UART_RX_RTSN IO
IO
7 8 IO
11 56 IPCS_MISO
GND GND 9 10 IO
12 55 VSUPPLY IPCS_MOSI
RESERVED VSUPPLY IO 11 12 IO
13 54 FLASH_P_ENN IPCS_SCK
NC RESERVED
IO
13 14 IO
14 53
RESETN NC NC 15 16
15 52 SLEEPN JMP_TX_CTSN
IO RESETN NC
IO
17 18 IO
16 51 FLASH_P_ENN
TDI FLASH_P_ENN/GPIO2 IO 19 20
TDO 17 50 TIMEN RESETN
IO TDO SPIS_SSN/SDA
IO
21 22 IO
TMS 18 49
IO TMS SPIS_SCK/SCL 23 24
TCK 19 48
IO TCK SPIS_MOSI/GPIO26/UARTC1_RX 25 26
20 47 IPCS_SSN
GND SPIS_MISO/1_WIRE/UARTC1_TX 27 28 IO
21 46
DP4(GPIO23) PWM0/GPIO16 29 30
22 45 VSUPPLY VSUPPLY
RESERVED DP1(GPIO20)/TIMER16_IN
IO
31 32 IO
23 44
RESERVED SPIM_SS_0N/GPIO12 DF12(3.0)-32DS-0.5V(86) DF12(3.0)-32DS-0.5V(86)
24 43
RESERVED SPIM_SS_1N/GPIO13 GND GND
25 42
DP3(GPIO22)/TIMER8_IN GND
26 41
IPCS_MISO/GPIO6

IPCS_MOSI/GPIO5
IPCS_SCK/GPIO4

SLEEPN DP2(GPIO21)/LPTIMER_IN SPIM_SCK/GPIO9

27 40
IO SLEEPN/GPIO14 SPIM_MOSI/GPIO10
UARTCO_RX
UARTCO_TX

28 39 IPCS_SSN
DP0/(GPIO0)/SPIM_SS_2N IPCS_SSN/GPIO3 IO
29 38
NC SPIM_MISO/GPIO11
30 37
GND

GND GND
31
32
33

34
35
36

B DEFAULT POSITION JP1:- PIN 1 AND PIN 2 DEFAULT POSITION JP2:- PIN 1 AND PIN 2 DEFAULT POSITION JP3:- PIN 1 AND PIN 2 B
JP1 JP2 JP3
UARTC0_TX
UARTC0_RX
IPCS_MISO

IPCS_MOSI

1 A 1 A 1 A
IPCS_SCK

IO JMP_TX_RTSN IO JMP_TX_CTSN IO VSUPPLY

IO UART_TX_RTSN 2 COM IO UART_TX_CTSN 2 COM IO UART_RX_RTSN 2 COM
3 B 3 B 3 B

GND 3PIN_SOLDER_JUMPER 3PIN_SOLDER_JUMPER 3PIN_SOLDER_JUMPER

IO

IO

IO

IO

IO

GND

A A

SCHEMATIC
AN A LOG HW TYPE : Customer Evaluation Z
DEV CES Product(s): SmartMesh,LTP590x
: ADuCM3029/4050 COG
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC. DESIGN VIEW DRAWING NO. REV
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE OR

IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS, <DESIGN_VIEW> 02_048367 A

OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS

OF ANALOG DEVICES.
PTD ENGINEER SIZE SCALE
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES. K. ABHISHEK D 1:1 SHEET 2 OF 2

8 7 6 5 4 3 2 1