VAAGDEVI COLLGE OF ENGINEERING

AUTONOMOUS
P.O.BOLLIKUNTA , WARANGAL – 506 005
B. TECH VII SEMESTER I - MID EXAMINATIONS SEPTEMBER - 2023
Digital Signal Processor & Architecture (B20EC56)
Electronics and Communication Engineering
Time: 1 ½ Hours SET-I Max. Marks : 20
Date:12/09/2023 Session:AN

Note: This question Paper Contains two parts. Part A & B

Course Outcomes for Assessment in this Test:
Cos Course Outcome
Understand the DFT, FFT, DSP system and Explain the DSP computational building blocks and
1
addressing capabilities.
2 Distinguish between the architectural features of General purpose processors and DSP processors.
3 Discuss and understand the TMS320C54xx Processor.
4 Understand the Analog devices family of DSP devices .
5 Analyze the interface of various devices to DSP Processors
PART – A (3 X5 = 15 Marks)
Mapping
ANSWER ANY THREE OF FOLLOWING QUESTIONS Marks Bloom’s Taxonomy Levels
Cos
Draw and explain the block diagram of a Digital
1. 5 1 L1
Signal-Processing system.
Find 4 point DFT of a sequence x(n) =
2. 5 1 L3
{1,0,1,0}using radix 2 DITFFT algorithm.
Explain in brief about errors in A/D conversion
3. 5 2 L3
process.
Briefly discuss about the floating point and
4. 5 2 L2
block floating point formats
Explain the significance of Fast Transform
5. 5 3 L2
techniques. What are the advantages over DFT?
PART – B (10 X 1/2 = 5 Marks)
Marks
CHOOSE THE CORRECT ANSWER
In general, a digital system designer has better control of tolerances in a digital signal 1/2
processing system than an analog system designer who is designing an equivalent
1. analog system.
a) True
b) False
The selection of the sampling rate Fs=1/T, where T is the sampling interval, not only 1/2
determines the highest frequency (Fs/2) that is preserved in the analog signal but also
2. serves as a scale factor that influences the design specifications for digital filters.
a) True
b) False
What is the configuration of system for digital processing of an analog signal? 1/2
a) Analog signal|| Pre-filter -> D/A Converter -> Digital Processor -> A/D Converter -
> Post-filter
b) Analog signal|| Pre-filter -> A/D Converter -> Digital Processor -> D/A Converter
3.
-> Post-filter
c) Analog signal|| Post-filter -> D/A Converter -> Digital Processor -> A/D Converter
-> Pre-filter
d) None of the mentioned
4. 1/2
The signal given by the equation is known as __________
a) Energy signal
b) Power signal
c) Work done signal
 d) None of the mentioned
The discrete time function defined as u(n)=n for n≥0;u(n)=0 for n<0 is an 1/2
_____________
a) Unit sample signal
5.
b) Unit step signal
c) Unit ramp signal
d) None of the mentioned
FILL IN THE BLANKS Marks
The quality of output signal from A/D converter is measured in terms of 1/2
6.
___________
7. Which bit coder is required to code a signal with 16 levels? 1/2
1/2
8. The process of converting discrete-time continuous valued signal into discrete-time
discrete valued (digital) signal is known as ____________
9. DTFT stands for _____________ 1/2
10. DF-I filters are ____________filters 1/2
Assessment Summary
Cos Remember Understand Apply Analyze Evaluate Create Total
1 5 -- 10 -- -- -- 15
2 -- 10 -- -- -- -- 10
3 -- -- -- -- -- -- --
4 -- -- -- -- -- -- --
5 -- -- -- -- -- -- --
 VAAGDEVI COLLGE OF ENGINEERING
AUTONOMOUS
P.O.BOLLIKUNTA , WARANGAL – 506 005
B. TECH VII SEMESTER I - MID EXAMINATIONS SEPTEMBER - 2023
Digital Signal Processor & Architecture (B20EC56)
Electronics and Communication Engineering
Time: 1 ½ Hours SET-II Max. Marks : 20
Date:12/09/2023 Session:AN

Note: This question Paper Contains two parts. Part A & B

Course Outcomes for Assessment in this Test:
Cos Course Outcome
Understand the DFT, FFT, DSP system and Explain the DSP computational building blocks and
1
addressing capabilities.
2 Distinguish between the architectural features of General purpose processors and DSP processors.
3 Discuss and understand the TMS320C54xx Processor.
4 Understand the Analog devices family of DSP devices .
5 Analyze the interface of various devices to DSP Processors
PART – A (3 X5 = 15 Marks)
Mapping
ANSWER ANY THREE OF FOLLOWING QUESTIONS Marks Bloom’s Taxonomy Levels
Cos
Explain the block diagram of DSP? Give the
1. 5 1 L2
applications of DSP.
What are the different number formats that are
2. used to represent signals and coefficients in 5 1 L2
DSP systems? Explain any one of them.
Find DFT of a sequence x(n) = { 1,1,1,1} using
3. 5 2 L1
DITFFT
What is the difference between FIR and IIR
4. 5 2 L2
filters. Discuss DF-I structure
Explain the significance of Fast Transform
5. 5 3 L3
techniques. What are the advantages over DFT?
PART – B (10 X 1/2 = 5 Marks)
Marks
CHOOSE THE CORRECT ANSWER
If ‘F’ is the frequency of the analog signal, then what is the minimum sampling rate 1/2
required to avoid aliasing?
a) F
1.
b) 2F
c) 3F
d) 4F
What is the nyquist rate of the signal x(t)=3cos(50*pi*t)+10sin(300*pi*t)- 1/2
cos(100*pi*t)?
a) 50Hz
2.
b) 100Hz
c) 200Hz
d) 300Hz
The quality of output signal from A/D converter is measured in terms of
___________
a) Quantization error
3.
b) Quantization to signal noise ratio
c) Signal to quantization noise ratio
1/2
d) Conversion constant
4. What are the main characteristics of Anti aliasing filter? 1/2
a) Ensures that bandwidth of signal to be sampled is limited to frequency range
b) To limit the additive noise spectrum and other interference, which corrupts the
signal
 c) All of the mentioned
d) None of the mentioned
Which bit coder is required to code a signal with 16 levels? 1/2
a) 8 bit
5. b) 4 bit
c) 2 bit
d) 1 bit
FILL IN THE BLANKS Marks
According to Nyquist, Sampling rate should be greater than equal to _______of maximum 1/2
6.
frequency component available in signal
7. DTFT stands for _____________ 1/2
8. FFT is _____________than DFT 1/2
9. IIR systems are _____________system 1/2
10. FIR systems are ______________system 1/2
Assessment Summary
Cos Remember Understand Apply Analyze Evaluate Create Total
1 5 5 -- -- -- -- 10
2 -- 10 5 -- -- -- 15
3 -- -- -- -- -- -- --
4 -- -- -- -- -- -- --
5 -- -- -- -- -- -- --
 VAAGDEVI COLLGE OF ENGINEERING
AUTONOMOUS
P.O.BOLLIKUNTA , WARANGAL – 506 005
B. TECH VII SEMESTER I - MID EXAMINATIONS SEPTEMBER - 2023
Digital Signal Processor & Architecture (B20EC56)
Electronics and Communication Engineering
Time: 1 ½ Hours SET-III Max. Marks : 20
Date:12/09/2023 Session:AN

Note: This question Paper Contains two parts. Part A & B

Course Outcomes for Assessment in this Test:
Cos Course Outcome
Understand the DFT, FFT, DSP system and Explain the DSP computational building blocks and
1
addressing capabilities.
2 Distinguish between the architectural features of General purpose processors and DSP processors.
3 Discuss and understand the TMS320C54xx Processor.
4 Understand the Analog devices family of DSP devices .
5 Analyze the interface of various devices to DSP Processors
PART – A (3 X5 = 15 Marks)
Mapping
ANSWER ANY THREE OF FOLLOWING QUESTIONS Marks Bloom’s Taxonomy Levels
Cos
What are the Advantages Of Digital Signal
1. 5 1 L1
Processing Over Analog Signal Processing
2. Differentiate between FIR and IIR filters design 5 1 L2
Explain in brief about errors in A/D conversion
3. 5 2 L3
process.
Find 4 point DFT of a sequence x(n) =
4. 5 2 L2
{1,1,1,0}using radix 2 DITFFT algorithm.
Explain the significance of Fast Transform
5. 5 3 L3
techniques. What are the advantages over DFT?
PART – B (10 X 1/2 = 5 Marks)
Marks
CHOOSE THE CORRECT ANSWER
_________theorem is used for efficient communication in dsp system 1/2
1.
i)parseval ii)convolution iii)sampling iv) central limit
1. Which of the following should be done in order to convert a continuous-time signal
to a discrete-time signal?
a) Sampling
b) Differentiating 1/2
2. c) Integrating
d) None of the mentioned
2. The process of converting discrete-time continuous valued signal into discrete-time
discrete valued (digital) signal is known as ____________ 1/2
a) Sampling
3. b) Quantization
c) Coding
d) None of the mentioned
 3. The difference between the unquantized x(n) and quantized xq(n) is known as 1/2
___________
a) Quantization coefficient
4.
b) Quantization ratio
c) Quantization factor
d) Quantization error
5. The relation between analog frequency ‘F’ and digital frequency ‘f’ is? 1/2
a) F=f*T(where T is sampling period)
5. b) f=F*T
c) No relation
d) None of the mentioned
FILL IN THE BLANKS Marks

6. The twiddle factor is given by______________ 1/2

7. DTFT stands for _____________ 1/2
8. FFT is _____________than DFT 1/2
According to Nyquist, Sampling rate should be greater than equal to _______of maximum 1/2
9.
frequency component available in signal
10. FFT is using ________________property for fast calculations. 1/2
Assessment Summary
Cos Remember Understand Apply Analyze Evaluate Create Total
1 5 -- 10 -- -- -- 15
2 -- 10 -- -- -- -- 10
3 -- -- -- -- -- -- --
4 -- -- -- -- -- -- --
5 -- -- -- -- -- -- --