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Instruction Manual for

Series of Micro Programmable Logic Controllers

MPLC

Mitsubishi Electric India Pvt. Ltd.


Emerald House, EL-3, J- Block MIDC, Bhosari, Pune - 411026.(INDIA)
Tel. : (+91)-20-2710 2000 Fax : (+91)-20-2710 2100
Email : marketing.FA2@mei-india.com
Web : www.MitsubishiElectric.in

Document No. 6300

Instruction Manual for


Series of Micro Programmable Logic Controllers
Power Supply Connection 3.10 Chapter 5 Addressing
CONTENTS Earthing
Discrete Input/Output
3.14 Input and Output Addressing
of Basic Rack 5.1
Wiring Diagrams 3.15 Flag Addressing 5.2
What’s New CPU Specification 2.12 Equivalent Input Circuit 3.53 RAM word Addressing 5.2
Mechanical Specifications 2.13 Equivalent Relay O/p circuit 3.53 Table Addressing 5.3
Preface I/O Specifications Equivalent DC O/P Circuit 3.55 Expansion Module
Purpose P.1 DC Input (Source/sink Configuration 5.4
Overview of the Chapter P.2 Type) 2.13 Chapter 4 Getting started Output Addressing 5.7
Related Manuals P.3 Relay Output 2.14 Input Elements 4.1 Input Addressing 5.8
Support P.3 DC Output (Sink type) 2.15 Output Elements 4.1 Summary 5.9
Training P.4 DC Output (Source type) 2.15 Flags 4.2
Anolog Input 2.16 I/O Listing 4.3 Chapter 6 System Bits and System words
Chapter 1 Introduction Anolog Output 2.17 User Memory 4.6 System bits 6.1
Features 1.2 Ordering Information 2.18 PLC scan 4.6 System words 6.7
Block diagram 1.3 Programming devices 2.20 Input processing 4.6
Program processing 4.7 Chapter 7 PLC programming
Chapter 2 System Overview Chapter 3 Installation and Wiring Output processing 4.7 Electrical Wiring Diagram 7.1
Part Identification 2.1 Dimensional Details 3.1 Input/Output Response 4.8 Electical Ladder Diagram 7.2
Connecting to Expansion 2.3 DIN rail Mounting 3.3 Double Output Updation 4.10 PLC Ladder Diagram 7.2
Connecting to PG-308 2.4 Connectivity and Slot Input / Output response Relay type Instructions 7.3
Connecting to DOX Mini 2.5 configuration 3.4 logging 4.11
Connecting to MMIJr 2.6 Back Panel Mounting 3.5 Improving Input/ Chapter 8 Function Blocks
Connecting to MMISr 2.7 Mounting of Basic and Exp. Output response 4.12 Important tips 8.3
General Specifications 2.8 on DIN Rail 3.6 Timer ON .01 Sec time base 8.5
Environmental Specifications 2.9 Recommendations 3.8 Timer ON 0.1 Sec time base 8.6
Electrical Specifications 2.10 Cable Routing 3.9 Timer ON 1.0 Sec time base 8.7

Timer OFF .01 Sec time base 8.9 HEX to ASCII conversion 8.53 Chapter 9 Special Feature Chapter 10 Trouble Shooting
Timer OFF 0.1 Sec time base 8.10 ASCII to HEX conversion 8.55 Alphanumeric display 9.1 Self Tests 10.1
Timer OFF 1.0 Sec time base 8.11 HEX to 7SG conversion 8.57 High speed counter 9.7 Failures 10.2
Monostable ON Bit Check 8.59 Operation 9.8 Trouble shooting
.01 Sec time base 8.14 Bit Set 8.61 Mode Selection 9.8 using indicating lights 10.2
Monostable ON Bit Reset 8.63 Count x 1 mode 9.9
0.1 Sec time base 8.15 Bit Search 8.65 Count x 2 mode 9.10 Appendix 1 Recommendations A1.1
Monostable ON First In First Out 8.67 Presetting the counter 9.11 Appendix 2 Basics in Digital Electronics A2.1
1.0 Sec time base 8.16 Last In First Out 8.73 Pulse catch Inputs 9.21
Upcounter 8.18 Logical AND 8.78 Pulse Output 9.24 Appendix 3 Function Blocks Lists A3.1
Downcounter 8.20 Logical OR 8.80 Frequency Measurement 9.31
Updown counter 8.23 Logical XOR 8.82 Constant Scan 9.33
Comparision Block 8.26 Compliment 8.84 Real Time Clock 9.38
Addition 8.28 Word Increment 8.86
Subtraction 8.30 Word Decrement 8.88
Multiplication 8.33 Word Reset 8.90
Division 8.35 Shift Left 8.91
Limit check and Alarm 8.37 Shift Right 8.94
Move 8.38 Shift Left circular 8.97
Table Fill 8.39 Shift Right circular 8.100
Table Move 8.41 Immediate Input 8.103
Table Read 8.43 Immediate Output 8.105
Table Write 8.45 Register Read 8.107
Table Search 8.47 Register Write 8.110
BCD to HEX conversion 8.49
HEX to BCD conversion 8.51
What’s New? Preface

In this manual following new features of Micro PLC are covered. This preface gives overview of this manual. The following topics are covered in this preface -
1. Expansion
* Purpose of this manual
Various Digital as well as Anolog Input / Output Expansion Modules connected to Basic Micro PLC
* Overview of all chapters
2. New Features like
a. Pulse Output * Related documents
b. Frequency Measurement
* Support
c. Constant Scan
d. Real Time Clock Purpose
This manual helps you to understand Micro XMP8 Series of PLCs. The PLC models available in Micro
XMP8 Series are XMP8-11, XMP8-12, XMP8-13, XMP8-15, XMP8-16 and XMP8-17. The explanation given
in this manual is applicable to all these models unless otherwise specified.

XMP8-13 and XMP8-17 PLCs are special modification services. For details refer page 2.21.

This manual is intended for installing, programming and trouble shooting of Micro XMP8 Series PLCs.

P.1

Overview of the Chapters Details of the related manuals


Chapter Title Contents The Table below lists other related manuals -
1 Introduction PLC Definition with advantages, Micro PLC features
Introduction 2 System Nomenclature, Connectivity of the Micro PLC to Sr. No. Item Ordering Information Description
Overview Programmers and the MMIs, Specifications, Ordering
Information 1 PG-308 manual Doc. No. 6046 Explains the PG-308 hand held programmer
3 Installation and Dimensional and Mounting Details, Electrical Control circuit,
Installation 2 DOX Mini manual Doc. No. 6044 Explains the PC based programming
wiring Earthing, I/O wiring, I/O, Power supply and Control-ON circuit
software ‘Dox Mini’.
4 Getting Started PLC Architecture and execution Style
5 Addressing Addressing of various bit and word parameters
3 SMART LINE manual Doc. No. 6070 Explains the Hardware of the SMART LINE
series of Man-Machine Interface.
Progra- 6 System Bits & Words Description of the System Bits and Words
mming 7 PLC Programming Ladder language and programming, MCR/ME, Jump
8 Function Blocks Description of all function blocks Support
9 Special Features Alphanumeric Display, High Speed Counter, Pulse catch Input The support is provided all over India with four sales / support offices, five authorized distributors and
10 Troubleshooting Diagnostics on CPU, Internal/External Troubleshooting, Use of
Troubleshooting various system houses.
display & System bits, Step-by-step approach
A1 Recommendations Connecting a pressure switch, Back-up programs Please contact the nearest representative for
A2 Basics in Digital Numbering Systems, Logic Gates * Sales and order support
Appendices
Electronics
* Technical assistance for products
A3 Function Blocks lists The Function Blocks lists, sequentially and alphabetically
* After sales Service support

P.2 P.3
Also, conducts training programs for its customers. These training programs are conducted at Pune. The
topics covered are -
* PLC Concept
* Thorough knowledge of the product
* Programming the PLC with practical examples
* Practical aspects and hands-on experience
* Tips and hints for the installation and maintenance of the PLC for a trouble free and life long
operation
It is recommended to attend such a training program to exploit the full knowledge of PLC. For details,
contact the Head Office.
For any suggestions about this manual, contact us on the following address -
Mitsubishi Electric India Pvt. Ltd.
Emerald House,
EL-3, J- Block MIDC, Bhosari,
Pune - 411026.(INDIA)
Tel. : (+91)-20-2710 2000
Fax : (+91)-20-2710 2100
Email : marketing.FA2@mei-india.com
Web : www.MitsubishiElectric.in

P.4
The Micro PLC offers following features :
Chapter 1 Introduction – Compact and Economical
– Easily mountable - DIN rail or Back panel mounting
This Chapter explains the basics of a PLC and the Micro PLC features. The topics covered are - – Uses latest SMD Technology
* PLC definition – Four digit Alphanumeric display (optional) used for displaying timer values, counter values, process
* features of the Micro PLC parameters, fault messages etc.
* PLC block diagram – Choice for selecting either AC (220V) or DC (24V) powered Micro PLC
* differences between Relay Panel and PLC
– High speed counter input upto 4 KHz
* advantages of using PLC over Relay Panel
– Pulse catch inputs 500 μS or more
The Programmable Logic controller (here after referred to as PLC) is a solid state equipment, designed
to perform the function of logical decision making for Industrial control applications. The PLC acts as a – Variety of function blocks and powerful instruction set
total replacement for hard wired relay logic with an effective reduction in wiring and panel size; and of – Availability in 3 configurations : 8I / 6O, 12I / 8O and 16I / 12O
course, with increase in flexibility and reliability. It has been experienced that majority of the faults with – Expandable upto 68 I/Os
systems using PLCs are due to external causes like, malfunctioning of field or external devices such as
– Availability of various digital as well as Anolog I/O expansion modules
sensors, limit switches, push buttons etc.
– Source or sink type of Inputs
The Micro PLC is a unique product by itself offering the most advanced features in a compact size. It finds
applications in areas like small SPMs, Conveyors, Industrial Washing Machines, Welding Machines, – Relay Outputs
Screen Printing Machines, Generator control, Small automation processes etc. – Sink type DC Outputs
– Special features like pulse catch input, pulse output, frequency measurement and Real Time Clock
– Programmed using ladder diagram with PG 308 hand held programmer or DOX-Mini PC based
software

1.1 1.2

Block Diagram ‘DOX-Mini’ software. The ‘PG-308’ is hand held programmer and "DOX-Mini" is software package running
I O on IBM Compatible PC (Min. XT/AT). These are also used as debugging tools for the PLC and offer good
N POWER SUPPLY U
T documentation features. For more details of these programmers, refer the respective manuals.
P
U P Advantages of using PLCs over conventional Electrical Relay Panels
U
T
PROCESSOR T 1. Solid state devices are used for maximum reliability.
S S
2. Logic easily changeable with programming unit, as required.
3. Single panel can be used in multiple applications by mere change of program.
PROGRAMMING DEVICE 4. Indicator lights provided at major diagnostic points to simplify trouble shooting.
5. Powerful software features like timers, counters, table operations etc. in conjunction with optional
Fig. 1.1 – Block Diagram of a PLC display to assist trouble shooting.
6. Availability of unlimited number of NO / NC contacts for Inputs / Outputs / Internal logic coils (flags).
The block diagram of a Programmable Logic Controller (PLC) is shown in Fig 1.1. The PLC is designed
to replace relays, timers, counters etc. The necessary voltage and current requirements for the internal 7. Very compact and rugged design leading to less downtime.
working of the PLC are generated by the power supply. 8. Smaller cabinet size leading to less floor space requirement.
The field elements are interfaced to the input or output sections. Typical input elements are push buttons, 9. Easy installation.
limit switches, proximity switches, relay contacts, selector switches, Thumbwheel switches etc. Typical 10. Low cost : Hardware costs less than the installed relays.
output elements are solenoid valves, relay coils, indicator lights, LED display etc. These field elements are
selected by OEM or the end user. The necessary power supply for the input and output elements is built Difference between PLC and Electrical Relay Panel
external to the PLC. The PLC power supply is designed and rated to operate only the internal electronics As described previously, the PLC is an integral unit made up of multiple electronic relays, timers, counters
and not to power the field elements. (The XMP8-15 and XMP8-16 PLCs do provide +24 V DC Supply for etc. As far as the sequence execution method is concerned, there exist fundamental differences between
connecting the Input field elements only) the relay panel and the PLC. All sequences are executed parallely (at the same time) in the case of relay
The processor is programmed in a way similar to the hardwired control panels, using conventional ladder panel. On the other hand, in the case of PLC, the execution is sequential and repeated cyclically, generally
diagrams. The programming of the Micro PLC can be done with either ‘PG-308’programming terminal or known as the PLC scan.

1.3 1.4
Å
Chapter 2 System Overview
This chapter provides general information about Micro PLC and an overview of control system. The Å Terminal block for
topics covered are - * Micro PLC nomenclature and specifications input connections
* Connectivity of expansion modules, programmers and the MMIs with the Micro PLC ² Labels - Input and
* Ordering Information Output connections*
This information helps to select hardware. For more infomation on MMI, refer related manual. I0 I2 C1 I5 I7 I8 IA IC IE ³ Terminal block for

24 V DC I/P
D
¬ - ® C Power Supply and
C0 I1 I3 I4 I6 C2 I9 IB ID IF
I/p
Output connections
¬Input LEDs (Green)
² ´ Programming port
-Output LEDs (Red) + E
° ®CPU Status LEDs
C0 O2 O4 C1 C2 108 DA R 4307C

24V GND
L

@ 1 AMP
24 VDC
A

+ 24 V

EARTH
¯4 Digit – O0 O1 O3 O5 O6 O7 O9 OB
Y
O/P PG PORT

Alphanumeric
Display (Optional)
¯
ABCD ° Flaps
*± Connector for
Expansion
BOTH SIDE FLAPS OPEN
* Initially optionally
available. Liable to be
° standardize by June, 99 ³ ´
Fig. 2.1(B) – Micro PLC
Fig. 2.1(A) – Micro PLC * For details, refer Chapter 3, page nos. 3.14 to 3.38
2.1 2.2

Connecting Expansion Modules to Basic Micro PLC Connecting PG-308 to the Micro PLC

Micro PLC

INPUT OUTPUT INPUT OUTPUT


INPUT OUTPUT STATUS
0 1 2 0 1 0 1 2 0 1
0 1 2 3 4 5 6 7 0 1 2 3 4 5 RUN ON
ON ON

3 4 5 2 3 3 4 5 2 3
89AB MEM
BAT CPU

XMP8 CAB 1015

5 Pin DIN Connector 8 Pin Mini DIN


PG-308
Connector
BASIC UNIT FRC EXPANSION EXPANSION
CONNECTOR UNIT1 UNIT 2

Note : Maximum 4 expansion units can be connected to Basic Mirco PLC.

2.3 2.4
Connecting DOX Mini to the Micro PLC Connecting the MMI Jr to Micro PLC

Micro PLC
MMI Jr Micro PLC

SMART LINEJr

ç
ç
ç

ç
SLJR CAB 0306
8 Pin Mini DIN
Com 1 Port connector

XMP8 SLA 1010

25 to 9 pin 8 Pin Mini DIN


convertor Serial Adapter connector
XMP8 SPC 2010

2.5 2.6

Connecting the MMI Sr to Micro PLC General Specifications

Power Supply
MMI Sr
For XMP8-11, 12 & XMP8-13 PLCs – 24 V DC ± 25%, @ 1A
For XMP8-15, 16 & XMP8-17 PLCs – 90 to 265 V AC, 25 VA @ 220 V AC
Micro PLC Inbuilt supply for Inputs/Sensors – +24 VDC @ 125 mA
(for AC powered PLCs only)
Protection (in case of short – Foldback
circuit or overload)
SMART LINE Standard I/O Configurations - Basic rack – 8 Inputs / 6 Outputs
12 Inputs / 8 Outputs
16 Inputs / 12 Outputs
Expansion I/O Configurations
Digital – 6 Inputs / 4 Outputs
8 Inputs
8 Outputs
Anolog – 4 Channel Anolog Input
SL CAB 1006 1 Channel Anolog Output

I/O capacity
Digital I/Os – 68 (Maximum)
Anolog I/Os – 16 Anolog Inputs (Maximum)
4 Anolog Outputs (Maximum)

2.7 2.8
Maximum no. of expansion – 4 Electrical Specifications (Basic Micro PLC)
modules connected to Basic PLC
XMP8-11 XMP8-12 XMP8-15 XMP8-16
Intelligent I/Os
High speed counter Input – 1 (upto 4 KHz)* PLC +18-30 VDC +18-30 VDC 90-265 VAC 90-265 VAC
Pulse Catch Input – 2 (minimum pulse width 500 μS)* SUPPLY +24 VDC +24 VDC 25VA 25VA
Display (Optional) – 5 X 7 Dot matrix 4 character alphanumeric display VOLTAGE @ 1A @ 1A @ 220VAC @ 220VAC

Special Features NO. OF 8/12/16 8/12/16 8/12/16* 8/12/16*


Frequency Measurement – Upto 2 KHz DC INPUTS
Pulse Output – Output on time can be control within 1msec.
Real Time Clock (Optional) – Information about current time and calander. NO. OF RELAY OUTPUTS
24-240 VAC 6/8/12 -- 6/8/12 --
Environmental Specifications 500 mA PER CHANNEL
Ambient Temperature – upto 55o C NO. OF 24 V DC
Relative Humidity – 5-95% (non condensing) OUTPUTS -- 6/8/12 -- 6/8/12
Noise immunity – 1500 V pp, 350 nS SINK TYPE
500 mA PER CHANNEL

* The intelligent I/Os are available in all the Micro PLC models * The first four Inputs of the AC powered Micro PLCs (XMP8-15 and XMP8-16) must necessarily be connected for
Sink Type Operation only. This is irrespective of their configuration. Refer page no. 2.18 for the available standard I/O
configurations. Other Inputs can connected for either source or sink operations as per their grouping.
This limitation is valid for application using internally supplied 24 VDC Field Supply; if external 24 VDC supply is
used, all 16 inputs can be used as Sink or Source Type.

2.9 2.10

Electrical Specifications (Expansion Modules) CPU Specifications


Flag bits – 512 (user defined Retentive)
8 INPUT 8 OUTPUT 8 OUTPUT 8 OUTPUT 6 I/ 4 O 6I/4O ANOLOG ANOLOG
System bits – 32
(DC SOURCE) (DC SINK) RELAY (DC SINK) RELAY INPUT OUTPUT
RAM Words – 512 (user defined Retentive)
SUPPLY – 24 VDC 24 VDC 24 VDC 24 VDC 24 VDC 24 VDC 24 VDC System words – 32
VOLTAGE @ @ @ 40mA @ 10mA @ 20mA @ @ Timers – ON delay / OFF delay with 0.01, 0.1, 1 sec. resolution
(EXTERNAL) 50mA 10mA for Relay for Relay coil 100 mA 100 mA Counters – Up, Down and Up / Down
Coil outputs Display (optional) – 5 x 7 dot matrix, 4 character alphanumeric LED display
Programming Language – Advanced ladder diagram
NO. OF DC INPUTS 8 – – – 6 6 – –
Type of user Program Memory – Electrically Erasable PROM (EEPROM ) 8 KB
NO. OF RELAY Type of Battery – Rechargeable Ni-Cd
O/Ps 24-240 VAC – 8 – 8 – 4 – – Instruction set – Basic : Relay Type
500 mA PER Ch. Word : Function blocks
Other : Lookup tables, Jumps
NO. OF 24 V DC Scan time – 7ms per 1K binary statements
O/Ps SOURCE TYPE – 8 – – – – – – Self Diagnostics – Watch dog timer,
1.5 A PER Ch. Status checks
: Program Memory (Sum + Syntax)
NO. OF 24 V DC : Power Supply Voltage
O/Ps SINK TYPE – – 8 – 4 – – – : Battery Voltage
500 mA PER Ch.

NO. OF CHANNELS – – – – – – 4 1
FOR ANOLOG I/O

2.11 2.12
Mechanical Specifications Relay Output
Indication Red LED
Dimensions (Basic Micro PLC) 150mm X 100mm X 75mm Isolation Galvanic
Dimensions (Expansion Unit) 60mm X 100mm X 75mm Switching capacity of contacts 500mA Maximum at 240VAC
Mounting (Basic + Expansion) DIN Rail / Back panel Permissible ambient temperature 55oC
Input / Output Specifications
Note : DC Switching is not recommended through the Relay contact as relay life may be
DC Input (Source / Sink Type) reduce due to arcing between contacts.
Indication Green LED In Case of Relay Output ( Expansion Unit ), separate 24 VDC coil supply
Isolation Optical (@ 5 mA per coil) is required.
Input voltage
Nominal value +24V DC DC Output (Sink Type)
0 Signal (low) 0 to 5V DC Indication Red LED
1 Signal (high) 10 to 30V DC Isolation Optical
Input current at 1 Signal 6mA at 24V DC Output Voltage 24 V DC
Signal Propagation delay Permissible range 18-30V DC
0 to 1 5 to 10 mS Maximum Current per channel 500 mA
1 to 0 5 to 10 mS Inrush Current 5 A 10 ms @ 24 V and 40°C
Length of signal cable 100 m (maximum) Protections against reverse supply
Permissible ambient temperature 55oC
Diode protection against inductive load
Special Feature Inputs
Residual Current at 0 Signal 100 μA
High Speed Counter Input 4 KHz maximum
Length of cable 100m (max.)
Pulse Catch Input 500 μS minimum on time

2.13 2.14

DC Output (Source Type) Analog Input


Indication Red LED
Number of Channels per module 4
Isolation Optical
Output Voltage 24 V DC Input voltage / Current 0 to ±10V / 0 to 20mA. Individual channel is
Load Current per channel 1.5 A used as Voltage or Current input at a time
Inrush Current 10 A 10 ms @ 24 V and 40°C Maximum permissible analog– Voltage : ± 12V
Protections against reverse supply Input Voltage and Current Current : 24 mA
Diode protection against inductive load
Resolution 11 Bits + Sign Bit (2048 Steps 1 Step = 4.88mV)
Short Circuit protection against short circuit of load.
Measuring Principal Successive Approximation
Note : 1.5 A DC Output (Source Type) is available only in case of expansion unit. Conversion time Less than 750 micro seconds per Channel.
Input Impedance For Voltage Input – 1 MΩ, For Current Input – 100Ω
Connection Method Two wire connections
Sensor Isolation :-
Channel to Channel No Isolation (Ground common)
Channel to PLC Bus 1.5 KV
Input DC Power supply 24V DC @ 125mA (Diode protection against reverse supply)
Permissible Range Including the ripple 18 to 30 VDC
Indication Green LED (Indicates the external 24V Supply
and PLC bus supply is Healthy)

2.15 2.16
Analog Output module
Ordering Information
Number of channel per module 1 (Hardware Configurable Voltage or current)
Hardware Configuration of Basic Micro PLC
Nominal analog output range -10V to +10V Volt output in Bipolar mode
DC 24V Powered MICRO PLCs
0 to +10V Volt output in Uni-polar mode
4 to 20 mA Current output mode I/O DESCRIPTION ORDERING CODE
8 Inputs/6 Outputs (Relay) XMP8-11 BDIO - 8/6 R (E)
Load Requirement :
Voltage Output 5 kΩ (Minimum) 12 Inputs/8 Outputs (Relay) XMP8-11 BDIO - 12/8 R (E)
Current Output 500Ω (Maximum) 16 Inputs/12 Outputs (Relay) XMP8-11 BDIO - 16/12 R (E)
8 Inputs/6 Outputs (24V DC, Sink Type) XMP8-12 BDIO - 8/6 D (E)
Isolation: Output to PLC bus 1.5 KV
12 Inputs/8 Outputs (24V DC, Sink Type) XMP8-12 BDIO - 12/8 D (E)
Input DC Power supply 24 VDC @ 125mA
16 Inputs/12 Outputs (24V DC, Sink Type) XMP8-12 BDIO - 16/12 D (E)
Permissible Range including 18 to 30 VDC
AC Powered MICRO PLCs
the ripple
Indication Green LED ( Indicates the external 24 VDC Supply I/O DESCRIPTION ORDERING CODE
8 Inputs/6 Outputs (Relay) XMP8-15 BDIO - 8/6 R (E)
and PLC bus supply is Healthy )
12 Inputs/8 Outputs (Relay) XMP8-15 BDIO - 12/8 R (E)
16 Inputs/12 Outputs (Relay) XMP8-15 BDIO - 16/12 R (E)
Note : Output is protected against short circuit in both voltage and current mode.
8 Inputs/6 Outputs (24V DC, Sink Type) XMP8-16 BDIO - 8/6 D (E)
12 Inputs/8 Outputs (24V DC, Sink Type) XMP8-16 BDIO - 12/8 D (E)
16 Inputs/12 Outputs (24V DC, Sink Type) XMP8-16 BDIO - 16/12 D (E)
2.17 2.18

Programming Devices
Ordering Information
Two types of programmers are available for programming the Micro PLC. These are –
Hardware Configuration of Digital and Analog I/O 1) Hand Held Programmer ‘PG–308’
Expantiion Units of Micro PLC
2) Programming software ‘DOX–Mini’ running on IBM compatible PC - XT or AT (DOS Version 3.3 or later)
I/O DESCRIPTION ORDERING CODE
Features DOX–Mini PG–308
6 Inputs/ 4 Outputs (Relay, Potential free) XMP8-10 EDIO - 06/04 R
1 Programming Language Ladder diagram Ladder diagram
6 Inputs/ 4 Outputs (24 VDC Sink Type) XMP8-10 EDIO - 06/04 D
2 Online Monitoring
8 Inputs XMP8-10 EDIO - 8 I – Bit wise Yes Yes
8 Outputs (Relay, In groups of 4 each) XMP8-10 EDIO - 8 R – Word wise Yes Yes
8 Outputs (24 VDC Source Type In group of 4 each) XMP8-10 EDIO - 8 D (HP) – Powerflow Yes Yes
– Forcing bit Yes Yes
8 Outputs (24 VDC Sink Type In group of 4 each) XMP8-10 EDIO - 8 D – Bit / Word status Yes Yes
4 Analog Inputs (12 Bits) XMP8-10 EAIO - 4/0 1V
3 Documentation Yes No
1 Analog Outputs (12 Bits) XMP8-10 EAIO - 0/1 IV
4 I / O assignment Yes No
5 User Memory Programming
– EEPROM Yes Yes
6 Configuration Programming Yes Yes
7 Retentive feature Yes Yes
Note : Refer respective programmer manuals for their details

2.19 2.20
About XMP8-13 and XMP8-17 PLCs
XMP8-13 and XMP8-17 PLCs are special modification services. Chapter 3 Installation and Wiring
Real Time Clock and Inbuilt keypad
Both the PLCs are having built-in Real Time Clock and keypad consisting of four soft touch keys assigned This Chapter explains the mounting, electrical panel and discrete Input/Output wiring. This includes -
for following functions : * Dimensional and mounting details of Basic Micro PLC and Expansion Unit
* Electrical control circuit
1. FUNCTION (F) : This key is provided for selecting required function of operation.
* Earthing details
2. UP (↑) : This key is provided for incrementing the value of digit. * Input/Output wiring and power supply circuit
* Recommendation
3. CURSOR (←) : This key is provided for selection of digit to be set.
4. ENTER (↵) : This key is provided for validation of selected value. Dimensional details of
All above four keys consumes last four digital inputs (IC to IF) of Basic Micro PLC. Basic Micro PLC

126.00 [5.00]

114.14 [4.50]
100.00 [4.00]
* In case of XMP8-13 PLC, last Four Inputs (IC to IF) are assigned to Keypad Inputs. So only 12 Field

35.50 [1.40]
Inputs are available with Basic PLC. Model XMP8-13 is DC Powered Micro PLC with inbuilt Keypad
and Real Time Clock (RTC).
* In case of XMP8-17 PLC, last Four Inputs (IC to IF) are assigned to Keypad Inputs. So only 12 Field
Inputs are available with Basic PLC. Model XMP8-17 is AC Powered Micro PLC with inbuilt Keypad
and Real Time Clock (RTC).
100.00 [4.00] 75.00 [3.00]

150.00 [6.00]
Use M4 size screw for Mounting Dimensions in mm [inches]

2.21 3.1

Dimensional Details of Expansion Unit Expansion Unit : Connectivity and slot configuration

Connection for
INPUT OUTPUT Basic Unit or
0 1 2 0 1
ON
Previous
Expansion Unit
100mm

35.50 mm
Height

3 4 5 2 3

60mm ON
75 mm
Length
Depth 1 2 3 4

DIP Switch setting for


slot configuration
3.2 3.3
Back Panel Mounting of the Micro PLC Mounting Micro PLC and Expansion Module on DIN rail

Leave at least 80 mm
vacant space under
Micro PLC to allow
communication cable
connection

Use M4 size screw with


washers for mounting

3.4 3.5

How to convert the clips from DIN Rail to Back Panel Mounting Position Recommendations
— The system designer should provide enough protection for critical loads against any active faults
1 2 which may not be indicated by any of the indicating LEDs on PLC. Some of the active faults may
DIN Rail Mounting prove to be dangerous depending upon the application. Situations which lead to heavy breakdown
Remove the spring
position of the clip or cause danger to the human life or the machine itself must be provided with adequate safety
from its position
measures. To avoid dangerous situation occurring due to an active fault, the system engineer should
incorporate external protective device (e.g. Wiring of an NC contact of over-travel limit switch or
Emergency OFF push button or a motor overload contact etc. in series with travel / motor control
contactor).
— For very critical output user can rewire the output to an input so that, the latter can be used as a
monitor over the proper execution of output.
Cable Routing
All the normal precautions concerning the wiring and protection of an electronic equipment in an industrial
3 4 environment should be observed. All cables should be away from EMI and RFI. In particular, following
recommendations should be complied with, as far as possible.

Slide the clip outward Install the spring Inside the enclosure
as shown — All power circuit wiring (connected to power contactors, solenoids etc.) should be kept separate from
input / output wiring.
— Input wiring and output wiring (especially relay output) should be separately bundled and kept
isolated as far as possible.
— Shielding (connected properly to the factory Earth) for transformers is strongly recommended.

3.6 3.7
Outside the enclosure Recommended Power Supply connections for PLC and I/Os
— Separate wiring ducts should be provided for– For XMP8-11 PLC
Fuse 1*
• Power circuit wiring and power cables. 240 V 21 V +ve
• I/P and O/P cables to discrete I/O modules. ~
C
C

~
• All cables carrying low level signals. 1.5 To PLC power supply
terminal ‘+24V’ and

~
C Amp

C
— Wherever possible, it is also recommended to– individual input
220 V

~
• Avoid parallel routing over long distances. + Capacitor elements

C
C rating

~
• Ensure that wires cross at right angles. 1000μf/1A, 63V

~
C To PLC power supply

C terminal ‘GND’ and input

~
C GND on terminal block

~~
0V 0V GND
1*
E L
XV To the common points on the output terminal
24V < X < 240 V

C
220 V C

~~
C
C

~
C
C

~
C

~
C * Safety Interlocks

~
0V N
0V
To the common points of the output elements
E
3.8 3.9

For XMP8-12 PLC For XMP8-15 PLC 1.5 Amp 1*


L
XV
To PLC Power supply
~ To the PLC power supply terminal ‘Line’
1* C
C
+ VE 240 V 90 V < X < 265 V
240 V 21 V terminal ‘+24V’ and

~
~ individual input elements
C
C
C C

~
1.5 220

C
C

~
Amp
~

Capacitor

C
C rating

~
~

C
C
1000μf/1A, 63V

C
C

~
~

To PLC Power supply C


C
220 V GND

~
~

C terminal ‘GND’ and input


GND on terminal block

~
0V
~

C 0V 0V N
~

To the PLC power supply terminal ‘Neutral’


1* 1*
~

C 21 V + VE To PLC output terminal


‘+24V’ and the individual
E XV L
~

~ output elements

C
C C 24V < X < 240 V To the common points on the output terminal

C
220 V
~

~
~

~
C C
C
Capacitor
~

rating

~
C
C C
C
1000μf/1A, 63V
~

~
GND To the output terminals C0,

~
0V 0V C1 and C2
C

~
E 0V * Safety Interlocks
0V N
* Safety Interlocks To the common points of the output elements
E
3.10 3.11
g
For XMP8-16 PLC 1.5 Earthing
Amp 1* PLC Other devices PLC Other devices
240 V L
XV
~ To the PLC power supply terminal ‘Line;
C 90 V < X < 265 V

C
Earth GND +24V Earth GND +24V

~
C
C

~
220 V C

~
C Reference Reference Reference

~
C
C
ground ground ground

~
C CORRECT METHOD INCORRECT METHOD

C
~~
0V 0V N
To the PLC power supply terminal ‘Neutral’ All electronic components of automated system should be Earthed so as to provide -
E — Safety for personnel.
21 V 1* + VE To PLC output terminal — A fixed electrical potential serving as reference.
~ ‘+24V’ and the individual — Protection against conducted and radiated electromagnetic interference.
220 V output elements

C
C The earth point of the factory or site should be reliable and of good quality. Otherwise, a separate earth
Capacitor point should be provided for PLC installation. The complete PLC installation should have only one
~

C
C rating electrical grounding point; called as reference ground. Physically it can be a bus bar in the control cabinet
~

1000μf/1A, 63V * Safety Interlocks or ground point of chassis of the cabinet. All the earth connections should be permanent, direct and

C
C
~

GND To the output terminals C0,


continuous. There should not be looping of ground wires running between different devices. Each device
~

0V should have its earth directly connected to the single reference ground.
0V C1 and C2

E 3.12 3.13

Discrete Input / Output wiring diagrams for Basic Micro PLC XMP8-11 BDIO 8/6R Output connections
XMP8-11 BDIO 8/6R Input connections
+ E C0 O2 O4 C1 4307B
R

24V GND
INPUT FIELD ELEMENTS E
+24V

@ 1 AMP
L

24 VDC
(SINK TYPE)

+ 24 V
A

EARTH
Y
O/P PG PORT
– O0 O1 O3 O5
24 V GND

TERMINAL BLOCK FOR


INPUT CONNECTIONS

LABEL FOR INPUTS


LABEL FOR SUPPLY
+24 V AND OUTPUTS
24 V GND
TERMINAL BLOCK FOR
E OUTPUT AND SUPPLY
CONNECTIONS
NEUTRAL
I0 I2 C1 I5 I7 4307F OUTPUT FIELD ELEMENTS
D LINE
24 VDC
INPUT

C
I/P It is recommended to install fuse type terminals (1 A fuse per output channel) between
C0 I1 I3 I4 I6
the output terminals and the actual loads.

3.14 3.15
XMP8-11 BDIO 12/8R Input connections XMP8-11 BDIO 12/8R Output connections

+24V INPUT FIELD ELEMENTS + E C0 O2 O4 C1 C2


R 4307B
(SINK TYPE)
E

24V
@ 1 AMP
L

24 VDC

+ 24 V GND
A

EARTH
Y
24 V GND O/P
– O0 O1 O3 O5 O6 O7 PG PORT

TERMINAL BLOCK FOR


INPUT CONNECTIONS

LABEL FOR INPUTS

LABEL FOR SUPPLY


+24 V AND OUTPUTS
24 V GND
TERMINAL BLOCK FOR
E OUTPUT AND SUPPLY
CONNECTIONS
I0 I2 C1 I5 I7 I8 IA NEUTRAL
4307E
D
OUTPUT FIELD ELEMENTS
24 VDC
INPUT

C
LINE
I/P
C0 I1 I3 I4 I6 C2 I9 IB

It is recommended to install fuse type terminals (1 A fuse per output channel) between
the output terminals and the actual loads.
3.16 3.17

XMP8-11 BDIO 16/12R Input connections XMP8-11 BDIO 16/12R Output connections
INPUT FIELD ELEMENTS +
+24V E C0 O2 O4 C1 C2 IO8 0A 4307B
(SINK TYPE) R

24V GND
E

@ 1 AMP
L

24 VDC

+ 24 V
A

EARTH
Y
24 V GND O/P
– O0 O1 O3 O5 O6 O7 O9 OB PG PORT

TERMINAL BLOCK FOR


INPUT CONNECTIONS

LABEL FOR INPUTS

LABEL FOR SUPPLY


+24 V AND OUTPUTS
24 V GND
TERMINAL BLOCK FOR
E OUTPUT AND SUPPLY
CONNECTIONS
I0 I2 C1 I5 I7 I8 IA IC IE NEUTRAL
4307A
D
OUTPUT FIELD ELEMENTS
24 VDC
INPUT

C
LINE
I/P
C0 I1 I3 I4 I6 C2 I9 IB ID IF

It is recommended to install fuse type terminals (1 A fuse per output channel) between
the output terminals and the actual loads.
3.18 3.19
XMP8-12 BDIO 8/6D Input connections XMP8-12 BDIO 8/6D Output connections
+24V INPUT FIELD ELEMENTS
(SINK TYPE) + E C0 O2 O4 C1 +
D 4307U

24 V GND
C

@ 1 AmP
24 VDC

EARTH
+24 VDC

+24 V
0/P
24 V GND
– O0 O1 O3 O5 SINK PG PORT
TERMINAL BLOCK FOR
INPUT CONNECTIONS

LABEL FOR INPUTS

LABEL FOR SUPPLY


+24 V AND OUTPUTS
24 V GND
TERMINAL BLOCK FOR
E OUTPUT AND SUPPLY
CONNECTIONS
I0 I2 C1 I5 I7 4307F
D
+24V
24 VDC
INPUT

C OUTPUT FIELD ELEMENTS


I/P 24V GND
C0 I1 I3 I4 I6

It is recommended to install fuse type terminals (1 A fuse per output channel) between
the output terminals and the actual loads.
3.20 3.21

XMP8-12 BDIO 12/8D Input connections XMP8-12 BDIO 12/8D Output connections
INPUT FIELD ELEMENTS
+24V
(SINK TYPE) + E C0 O2 O4 C1 C2 +
D 4307T

24V GND
C

@ 1AmP
24V DC
0/P

EARTH
+24V DC
24 V GND

+24 V
– O0 O1 O3 O5 O6 O7 SINK PG PORT
TERMINAL BLOCK FOR
INPUT CONNECTIONS

LABEL FOR INPUTS

LABEL FOR SUPPLY


+24 V AND OUTPUTS
24 V GND
TERMINAL BLOCK FOR
E OUTPUT AND SUPPLY
CONNECTIONS
I0 I2 C1 I5 I7 I8 IA 4307E
D +24V
24 VDC
INPUT

C
OUTPUT FIELD ELEMENTS
I/P 24V GND (SINK TYPE)
C0 I1 I3 I4 I6 C2 I9 IB

It is recommended to install fuse type terminals (1 A fuse per output channel) between
the output terminals and the actual loads.
3.22 3.23
XMP8-12 BDIO 16/12D Input connections XMP8-12 BDIO 16/12D Output connections
INPUT FIELD ELEMENTS
+24V (SINK TYPE) + E C0 O2 O4 C1 C2 O8 OA + 4307S
D

24V GND
C

@ 1 AmP
24V DC

+24V DC

+24 V
EARTH
0/P
24 V GND
– O0 O1 O3 O5 O6 O7 O9 OB SINK PG PORT
TERMINAL BLOCK FOR
INPUT CONNECTIONS

LABEL FOR INPUTS

LABEL FOR SUPPLY


+24 V AND OUTPUTS
24 V GND
TERMINAL BLOCK FOR
E OUTPUT AND SUPPLY
CONNECTIONS
I0 I2 C1 I5 I7 I8 IA IC IE
4307A +24V
D
24 VDC
INPUT

C OUTPUT FIELD ELEMENTS


I/P 24V GND (SINK TYPE)
C0 I1 I3 I4 I6 C2 I9 IB ID IF

It is recommended to install fuse type terminals (1 A fuse per output channel) between
the output terminals and the actual loads.
3.24 3.25

XMP8-15 BDIO 8/6R Input connections XMP8-15 BDIO 8/6R Output connections
+24V, 125 mA MAX. INPUT FIELD ELEMENTS
(SINK TYPE) L E C0 O2 O4 C1
R 4307R

NEUTRAL
GND E

90-265 VAC
L

25VA
A

EARTH
LINE
Y
O/P PG PORT
N O0 O1 O3 O5
TERMINAL BLOCK FOR
INPUT CONNECTIONS

LABEL FOR INPUTS

LABEL FOR SUPPLY


L AND OUTPUTS
N
TERMINAL BLOCK FOR
E OUTPUT AND SUPPLY
+ I0 I2 C1 I5 I7 CONNECTIONS
4307N
24VDC @ 125mA

D NEUTRAL
24V GND
FIELD SUPPLY

SINK ONLY C
+24DC O/P

OUTPUT FIELD ELEMENTS


I/P LINE
C0 I1 I3 I4 I6 C2

It is recommended to install fuse type terminals (1 A fuse per output channel) between
the output terminals and the actual loads.
3.26 3.27
XMP8-15 BDIO 12/8R Input connections XMP8-15 BDIO 12/8R Output connections
+24V, 125 mA MAX. INPUT FIELD ELEMENTS
(SINK TYPE) L E C0 O2 O4 C1 C2
R 4307H
GND

NEUTRAL
E

90-265 VAC
L

25VA
A

EARTH
LINE
Y
O/P PG PORT
N O0 O1 O3 O5 O6 O7
TERMINAL BLOCK FOR
INPUT CONNECTIONS

LABEL FOR INPUTS

LABEL FOR SUPPLY


L AND OUTPUTS
N
TERMINAL BLOCK FOR
E OUTPUT AND SUPPLY
CONNECTIONS
+ I0 I2 C1 I5 I7 I8 IA 4307N
NEUTRAL
24VDC @ 125mA

24V GND
FIELD SUPPLY

SINK ONLY
+24DC O/P

OUTPUT FIELD ELEMENTS


LINE
C0 I1 I3 I4 I6 C2 I9 IB

It is recommended to install fuse type terminals (1 A fuse per output channel) between
the output terminals and the actual loads.
3.28 3.29

XMP8-15 BDIO 16/12R Input connections XMP8-15 BDIO 16/12R Output connections
+24, 125 mA MAX. INPUT FIELD ELEMENTS
(SINK TYPE) L E C0 O2 O4 C1 C2 O8 OA 4307G
R

NEUTRAL
GND E

90-265 VAC
L

25VA
A

EARTH
LINE
Y
O/P PG PORT
N O0 O1 O3 O5 O6 O7 O9 OB
TERMINAL BLOCK FOR
INPUT CONNECTIONS

LABEL FOR INPUTS

LABEL FOR SUPPLY


L AND OUTPUTS
N
TERMINAL BLOCK FOR
E OUTPUT AND SUPPLY
CONNECTIONS
+ I0 I2 C1 I5 I7 I8 IA IC IE 4307M
NEUTRAL
24VDC @ 125mA

D
24V GND
FIELD SUPPLY

SINK ONLY C OUTPUT FIELD ELEMENTS


+24DC O/P

I/P LINE
C0 I1 I3 I4 I6 C2 I9 IB ID IF

It is recommended to install fuse type terminals (1 A fuse per output channel) between
the output terminals and the actual loads.
3.30 3.31
XMP8-16 BDIO 8/6D Input connections XMP8-16 BDIO 8/6D Output connections
+24V, 125 mA MAX. INPUT FIELD ELEMENTS
(SINK TYPE) L E C0 O2 O4 C1 + D 4307L

NEUTRAL
GND

90-265 VAC
C

25VA

EARTH

+ 24 V
0/P

LINE
N O0 O1 O3 O5 SINK PG PORT
TERMINAL BLOCK FOR
INPUT CONNECTIONS

LABEL FOR INPUTS

LABEL FOR SUPPLY


L AND OUTPUTS
N
TERMINAL BLOCK FOR
E OUTPUT AND SUPPLY
+ I0 I2 C1 I5 I7 CONNECTIONS
4307P
24VDC @ 125mA

D +24V
24V GND
FIELD SUPPLY

SINK ONLY C
+24DC O/P

OUTPUT FIELD ELEMENTS


I/P 24V GND (SINK TYPE)
C0 I1 I3 I4 I6

It is recommended to install fuse type terminals (1 A fuse per output channel) between
the output terminals and the actual loads.
3.32 3.33

XMP8-16 BDIO 12/8D Input connections XMP8-16 BDIO 12/8D Output connections
+24V, 125 mA MAX. INPUT FIELD ELEMENTS
(SINK TYPE) L E C0 O2 O4 C1 C2 +
D 4307K
GND

NEUTRAL
90-265 VAC
C

25VA

+ 24 V
EARTH
0/P

LINE
N O0 O1 O3 O5 O6 O7 SINK PG PORT
TERMINAL BLOCK FOR
INPUT CONNECTIONS

LABEL FOR INPUTS

LABEL FOR SUPPLY


L AND OUTPUTS
N
TERMINAL BLOCK FOR
E OUTPUT AND SUPPLY
CONNECTIONS
+ I0 I2 C1 I5 I7 I8 IA
4307N
D +24V
24V GND
24VDC @ 125mA
FIELD SUPPLY

SINK ONLY C
+24DC O/P

OUTPUT FIELD ELEMENTS


I/P 24V GND (SINK TYPE)
C0 I1 I3 I4 I6 C2 I9 IB

It is recommended to install fuse type terminals (1 A fuse per output channel) between
the output terminals and the actual loads.
3.34 3.35
XMP8-16 BDIO 16/12D Input connections XMP8-16 BDIO 16/12D Output connections
+24V, 125 mA MAX. INPUT FIELD ELEMENTS
(SINK TYPE) L E C0 O2 O4 C1 C2 O8 OA +
D 4307J

NEUTRAL
GND

90-265 VAC
C

25VA

EARTH

+ 24 V
LINE
0/P

N SINK PG PORT
O0 O1 O3 O5 O6 O7 O9 OB
TERMINAL BLOCK FOR
INPUT CONNECTIONS

LABEL FOR INPUTS

LABEL FOR SUPPLY


L AND OUTPUTS
N
TERMINAL BLOCK FOR
E OUTPUT AND SUPPLY
CONNECTIONS
+ I0 I2 C1 I5 I7 I8 IA IC IE 4307M
+24V
24VDC @ 125mA

D
24V GND
FIELD SUPPLY

SINK ONLY C
+24DC O/P

OUTPUT FIELD ELEMENTS


I/P 24V GND (SINK TYPE)
C0 I1 I3 I4 I6 C2 I9 IB ID IF

It is recommended to install fuse type terminals (1 A fuse per output channel) between
the output terminals and the actual loads.
3.36 3.37

Connecting The Sink Type Input Devices Connecting The Source Type Input Devices
(For AC Powered Micro XMP8-15 and XMP8-16 PLCs) (For AC Powered Micro XMP8-15 and XMP8-16 PLCs)
+24V, 125 mA MAX. INPUT FIELD ELEMENTS GND
+24V,
GND 125 mA MAX.
Please note that the first
four Inputs must necessarily
TERMINAL BLOCK FOR be connected for Sink Type
INPUT CONNECTIONS operation only, as has been
shown here.
LABEL FOR INPUTS

+ I0 I2 C1 I5 I7 I8 IA IC IE + I0 I2 C1 I5 I7 I8 IA IC IE 4307M
4307M

24VDC @ 125mA
D
24VDC @ 125mA

24V GND
D
24V GND

FIELD SUPPLY
FIELD SUPPLY

SINK ONLY C SINK ONLY C

+24DC O/P
+24DC O/P

I/P I/P
I1 I3 I4 I6 C2 I9 IB ID IF C0 I1 I3 I4 I6 C2 I9 IB ID IF
C0

The inbuilt + 24V DC 125 mA DC supply is highly recommended and must only be used for connecting the
field Input devices to the Micro PLC. It must not be tapped for the DC Outputs and / or any external use.
3.38 3.39
Discrete Input / Output wiring diagrams for Expansion Units MICRO EXP. EDIO 6I/4O (Relay) Output Connections
MICRO EXP. EDIO 6I/4O (Relay) Input Connections (Sink/Source Type)
+24 V
R C0 C1 C2 C3 + LABEL FOR SUPPLY AND OUTPUTS

RELAY COIL SUPPLY


500 mA
E

24V GND
+24VDC

+24 VDC
L
24 V GND A

4560A-0
Y
O/P O0 O1 O2 O3 –
INPUT FIELD ELEMENTS
(SINK TYPE) TERMINAL BLOCK FOR OUTPUT AND
SUPPLY CONNECTIONS

TERMINAL BLOCK FOR


INPUT CONNECTIONS 24 V GND
+24 V DC
OUTPUT FIELD ELEMENTS
I0 I2 I3 I5 LABEL FOR INPUTS NEUTRAL

SOURCE /
24 VDC
INPUT

SINK
4516A-1
Note : Reverse supply terminals, to use Inputs as LINE
I1 CO I4 C1 Source Type Inputs.

Note : In one group, you connect either Sink or Source Type of Inputs, not both. Note : All Relay contacts are potential free.
3.40 3.41

MICRO EXP. EDIO 6I/4O (DC) Input Connections (Sink/Source Type) MICRO EXP. EDIO 6I/4O (DC) Output Connections (Sink Type)

+24 V C0 C1 C2 C3 + LABEL FOR SUPPLY AND OUTPUTS

LOAD SUPPLY
24V GND
24V GND

24V GND

24V GND

24V GND

+24 VDC
D

+24V DC
500mA
C

4560B-0
24 V GND O/P
SINK O0 O1 O2 O3 –
INPUT FIELD ELEMENTS
(SINK TYPE) TERMINAL BLOCK FOR OUTPUT AND
SUPPLY CONNECTIONS

TERMINAL BLOCK FOR


INPUT CONNECTIONS

OUTPUT FIELD ELEMENTS

I0 I2 I3 I5 LABEL FOR INPUTS + 24 V


SOURCE /
24 VDC
INPUT

SINK

24 V GND
4516A-1

Note : Reverse supply terminals, to use Inputs as


I1 CO I4 C1 Source Type Inputs.
It is recommended to use external fuses (1 A fuse per output channel) between the output
Note : In one group, you can connect either Sink or Source Type of Inputs, not both. terminals and the actual loads.

3.42 3.43
MICRO EXP. EDIO 8R Output Connections MICRO EXP. EDIO 8R Output Connections

R C0 C1 C2 C3 + LABEL FOR SUPPLY AND OUTPUTS NEUTRAL

RELAY COIL SUPPLY


500 mA
E

24V GND
LINE

+24VDC

+24 VDC
L
A

4560A-0
Y OUTPUT FIELD ELEMENTS
O/P O0 O1 O2 O3 –

TERMINAL BLOCK FOR OUTPUT AND


SUPPLY CONNECTIONS

TERMINAL BLOCK FOR


+24 V DC (Relay Coil Supply) OUTPUT CONNECTIONS

OUTPUT FIELD ELEMENTS


R O4 O5 O6 O7

500 mA
E LABEL FOR SUPPLY AND OUTPUTS
NEUTRAL L
A

4516C-1
Y
LINE O/P C4 C5 C6 C7

Note : All Relay contacts are potential free. Note : All Relay contacts are potential free.

3.44 3.45

MICRO EXP. EDIO 8O DC HP Output Connections (Source Type) MICRO EXP. EDIO 8O DC HP Output Connections (Source Type)

24 V GND
C0 C1 C2 C3 + LABEL FOR SUPPLY AND OUTPUTS
LOAD SUPPLY

+24V
24V GND
+24 VDC

D
1.5Amp

+24V DC

+24V DC

+24V DC

+24V DC

+24V DC

C
4560C-0

O/P
OUTPUT FIELD ELEMENTS
SOURCE O0 O1 O2 O3 –

TERMINAL BLOCK FOR OUTPUT AND


SUPPLY CONNECTIONS
TERMINAL BLOCK FOR OUTPUT AND
SUPPLY CONNECTIONS

OUTPUT FIELD ELEMENTS O4 O5 O6 O7

+24V DC

+24V DC

+24V DC

+24V DC
D LABEL FOR SUPPLY AND OUTPUTS

1.5Amp
24 V GND C

4516E-1
O/P
SOURCE C4 C5 C6 C7
+ 24 V

Each ouput is short circuit protected internally (without any external indication). Each ouput is short circuit protected internally (without any external indication).

3.46 3.47
MICRO EXP. EDIO 8I Input Connections (Sink/Source Type) FLAP LABLE FOR MICRO EXP. MODEL ANALOG OUTPUT
+24 V

24 V GND + E + A

24V GND
FIELD SUPPLY
N

A COM
V OUT
+24 V DC

I REF
A

+24V DC
INPUT FIELD ELEMENTS L

EARTH

I OUT
O
(SINK TYPE) G
– + O/P

ANALOG COMMON (GND)


TERMINAL BLOCK FOR
INPUT CONNECTIONS

CURRENT OUTPUT
(FOR UNIPOLAR MODE ONLY)

I0 I2 C0 I5 I7 LABEL FOR INPUTS

SOURCE /
VOLTAGE OUTPUT
24 VDC
INPUT

SINK
4516B-1
I1 I3 I4 I6 C1
Note : For current output, short V OUT and I REF terminals.
Note : Reverse supply terminals to use Inputs as Source Type Inputs. In one group, you can
connect either Sink or Source Type of Inputs, not both.

3.48 3.49

FLAP LABLE FOR MICRO EXP. MODEL ANALOG INPUT FLAP LABLE FOR MICRO EXP. MODEL ANALOG INPUT

CH1 I IN

CH3 V IN

CH4 V IN
CH2 I IN
N

A COM1
+ E A

ANALOG
A

INPUTS

CH1 V IN

CH2 V IN

CH3 I IN

CH4 I IN
A COM0
24V GND
FIELD SUPPLY

N L
+24 V DC

A O
+24V DC

L G
EARTH

O I/P
G
– I/P

Note 1. Connect respective voltage Input Signal betwenn V IN (Voltage Input) and A COM
(Analog Common).
Note : 24 VDC @ 100 mA field supply is required to power ON Analog Input module. 2. Connect respective current Input Signal betwenn I IN (Current Input) and A COM
(Analog Common).
3. A COM 0 is Ground Signal for Channel 1 and 2.
4. A COM 1 is Ground Signal for Channel 3 and 4.

3.50 3.51
Equivalent Input Circuit (Basic + Expansion) Relay Output Expansion
VCC +24V

+5V
INPUT STATUS LED INDICATION
ON FRONT FACIA 5mA
COM
R
TO DIGITAL SIDE
I/P R R
R
24V DC
RELAY OUTPUT
OPTO COUPLER GND R

Equivalent Relay Output Circuit (Basic PLC) OUTPUT STATUS


OPTO
LED INDICATION
COUPLER
VCC COM

OUTPUT STATUS LED


INDICATION ON FRONT FACIA
TO DIGITAL SIDE
TO DIGITAL SIDE OUTPUT 24 V GND
RELAY

3.52 3.53

Equivalent DC Output Circuit (Basic PLC) DC Output Source Type Expansion

+5V

+24V
VCC +24V
R
OUTPUT STATUS LED
INDICATION ON FRONT FACIA

L R R
O
A
D

OPTO COUPLER
TO DIGITAL SIDE OUT PUT
TERMINAL
OUTPUT STATUS CONTROL
DC LED INDICATION &
SWITCHING 24V GND
OPTO SHORT CIRCUIT
DEVICE
COUPLER DETECTION CKT.
DC
R SWITCHING
DEIVCE L
O
GND A
TO DIGITAL SIDE D

3.54 3.55
DC Output Sink Type Expansion
Chapter 4 Getting Started
+5V +24V

This Chapter covers the PLC architecture and its execution style. The topics covered are -
L * PLC Architecture
R R
O * PLC Scan
A
D Basic Building Blocks of the PLC
The concept of PLCs evolved from the necessity of simplifying hardwired control panels. Thus the sensing
elements (input elements) and the actuating elements (output elements) are the only elements that are
hardwired to the inputs and outputs of the PLC. Their interconnection is done by a software program.
OUTPUT STATUS
LED INDICATION Input Elements
OPTO
COUPLER
Input elements are those which sense the dynamic status of a machine operation or process. Elements
DC used to give the various commands are also classified as input elements, for e.g. Push Buttons, Limit
SWITCHING Switches, Selector Switches, Proximity Switches, Float Switches, Pressure Switches etc. and are directly
R DEIVCE connected to the inputs of the PLC.
TO DIGITAL SIDE Output Elements
Output elements are mainly actuators like, Contactors, Relays, Solenoid Valves etc. Indicating lamps,
24 V GND
Annunciation lamps are also classified as output elements. These elements are directly driven through
the PLC outputs or in case of high power outputs such as motors through external contactors.

3.56 4.1

Flags I/O Listing


Flags are just like auxiliary relays used in conventional electrical interlocking systems. These are similar Inputs PB1 Outputs S1 Flags R1
to output elements as far as internal execution is considered. The vital difference is that, elements like PB2 S2 R2
Contactors, Relays, Solenoids etc. cannot be directly interfaced to the flags. It is to be noted that the flags LS1 R3
don't have any physical existence. They are just the memory locations inside the PLC.
The conventional electrical diagram of Fig. 4.1(a) can be shown by equivalent PLC interfacing in
For addressing of inputs, outputs, flags etc. refer to chapter 5. Fig. 4.1(b)
+24V PLC
PB1
PB1 R1 Common
R1 R1
O S1
PB2 I
PB2 Ladder U
LS1 LS1 LS1 N S2
Logic T
P +
R3 R2 P
Flags
U +
U
T Special
Functions T
R1 S1 R2 S2 R3 S
GND S

Fig. 4.1 (a) – Conventional Electrical Circuit [also refer Fig. 4.1 (b)] Fig. 4.1(b) – Equivalent circuit of PLC

4.2 4.3
The equivalent ladder diagram of a conventional electrical circuit that may be programmed in PLC is as Considering the conventional electrical circuit and the equivalent circuit of PLC the following things are to
shown below : be noted. :
1. The inputs to the PLC can be wired as Normally Open (NO) contact or Normally Closed (NC) contact.
PB1 PB2 R1 Depending on this, when the input is actuated, the input relay shown in equivalent circuit of PLC fig.
( )
R1 4.1(b) may turn ON or turn OFF respectively. The normally open or normally closed contacts of this
input relay are used in the PLC ladder diagram. For example PB2 has been wired as normally closed
R1 LS1 R3 S1 contact.
/ / ( )
R2 2. R1, R2 and R3 shown in Fig. 4.1(a) are used as auxiliary contactors for either interlocking or
( ) multiplexing. The same can be achieved by the PLC software stored in the memory.
R1 LS1 R2 S2 3. Since the input relay, output relay, flags etc. are not physical relays but are memory locations, there
/ ( )
R3 is no limitation on the number of normally open or normally closed contacts of these relays to be used
( ) in the ladder. For example the limit switch LS1 has been wired as normally open to the PLC. However
multiple number of NO and NC contacts of input relay are used to represent the status of LS1 in the
ladder.
Fig. 4.1(c) Equivalent ladder diagram 4. The flags are internal outputs in the PLC and are used for interlocking. The flags have no external
The PLC is composed of electronic circuit with a micro-computer at the center. However, it can be interface. They are used for temporary storage of certain conditions required in the ladder ahead.
equivalently regarded as an integrated body of ordinary relay, timer, counter etc.
5. The contacts of output relay can also be used for interlocking in the ladder. This is regardless of the
The input relay built in the PLC is driven with the external switch (signal) through the input terminal. type of load which is to be connected physically to this output.
The output relay built in the PLC is provided with internal contacts in addition to the external output
contact.

4.4 4.5

User Memory 2) Program processing


The Micro PLC is provided with onboard 8K EEPROM. This EEPROM stores the user program. The PLC executes the user program taking into consideration the status from image memories and not
that of actual physical elements. Depending upon the logic, the O/P image memory is updated as the
PLC Scan program execution progresses and result is conveyed to the CPU memory for intermediate storage.
The PLC scan consists of
1) Input processing I/P Image Logic O/P Image
Memory in Processing in Memory in
2) Program processing
CPU UMC CPU
3) Output processing
When the PLC is performing this scan, it is said to be in RUN mode, else it is said to be in Stop mode.
1) Input Processing 3) Output Processing
During I/P scan the PLC reads the ON/OFF status of inputs and stores them in the I/P image memory On completing the execution of all instructions (logic scan), the above stored output image memory is
before execution of program. This information is stored and held valid till the next scan of input module. transferred to output module which will physically change the status of the output on the PLC
No change in status is acknowledged in between scan sequence. module.
Write out Output
O/P Image
Inputs Read in O/P
I/P Memory in
Module
I/P Image CPU
Module Memory
in CPU
On completion of output processing, I/P processing is again started thus forming a scan loop.

4.6 4.7
Input/Output Response The behavior of the output 0000.0 for the following rung
Once the PLC scan starts, it processes the logic depending upon the status of I/P images. Any changes
in the PLC inputs after completion of input scan will not be accounted for logic scan. Theses changes in 1000.0 0000.0
( )
inputs are recognized during subsequent input scan. Thus the I/P response will be a function of the
PLC scan time plus sensing time. Refer figure on page no. 4.9.
depending upon the logical status of Input 1000.0, is as follows -
Similarly the O/P too will be a function of scan time of PLC since the O/Ps are functions of the I/P images
which get updated during subsequent PLC scan. The physical O/P response thus will be a function of
PLC scan time in addition to the energizing time of the O/P relay. A B A B A B A B
START 1000.0
Communication Services
Input Scan
House keeping functions 0000.0
Logic Scan Logic Scan Logic Scan Logic Scan

Scan 1 Scan 2 Scan 3 Scan 4


Output Scan
A - Input Scan B - Output Scan

Logic Scan In the Input scan of Scan 1, the Input 1000.0 is ON, so the Output 0000.0 physically becomes ON at the
beginning of the Outputs scan of the same scan. Its status remains unchanged till the beginning of the
output scan in Scan 2. In the Input scan of Scan 2, the Input 1000.0 is found to be OFF. So irrespective
of it becoming ON during the logic scan, the output 0000.0 is made off during output scan in Scan 2,. In
Scan 3, the Input 1000.0 is found to be ON again so the output 0000.0 is made on during the output scan.
In Scan 4, again the Input is found to be OFF so the output is again made OFF during the output scan.

4.8 4.9

Double Output Updation Input / Output Response lagging


Considered in this example is a case in which the status of coil 0000.3 is updated at multiple locations as The PLC has the response lagging due to influence of scan time in addition to the electrical lagging due
shown in fig. 3.2. It is considered that 1000.1 is turned ON and 1000.2 is turned OFF during input to input filter (approx. 10 ms) and mechanical response lagging due to output relay (approx. 4 ms).
processing. Since 1000.1 is turned ON, the memory image of the first coil 0000.3 is turned ON.
Consider the following ladder-
Consequently, 0000.4 in the succeeding rung will also be turned ON. Since 1000.2 in the next rung is OFF,
the coil 0000.3 is once again updated with its status as OFF. 0000.1 0000.0
The actual outputs when the output processing is executed will result in 0000.3 turned off and 0000.4 ( )
turned on.
1000.1 0000.1
Thus the double output updation may lead to confusing results and hence should be avoided or handled ( )
carefully.
0000.1 0000.2
( )
INPUT PROCESSING
1000.1 = ON 1000.2 = OFF
Scan 1 Scan 2 Scan 3 Scan 4 Scan 5
THE FIRST­
1000.1 0000.3 A Logic Scan B A Logic Scan B A Logic Scan B A Logic Scan B A Logic Scan B
( )
1000.1
0000.3 0000.4
( )
THE SECOND­ 0000.0
1000.2 0000.3
( )
0000.1
OUTPUT PROCESSING
0000.3 = OFF 0000.4 = ON
0000.2

A - Input Scan B - Output Scan


Fig. 3.2 Double Output Updation
4.10 4.11
Input 1000.1 is sensed ON in the Input scan of Scan 2. Accordingly, the Outputs 0000.1 & 0000.2 are
made ON at the beginning of output scan of the same scan. The output 0000.0 has been made ON by Chapter 5 Addressing
the N/O contact of output 0000.1. Output 0000.1 is OFF during the logic scan of Scan 2. So output 0000.0
is OFF in this scan. However in Scan 3, the output 0000.1 is ON so the output 0000.0 is made ON during
the output scan in Scan 3. This Chapter explains the addressing of bits and word parameters. This includes -

The above discussion indicates the scan effect of the PLC. The output 0000.0 is turned ON one PLC * Input, Output addressing of
scan time after the output 0000.1 is turned ON. So proper care should be taken while writing the PLC Basic Rack
ladder. Expansion Rack
* Flag addressing
The above effect can be utilized to detect the rising edge of an input signal.
* RAM word and table addressing
Improving Input / Output response The PLC identifies the different elements such as inputs, outputs, flags etc. with some unique numbers
called as address. The addressing scheme for these elements is as follows –
The I/P and O/P response may be improved by using special functions i.e. IMM_IN (Immediate in) and
IMMOUT (Immediate out). These functions allow immediate input processing and output processing of Input and Output addressing -
input or output respectively, while the program is being executed. Basic Rack
(For details refer IMM_IN & IMMOUT function blocks in chapter 8) Address Input address Output address
Model Bit Word Bit Word
BDIO 8/6 1000.0 to 1000.7 01000 0000.0 to 0000.5 00000
BDIO 12/8 1000.0 to 1000.B 01000 0000.0 to 0000.7 00000
BDIO 16/12 1000.0 to 1000.F 01000 0000.0 to 0000.B 00000

4.12 5.1

Flag Addressing Table Addressing


Bit Addressing Word Addressing Constant words are memory locations in which the data of fixed nature is stored. They are arranged
(512 Flag Bits) (32 Flag Words) in groups to form tables. There are 100 tables addressed from 00 to 99 and each table can contain
maximum 1000 constant words (Refer Chapter 5 for more details)
While defining the values of constant words, the tables are addressed as TBL00 to TBL99. When the
2000.0 to 2000.F 02000 Tables are accessed in the ladder they are addressed as 40000 to 40099 corresponding to TBL00 to
2001.0 to 2001.F 02001 TBL99.
2002.0 to 2002.F 02002
2003.0 to 2003.F 02003

2031.0 to 2031.F 02031

RAM Word Addressing


Apart from the different input, output, flag words, there are certain read/write words which are
available to the user as an inherent feature of the system. These words can be used for some
temporary storage of data or used in function blocks. The difference between RAM words and Flag
words is that the individual bits of the flag words can be accessed and used directly. However, the
individual bits of the RAM words cannot be accessed and used directly.
There are 512 RAM words or registers available in PLC. The address of these words are from 20000
to 20511. (Refer Appendix 2)

5.2 5.3
Configuration and addressing of the Expansion Module b) Warning
Before configuration of the expansion, hardware Slot assignment must be done. This is achieved by 4 Do not assign the same slot number to two or more different expansion modules connected to the
way Dip switch ( located at left hand side of the expansion module ) as follows. same basic unit. In this case, proper operation of PLC is not guaranteed. The following figure explains
slot numbers, DIP switch settings and associated Card bits as applicable to expansions
ON ON ON ON modules. As long as Unique slot numbers are alloted, the units need not be in physical sequence.

1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4

Switch setting for Switch setting for Switch setting for Switch setting for
slot $10 slot $11 slot $20 slot $21
Basic Module Exp. 1 Exp. 2 Exp. 3 Exp. 4
While setting the Switch

a) Precautions to be taken
1) Only one switch point of any expansion module should be ON at a time. If more than one switch
points are ON, then the slot number of earlier switch point is assigned. For example if 1st and Slot No. 00 For Input *1 10 11 20 21
2nd switch points are ON then slot assigned will be $10 (Priortised slot $10 to slot $21). 01 For Output *1
2) If all switch points are off then slot assigned will be $21 DIP Switch ON Not Applicable 1 2 3 4

Card Bit *2 Not Applicable 3001.2 3001.3 3001.4 3001.5

5.4 5.5

*1 In case of the basic module default Value of I/Os are 16 Inputs 12 Outputs. 3) Output Addressing
*2 The Card bit is ON in following conditions The valid output bit address are
a) Slot is configured but the module is absent 0000.0 to 0000.B Basic Outputs
b) The module in slot is different than the configured. 0001.0 to 0001.7 Expansion Output slot 10 to slot 21
c) Hardware failure of the module 0001.8 to 0001.F (Actual address for individual expansion slot
0002.0 to 0002.7 depends on I/O configuration. For more detail
0002.8 to 0002.F see example below)
The IOERR Bit 3000.3 is ON if any of the above four Card Bit / Bits are ON.
The Expansion Output bits will be addressed serially always from 0001.0 irrespective of the position and
slot number of the module. When the output bits of the subsequent module are to be addressed then the
2) Configuration.
next output Byte is to be used.
a) To configure Digital I/O module enter number of inputs and outputs for individual slots. Maximum
For example if the if the basic unit consist of 8/6R and three expansion units 6/4D, 8R, 8I, 8R then the
8 inputs and 8 outputs per slot are allowed. If it is greater than 8, then after downloading program
addressing of outputs are as follows
‘CONF’ message is displayed on Display and MEM LED is ON .
0000.0 to 0000.5 Basic unit
b) To configure Analog I/O modules enter RM for that slot.
0001.0 to 0001.3 Expansion 1, 6/4D in slot 10
Note : 1) Configuration of Basic PLC is not compulsary. 0001.8 to 0001.F Expansion 2, 8R in slot 11
2) Configurtion of Expansion module w.r.t. corresponding Slot no. is essential. If not configured,
(thre programmble unit / Dox mini package), gives I/O error & I/O’s will not be recognised There is no output module in slot 20
properly. 0002.0 to 0002.7 Expansion 3, 8R in slot 21

5.6 5.7
4) Input Addressing Summary
The valid Input bit address are
1000.0 to 1000.F Basic Inputs slot 00 Type Bit Address Word Address Comments
1001.0 to 1001.7 Expansion Inputs slot 10 to slot 21
1001.8 to 1001.F ( Actual address for individual expansion slot Output 0000.0 to 0000.5* 00000 For BDIO 8/6 (Basic Rack)
1002.0 to 1002.7 depends on I/O configuration. For more detail see 0000.0 to 0000.7* 00000 For BDIO 12/8 (Basic Rack)
1002.8 to 1002.F example below) 0000.0 to 0000.B* 00000 For BDIO 16/12 (Basic Rack)
The Expansion Input bits will be addressed serially always from 1001.0 irrespective of the position and Input 1000.0 to 1000.7* 01000 For BDIO 8/6 (Basic Rack)
slot number of the module. When the Input bits of the subsequent module are to be addressed then the 1000.0 to 1000.B* 01000 For BDIO 12/8 (Basic Rack)
next Input Byte is to be used. 1000.0 to 1000.F* 01000 For BDIO 16/12 (Basic Rack)
For example if the basic unit consist of 8/6R and three expansion units 6/4D, 8R, 8I,8I then the addressing Flags 2000.0 to 2000.F 02000 Total number of Flag bits is 512 and
of inputs are as follows 2001.0 to 2001.F 02001 the Total number of Flag words is 32.
1000.0 to 1000.7 Basic unit of slot 01 2002.0 to 2002.F 02002
1001.0 to 1001.5 Expansion 1 6/4D in slot 10 (There is no input module in slot 11)
1001.8 to 1001.F Expansion 2 8I in slot 20 2031.0 to 2031.F 02031
1002.0 to 1002.7 Expansion 3 8I in slot 21
RAM Word 20000 to 20511 Total number of RAM words is 512.
5) Analog I/O Addressing . Table 40000 to 40099 Constant word tables from 40000 to 40099
These modules do not consume any I/O memory. These are register type modules. These are accessed Each table can contain maximum 1000 words
in logic scan by REGMRD and REGMWR function blocks. Refer page no. 8.108 for more details.
* The physical Bit address ranges

5.8 5.9

Type Bit Address Word Address Comments Chapter 6 System Bits and System Words
Output 0001.0 to 0001.7 00001 For Expansion Output Slot 10 to slot 21.
0001.8 to 0001.F 00001 Actual Address for individual expansion
This Chapter explains the System bits and System words offered by the Micro PLC, used for information
0002.0 to 0002.F 00002 Slot depends on I/O configuration.
exchange.
0002.8 to 0002.F 00002
The system bits and system words are special bits/words which can be used for information exchange
Input 1001.0 to 1001.7 01001 For Expansion Input Slot 10 to slot 21. between the processor and user program.The user can use them in the ladder diagram. The functions of
1001.8 to 1001.F 01001 Actual Address of individual expansion each such bit and word are as explained below–
1002.0 to 1002.7 01002 Slot depends on I/O configuration.
1002.8 to 1002.F 01002 System Bits
3000.0 – Always ON (Power ON)
3000.1 – ON if PLC in RUN mode.
3000.2 – ON if PLC in STOP mode.
3000.3 – ON if there is I/O error.
3000.4 – ON if User Program Memory is faulty.
3000.5 – Reserved.
3000.6 – This system bit comes ON if scan time exceeds maximum permissible scan time of 150 milli
seconds. The PLC goes in stop mode and all outputs are put OFF. This bit is reset on every
power ON. This bit can be monitored in ON line.
3000.7 – Reserved

5.10 6.1
Note : The system bits 3000.0 to 3000.7 are read only bits i.e. they can be used in the form of By writing the ladder as shown below it is possible to detect and latch the occurrence of
normally open or normally closed contacts in the ladder, but not as a coil. Usage of these this system bit.
system bits as coil may result in unpredictable condition RESET
3000.8 CONDITIONS 2000.0
3000.8 – Cold Start – This bit is set to '1' by the processor for one scan period resulting in complete
/ ( )
initialization of the data memory on the processor by clearing all retentive and non retentive
2000.0
bits and words. This system bit is read/write type of bit i.e. it can be used in the form of
normally open or normally closed contacts as well as storage coils in the ladder. The
processor can go for a cold start because of any of the following reason – If the flag bit 2000.0 is declared as retentive, this flag bit will latch the cold start occurance
till it is reset by appropriate reset conditions.
a) If the processor detects any change in the user program at power ON.
b) Destroying of battery back up data is detected on power ON because of low battery 3000.9 – Warm Start - This bit is set to '1' by the processor for one scan period after a mains break
voltage or defective battery on processor. for more than 25 milli seconds. It results in clearing of all non-retentive bits and words. Thus
if it is required that the status of certain bits and words should be retained even after power
c) Hardware fault in the power supply. failure then those should be declared as retentive.
d) If the bit is set by user program for total memory initialization. This system bit is read/write type of bit i.e. it can be used in the form of normally open or
For example if the ladder is programmed as below – normally closed contacts as well as storage coils in the ladder.
1000.0 3000.8 For example if the ladder is programmed as below -
( )
1000.0 3000.9
When the input 1000.0 is ON then the system bit 3000.8 is ON which results in a cold start. ( )
Note : The cold start action resets all the retentive and nonretentive bits and words. If When the input 1000.0 is ON then the system bit 3000.9 is ON causing all non retentive bits
RAM words are used as preset value for timer/counter/monostable or other function and words to reset.
blocks, due care has to be taken to load the appropriate values in these words. (Ref.
Chapter 8 for more details)

6.2 6.3

Thus the system bit 3000.9 can be put ON either by CPU or by ladder. By writing the ladder 3000.F – Reserved
as shown below it is possible to detect the occurrence of this system bit.
3001.0 – This system bit comes ON whenever there is some fault with slot 00
RESET
3000.9 CONDITIONS 2000.0 3001.1 – This system bit comes ON whenever there is some fault with slot 01
/ ( )
3001.2 – This system bit comes ON whenever there is some fault with slot 10
2000.0
3001.3 – This system bit comes ON whenever there is some fault with slot 11
The flag bit 2000.0 should be declared as retentive. This flag bit will latch the warm start 3001.4 – This system bit comes ON whenever there is some fault with slot 20
occurance till it is reset by appropriate reset conditions.
3001.5 – This system bit comes ON whenever there is some fault with slot 21
3000.A – Reserved
3001.6 – Not used
3000.B – When this system bit is ON all the actual outputs on the output module are put OFF. The
3001.7 – Reserved
digital status of all the output bits in the memory remain unchanged. This bit can be used
to turn OFF all the outputs under emergency conditions. 3001.8 – Preset High speed counter command bit
Note : The system bits 3000.8 to 3000.B are read / write type of bits i.e. they can be used in the 3001.9 – Reserved
form of normally open or normally closed contacts in the ladder as well as storage coils. 3001.A – Reserved
3000.C – 10 milli seconds clock (Asynchronous) 50% Duty–cycle 3001.B – Counter Empty (underflow) output bit.
3000.D – 100 milli seconds clock (Asynchronous) 50% Duty–cycle For more details of system bits 3001.8 to 3001.B please refer the topic High Speed Counter
3000.E – 1 second clock (Asynchronous) 50% Duty–cycle input in chapter Special Features.
Note : The system bits 3000.C to 3000.E are read only bits i.e. they can be used in the form of 3001.C – Set RTC command from user programmam.
normally open or normally closed contacts in the ladder. They are of 50% duty cycle. The 3001.D – RTC hardware failure bit.
use of these bits can be made for flashing fault outputs etc.

6.4 6.5
3001.E – Reserved System Words
3001.F – Reserved 30000 – 00YY (00 to 99) Year in BCD
3002.0 – High Speed Counter Enable 30001 – 0 0 Mo Mo Month (1-12) in BCD
3002.1 – High Speed Counter Mode select 30002 – 0 0 Dy Dy Date (01-31) in BCD
For details,
3002.2 – High Speed Counter Mode select refer Chapter 9 30003 – 00HH Hours (00-3) in BCD
3002.3 – Pulse Catch Input 1000.2 Enable 30004 – 0 0 Mn Mn Minutes (00-59) in BCD
3002.4 – Pulse Catch Input 1000.3 Enable 30005 – 00SS Seconds (00-59) in BCD
3002.8 – 1mS Time base enable bit 30006 – Reseved
3002.9 – Copy of start bit. The systems words 30000 to 30005 give the Real Time Clock (RTC) data from PLC CPU to
3002.A – Start bit for Timer Channel user program.

3002.B – Timer Run bit indication 30007 – Station No. set on DIP switches

3003.2 – Error bit (Sets to 1 if current scan time is grater than Constant Scan time. 30008 – 00YY (00 to 99) Year in BCD
30009 – 0 0 Mo Mo Month (1-12) in BCD
30010 – 0 0 Dy Dy Date (01-31) in BCD
30011 – 00HH Hours (oo-23) in BCD
30012 – 0 0 Mn Mn Minutes (00-59) in BCD
30013 – 00SS Seconds (00-59) in BCD

6.6 6.7

30014 – Day of the Week modification word (BCD 0000 to 0006) 30026 – Constant Scan Time
30015 – Reserved 30027 – Reserved
30016 30028 – Reserved
Char1 Char2 30029 – Preset Value of 1mS timer (upto #65535mS)
ASCII Data for 4 character (1, 2, 3, 4) Alpha numeric display 30030 – Current Value of 1mS timer
30017 Refer Chapter 9 for more details on the display 30031 – Pulse Count (Frequency)
Char3 Char4
The data to be displayed ON inbuilt Alphanumeric display is to be updated in the system
words and then it automatically gets displayed on the display.
30018 – High Speed Counter output control word.
30019 – High Speed Counter preset value.
30020 – Time Interval (In steps of 10mS)
30021 – High Speed Counter current value
30022 – Reserved
30023 – Current Scan Time
30024 – Minimum Scan Time
30025 – Maximum Scan Time

6.8 6.9
A simplified ladder diagram of the wiring diagram is shown below. It does not contain the power portion
Chapter 7 PLC Programming of the circuit and shows only the control circuit.
STOP START OL
Ladder programming has been explained in this chapter. L1 / M N

The electrical wiring diagrams show the circuit wiring and the associated devices (Push Buttons, Relay, /
Counters etc.) with their relative physical location.However, these diagrams may not represent the circuits M

in their simplest form. To simplify understanding of how the circuits work, a ladder diagram is used. Here
The ladder diagram is to be read left to right, then top to bottom. The two vertical lines L1 and N represent
is a wiring diagram -
the potential of the circuit. The electrical devices are shown in their normal conditions. The stop button is
L1 L2 L3 N E shown as ‘closed’ because it is its normal condition. All the contacts shown above change position when
the devices associated with them change position.
The PLC ladder diagram is same as that of the one shown above, with similar vertical lines. Also, the
STOP devices having N/O contacts are represented by the symbol –| |– and N/C contacts by –| /|– . The
contactor or relays coils are represented by the symbol –( )– . These symbols are associated with
M M M predetermined OP (operation) codes which instruct the CPU to take specific action while executing the
START ladder. The ladder is a combination of the above symbols interconnected with each other in a sequence
M
OL
with a predetermined syntax. One branch of such a ladder is known as a ‘rung’. The above symbols are
called as the relay type of instructions and are discussed below
M

7.1 7.2

Relay type instructions 4. –( / )– This represents the inverted coil of output, flag etc. It becomes OFF if the result of ladder
programmed prior to it is 1 (true).
1. –| |– This is a single Normally Open (NO) contact in series with the previous instruction.
2. –| / |– This is a single Normally Closed (NC) contact in series with the previous instruction. 5. –( S)– This represents the latch type coil of the output, flag etc. It is set to 1 and latched if the result
of ladder programmed prior to it is 1 (true), even if, it is 1 for only one scan.
3. –( )– This represents the coil of output, flag etc. It becomes ON if the result of ladder programmed
prior to it is 1 (true). 6. –( R )– This represents the latch type coil of the output, flag etc. It resets the latched coil if the result
of ladder programmed prior to it is 1 (true).
A simple example -
7. –| P |– This instruction detects a positive (rising) edge of the result just prior to this instruction. The
L N output of this instruction remains ON for only one scan period on detection of change of
S1
L1
status from low to high with respect to the result generated during its previous execution. This
instruction is addressed by a unique flag bit which should not be used at any other
point referenced as a coil or contact or –|P|– and –|N|– . The flag addressed here is used
The above circuit is represented by a PLC ladder as by the processor for its own use while detecting the positive edge of the result. There is no
limitation on how many –|N|– instructions should be used in the program. (Refer example A
1000.0 0000 and B explained on the Page No. 7.5)
( ) 8. –| N |– This instruction detects a negative (falling) edge of the result just prior to this instruction. The
output of this instruction remains ON for only one scan period on detection of change of
where the switch S1 is connected at the Input having the address 1000.0 and the lamp is connected at status from high to low with respect to the result generated during its previous execution.This
the Output having the address 0000.0. So, whenever the switch S1 is made ON, the contact 1000.0 instruction is addressed by a unique flag bit and should not be used at any other point
energizes thus giving a continuity path and the coil 0000.0 is energized. This makes the lamp ON. When referenced as a coil or contact or –| P |– and –| N |– . The flag addressed here is used by
the switch S1 is OFF, the coil is deenergized and the lamp is also OFF. the processor for its own use while detecting the negative edge of the result. There is no
limitation on how many –| N |– instructions should be used in the program. (Refer example
C on Page No. 7.6)

7.3 7.4
Example A : In this example the flag coil 2000.3 will be ON for one scan only (the first scan in which Example C : The flag coil 2000.3 in the following example will be ON for one scan only.
both inputs 1000.2 and 1000.3 are ON)
1000.2 1000.3 2000.1 2000.3
1000.2 1000.3 2000.1 2000.3 N ( )
P ( ) A
A
1000.2
1000.2
1000.3
1000.3

2000.3
2000.3
1 scan time 1 scan time

Example B : The WINCR function block gets executed for one scan only resulting in incrementing the In example A and C, to activate the flag coil 2000.3, it is necessary that the transition from high to low
value of word 20000 when input 1000.B changes the status from OFF to ON. status should occur at point A (prior to P or N instruction).
9 —(MCR)— Master Control Relay.
1000.B 2001.3 WINCR 20000 40 —(ME)— Master End.
P ENBL DATA PFLO
The Master Control Relay (MCR) and Master End (ME) instructions together define
a zone in the ladder called as master control zone. The MCR coil may be
OVRF
programmed with a set of conditions to put it ON (conditional) or directly put ON

7.5 7.6

(unconditional). The ME coil is an unconditional coil i.e. there can not be any series The equivalent ladder considering MCR for the above ladder rungs is as below –
contacts with these coils.
When MCR coil is ON, all the ladder elements programmed in the zone behave in 1000.2
(MCR)
the normal way. When the MCR coil is OFF, all the storage coils within the zone are
put OFF though the conditions to put them ON are true. Each function block in the MCR 2000.0 2000.2 2012.D
zone is executed as if all its inputs are OFF. / ( )

Example : MCR 1000.3 MON1.0 #00200 9 2000.7 Master


TRIG PRESET RUN ( ) control
zone
1000.2
(MCR) 20002
CURNT
2000.0 2000.2 2012.D
/ ( ) (ME)

1000.3 MON1.0 #00200 9 2000.7 Master When the MCR coil is ON the ladder behaves in the normal way. When the MCR coil is OFF, all the
TRIG PRESET RUN ( ) control coils within the master control zone i.e. 2012.D and 2000.7 (in the above example) are put OFF
zone
irrespective of their input conditions.
20002 Note : The MCR contact shown above in the ladder is a hidden contact and is not programmable
CURNT by the user. Also, it can not be viewed in the programmer.

(ME)

7.7 7.8
Special Cases c) Operation of multiple MCR
a) Effect of MCR when used in parallel to a coil considering the sequence of execution. 1000.2
(MCR)
1000.0 A 1000.0 C
( ) (MCR) 1000.A 2000.0 2000.2 2012.D
/ ( )
D A
(MCR) ( ) 1000.3

Zone 1
(MCR)
Case 1 Case 2
1000.B 2001.0 2001.2 2012.E

Zone 2
In case 1 coil A will always have the status of MCR. In case 2 for coil A to be ON, MCR coil also / ( )
should be ON. Thus if 1000.0 is ON and C is OFF, then the MCR coil will be OFF. So even if D is ON, 1000.C
coil A also will become OFF.
b) Effect of MCR when programmed as output of a function block. (ME)
1000.2 A
FUNCTION Use of multiple MCR coils with only one ME coil to end the operation is possible. Depending upon which
BLOCK ( )
coil is active the active zone will change.
(MCR) 10. —(LBL)— The Label instruction is used to mark a label in the ladder.These labels are used as
B destination for the jump (JMP) instructions used in the ladder. Each LBL instruction is
( ) addressed by a unique number from 00 to 99. Each LBL instruction consumes one full
If the (MCR) coil is programmed as the output of the function block then all the successive outputs rung. When program changes are made (insertion or deletion of contacts/rungs), the
of the function block are affected by the status of the MCR coil. The status of all preceding output LBL instruction is also moved and jump destinations are automatically adjusted.
coils are unaffected.
7.9 7.10

11. —(JMP)— The jump (JMP) instruction makes it possible to skip a part of a program execution. The Thus when the JMP will get executed in rung No. 1, the rung No. 2 is skipped and execution starts from
JMP instruction is addressed by a corresponding label number (00-99). All the jumps rung number 4 because rung number 3 contains an instruction LBL #03.
are conditional. If the result of the ladder programmed prior to JMP is true, then the
The timer, counter and monostable function blocks are updated only if they are executed. If these function
execution starts from the LBL instruction addressed. The status of all the instructions
blocks are not executed then irrespective of the status of their enable input their status remains
which are not executed due to JMP instruction remains unaffected. The unconditional
unchanged. i.e. timer current value register will not increment though, prior to jumping, the enable input
jumps can be programmed by programming JMP as the first instruction in a new rung.
of the function block is ON, the counter will not upcount or down count and the monostable current value
Normally the ladder program should be written to jump the control to the succeeding
register will not down count though the monostable was triggered prior to jumping. (Ref. appropriate
rung called as forward jump. The jump to the preceding rung (reverse jump) should be
details of function blocks in Chapter 7)
used carefully as this may cause the maximum permissible scan time to exceed
resulting in memory error. In such case, the processor is forced to go in STOP mode
and the MEM fault LED blinks at 1Hz. Jump to an undefined label causes Memory Special Cases
Error. a) Effect of JMP when programmed in parallel to a coil considering the sequence of execution
Example :
1000.0 A 1000.0
1000.A 2000.0 2000.2 2012.D ( ) (JMP)
RUNG 0 / ( )
A
1000.2 #3
(JMP) ( )
RUNG 1 (JMP)
1000.B 2001.0 2001.2 2012.E Case 1 Case 2
RUNG 2 / ( ) In case 1, the JMP instruction will be executed after coil A is executed. In case 2, JMP instruction is
1000.C executed first because it is prior to the coil A. Thus coil A will never get executed.
#3
RUNG 3 [LBL]
1000.F 2001.0 2012.F
RUNG 4 ( )
7.11 7.12
b) Effect of JMP when used in function block as first output of the block. 14. TBL
Constant word table structure
1000.2 FUNCTION
BLOCK (JMP) TBL 00 $1234 40000 (Start of table)
$5678 Maximum 1000
A $9ABC words
( ) $DEF1

In the above example if JMP coil gets executed then the status of coil A will remain unchanged. The status
of coil A can change only when JMP instruction is not executed. If the JMP instruction does not get TBL 01 $1234 40001 (Start of table)
executed then the outputs of the function block behave normally. $5678 Maximum 1000
$9ABC words
$DEF1
12. —0 0— Open link in series with the previous instruction.Open link can be used where it is
desired to put OFF the coils or inputs to the function blocks unconditionally. Use of open
link is made while designing complex ladder rungs.
13. —0–0— Short link in series with the previous instruction. Short link can be used where it is TBL 99 $1234 40099 (Start of table)
desired to put ON the coils or inputs to the function blocks unconditionally. $5678 Maximum 1000
$9ABC words
$DEF1

This instruction facilitates to program a table of constant words at any place in the ladder. The contents
of this table cannot be changed dynamically during ladder execution. Such tables can be used to store
7.13 7.14

data for predefined messages, sequence table, constant values, look up tables etc.There can be 100 The ladder is as below :
such tables numbered from 40000 to 40099. Each table can contain maximum1000 words. Each constant #10
word table can be assigned with a four digit HEX value . The constant word values programmed in these (TBL)
tables can be accessed directly or indirectly depending upon the type of function block in which it is 2000.7
1000.1 TON1.0 40010 1
referred. ( )
ENBL PRESET DONE
Direct Access – In this type of access, only first value programmed in the table is referred. Such type of
access is possible in all types of function blocks without indexed operation e.g. timers, counters,
20000 RUN
comparisons etc.
CURNT

Example :
Indirect Access – In this type of access, the values programmed in the table can be read by indexed
Consider that the table of constant words is as given below. operation. Typical function blocks used are TBLMOV, TBLRD etc.
Example :

TBL 10 $0555 40010 (Start of table) Sequence desired –


$1234 1. Lifting of the trolley from the basic position.
$9ABC 2. When top limit switch is reached, horizontal (forward) motion of the trolley.
3. When Tank 1 position proximity switch is reached, trolley is lowered.
$DEF1
The constant word table can be used for sequencer type of applications. In such type of applications the
individual bits of the constant word are assigned for different output functions. (Ref. Appendix 1)
Bit 0 – Lifting of trolley.
Bit 1 – Horizontal (forward) motion of trolley.
Bit 2 – Lowering of trolley.

7.15 7.16
These three values will be entered in constant word table number 40000 (any number from 40000 to
40099 can be selected).
Dogs for Constant word table
position TBL 00 40000 (Start of table)
$0001
sensing
Trolley $0002
$0003
The ladder diagram will contain a counter function block (Ref. function block number 10 in Chapter 7) to
count the number of steps in the process. The entire sequence or process should be broken up into
distinct number of steps in which the set of outputs which are ON remain the same. When the event in
that particular step is complete, the feedback element increments the counter to the next step and the
next event starts. e.g. in step1 when the top limit switch operates, the counter increments and horizontal
Loading (Basic position) Tank 1 Tank 2 Tank 3 Unloading (forward) motion starts till Tank 1 position is reached. Suppose that the current value of this counter is
stored in RAM word 20010. The constant words will be indexed using table read function block. (Ref.
For simplicity only these three bits will be considered, actually all the sixteen bits could be assigned some task. function block number 22 in Chapter 7).
Considering the sequence desired, the required constant word table will be formulated as follows :
TBLRD 40000 22
Step B15 B14 B13 B3 B2 B1 B0 Hex Comments ENBL SRCTBL PFLO
No. Code
20010 ERR
0 0 0 0 0 0 0 1 0001 To lift the trolley OFFSET
1 0 0 0 0 0 1 0 0002 Horz. (fwd) motion
2 0 0 0 0 1 0 0 0004 To lower trolley 02000
DSTWRD

7.17 7.18

When this function block gets executed, depending upon the value of RAM word 20010 (step number)
the corresponding word from the table 40000 will be copied into flag word 02000 i.e. if the contents of
20010 are 0000 then the first word ($0001) will be copied into flag word 02000 and so on.
Further ladder for individual outputs can then be written–

OTHER SAFETY
2000.0 INTERLOCKS 0000.0
( ) Output for lifting trolley

OTHER SAFETY
2000.1 INTERLOCKS 0000.1
( ) Output for horizontal (forward)
motion of trolley

OTHER SAFETY
2000.2 INTERLOCKS 0000.2
( ) Output for lowering trolley

7.19
The table given along with each function block describes all the parameters of the function block. The
Chapter 8 Function Blocks type of variables allowed for word parameters are described with the following codes —
00 –
Indicates valid output word i.e. 00000
This Chapter explains the function blocks available for programming. The following description is 01 –
Indicates valid input word i.e. 01000
applicable to all the models of the Micro XMP8 series PLCs. 02 –
Indicates valid flag words e.g. 02017, 02000 etc.
#,$ Indicates valid immediate words decimal numbers 0 < # no. < 65535 or hexadecimal numbers

The Micro PLC offers advanced software features in the form of function blocks. These features include 0 < $ no. < FFFF or BCD number 0< #no. < 9999.
timers, counters, monostables and a variety of word operations. A unique number is associated with every 2X – Indicates valid RAM words e.g. 20153, 20001 etc.
function block. Each function block consumes 3 column spaces, rows depending upon the parameters 3X – Indicates valid system words e.g. 30016, 30002 etc.
used by the function block and one rung of the ladder program. The structure of the function block is such 4X – Indicates constant word table numbers e.g. 40025 for table no. 25, 40001 for table no. 1 etc.
that it has got some input bits and some output bits. The input bits if not programmed will be treated as
OFF. For having a continuously ON input condition, either short link or system bit 3000.1 can be used. In A * GIVEN BELOW THE VARIABLES INDICATES THAT THEY ARE ALLOWED FOR THE
addition, every function block has some word parameters depending upon the operation it carries. CORRESPONDING WORD PARAMETER.

Thus, four things are required to define a function block completely - For example -

a) Name of the function block or function block number. (Ref. Appendix 3 for list of function blocks) WORD PARA 00 01 02 #$ 2X 3X 4X
b) Bit type of inputs to the block. PRESET * * * * * * *
c) Word type of parameters to be defined within the block. CURNT * * * *
d) Bit type of outputs to the block. In the above table, against the PRESET option the * is present in all the columns. It means that the output
word, the input word, the flag word, the constant values, the RAM word, the system words and the table
are the valid word parameters which can be programmed at the PRESET position in that function block.
However, only, the output word, the flag word, the RAM word and the systems word can be programmed
at the CURNT position.
8.1 8.2

Refer the important tips given below — declare the bits and words as retentive), e.g. if an ON delay timer function block is required to be
retentive, then declare the RAM word, in which current value of timer is stored, as retentive. If the done
IMPORTANT TIPS bit is also required as retentive then declare the corresponding flag bit also as retentive.
Following points regarding function block are to be noted : It is to be noted that the parameters which are declared as retentive, retain their status for the time
1. For making multiple use of the status of the output bits of the function blocks, the status of those during which the power was OFF. On subsequent power up, these parameters can get modified as
output bits may be stored in flag bits and the contacts of these flag bits should be used. per the ladder logic.
2. If the function block does not get executed then, the parameters of the function block remain 6. The parameters of the function block can be modified in Online mode of programming devices if
unchanged. e.g. if the timer, counter or monostable function blocks are not executed, their current these are stored in RAM words or flag words. If the parameters are declared as immediate numbers,
values stored in respective RAM words will remain unchanged. Also, the status of the respective either # or $ then these cannot be modified in Online. It is to be noted that on every power ON all the
output bits will remain unchanged. Same is true for other function blocks also. RAM words are reset. If it is required that the preset value or current value etc. should retain its status
3. The different words available are assigned by the user for the different parameters of the function even after power failure then the respective words should be declared as retentive.
blocks. It may so happen, that the same word may be assigned to two parameters of different 7. If the function block is programmed within the master control zone and when the master control is
function blocks e.g. the same RAM word is defined as current value of two timers programmed in two operative, the function block will be executed considering all its inputs as OFF. Also all the storage
different rungs. But actually, it was intended to store the current value in different RAM words. This coils connected after the function blocks will also go off.
may result in some peculiar phenomenon and cause unpredictable operations of the function blocks.
8. Parallel branching at the Input side or Output side of a function block is not allowed.
4. Normally open or normally close series contacts can be connected in series of the output bits of the
function blocks and the storage coil. The number of such contacts is limited by the rung structure of 9. PFLO output always carries the status of Enable input.
maximum 10 columns and 6 rows.
5. If it is desired that, certain parameters of the function block should retain their status even after
power failure then these parameters should be declared as retentive (Refer programmer manuals to

8.3 8.4
TIMER FUNCTION BLOCKS — ON DELAY TYPE Function No. : 02 TON0.1
On Delay timer with 0.1 sec time base
ENABLE
PRESET WORD PARA 00 01 02 #$ 2X 3X 4X
CURRENT PRESET * * * * * * *
CURNT * * * *
RUN
DONE
1000.0 TON0.1 20001 2 2000.0
Function No. : 01 TON.01 ENBL PRESET DONE ( )
On Delay timer with .01 sec time base
WORD PARA 00 01 02 #$ 2X 3X 4X 20000
CURNT RUN
PRESET * * * * * * *
CURNT * * * *

1000.0 TON.01 20001 1 2000.0


ENBL PRESET DONE ( )

20000
CURNT RUN

8.5 8.6

Function No. : 03 TON1.0 If this function block does not get executed because of JUMP instruction etc. then there will be no change
On Delay timer with 1 sec time base in the parameters of this block. Thus to freeze the timing this block is to be jumped so that it does not get
executed.
WORD PARA 00 01 02 #$ 2X 3X 4X
If this block is programmed within the master control zone and if the master control is operative (MCR coil
PRESET * * * * * * * is OFF) then the current value of timer will become zero as under master control all inputs to the function
CURNT * * * * block are treated as OFF.
The maximum repeatability error encountered is time base plus scan time. In order to minimize the error
1000.0 20001 3 2000.0 lower time bases should be used if possible.
TON1.0
ENBL PRESET DONE ( ) The preset or current values of this timer block can also be modified as per the ladder diagram (by some
other function blocks) or by using Online mode of programming devices. In such cases if modified preset
20000 value is found to be less than or equal to current value, then current value immediately becomes equal to
CURNT RUN preset value and the timer done bit becomes ON. If the modified preset value is found to be more than
current value and if the ENBL input is ON then the current value starts incrementing. The done bit may go
OFF if it was ON earlier when preset value was equal to current value. The done bit will come ON when
the current value becomes equal to the modified preset value.

Operation
When enable (ENBL) input is high, the current value increments on every rising edge of time base (0.01
sec, 0.1 sec or 1 sec). The DONE bit comes ON when current value becomes equal to preset value and
enable (ENBL) input is high. The RUN bit is ON when enable (ENBL) input is high and current value is not
equal to preset value. Actual ON delay time will be the product of preset value and time base. When
enable (ENBL) input is low, the current value is 0.

8.7 8.8
TIMER FUNCTION BLOCKS — OFF DELAY TYPE Function No. : 05 TOF0.1
Off delay timer with 0.1 sec time base
ENABLE
PRESET WORD PARA 00 01 02 #$ 2X 3X 4X

CURRENT PRESET * * * * * * *
CURNT * * * *
RUN
DONE 1000.0 TOF0.1 #00030 5 2000.1
ENBL PRESET DONE ( )
Function No. : 04 TOF.01
Off delay timer with .01 sec time base 20001
CURNT RUN
WORD PARA 00 01 02 #$ 2X 3X 4X
PRESET * * * * * * *
CURNT * * * *

1000.0 TOF.01 20001 4 2000.5


ENBL PRESET DONE ( )

20000
CURNT RUN

8.9 8.10

Function No. : 06 TOF1.0 If this block is programmed within the master control zone and if the master control is operative (MCR coil
Off delay timer with 1 sec time base is OFF) then the behavior will be as below -

WORD PARA 00 01 02 #$ 2X 3X 4X a) If the enable input becomes ON, DONE bit will not come ON.
b) If the enable input was ON earlier, then the current value will start incrementing on every rising edge
PRESET * * * * * * * of time base, as under master control the input to the function block will be treated as OFF. However,
CURNT * * * * the outputs driven through DONE and RUN will be forced to OFF.
The maximum error encountered is time base plus scan time. In order to minimize the error lower time
1000.0 20001 6 2000.0
TOF1.0 bases should be used if possible.
ENBL PRESET DONE ( )
The preset or current value of this timer block can also be modified as per the ladder diagram (by some
other function blocks) or by using ON-line mode of programming devices. In such cases if the preset
20000 value is modified to a value less than or equal to the current value then the RUN and DONE bit
CURNT RUN
immediately go low and timing operation is completed.

Operation Retentive OFF delay timer cannot be achieved just by declaring the parameters of the OFF delay function
When enable (ENBL) input becomes high the DONE bit also becomes high immediately. The RUN bit block as retentive, but can be achieved by programming an ON delay timer as follows -
becomes high when ENBL input goes low (transition from 1 to 0) and the current value starts incrementing
on every rising edge of time base(0.01 sec, 0.1 sec or 1 sec). When current value equals the preset value ENBL 2000.0 2000.1
both RUN bit and DONE bit go low and current value becomes 0. Actual delay time will be the product of / ( ) OFF delay
preset value and time base. DONE
2000.1 output bit
If this function block does not get executed because of JUMP instruction etc. then there will be no change
in the parameters of this block. Thus to freeze the timing, this block is to be jumped so that it does not
get executed.

8.11 8.12
1000.1 ENBL TON 1.0 20000 3 2000.0 MONOSTABLE FUNCTION BLOCKS
/ ENBL PRESET DONE ( )
TRIGGER
PRESET
20110 RUN 2000.2
CURNT ( ) CURRENT

RUN
The parameters of ON delay timer i.e. PRESET (20000), CURENT (20110) and DONE (2000.0) are to be
declared as retentive. Also flag coil 2000.1 representing OFF delay DONE output bit and flag coil 2000.2
Function No. : 07 MON.01
representing OFF delay RUN output bit are to be declared as retentive.
Monostable with .01 sec time base

WORD PARA 00 01 02 #$ 2X 3X 4X

PRESET * * * * * * *
CURNT * * * *

2000.2 MON.01 20000 7 2000.3


TRIG PRESET RUN ( )

20001
CURNT

8.13 8.14

Function No. : 08 MON0.1 Function No. : 09 MON1.0


Monostable with 0.1 sec time base Monostable with 1 sec time base

WORD PARA 00 01 02 #$ 2X 3X 4X WORD PARA 00 01 02 #$ 2X 3X 4X

PRESET * * * * * * * PRESET * * * * * * *
CURNT * * * * CURNT * * * *

1000.2 MON1.0 #00200 9 2000.7


1000.2 MON0.1 02003 8 2000.5 ( )
RUN ( ) TRIG PRESET RUN
TRIG PRESET

20003 20002
CURNT CURNT

Whenever there is a transition from OFF to ON at the trigger (TRIG) input,


a) the current value becomes equal to the preset value;
b) the RUN bit becomes high;
c) the current value decrements by one on every rising edge of respective time base(.01 sec, 0.1 sec
or 1 sec). The RUN bit becomes OFF when current value becomes zero. The monostable is of
retriggerrable type. (Ref. waveforms)
If a monostable block does not get executed because of JUMP instruction, then the values of the
parameters of this block remain unchanged.

8.15 8.16
If this block is programmed within the master control zone and if the master control is operative (MCR coil COUNTER FUNCTION BLOCKS
is OFF) then the the behavior will be as below – Function No. : 10 UPCTR
Up counter
a) The monostable cannot get triggered if not triggered earlier.
b) The monostable continues to count down if triggered earlier and the current value decrements on WORD PARA 00 01 02 #$ 2X 3X 4X
every rising edge of time base.
PRESET * * * * * * *
c) If the MCR coil becomes ON subsequently and if the trigger input is still ON, then the monostable CURNT * * * *
gets falsely retriggered because of detection of rising edge at its input.
The maximum timing error encountered is time base plus scan time. In order to minimize the error lower 1000.0 2000.3
UPCTR #03000 10
time bases are to be used if possible. PRESET ( )
RST DONE
The preset or current values of monostable block can also be modified as per the ladder diagram (by
1000.1
some other function blocks) or by using programming devices. In such cases if the modified preset value
UP 20015
is found to be less than or equal to current value, then the current value immediately becomes equal to CURNT
preset value.
If the modified preset value is found to be more than current value during the timing operation, the When the reset input (RST) is high the current value of counter becomes zero. This is resetting of counter.
operation remains unchanged for that timing cycle and is effected from the next timing cycle. When the reset input is OFF the current value of the counter increments by one on every transition from
Retentive monostables cannot be achieved just by declaring the parameters of the monostable function OFF to ON at the UP input. The DONE bit goes high when the current value becomes equal to the preset
block as retentive. Retentive monostables can be achieved by using ON delay timer function blocks. value. The current value cannot increment beyond preset value.
If a counter block does not get executed then, the parameters of the function block remain unchanged.
If counter function block is not executed, its current value stored in respective RAM word will remain the
same. Also, the status of the respective output bits will remain unchanged.

8.17 8.18

If this block is programmed within the master control zone and if the master control is operative (MCR coil Function No. : 11 DNCTR
is OFF) then the counter will freeze i.e. the current value or the related output bits will not change even Down Counter
though there is change in input status.
WORD PARA 00 01 02 #$ 2X 3X 4X
Retentive UP counters should be programmed with –|P|– instruction and N/C contact of warmstart bit
(3000.9) in series with the UP input e.g. if the UP counter block shown above is to be retentive then it PRESET * * * * * * *
should be modified as shown below– CURNT * * * *

1000.0 UPCTR #03000 10 2000.3 1000.1 DNCTR #00200 11


RST PRESET DONE ( ) PRST PRESET EMTY
1000.1 2010.4 1000.2
/ P UP 20015 DOWN 20000
3000.9 CURNT CURNT

When the preset input (PRST) is high the current value becomes equal to the preset value. This is
presetting of the counter. When the preset input is low, the current value of the counter decrements by
The current value of this block (word 20015) and flag bits 2010.4 and 2000.3 should be declared as
one on every transition from OFF to ON at the DOWN input. The EMTY bit goes high when the current
retentive. The –|P|– instruction and the N/C contact of warm start have been introduced to check the
value is equal to zero. The current value cannot decrement below zero.
false increment of the counter if the 1000.1 input is ON at the fresh power ON.
If a counter function block is not executed, its current value stored in respective RAM word will remain the
same. Also, the status of the respective output bits will remain unchanged.
If this block is programmed within the master control zone and if the master control is operative (MCR coil
is OFF) then the counter will freeze i.e. the current value or the related output bits will not change even
though there is change in input status.

8.19 8.20
Retentive DOWN counters should be programmed with –|P|– instruction and the N/C contact of warm Function No. : 12 U/DCTR
start bit 3000.9 in series with the DOWN input e.g. if the DOWN counter block shown above is to be UP/DOWN Counter
retentive then it should be modified as shown below–
WORD PARA 00 01 02 #$ 2X 3X 4X
1000.1 DNCTR #00200 11 2000.3 PRESET * * * * * * *
PRST PRESET EMTY ( ) CURNT * * * *
1000.2 2000.0
/ P DOWN 20000 1000.0 U/DCTR #03000 12 2000.A
3000.9 CURNT
RST PRESET DONE ( )

1000.1
20003
PRST CURNT EMTY
The current value of this block (word 20000) and flag bit 2000.3 both should be declared as retentive. The
1000.2
–|P|– instruction and the N/C contact of warm start have been introduced to check the false increment
UP
of the counter if the 1000.1 input is ON at the fresh power ON.
1000.3
DOWN

When the reset (RST) input is high the current value of the counter is zero. The EMTY bit is high whenever
current value of counter becomes zero. When the preset (PRST) input is high the current value of the
counter becomes equal to the preset value of the counter. The DONE bit is high whenever the current
value of counter becomes equal to preset value of the counter. The reset input has got highest priority. If
the RST and PRST inputs are low and there is a transition from OFF to ON at the up counting input the
current value increments by one. If the RST and PRST inputs are low and there is a transition from OFF
8.21 8.22

to ON at the DOWN counting input the current value decrements by one. The current value cannot The current value of this block (word 20003) and flag bits 2000.A, 2011.4 and 2011.5 should be declared
increment above preset value and decrement below zero. DOWN input possesses lowest priority. as retentive.
If the function block does not get executed then, the parameters of the function block remain unchanged.
If counter function block ia not executed, its current values stored in respective RAM word will remain the Application Example :
same. Also, the status of the respective output bits will remain unchanged. It is required to increment the value of any RAM word using a push button . This RAM word may be preset
If this block is programmed within the master control zone and if the master control is operative (MCR coil value of timer or counter function blocks. Incrementing should be using coarse control and fine control.
is OFF) then the counter will freeze i.e. the current value or the related output bits will not change even Fine control increments the RAM word by one if the push button is pressed and released before 1 second.
though there is change in input status. If the push button is kept pressed for more than 1 second then the RAM word should increment by 1 after
every 0.1 sec.
Retentive UP/DOWN counters should be programmed with –|P|– instruction and the N/C contact of
warm start bit 3000.9 in series with the UP and DOWN input e.g. if the UP/DOWN counter block shown PUSH
above is to be made retentive then it should be modified as follows– BUTTON
1000.0 MON0.1 #0010 8 2000.0
1000.0 U/DCTR #03000 12 2000.A / TRIG PRESET RUN ( )
RST PRESET DONE ( )

1000.1 20003 20010


PRST CURNT EMTY CURNT

1000.2 2011.4
/ P UP
3000.9 3000.D 1000.0 2000.1
1000.2 2001.5 ( )
/ P DOWN
3000.9 2000.0

8.23 8.24
2000.2 UPCTR #9999 10 2000.3 COMPARISON FUNCTION BLOCK
RST PRESET DONE ( ) Function No. : 13 COMPR
Comparison Block
2000.1
UP 20000
CURNT WORD PARA 00 01 02 #$ 2X 3X 4X
DATA_A * * * * * * *
DATA_B * * * * * * *
Wth this program the RAM word 20000 will increment in the desired manner.

COMPR 20000 13 2000.A


ENBL DATA_A A<B ( )

2000.B
20001 A=B ( )
DATA_B
2000.C
A>B ( )

When the enable (ENBL) input is ON then the word value at DATA_A is compared with word value at
DATA_B. If the value at DATA_A is less than value at DATA_B then the output bit A<B is ON. If the value
at DATA_A is equal to value at DATA_B then the output bit A=B is ON. If the value at DATA_A is greater
than value at DATA_B then the output bit A>B is ON.
When enable (ENBL) input is OFF none of the output bits are ON.

8.25 8.26

For A <= B, use the output bit of A < B and A = B in parallel. ARITHMETIC FUNCTION BLOCKS
2000.D Function No. : 14 ADD
2000.A
( ) Single Word Addition

2000.B WORD PARA 00 01 02 #$ 2X 3X 4X


DATA_A * * * * * * *
DATA_B * * * * * * *
For A => B, use the output bit of A > B and A = B in parallel. RESULT * * * *
2000.B 2000.E
( ) 1000.1 ADD 20000 14
ENBL DATA_A PFLO
2000.C
C_IN 20001 COUT
DATA_B

20002
RESULT

When the enable (ENBL) input is high the contents of DATA_A are added to contents of DATA_B and
result is stored in location defined by RESULT. Whenever C_IN input is high and ENBL input is also high
then DATA_A is added to DATA_B plus one. The resulting word is stored in a location indicated by
RESULT. If the result of addition is greater than #65535 or $FFFF then the COUT bit comes ON. This
COUT bit can be cascaded to C_IN of next ADD block to achieve 32 bit addition.
The output bit PFLO carries the logical status of ENBL input.

8.27 8.28
Example 1 : Function No. : 15 SUB
Consider that the contents of 20000 are #0005 and the contents of 20001 are #0100. When this function Single word subtraction
block gets executed then the contents of RESULT i.e.20002 will be #0105.
WORD PARA 00 01 02 #$ 2X 3X 4X
Example 2 : 32 bit addition 20002 20000
DATA_A * * * * * * *
$0001 $FFFE
DATA_B * * * * * * *
+ 20003 20001 RESULT * * * *
$0000 $0004
2000.0 SUB 20000 15
Result 20005 20004 ENBL DATA_A PFLO
$0002 $0002
B_IN 20004 COUT
ADD 20000 14 DATA_B
ENBL DATA_A PFLO
20001 20101
C_IN 2000.3 RESULT
DATA_B COUT ( )
20004
RESULT When the enable (ENBL) input is high then the value at DATA_B is subtracted from the value at DATA_A
and the result is stored in a location defined by RESULT. Whenever B_IN is ON and ENBL is also ON then
ADD 20002 14 value of (DATA_B + 1) is subtracted from DATA_A and the result is stored in a location indicated by
ENBL DATA_A PFLO RESULT. If the value at DATA_B is greater than value at DATA_A, then BOUT bit is ON and the word
2000.3 20003 indicated by RESULT contains the difference (DATA_B – DATA_A) in 2's compliment form. To have the
C_IN DATA_B COUT actual difference, compliment this word and add one to it. The BOUT output can be cascaded to B_IN of
20005 next SUB block to achieve 32 bit subtraction. The output bit PFLO carries the logical status of ENBL input.
RESULT

8.29 8.30

Example 1 : Example 3 :
Consider that the contents of 20000 are #0100 and the contents of 20004 are #0015. When this function Consider that the contents of DATA_A (20000) 2000.0 SUB 20000 15
block gets executed then the contents of RESULT i.e.20101 will be #0085. are $0002 and the contents of DATA_B (20004) ENBL DATA_A PFLO
are $0004. When the function block gets B_IN 20004
Example 2 : 32 bit subtraction 20002 20000 2000.1
executed then the contents of RESULT i.e. 20101 DATA_B
$0002 $0002 BOUT ( )
will be $FFFE. 20101
— 20003 20001
$0000 $0004
To get the difference between the two words 2000.1 CPL 20101 39
Result 20005 20004 20000 and 20004 ($0004 – $0002), 2s ENBL DATA_A PFLO
$0001 $FFFE compliments of the result (20101) is to be taken.
20100
20000 15
For this the following function blocks are required
SUB RESULT
ENBL DATA_A PFLO
to be written as below –
20001 Contents after execution of CPL
B_IN 2001.0
DATA_B ( )
BOUT 20100 $0001 WINCR 20100 40
20004 2000.1
ENBL DATA PFLO
RESULT
Contents after execution of WINCR
SUB 20002 15 20100 $0002
ENBL DATA_A PFLO OVRF
2001.0
20003 Thus after execution of these two blocks the
B_IN DATA_B
BOUT contents of 20100 will be $0002 which is the
20005 difference.
RESULT

8.31 8.32
Function No. : 16 MUL Example :
16 bit multiplication Consider that the contents of 20000 are $FFFF and the contents of 20001 are #0002. When this function
WORD PARA 00 01 02 #$ 2X 3X 4X block gets executed then the contents of RESULT i.e.20002 will be $FFFE and the contents of 20003 will
be $0001.
DATA_A * * * * * * *
DATA_B * * * * * * * 20000 $FFFF
RESULT * * * *
x 20001 x $0002
2000.3 MUL 20000 16
DATA_A PFLO 20003 20002 →
2000.0
$0001 FFFE
ENBL
20008 ERR ( )
DATA_B

20002 Address 20003 should not be used elsewhere in the ladder.


RESULT

When the enable (ENBL) input is ON, the contents of DATA_A are multiplied by the contents of DATA_B
and the result is stored in two subsequent words. It is to be noted that the next subsequent word to
that defined in RESULT is also modified. This is so because the result of multiplication is in two
words(required when the result of multiplication exceeds the maximum limit of one word). The output bit
ERR comes on whenever there is no subsequent word available due to crossing the limitation of
maximum number of words available. Whenever the error output bit ERR is ON the contents of RESULT
remain unchanged.
The output bit PFLO carries the logical status of ENBL input.

8.33 8.34

Function No. : 17 DIV Example :


16 bit division Consider that the contents of 20000 are #0124 and the contents of 20001 are #0010. When this function
WORD PARA 00 01 02 #$ 2X 3X 4X block gets executed then the contents of RESULT i.e.20002 will be #0012 and the contents of 20003 will
be #0004.
DATA_A * * * * * * *
DATA_B * * * * * * * 20000 #0124
RESULT * * * *
÷ 20001 #0010
2000.3 DIV 20000 17
ENBL DATA_A PFLO Quotient 20002 #0012
20001 ERR Remainder 20003 #0004
DATA_B

20002
RESULT Address 20003 should not be used elsewhere.

When enable (ENBL) input is ON, the contents of DATA_A are divided by contents of DATA_B. The result
of division is stored in two subsequent words. The quotient is stored in the location specified by
RESULT and the remainder is stored in the next location. The error bit ERR comes ON when the
DATA_B is zero i.e. an attempt made to divide by zero or there is no subsequent word available due to
crossing of the limitation of maximum number of words available. Whenever the error bit ERR is ON the
contents of RESULT remain unchanged.
The output bit PFLO carries the logical status of ENBL input.

8.35 8.36
LIMIT CHECK FUNCTION BLOCK TRANSFER FUNCTION BLOCKS
Function No. : 18 LMTALM Function No. : 19 MOVE
Limit Check and Alarm Move the word value

WORD PARA 00 01 02 #$ 2X 3X 4X WORD PARA 00 01 02 #$ 2X 3X 4X


DATA * * * * * * * SRCWRD * * * * * * *
HI_LMT * * * * * * * DSTWRD * * * *
LO-LMT * * * * * * *
1001.0 01000 18 2000.1
LMTALM
ENBL DATA O.K. ( ) 1001.0 MOVE 01000 19
2000.2 ENBL SRCWRD PFLO
20200 HIGH ( )
HI_LMT
2000.3
( ) 20089
LOW
#00050 DSTWRD
LO_LMT 2000.4
ERR ( )
When the enable (ENBL) input is ON, it is checked whether the contents specified in DATA are within the When enable (ENBL) input is high the contents of source word (SRCWRD) are transferred to destination
limits as specified in HI_LMT and LO_LMT. word (DSTWRD). The output bit PFLO carries the logical status of ENBL input.
The output bit OK is ON if the DATA is within the HI_LMT and LO_LMT values and there is no error.
The output bit HIGH is ON if the DATA is greater than or equal to HI_LMT and there is no error.
The output bit LOW is ON if the DATA is less than or equal to LO_LMT and there is no error.
The error output bit (ERR) is ON if the value of LO_LMT is greater than or equal to HI_LMT.
When enable(ENBL) input is OFF, none of the output bits are ON.

8.37 8.38

Function No. : 20 TBLFIL Example :


Table fill Consider that the contents of source word(SRCWRD) 20000 are $ABCD , length (LENGTH) 20040 are
#0010 and start of the table (DSTTBL) is 20100
WORD PARA 00 01 02 #$ 2X 3X 4X
When the function block gets executed (1001.0 is ON) then the contents of the RAM words 20100 to
SRCWRD * * * * * * * 20109 will be $ABCD.
LENGTH * * * * * * *
DSTTBL * * * *
DSTTBL
1001.0 TBLFIL 20000 20 $ABCD 20100
ENBL SRCWRD PFLO
$ABCD 20101
2000.F
20040 ERR ( ) 20000 $ABCD $ABCD 20102
LENGTH

20100 Length (20040)


DSTTBL #0010

When the enable (ENBL) input is ON then the contents of source word (SRCWRD) will be written into a
table of words. The start of the table will be defined by DSTTBL. The number of words to be written with $ABCD 20109
the source word will be defined in the length.
The error output bit (ERR) is ON if the total length of destination table is crossing the limits of the word
type specified. Whenever the error output bit ERR is ON the table fill operation will not take place. The
output bit PFLO carries the logical status of ENBL input.

8.39 8.40
Function No. : 21 TBLMOV The error output bit (ERR) will be on if the length of source or destination table is crossing the limits of the
Table move word type specified. Whenever the error output bit ERR is ON the table move operation will not take place.
The output bit PFLO carries the logical status of ENBL input.
WORD PARA 00 01 02 #$ 2X 3X 4X
SRCTBL * * * * * * Example :
LENGTH * * * * * * * Consider that the source table (SRCTBL) starts at 20003. The length of the source table (LENGTH) is
DSTTBL * * * * #0008. The start of the destination table (DSTTBL) is 20200 .
When the function block gets executed (2021.6 is ON) then contents of 20003 will be copied into 20200,
2021.6
TBLMOV 20003 21 contents of 20004 will be copied into 20201, contents of 20005 will be copied into 20202 and so on till
ENBL SRCTBL PFLO contents of 20012 will be copied into 20209 (as the length is 8).
#00008 ERR Source Table Destination Table
LENGTH
Contents Contents after execution
20200 20003 $1234 → 20200 $1234
DSTTBL
20004 $5678 → 20201 $5678
When enable (ENBL) input is ON the data from the source table will be copied into destination table. The
20005 $9ABC → 20202 $9ABC
start of the source table will be defined by SRCTBL. The number of words to be copied from the source 20006 $DEF1 → 20203 $DEF1
table to the destination table will be defined in length. The start of the destination table is defined in 20007 $2345 → 20204 $2345
DSTTBL. 20008 $6789 → 20205 $6789
When the block gets executed the contents of words starting from SRCTBL to SRCTBL plus LENGTH will 20009 $ABCD → 20206 $ABCD
be transferred to the contents of words starting from DSTTBL to DSTTBL plus LENGTH.
20010 $EF12 → 20207 $EF12

8.41 8.42

Function No. : 22 TBLRD Example :


Table read Consider that the source table starts at 20010. The offset is defined in RAM word 20001 whose contents
WORD PARA 00 01 02 #$ 2X 3X 4X are #0005. The destination word is 02000.
The source table of RAM words is as below –
SRCTBL * * * * * *
OFFSET * * * * * * * Source
DSTWRD * * * * Table

2006.9 Start of 20010 $1234


TBLRD 20010 22
ENBL SRCTBL PFLO table 20011 $5678
20012 $9ABC
20001 ERR
OFFSET offset 20013 $DEF1 Destination Contents after
20014 $12AB Word execution
02000
DSTWRD 20015 $3634 02000 $3634
20016 $37F4
When enable (ENBL) input is ON, a word offset from the source table (SRCTBL) is copied into destination 20017 $1398
word (DSTWRD). The addition of the address at SRCTBL and the value of OFFSET gives the address of
the word which will be copied into destination word (DSTWRD).
Start of
The error output bit ERR will come ON when the addition of OFFSET and start of source table crosses table offset
the limits of the word type specified. Whenever the error bit ERR is ON the table read operation will not The word which will be copied is (20010 + #0005) = (20015). The value of the word 20015 will be copied
take place. The output bit PFLO carries the logical status of ENBL input. into destination. Thus the contents of the destination word 02000 will be $3634.

8.43 8.44
Function No. : 23 TBLWR Example :
Table write Consider that the start of the destination table is 20100. The offset is defined in RAM word 20009 whose
WORD PARA 00 01 02 #$ 2X 3X 4X contents are #0006. The source word is 20005 whose contents are $1965.

SRCWRD * * * * * * Source
OFFSET * * * * * * * Table
DSTTBL * * * *
Start of destination table 20100 $1654
1000.1 20101 $12FA
TBLWR 20005 23
ENBL SRCWRD PFLO 20102 $962B
Source offset $3134
20103
20009 ERR Word Contents
OFFSET 20104 $0123
20005 $1965 20105 $3826
20100
DSTTBL 20106 $1965
20107 $CACA
When the enable (ENBL) input is ON the contents of the source word (SRCWRD) will be transferred to a
word offset in the destination table. When the block gets executed the addition of value of OFFSET and
address at DSTTBL point to a word in which the contents of SRCWRD will be copied.
Start of
The error output bit ERR will come ON when the addition of OFFSET and start of source table crosses the table offset
limits of word type specified. Whenever the error output bit ERR is ON the table write operation will not
take place. The output bit PFLO carries the logical status of ENBL input. The word address into which the source word will be copied is (20100 + #0006)=(20106). Thus the
contents of 20106 after the function block has been executed are $1965.

8.45 8.46

Function No. : 24 TBLSRH In case of multiple occurances of the source word value, the table search block points to the first
Table search occurance of the value of source word.

WORD PARA 00 01 02 #$ 2X 3X 4X The error output bit (ERR) will come ON when the addition of LENGTH and start of source table (SRCTBL)
crosses the limits of word type specified. Whenever the error output bit ERR is ON the table search
SRCWRD * * * * * * * operation will not take place.
SRCTBL * * * * * * Example :
LENGTH * * * * * * *
FNDAT * * * * Consider that the table starts at 20010. The length is defined in RAM word 20200 whose contents are
#0008. The contents of source word 01001 are $4368. The source table of RAM word is as below –
1000.2 TBLSRH 01001 24 2000.7 Source
ENBL SRCWRD FND ( ) Table
20010 ERR Start of table 20010 $7244
SRCTBL
20011 $6678
20200 20012 $9FBC
LENGTH
20013 $4E51
20300
20014 $4368
FNDAT
20015 $3634 Found at
Contents
When the enable (ENBL) input is ON then the contents of word defined in SRCWRD are searched in a 20016 $4578
table of words. The start of this table is given in SRCTBL and the length of the table is given in LENGTH. 20300 #0004
20017 $12AA
If the required value is found, then the offset of the word in which the required value is found, from the
start of the table (SRCTBL)is given in FNDAT and the FND output is ON. The contents of FNDAT are valid
The contents of RAM word 20300 will become #0004, being the offset of the word in which the required
only when the FND output is ON.
contents are found.
8.47 8.48
CONVERSION FUNCTION BLOCKS Example :
Function No. : 25 BCDHEX Consider that the contents of 20000 are $0100. When the function block gets executed the contents of
4 digit conversion from BCD to HEX 20002 will become $0064.
WORD PARA 00 01 02 #$ 2X 3X 4X
DATA * * * * * * * Contents Contents after execution
RESULT * * * * 20000 $0100 20002 $0064

1000.1
BCDHEX 20000 25
ENBL DATA PFLO

20002 ERR
RESULT

When enable input is ON the contents of data which is a Binary Coded Decimal (BCD) number is
converted to its equivalent hexadecimal (HEX) number and this equivalent HEX number is stored in a
location indicated by RESULT.
The error output bit (ERR) comes ON if the value at DATA is not a true BCD number. If the error bit is ON
check the contents of DATA in hexadecimal (i.e.$). None of the digits should be greater than 9. If any of
the digit is greater than 9 then the number is not a true BCD number. Whenever the error output bit ERR
is ON the contents of RESULT remain unchanged. The output bit PFLO carries the logical status of ENBL
input.

8.49 8.50

Function No. : 26 HEXBCD Example :


4 digit conversion from HEX to BCD Consider that the contents of 20002 are $0064. When the function block gets executed the contents of
WORD PARA 00 01 02 #$ 2X 3X 4X 20005 will become $0100.

DATA * * * * * * *
RESULT * * * * Contents Contents after execution
20002 $0064 20005 $0100
1000.7 20002 26
HEXBCD
ENBL DATA PFLO

20005 ERR
RESULT

When enable (ENBL) input is ON the contents of DATA in hexadecimal (HEX) format is converted to its
equivalent Binary Coded Decimal (BCD) number and is stored in the location indicated by RESULT.
The error output bit (ERR) comes ON if the value at DATA is greater than $270F (decimal 9999). Whenever
the error output bit ERR is ON the contents of RESULT remain unchanged. The output bit PFLO carries
the logical status of ENBL input.

8.51 8.52
Function No. : 27 HEXASC RESULT. Whenever the error output bit ERR is ON the contents of RESULT remain unchanged. The output
Conversion from Hex to ASCII codes bit PFLO carries the logical status of ENBL input.

WORD PARA 00 01 02 #$ 2X 3X 4X Example :


DATA * * * * * * * Consider that the contents of 20003 are $12AB. When the function block gets executed then the contents
RESULT * * * * of 20060 become $3231 and the contents of 20061 become $4241. Ref. ASCII code table, character set
in Chapter 8.
Contents Contents after execution
1000.3 HEXASC 20003 27
ENBL DATA PFLO 20003 $12AB 20060 $3231
20061 $4241
20060 ERR
RESULT

Ram word 20061 should not be used elsewhere in the ladder.

When the enable (ENBL) input is high the contents of DATA in hexadecimal (HEX) format is converted to
ASCII codes. This function block generates the result in two subsequent words. The ASCII code for the
most significant digit of the DATA word will be stored in the lower byte of word indicated in RESULT. The
ASCII code for the next significant digit of the DATA word will be stored in higher byte of the word indicated
in RESULT. The ASCII code for third most significant digit of DATA word will stored in the lower byte of
subsequent word to the word indicated in the RESULT. The ASCII code for the least significant digit of
DATA word will be stored in higher byte of subsequent word to the word indicated in the RESULT.
The error output bit (ERR) comes ON if there is no subsequent word available to the word indicated in

8.53 8.54

Function No. : 28 ASCHEX Whenever the error output bit (ERR) is ON the function block does not get executed and the RESULT
Conversion from ASCII to HEX remains unchanged. The output bit PFLO carries the logical status of ENBL input.

WORD PARA 00 01 02 #$ 2X 3X 4X Example :


DATA * * * * * * * Consider that the contents of 20030 are $3231 and contents of 20031 are $4241. When the function block
RESULT * * * * gets executed then the contents of 20087 become $12AB.

1000.3 ASCHEX 20030 28


ENBL DATA Contents Contents after execution
PFLO
20030 $3231 20087 $12AB
20087 ERR
RESULT 20031 $4241

When the enable (ENBL) input is high, the value of two subsequent words defined by DATA are converted
to their equivalent hexadecimal number.
The word thus obtained is stored in RESULT.
The error output bit (ERR) is ON if –
a) The word specified in DATA cannot offer one more subsequent word due to crossing the limits of the
word type specified.
b) If the DATA to be converted does not have equivalent hexadecimal number.

8.55 8.56
Function No. : 29 HEX7SG 4 3 2 1 Digits of DATA to be converted
Hexadecimal to 7 segment code conversion
↓ ↓ ↓ ↓
WORD PARA 00 01 02 #$ 2X 3X 4X
Result Result+1
DATA * * * * * * *
RESULT * * * *
h2 g2 f2 e2 d2 c2 b2 a2 h1 g1 f1 e1 d1 c1 b1 a1 Segment
1002.7
HEX7SG 20023 29 F E D C B A 9 8 7 6 5 4 3 2 1 0 Bits of the word
ENBL DATA PFLO Higher byte Lower byte
20045 ERR
RESULT a
f b
g
When the enable (ENBL) input is ON the value at DATA is converted to its corresponding 7 segment
codes. The location at RESULT carries the conversion of the lower byte of DATA and the location at e c
RESULT + 1 carries the conversion of the higher byte of DATA. Thus two words are consumed as
the result of this function block. d

The error output bit (ERR) is ON if the word specified in RESULT cannot offer one more subsequent word Digits to be converted 0 1 2 3 4 5 6 7 8 9 A B C D E F
due to crossing the limits of the word type specified. Whenever the error bit ERR is ON the contents of
RESULT remain unchanged. The output bit PFLO carries the logical status of ENBL input. Display

Equivalent codes $003F $0006 $005B $004B $0066 $006D $007D $0007 $007F $006F $0077 $007C $0039 $005E $0079 $0071

8.57 8.58

BIT CHECK, SET, RESET, SEARCH FUNCTION BLOCKS Example :


Function No. : 30 BITCHK
Consider that the contents of 20011 are $8120 and the contents of 02023 are #0005. When the function
BIT check
block gets executed, 2010.7 becomes ON. This is because bit number 5 of the RAM word 20011 is ON.
WORD PARA 00 01 02 #$ 2X 3X 4X
WORDNO * * * * * * *
BITNO * * * * * * *

1000.2 2010.7
BITCHK 20011 30
ENBL WORDNO OUT ( )
B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
02023
BITNO 20011 → 1 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0

Bit No. 5

When the enable (ENBL) bit is high, the status of a particular bit, defined by bit number (BITNO) of the
word defined at (WORDNO) is available at out. If the ENBL input is OFF, the OUT is OFF. If ENBL is ON,
the OUT is assigned the status of the bit requested for.
It is to be noted that only the least significant digit of the word at BITNO (0 to F) indicates the relevant bit
number. The higher three digits in this case are ignored.

8.59 8.60
Function No. : 31 BITSET Example :
BIT set Consider that the contents of 20110 are $0004 and the contents of 20000 are #0004. When the function
WORD PARA 00 01 02 #$ 2X 3X 4X block gets executed the 5th bit in 20110 word is set.

WORDNO * * * *
BITNO * * * * * * *
B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
1000.2 BITSET 20110 31 20110 → 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0
ENBL WORDNO PFLO ↓
20000 Bit No. 4 is set
BITNO

When the enable (ENBL) input is ON, a particular bit defined by bit number (BITNO) of the word
WORDNO is set ON.
It is to be noted that only the least significant digit of the word at BITNO (0 to F) indicates the relevant bit
number. The higher three digits in this case are ignored. The output bit PFLO carries the logical status of
ENBL input.

8.61 8.62

Function No. : 32 BITRST Example :


BIT reset
Consider that the contents of 20115 are $1FFF and the contents of 20013 are #0010. When the function
WORD PARA 00 01 02 #$ 2X 3X 4X block gets executed, the eleventh bit (B10) of the word 20115 becomes OFF.

WORDNO * * * * *
BITNO * * * * * * * B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
20115 → 0 0 0 1 1 0 1 1 1 1 1 1 1 1 1 1
2000.0 BITRST 20115 32
ENBL WORDNO

PFLO Bit A is reset
20013
BITNO

When the enable (ENBL) input is ON, a particular bit defined by BITNO of the word at (WORDNO) is put
OFF. The output bit PFLO carries the logical status of ENBL input.

8.63 8.64
Function No. : 33 BITSRH Example :
BIT search Consider that the contents of 02006 are $1008. When the function block gets executed the contents of
WORD PARA 00 01 02 #$ 2X 3X 4X 20030 become #0003. The FND bit (2000.0) becomes ON.

WORDNO * * * * * * * B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0


FNDAT * * * * 02006 → 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0

2000.7
BITSRH 02006 33 2000.0 Bit No. 3
ENBL WORDNO FND ( )

20030 Contents after execution


FNDAT
02006 → #0003

When enable (ENBL) input is ON, the function block searches for occurrence of a bit which is ON in the
word, specified in WORD NO. The searching is carried out from Least Significant Bit (LSB) to Most
Significant Bit (MSB). The location or bit number in that word where a bit is found ON is available in a word
specified by FNDAT and the output bit FND will be ON. In case of multiple ON bits, the searching stops
at the first occurrance. If the output bit FND is not ON, then the word does not contain any bit that is ON
and also the value of FNDAT does not hold good.

8.65 8.66

FIFO, LIFO FUNCTION BLOCKS The word defined in length indicates the maximum length of the FIFO table. (Ref. Illustration)
Function No. : 34 FIFO
When the reset (RST) input is ON, the pointer value becomes zero and the empty (EMTY) bit becomes
First In First Out
ON.
WORD PARA 00 01 02 #$ 2X 3X 4X When the input (IN) is ON, the data at IPDATA is written into FIFO table at a location defined by start of
FIFO table and offset available in POINTR location and the pointer value is incremented by one. If the
IPDATA * * * * * * *
value of the pointer becomes equal to the value at length then the output bit Full is set. Any attempt made
POINTR * * *
to insert new data in the FIFO table after FULL is ON is ignored.
LENGTH * * * * * * *
OPDATA * * * * When the input OUT is ON, the data at the start of the FIFO table i.e. the data at next location of the pointer
address (which was the first data entered into the FIFO table) is transferred to the OPDATA. The entire
2000.0 FIFO 01000 34 2000.7 table is shifted up by one location till the last location as defined by the value of the pointr. The value at
RST IPDATA FULL ( ) pointr is decremented by one. If the value at pointr is zero, output bit EMTY is put ON and no data is
2000.1 2000.8 transferred further.
IN 20050 EMTY ( )
POINTR The error output bit ERR comes ON if the length of the FIFO table is crossing the limits of the word type
2000.2 2000.9
OUT ( ) specified. In such case no operation of this function block is carried out.
ERR
20003
LENGTH
Note –
1. The inputs to these blocks are level sensitive i.e. if the function block gets executed in each scan, the
20100 corresponding results will be generated in each scan, depending on the input condition. As such due
OPDATA care should be taken that the function block is executed only when required, or, if the input conditions
are going to persist for more than one scan, the rising edge or falling edge instructions may be used,
This function block has three inputs – Reset (RST), Input (IN) and Output (OUT) and three output bits as the case may be, so that the operation will be carried out for one scan only.
FULL, EMTY and ERR. The pointr indicates the location where the current value of the words in FIFO table
should be stored. The word, next to location of the word defined at pointr is the start of the FIFO table.

8.67 8.68
2. The RST input will have highest priority. When RST input is ON the IN or OUT operations cannot take 'IN' Input ON – 2nd execution
place. If RST input is OFF and if both the IN and OUT inputs are ON simultaneously then the IN 01000 IPDATA
$5678
operation will take place first and then OUT operation.

Illustration – 20050 $0002 Pointer


20051 $1234 Start of FIFO Table
RST Input ON 20052 $5678
01000 $XXXX IPDATA
‘IN’ Input ON - 3rd execution
20050 $0000 Pointer 01000 $ABCD IPDATA
20051 $XXXX Start of FIFO Table
20050 $0003 Pointer

'IN' Input ON – 1st execution 20051 $1234 Start of FIFO Table


01000 $1234 IPDATA 20052 $5678
20053 $ABCD
20050 $0001 Pointer
20051 $1234 Start of FIFO Table This will continue till the table is full.

8.69 8.70

'OUT' Input ON – 1st execution 'OUT' Input ON – 3rd execution


20050 $0002 Pointer Pointer
20050 $0001
20051 $5678 Start of FIFO Table Start of FIFO Table
20051 $XXXX
20052 $ABCD 20052 $XXXX
20053 $XXXX 20053 $XXXX

20100 $1234 OPDATA


20100 $ABCD OPDATA

'OUT' Input ON – 2nd execution


20050 $0001 Pointer Note –
20051 $ABCD Start of FIFO Table 1. The inputs IN and OUT may come ON in any sequence desired so that the writing or reading of table
20052 $XXXX may take place respectively.
20053 $XXXX 2. The data indicated as XXXX above may be any data which is not under consideration (don't care
data).
20100 $5678 OPDATA

8.71 8.72
Function No. : 35 LIFO When the reset (RST) input is ON, the pointer value becomes zero and the Empty (EMTY) bit comes ON.
Last In First Out When the input (IN) is ON, the data at IPDATA is written into LIFO table at a location defined by start of
WORD PARA 00 01 02 #$ 2X 3X 4X LIFO table and offset available in POINTR location and the pointer value is incremented by one. If the
value of the pointer becomes equal to the value at length then the output bit Full is set. Any attempt made
IPDATA * * * * * * * to insert new data in LIFO table after FULL is ON is ignored.
POINTR * * *
When the input, OUT is ON then the word indicated by start of LIFO table and offset available in the pointr
LENGTH * * * * * * *
location is moved to OPDATA and pointer value is decremented by one. If value of pointr is zero, ie. output
OPDATA * * * *
bit EMTY is ON then no data is transferred.

1000.9 2000.6
The error output bit ERR comes ON if the length of the table is crossing the limits of the word type
LIFO 01000 35
RST IPDATA FULL ( ) specified. In such case no operation of this function block is carried out.
1000.A 2000.7
IN 20050 EMTY ( ) Note –
1000.8 POINTR 2000.8
OUT 1. The inputs to these blocks are level sensitive i.e. if the function block gets executed in each scan ,the
ERR ( )
20003 corresponding results will be generated in each scan, depending on the input condition. As such due
LENGTH care should be taken that the function block is executed only when required, or, if the input conditions
are going to persist for more than one scan, the rising edge or falling edge instructions may be used,
20100
as the case may be, so that the operation will be carried out for one scan only.
OPDATA
2. The RST input will have highest priority. When RST input is ON the IN or OUT operations cannot take
This function block has three inputs – Reset (RST), Input (IN) and Output (OUT) and three output bits place. If RST input is OFF and if both the IN and OUT inputs are ON simultaneously then the IN
FULL, EMTY and ERR. The pointr indicates the location where the current value of the words in LIFO table operation will take place first and then OUT operation.
should be stored. The word, next to location of the word defined at pointr is the start of the LIFO table.
The word defined in length indicates the maximum length of the LIFO table. (Ref. Illustration)

8.73 8.74

RST Input ON Illustration - 'IN' Input ON – 3rd execution


01000 $XXXX IPDATA 01000 $1234 IPDATA

20050 $0000 Pointer 20050 $0003 Pointer


20051 $XXXX Start of LIFO Table 20051 $1234 Start of LIFO Table
20052 $5678
20053 $ABCD
'IN' Input ON – 1st execution
01000 $1234 IPDATA
This will continue till the table is full.
20050 $0001 Pointer
20051 $1234 Start of LIFO Table 'OUT' Input ON – 1st execution
20050 $0002 Pointer
20051 $1234 Start of LIFO Table
'IN' Input ON – 2nd execution 20052 $5678
01000 $1234 IPDATA 20053 $XXXX

20050 $0002 Pointer 20100 $ABCD OPDATA


20051 $1234 Start of LIFO Table
20052 $5678

8.75 8.76
'OUT' Input ON – 2nd execution LOGIC FUNCTION BLOCKS
Function No. : 36 AND
20050 $0001 Pointer
Logical AND
20051 $1234 Start of FIFO Table
20052 $XXXX WORD PARA 00 01 02 #$ 2X 3X 4X
20053 $XXXX DATA_A * * * * * * *
DATA_B * * * * * * *
20100 OPDATA RESULT * * * *
$5678

'OUT' Input ON – 3rd execution 2000.8


AND 01000 36
20050 $0000 Pointer ENBL DATA_A PFLO
20051 $XXXX Start of FIFO Table 01001
20052 $XXXX DATA_B
20053 $XXXX 00000
RESULT
20100 $1234 OPDATA
Note –
1. The inputs IN and OUT may come ON in any sequence desired so that the writing or reading of table When enable (ENBL) input is ON, each bit of the word specified in DATA_A is logically 'AND'ed with
may take place respectively. corresponding bit of word specified in DATA_B. The resulting word thus generated is stored in a location
defined by RESULT. The output bit PFLO carries the logical status of ENBL input.
2. The data indicated as XXXX above may be any data which is not under consideration (don't care
data).

8.77 8.78

Example : Function No. : 37 OR


Logical OR
Consider that the contents of 01000 are $012A and the contents of 01001 are $C358. When the function
block gets executed (2000.8 is ON) the contents of output word 00000 will be $0108. WORD PARA 00 01 02 #$ 2X 3X 4X
B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 DATA_A * * * * * * *
01000 → 0 0 0 0 0 0 0 1 0 0 1 0 1 0 1 0 DATA_B * * * * * * *
RESULT * * * *
AND
2010.7
01001 → 1 1 0 0 0 0 1 1 0 1 0 1 1 0 0 0 OR 01000 37
ENBL DATA_A PFLO

20000
DATA_B

00000
RESULT

00000 → 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0
When enable (ENBL) input is ON, each bit of the word specified in DATA_A is logically 'OR'ed with
corresponding bit of the word specified in DATA_B. The resulting word thus generated is stored in a
location defined by RESULT. The output bit PFLO carries the logical status of ENBL input.

8.79 8.80
Example : Function No. : 38 XOR
Consider that the contents of 01000 are $012A and the contents of 20000 are $C358. When the function Logical XOR
block gets executed (2010.7 is ON) the contents of output word 00000 will be $C37A. WORD PARA 00 01 02 #$ 2X 3X 4X
DATA_A * * * * * * *
B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 DATA_B * * * * * * *
01000 → 0 0 0 0 0 0 0 1 0 0 1 0 1 0 1 0 RESULT * * * *

OR
2000.7 XOR 20000 38
20000 → 1 1 0 0 0 0 1 1 0 1 0 1 1 0 0 0 DATA_A
ENBL PFLO

02010
DATA_B

20001
RESULT

00000 → 1 1 0 0 0 0 1 1 0 1 1 1 1 0 1 0
When enable (ENBL) input is ON, each bit of the word specified in DATA_A is logically 'XOR'ed with
corresponding bit of the word specified in DATA_B. The resulting word thus generated is stored in a
location defined by RESULT. The output bit PFLO carries the logical status of ENBL input.
$C37A

8.81 8.82

Example : Function No. : 39 CPL


Compliment the word value
Consider that the contents of 20000 are $012A and the contents of 02010 are $C358. When the function
block gets executed (2000.7 is ON) the contents of 20001 will be $C272. WORD PARA 00 01 02 #$ 2X 3X 4X
DATA * * * * * * *
B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 RESULT * * * *
20000 → 0 0 0 0 0 0 0 1 0 0 1 0 1 0 1 0

XOR 2000.7 20000 39


CPL
ENBL DATA_A PFLO
02010 → 1 1 0 0 0 0 1 1 0 1 0 1 1 0 0 0
20001
RESULT

When enable (ENBL) bit is ON, each bit of the word specified in DATA is complimented and the resulting
20001 → 1 1 0 0 0 0 1 0 0 1 1 1 0 0 1 0 word is stored in a location defined by RESULT. The output bit PFLO carries the logical status of ENBL
input.

8.83 8.84
Example : WORD INCREMENT / DECREMENT FUNCTION BLOCKS
Consider that the contents of 20000 are $012A. When the function block gets executed (1000.0 is ON) Function No. : 40 WINCR
the contents of 20001 will be $FED5. Word increment

WORD PARA 00 01 02 #$ 2X 3X 4X
B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
DATA * * * *
20000 → 0 0 0 0 0 0 0 1 0 0 1 0 1 0 1 0

1000.7 WINCR 20010 40


ENBL DATA PFLO
CPL
OVRF

20001 → 1 1 1 1 1 1 1 0 1 1 0 1 0 1 0 1

When enable (ENBL) input is ON then the value of the word specified in DATA is incremented by one. The
output bit PFLO carries the logical status of ENBL input.
The OVRF bit becomes '1' when the value of the word defined in DATA exceeds $FFFF or # 65535. The
contents of DATA then become 0000.

8.85 8.86

Note – Function No. : 41 WDECR


Word decrement
The input to these blocks are level sensitive i.e. if the function block gets executed in each scan ,the
corresponding results will be generated in each scan, depending on the input condition. As such due WORD PARA 00 01 02 #$ 2X 3X 4X
care should be taken that the function block is executed only when required, or, if the input conditions are
going to persist for more than one scan, the rising edge or falling edge instructions may be used, as the DATA * * * *
case may be, so that the operation will be carried out for one scan only.
Example : 1000.2
WDECR 20034 41
Consider that the contents of 20010 are $0009. When the function block gets executed (1000.7 is ON) ENBL DATA PFLO
then the contents of 20010 will become $000A.
UNDF

Contents Contents after execution

20010 $0009 20010 $000A

When enable (ENBL) input is ON then the value of the word specified in DATA is decremented by one.
The output bit PFLO carries the logical status of ENBL input.
The UNDF bit becomes '1' when the value of the word defined in DATA crosses 0 while decrementing.

8.87 8.88
Note – Function No. : 42 WRESET
The input to these blocks are level sensitive i.e. if the function block gets executed in each scan ,the Word reset
corresponding results will be generated in each scan, depending on the input condition. As such due WORD PARA 00 01 02 #$ 2X 3X 4X
care should be taken that the function block is executed only when required, or, if the input conditions are
going to persist for more than one scan, the rising edge or falling edge instructions may be used, as the DATA * * * *
case may be, so that the operation will be carried out for one scan only.
Example : 1000.2
WRESET 20034 42
Consider that the contents of 20034 are $000B. When the function block gets executed (1000.2 is ON) ENBL DATA PFLO
then the contents of 20034 become $000A.

Contents Contents after execution

20034 $000B 20034 $000A

When enable (ENBL) input is ON then every bit of the word specified in DATA is made 0. The output bit
PFLO carries the logical status of ENBL input.

8.89 8.90

SHIFT FUNCTION BLOCKS Operation


Function No. : 43 SFTLF B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
Shift left ← ←
WORD PARA 00 01 02 #$ 2X 3X 4X RESULT THRU
COUT ↑ ↑ C_IN
DATA * * * * * * *
THRU * * * * * * * Example : DATA = 20100
RESULT * * * * THRU = # 0004
RESULT = 20101
2000.0 SFTLF 20100 43 Contents of 20100 before execution = 1001 0110 1100 0011( binary representation).
ENBL DATA PFLO
2000.1 If C_IN is 0, contents of 20101 after the function block has executed once will be
C_IN #00004 COUT 0110 1100 0011 0000 ( binary representation) and status of COUT will be 1
THRU
(After shifting left four times, the fourth MSB will be copied into COUT)
20101 If C_IN is 1 then the contents of 20101 after executing the block once will be
RESULT
0110 1100 0011 1111 ( binary representation).

When the enable (ENBL) input is ON then each bit of the word in DATA is shifted left by a value specified
in THRU. The status of C_IN is copied into Least Significant Bit (LSB) on every shift operation.The shifted
B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
word thus obtained is stored in RESULT. The status of COUT is updated by Most Significant Bit (MSB)
which is shifted out during the last shift operation carried. The COUT output may be connected to C_IN 1 0 0 1 0 1 1 0 1 1 0 0 0 0 1 1
input of next SFTLF block for cascading. The output bit PFLO carries the logical status of ENBL input.
20100

8.91 8.92
B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 Function No. : 44 SFTRT
1 ← 0 1 1 0 1 1 0 0 0 0 1 1 0 0 0 0 ← 0 Shift right

COUT 20101 ↑ THRU ↑ C_IN WORD PARA 00 01 02 #$ 2X 3X 4X


DATA * * * * * * *
THRU * * * * * * *
RESULT * * * *

B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0


2000.0 SFTRT 20100 44
0 ← 0 1 1 0 1 1 0 0 0 0 1 1 1 1 1 1 ← 1
ENBL DATA PFLO
COUT 20101 ↑ THRU ↑ C_IN 2000.1
C_IN #00004 COUT
THRU

20101
RESULT

When the enable (ENBL) input is ON then each bit of the word in DATA is shifted right by a value specified
in THRU. The status of C_IN is copied into Most Significant Bit (MSB) on every shift operation.The shifted
word thus obtained is stored in RESULT. The status of COUT is updated by Least Significant Bit (LSB)
which is shifted out during the last shift operation carried. The COUT output may be connected to C_IN
input of next SFTRT block for cascading. The output bit PFLO carries the logical status of ENBL input.

8.93 8.94

Operation B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0

B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0


0 → 0 0 0 0 1 0 0 1 0 1 1 0 1 1 0 0 → 0
→ → C_IN 20101 COUT

C_IN ↑ THRU ↑ RESULT COUT

Example : DATA = 20100 B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0


THRU = # 0004 1 → 1 1 1 1 1 0 0 1 0 1 1 0 1 1 0 0 → 0
RESULT = 20101 C_IN 20101 COUT
Contents of 20100 before execution = 1001 0110 1100 0011 ( binary representation)
If C_IN is 0, contents of 20101 after the function block has executed once will be
0000 1001 0110 1100 ( binary representation) and status of COUT will be OFF
(After shifting right four times ,the fourth LSB will be copied into COUT)
If C_IN is 1 then the contents of 20101 after executing the block once will be
1111 1001 0110 1100 ( binary representation).

B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0


1 0 0 1 0 1 1 0 1 1 0 0 0 0 1 1
20100
8.95 8.96
Function No. : 45 SFTLFC Operation
Shift left circular
B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
WORD PARA 00 01 02 #$ 2X 3X 4X
DATA * * * * * * *
THRU * * * * * * *
RESULT * * * * The output bit PFLO carries the logical status of ENBL input.
Example : DATA = 20100
1000.8 SFTLFC 20100 45 THRU = # 4
ENBL DATA PFLO RESULT = 20101
#00004 Contents of 20100 before execution → 1001 0110 1100 0011
THRU (Binary representation)
Contents of 20101 after the function block has executed once → 0110 1100 0011 1001
20101
RESULT (Binary representation)
Note that MSB is shifted into LSB.

When the enable (ENBL) input is ON, each bit of the word in DATA is shifted to left by the number of
locations specified in THRU. Each time the shift is carried out, the outgoing bit at Most Significant Bit
(MSB), is retransferred to Least Significant bit (LSB) resulting in circular shift operation. The shifted word
thus obtained is stored in RESULT

8.97 8.98

B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 Function No. : 46 SFTRTC


20100 → 1 0 0 1 0 1 1 0 1 1 0 0 0 0 1 1 Shift right circular

WORD PARA 00 01 02 #$ 2X 3X 4X
DATA * * * * * * *
B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 THRU * * * * * * *
20101 → 0 1 1 0 1 1 0 0 0 0 1 1 1 0 0 1 RESULT * * * *

Contents after
execution 2000.8 SFTRTC 20100 46
ENBL DATA PFLO

#00004
THRU

20101
RESULT

When the enable (ENBL) input is ON, each bit of the word in DATA is shifted to right by the number of
locations specified in THRU. Each time the shift is carried out, the outgoing bit at Least Significant Bit
(LSB), is retransferred to Most Significant Bit (MSB) resulting in circular shift operation. The shifted word
thus obtained is stored in RESULT.

8.99 8.100
Operation B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 20100 → 1 0 0 1 0 1 1 0 1 1 0 0 0 0 1 1

B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0


20101 → 0 0 1 1 1 0 0 1 0 1 1 0 1 1 0 0
The output bit PFLO carries the logical status of ENBL input.
Contents after
Example : DATA = 20100
execution
THRU = #0004
RESULT = 20101
Contents of 20100 before execution → 1001 0110 1100 0011
(Binary representation)
Contents of 20101 after the function block has executed once → 0011 1001 0110 1100
(Binary representation)
Note that LSB is shifted into MSB.

8.101 8.102

IMMEDIATE INPUT/OUTPUT FUNCTION BLOCKS The error output bit (ERR) comes ON if slot number is entered wrongly.
Function No. : 47 IMM_IN Note : The valid slot numbers are $0000(#0000) and $0030(#0048).
Immediate Inputs
Whenever the error output bit ERR is ON then the operation is not carried out and the input image prior
WORD PARA 00 01 02 #$ 2X 3X 4X to the block execution remains unchanged.
SLOT * * When the IMM_IN function block is executed with slot no. $0030, the high speed counter is processed.
This results in updating of all the system bits and words, related to the high speed counter immediately, in
the logic scan itself, without waiting for a period of 5 ms which is the normal time of updation
2000.0 $0000 47
IMM_IN
ENBL SLOT PFLO Normal Input Scan
Logic Scan
ERR Immediate input function block interrupts logic scan

Input terminal
⊕ ⊕ ⊕ ⊕ ⊕ ⊕ ⊕ ⊕ ⊕ ⊕
Logic Updates input
Scan is ⊕ ⊕ ⊕ ⊕ ⊕ ⊕ ⊕ ⊕ ⊕ ⊕ image of all the
The immediate input function block updates input image of one module, in advance of the normal input continued input bits as per
scan. This function block is written in the ladder area. While executing the ladder it helps to use the latest Input word the physical
with the 01000
status of the inputs whose status change at a faster rate. updated 0 0 1 0 0 0 0 1 0 1 1 0 1 0 1 1 status.
When the enable (ENBL) input is ON, the status of all the input bits of the module as defined in SLOT is status of
updated. This updated status of inputs is then referred during the further execution of logic scan. The inputs
execution of logic scan is carried out in the normal way from the next rung. The output bit PFLO carries Normal Output Scan
the logical status of ENBL input.

8.103 8.104
Function No. : 48 IMMOUT The error output bit (ERR) comes ON if slot number is entered wrongly.
Immediate Outputs Note : The valid slot number is $0001(#0001)
WORD PARA 00 01 02 #$ 2X 3X 4X Whenever the error output bit ERR is ON then the operation is not carried out and the normal scanning is
continued.
SLOT * *

2000.0 Normal Input Scan


IMMOUT $0001 48
ENBL SLOT PFLO Logic Scan
Immediate output function block interrupts logic scan
ERR

Output word 0 0 1 0 0 0 0 1 0 1 1 0 1 0 1 1
Logic 00000 Transfer status
Scan is of al output bits
continued onto output
Output ⊕ ⊕ ⊕ ⊕ ⊕ ⊕ ⊕ ⊕ ⊕ ⊕
The immediate output function block can be used to update the output status on the output terminal as module.
terminal
per its logically updated image in the processor. Thus, this function block carries a small output scan,
⊕ ⊕ ⊕ ⊕ ⊕ ⊕ ⊕ ⊕ ⊕ ⊕
related to only one module, in the slot prior to the regular output scan. This function block is written in the
ladder area. It helps to reduce the time delay in turning ON or OFF the output physically from the point of
taking a decision. Normal Output Scan
When the enable (ENBL) input is ON then the status of the output bits (as decided upto this point) of the
outputs in SLOT are updated physically. After this the execution of the logic scan is carried out in the
normal way from the next rung. The output bit PFLO carries the logical status of ENBL input

8.105 8.106

Function No. : 49 REGMRD CHANO : Starting channel number. Channel numbers are 0,1,2 and 3.
Register Module Read
Any of these can be treated as starting channel number.
DESCRRIPTION INPUT OUTPUTS WORD PARA00 01 02 #$ 2X 3X 4X LENGTH : Number of channels to be read from and including the channel number as specified in
CHANO.
REGMRD ENBL DONE SLOT *
FNER CHANO * * * DATADR : Starting address of memory (RAM or flag word) where data read from module is to be
MDER DATADR * * stored. The converted data of the starting channel is available in DATADR, the next channel
BUSY LENGTH * * * in the subsequent word and so on.
When the enable ENBL input is ON, the analog to digital conversion of the signals at the various channels
1000.0 REGMRO $0011 49 2000.0 of the module plugged in slot(SLOT) is carried out. The conversion of channels is carried out one after
ENBL SLOT DONE ( ) the other, starting from the channel number as defined in CHANO. The number of channels processed
2000.1 depends upon value of LENGTH. In case the value of LENGTH is O none of the channels is processed.
#0002 FNER ( )
CHANO
The digital value corresponding to the analog: signal at the starting channel CHANO is available in
2000.2 DATADR, the next channel in the subsequent word and so on.
20000 MDER ( )
DATADR 2000.3 The output bit DONE comes ON if the conversion for all the channels as specified in the function block is
BUSY ( ) carried out successfully and the execution of next ladder rung commences in the normal way.
20010
LENGTH The output bit BUSY comes ON if the analog to digital conversion of the various channels is not carried
out within some predetermined time.
SLOT : Slot number, where the analog input module, whose data is to be read, is inserted. Valid The output bit function error FNER comes ON if -
slot numbers are $0001(#0001), $0010(#0016), $0011(#0017), $0020(#0032), $0021
i) Slot number is entered wrongly.
(#0033)
ii) Number of channels read crosses the limits of the word type specified in data address.

8.107 8.108
iii) Starting channel number CHANO plus length is greater than $OOFF. Function No. : 50 REGMWR
In ease the output bit FNER is ON the module will not be serviced. Register Module Write

The output bit module error MDER comes ON DESCRRIPTION INPUT OUTPUTS WORD PARA00 01 02 #$ 2X 3X 4X
i) External power is not given to the module. REGMRD ENBL DONE SLOT *
ii) Type of module configured is different from that present in the slot. FNER CHANO * * *
MDER DATADR * *
iii) There is any hardware fault in the module. BUSY LENGTH * * *
In this ease the corresponding system bit is also set, and I/O error LED becomes ON.
Whenever the enable input ENBL is off all the output bits of the function block are off. 1000.0 REGMRO $0011 49 2000.0
ENBL SLOT DONE ( )
The user is advised to make use of these output bits for interlocking in order to assure that the respective
2000.1
values are authentic. #0000 FNER ( )
CHANO
Example - 2000.2
20000 MDER ( )
The module to be read is configured in slot $0010. Starting channel number is #0001. The number of DATADR
channels to be read is stored in ram word 20010 whose value is #0002 (assumption). Whenever the
function block gets enabled the conversion for channel number 1 (and not 0 which is the first channel on 20010
LENGTH
the module) is carried out and the corresponding value is stored in ram word 20000. After this the
conversion for channel number 2 is carried out and the corresponding value is stored in ram word 20001.
Since the value of LENGTH is 2 after the conversion of channel 2, the output bit DONE comes ON and SLOT : Slot number where the analog output module in which data is to be written is inserted. Valid
the execution of subsequent ladder rung commence. slot numbers are $0000(#0000), $0001(#0001), $0010(#0016). $0011(#0017),
$0020(#0032), $0021(#0033)
Note - The module will be serviced only if the function block is enabled.

8.109 8.110

CHANO : Starting channel number. Channel numbers are 0. The output bit module error MDER comes ON if-
LENGTH : Number of channels to be written into and including the channel numbers as specified in i) External power is not given to the module.
CHANO. Length is 1. ii) Type of module configured is different from that present in the slot.
DATADR : Starging address of memory (RAM or flag word) from where data to be written into module
iii) There is any hardware fault in the module.
are stored. The data for the starting channel is available in DATADR, the next channel in the
subsequent word. In this case the corresponding system bit is also set.
When the enable ENBL is ON, the digital to analog conversion of digital data at various channels of the Whenever the enable input ENBL is off all the output bits of the function block are off.
module plugged in slot (SLOT) is carried out. The conversion of channels is carried outone after the other, Example -
starting from the channel number as defined in CHANO. The number fof channels processed depends
upon value of LENGTH. In case value of LENGTH is 0 none of the channels is processed. The module to be written is configured is slot $0010 starting channel number is 0001. The number of
channels to be written is stored in RAM word 20010 which s assumed to be 0001. Whenever the functon
The output bit DONE comes ON if the converson for all the channels as specified in the functon block s block gets enable the digital to analog conversion for channel number 1 is carried out and at the end of
carried out successfully and the execution of next ladder rung commences in the normal way. the conversion process the output bit DONE comes ON and execution of subsequent ladder rung
The output bit function error FNER comes ON if - commence.
i) Slot number is entered wrongly. Note - The module will be serviced only if the function block is enabled.
ii) Number of channels written crosses the limits of the word type specfied in data address.
i) Starting channel number CHANO plus length is greater than $00FF.
In case the output bit FNER is ON the module will not be serviced.

8.111 8.112
Character set
Chapter 9 Special Features Note : High = 1 level, Low = 0 level

This Chapter explains the special features of the Micro PLC. This includes -
* Alphanumeric Display * Frequency Measurement
* High speed counter * Constant Scan
* Pulse catch Input * Real Time Clock
* Pulse Output
Alphanumeric Display
The PLC system provides a 5 x 7 dot matrix 4 character alphanumeric LED display.To display any
alphanumeric character it is necessary to write its equivalent ASCII code into system words 30016 or 30017.
Example : To display 1234

1 2 3 4 Alphanumeric display
char1 char2 char3 char4

System word 30016 $32 31


char2 char1 The ASCII codes for 1,2,3,4 in HEX
are $31, $32, $33, $34 respectively
System word 30017 $34 33
char4 char3

9.1 9.2

The table given before is to be used to generate the ASCII code in Hex of a particular character to be Example 2 :
displayed. D0 to D3 forms the lower nibble of the ASCII code and D4 to D7 forms the upper nibble of To scroll the message ‘LS1 OR LS2 FAULTY’ on the Alphanumeric display.
the ASCII code. D7 is always to be considered as 0. It is assumed that the condition when LS1 and LS2 become ON simultaneously, is a fault condition. The
following ladder will solve the purpose -
Example 1 : To display A1B2
RUNG NUMBER : 0
D7 D6 D5 D4 D3 D2 D1 D0 THIS IS A SELF RUNNING TIMER WITH 300 mS TIME BASE
The ASCII code for A is 41H 0 1 0 0 0 0 0 1 = $41
The ASCII code for 1 is 31H 0 0 1 1 0 0 0 1 = $31 2000.0 | TONO.1--#00003------2--| 2000.0
The ASCII code for B is 42H 0 1 0 0 0 0 1 0 = $42 ---|/|----| ENBL PRESET DONE |-------------------------------( )---
| |
The ASCII code for 2 is 32H 0 0 1 1 0 0 1 0 = $32 | 020001 |
Thus it is required to write a VALUE OF $3141 in system word 30016 and $4232 in system word 30017. | CURNT RUN |
|------------------------|
This could be done by updating system words 30016 and 30017 in ladder using, appropriate function
blocks or by modifying the system words 30016 and 30017 in on line using programming devices
"PG–308" or "DOX–MINI". The use of Alphanumeric display can be made for following : RUNG NUMBER : 1
THE PRESET VALUE OF THIS COUNTER IS EQUAL TO THE NUMBER OF WORDS IN THE
1. Displaying process parameters TWO TABLES.
2. Displaying fault status 2000.1 | UPCTR_--#00023-----10--| 2000.1
3. Displaying timer current value, counter current values etc. ---| |----| RST PRESET DONE |-------------------------------( )---
| |
By writing suitable ladder the display can also be made to flash the desired character with desired 2000.0 | 020000 |
frequency (ON / OFF). ---| |----| UP CURNT |
|------------------------|

9.3 9.4
RUNG NUMBER : 2 RUNG NUMBER : 4
040000
---[TBL]--- 1000.0 1000.1 |-TBLRD---04000-------22-|
TABLE NO : 0 ---| |-------| |-----| ENBL SRCTBL PFLO|
‘L ($4C20) ‘SL ($534C) ‘1S ($3153) ‘ 1 ($2031) ‘O ($4F20) ‘RO ($524F) | |
‘ R ($2052) ‘L ($4C20) ‘SL ($534C) ‘2S ($3153) ‘ 2 ($2032) ‘I ($4920) | O20000 |
‘SI ($5349) ‘ S ($2053) ‘F ($4620) ‘AF ($4146) ‘UA ($5541) ‘LU ($4C55) | OFFSET ERR|
‘TL ($544C) ‘YT ($5954) ‘ Y ($2059) ‘ ($2020) ‘ ($2020) | |
| 030017 |
RUNG NUMBER : 3 | DSTWRD |
040001 |------------------------|
---[TBL]---
TABLE NO : 1
‘ ($2020) ‘ ($2020) ‘L ($4C20) ‘SL ($534C) ‘1S ($3153) ‘ 1 ($2031) RUNG NUMBER : 5
‘O ($4F20) ‘RO ($524F) ‘ R ($2052) ‘L ($4C20) ‘SL ($534C) ‘2S ($3153)
‘ 2 ($2032) ‘I ($4920) ‘SI ($5349) ‘ S ($2053) ‘F ($4620) ‘AF ($4146) 1000.0 1000.1 |-TBLRD---040001------22-|
‘UA ($5541) ‘LU ($4C55) ‘TL ($544C) ‘YT ($5954) ‘ Y ($2059) ---| |-------| |-----| ENBL SRCTBL PFLO|
| |
| 020000 ERR|
Enter the HEX numbers written in the brackets when using PG-308. | OFFSET |
| |
| 030016 |
| DSTWRD |
|------------------------|

9.5 9.6

High Speed counter (HSC) Counter Output – Counter underflow (bit 3001.B)
Specifications : Counter current value (word 30021)
Operating Voltage – 10V to 30V DC Input Signal – For Count x1 and Count x2 input 1000.0
Maximum Counting frequency – 4 KHz with 12 VDC Signals For Count x4 inputs 1000.0 and 1000.1
– 2 KHz with 24 VDC Signals Input Signal Logical Off – 5V DC Max.
Logical ON – 10VDC Min.
Minimum Pulse width – On time - 125 μS
Off time - 125 μS Operation :
Count range – 65535 Or FFFF Hex. Inputs 1000.0 and 1000.1 of the Micro PLC are used as high speed counter inputs as per the mode
Operation Modes – Count x 1 (Rising edge) selected. If the input is not used as counting input, then it can be used as a normal input.
(Software Configurable) Count x 2 (Rising and falling edge) The user program has following control on the counter operation.
Count x 4 (Rising and falling edges at two 90° Phase apart signals) 1. Selecting mode of operation in first logic scan. (i. e. Count x 1, Count x 2 or Count x 4)
Counting Method – Auto re-loadable down counting 2. Presetting the count to the desired value.
User Software Control – Counter Enable bit (3002.0) 3. Controlling the output status using output control word.
Mode Selection bits (3002.1, 3002.2)
Note : Input 1000.1 can be used as normal Input when operating in Count x 1 or Count x 2 modes.
Counter preset command bit (3001.8)
Counter preset value (word 30019) Mode selection
Counter Output Control Word (30018) The counter mode is set in the first scan of PLC after power on. To enable High-speed counter, system
bit 3002.0 should be set to 1 along with the mode selection bits 3002.1 & 3002.2 as mentioned below

9.7 9.8
Mode 3002.2 3002.1 3002.0 Count x2 mode
Count x1 1 1 1 In this mode pulses appearing at input 1000.0 are counted. The counting is done on both rising as well
Count x2 0 1 1 as falling edges of the input signal. The max. input frequency is 4KHz for 12 VDC signals and 2KHz for
Count x4 0 0 1 24VDC signals.
Reserved/not used x x 0
Note : Status of System bits 3002.0, 3002.1 & 3002.2 is read by Micro PLC operating system only in the
1
first logic scan. Any change in the status of these bits in subsequent PLC scans is ignored.
Input 1000.0
Count in 30021 0
Count x1 mode 6 5 4 3 2 1 0 99 98 97
In this mode pulses appearing at input 1000.0 are counted. The counting is done on rising edge of the Preset value say 100
input signal. The max input frequency is 4KHz for 12VDC signals and 2KHz for 24VDC signals. 1

Count underflow 3001.B 0


Input 1000.0
1
0 Count x4 mode
Count in 30021 3 2 1 0 99 In this mode 90 degree out of phase pulses generated by a pulse generator are given to inputs 1000.0
Preset value say 100 and 1000.1. The counting is done on both rising as well as falling edges of both the encoder signals. In
1 this mode since the pulses appear from two channels (Phase A and Phase B) the max. input frequency
per phase is half that of the single channel i.e. 2KHz for 12VDC signals and 1KHz for 24VDC signals.
Count underflow 3001.B 0

9.9 9.10

Input 1000.0 The presetting action is done at the end of the logic scan. However, the user can preset the HSC and
1
update the High Speed Counter current value in 30021 at any instant in the ladder program by using
0 IMM_IN instruction addressed to slot No. $0030
The High Speed Counter is auto re-loadable counter. It re-loads the preset value from 30019 as soon as
it down counts upto zero. Thus the value of 30019 can be dynamically changed by the user program after
Input 1000.1 1 every preset operation or Counter Done operation and keep ready with next preset value.

0 High–speed counter current value (System word 30021)


6 5 4 3 2 1 0 99 98 97
As the pulses start appearing, the PLC CPU counts down from preset value to zero. The system word
30021 shows the number of pulses remaining in the High-speed Counter.
Preset value say 100
The value in the word 30021 is generally updated at the end of the scan. However, the user can update
1
the HSC current value in 30021 or preset the HSC at any instant in the ladder program by using IMM-IN
Count overflow 3001.B 0 instruction addressed to slot No. $0030
Counter Empty (Underflow) Output (System Bit 3001. B)
Note : Inputs 1000.0 & 1000.1 behave as normal digital inputs if these are not configured for use by HSC. The operating system sets this bit to 1 whenever the HSC count reaches 0000. At the same time it re-
loads the counter with the value in preset Word 30019 and updates the outputs as per the action defined
Presetting the counter by output control word 30018. The counter done bit can be referred by the user program to take further
The High-speed counter can be preset by writing the preset count to the system word 30019 and setting action. It must be reset by user program (say -(R)- instruction) to keep ready for next HSC operation.
the system bit 3001.8 to ON. When 3001.8 is ON, the operating system of Micro PLC will load the value HSC output control word (system word 30018)
from 30019 into 30021, the current value of High-speed Counter. At the same time it also resets system
bit 3001.8 indicating that the High-speed counter has been preset. To enable the user program to take an immediate action at counter Done instance the HSC output

9.11 9.12
control word can be used. On counter Done, the operating system of Micro PLC toggles the status of Example
outputs 0000.0 to 0000.7 for which the corresponding bit in system word 30018 is set to 1. For this, the To control the movement of slide in Left, Down and Right directions. The Pulse generator (proximity
constant value ($0089 in the example shown below) is to be transferred to the system word 30018 with switch/linear encoder etc.) attached on the slide, provides pulses to High Speed Counter Input 1000.0.
the help of MOVE Function Block. The outputs for whom the corresponding bit in system word 30018 is
RUNG NUMBER : 0
0, remains unchanged. This decision of change in output status is immediately transferred to the INITIALIZATION OF HSCM FOR COUNT X1 MODE CNT X1
corresponding outputs without waiting for the output scan. The value in output Control Word 30018 can MODE
be dynamically changed depending on the user logic requirement. SELECT
3002.0
The following example clarifies the use of HSC output control word 30018. -------------------------------------------------------------|---( )---
Bit No. F E D C BA 9 8 7 6 5 4 3 2 1 0 |
| CNT X1
Output Word (0000) 0 0 0 0 0 1 0 1 1 0 1 0 0 0 0 1 | MODE
before Counter Done | SELECT
| 3002.1
Output Control 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 1 |---( )---
Word 30018 |
| CNT X1
| MODE
Output Word (0000) 0 0 0 0 0 1 0 1 0 0 1 0 1 0 0 0 | SELECT
After Counter Done | 3002.2
Note 2 Note 1 |---( )---
RUNG NUMBER : 1
Note 1 : After the Counter Done, bits 0, 3 & 7 have toggled their status.This updated status of outputs CYCLE LEFT
0000.0-0000.7 is immediately transferred to the corresponding outputs. START PE OUTPUT
1000.2 2000.0 0000.0
Note 2 : These outputs can not be controlled by using HSC Output Control Word. ---| |------|P|---------------------------------------------------(S)---

9.13 9.14

RUNG NUMBER : 2 RUNG NUMBER : 4


PRESET HIGH SPEED COUNTER FOR LEFT MOTION SETTING AFTER LEFT MOTION COUNT IS OVER, O/P 0.0 WILL TURN OFF & O/P 0.1 WILL BE ON.
SYSTEM THIS IS ACHIEVED BY MOVING 0000 0000 0000 0011 ($0003) TO OUTPUT CONTROL WORD
BIT LEFT
LEFT PRESET OUTPUT PE
OUTPUT PE HSC 0000.0 2000.2 |MOVE---$00003-------19-|
0000.0 2000.1 |MOVE----#04000------19-| 3001.8 ---| |-----|P|----|ENBL SRCWRD PFLO|
| |
---| |------|P|----|ENBL SRCWRD PFLO|--------------------( )--- | HSC |
| | | OUTPUT |
| SYSTEM | | CONTROL |
| WORD | | WORD |
| PRESET | | 030018 |
| HSC | | DSTWRD |
| 030019 | |-----------------------|
| DSTWRD | RUNG NUMBER : 5
|-----------------------| PRESET HIGH SPEED COUNTER FOR DOWN MOTION SETTING
SYSTEM
RUNG NUMBER : 3 BIT
SYSTEM DOWN PRESET
BIT OUTPUT PE HSC
PRESET 0000.1 2000.3 |MOVE---#06000-------19-| 3001.8
---| |------|P|---|ENBL SRCWRD PFLO|---------------------( )---
HSC | |
3001.8 |IMM_IN---$00030------47-| | SYSTEM |
---| |---|ENBL SLOT PFLO| | WORD |
| | | PRESET |
| | | HSC |
| ERR | | 030019 |
|------------------------| | DSTWRD |
|-----------------------|

9.15 9.16
RUNG NUMBER : 6 RUNG NUMBER : 8
SYSTEM
BIT PRESET HIGH SPEED COUNTER FOR RIGHT MOTION SETTING
PRESET SYSTEM
HSC BIT
3001.8 |IMM_IN---$0030--------47-| RIGHT PRESET
---| |---|ENBL PFLO| OUTPUT PE HSC
| | 0000.2 2000.5 |MOVE---#08000-------19-| 3001.8
| | ---| |------|P|---|ENBL SRCWRD PFLO|---------------------( )---
| ERR | | |
|-------------------------| | SYSTEM |
| WORD |
RUNG NUMBER : 7 | PRESET |
| HSC |
AFTER DOWN MOTION COUNT IS OVER, O/P 0.1 WILL TURN OFF & O/P 0.2 WILL TURN ON. | 030019 |
THIS IS ACHIEVED BY MOVING 0000 0000 0000 0110 ($0006) TO OUTPUT CONTROL WORD. | DSTWRD |
|-----------------------|
DOWN
OUTPUT PE RUNG NUMBER : 9
0000.1 2000.4 |MOVE----$00006------19-| SYSTEM
---| |------|P|---|ENBL SRCWRD PFLO| BIT
| | PRESET
| HSC | HSC
| OUTPUT | 3001.8 |IMM_IN---$0030--------47-|
| CONTRL | ---| |---|ENBL PFLO|
| WORD | | |
| 030018 | | |
| DSTWRD | | ERR |
|-----------------------| |-------------------------|

9.17 9.18

RUNG NUMBER : 10 RUNG NUMBER : 11


AFTER 0.2 IS ON, SYSTEM WORD 30019 IS LOADED BY #0000 SO THAT AFTER
AFTER RIGHT MOTION IS OVER, O/P 0.1 WILL TURN OFF & O/P 0.2 WILL BE ON. FINISHING RIGHT MOTION COUNT, HIGH SPEED COUNTER WILL NOT BE RELOADED.
THIS IS ACHIEVED BY MOVING 0000 0000 0100 ($0004) TO OUTPUT CONTROL WORD. NOTE THAT WHEN 0.2 IS ON, 30019 IS LOADED BY #8000 SO THAT HIGH SPEED
COUNTER WILL BE PRESETED BY THE SAME VALUE.
RIGHT RIGHT
OUTPUT PE OUTPUT
0000.2 2000.6 |MOVE---$00004-------19-| 0000.2 |MOVE---$00000-------19-|
---| |----|ENBL SRCWRD PFLO|
---| |-----|P|----|ENBL SRCWRD PFLO| | |
| | | SYSTEM |
| HSC | | WORD |
| OUTPUT | | PRESET |
| CONTROL | | HSC |
| WORD | | 030019 |
| 030018 | | DSTWRD |
|-----------------------|
| DSTWRD |
|-----------------------| RUNG NUMBER : 12
AFTER OUTPUT 0.2 IS OFF, HSC OUTPUT CONTROL WORD IS RESETTED.
RIGHT
OUTPUT PE
0000.2 2000.7 |MOVE---#00000------19-|
---| |------|N|---|ENBL SRCWRD PFLO|
| |
| HSC |
| OUTPUT |
| CONTROL |
| WORD |
| 030018 |
| DSTWRD |
|----------------------|
9.19 9.20
Pulse catch inputs The configuration of the Inputs 1000.2 and 1000.3 as Pulse Catch Inputs is done as follows -
Inputs 1000.2 and 1000.3 can be software configured as pulse catch inputs. With pulse catch function Normal input Pulse Catch input
enabled, you can catch short pulses with 500 μS. or more regardless of PLC scan time. System bits Input 1000.2 3002.3 is OFF 3002.3 is ON
3002.3 & 3002.4 are used for initializing the inputs 1000.2 & 1000.3 as catch inputs respectively. The
initialization of these inputs must be done during the first logic scan only. Input 1000.3 3002.4 is OFF 3002.4 is ON
The pulse catch input latches the pulse of 500 microsec or more till it is read either in the Input scan or
1 1 by the IMM-IN function block in the user program. As shown in the graph, the pulse to be 'caught', is read
Scan Scan Input Reading in input scan. Once read, the pulse catch mechanism is again set to catch next pulse. The pulses
appearing in-between the latching once and reading by the CPU, are not recognized by the system.
PLC Cycle Example
To cut paper sheets out of the paper roll. The cut mark on the paper gives signal to the Pulse Catch Input
1000.2 through a photo sensor which immediately turns Output 0.0 ON to cut the paper.
This pulse
is ignored RUNG NUMBER : 0
Catch I/P signal INITIALIZATION OF THE INPUT 1000.2 FOR PULSE CATCH
3002.3
-----------------------------------------------------------------( )---

RUNG NUMBER : 1
Input to user logic OUTPUT 0000.0 IS SET AFTER THE ARRIVAL OF PULSE AT INPUT 1000.2
INPUT 1000.2 SHOULD BE ON FOR ATLEAST 500 MICRO SECONDS
1000.2 0000.0
---| |-----------------------------------------------------------(S)---

9.21 9.22

RUNG NUMBER : 2 Pulse Output


OUTPUT 0000.0 IS IMMEDIATELY UPDATED ON time of an output ( First eight, only in Basic Rack ) can be controlled within 1 msec. It is recommended
to use DC Outputs for such application. The status of an output is controlled independent of PLC logic
0000.0 |IMMOUT--$00001-------48--| scan. The associated system Word & Bits are :
---| |----|ENBL SLOT PFLO|
| | 1) 3002.8 – TO enable pulse output feature, this bit should be set to one during first logic scan.
| | 2) 3002.9 – The copy of start Bit 3002.A, is maintained in another system Bit 3002.B for detecting rising
| ERR |
|-------------------------| edge of start Bit.
3) 3002.A – The pulse output timer is started on rising edge of this bit only. The programmable pulse
RUNG NUMBER : 3 output will be started again only after next rising edge on bit 3002.A and it is not re-triggered.
OUTPUT 0000.0 IS RESET AFTER 2 SECONDS 4) 30029 – Preset value of pulse output timer is programmed in this systems word. Any decimal value
can be programmed which will be in msec ( up to # 65535 msec ).
0000.0 |TON1.0--#00002------3---| 0000.0
---| |----|ENBL PRESET DONE|-----------------------------(R)--- 5) 30030 – When rising edge of start Bit is detected, the value of system Word 30029 is copied into time
| | current value system Word 30030 & at each 1 msec, current value is decremented by 1.
| | 6) 3002.B – This is Timer Run Bit.
| |
| 020000 RUN | 7) 30018 – When current value reaches to zero, the outputs defined in this system Word are XORed and
| CURNT | transferred immediately to outputs & then timer run bit is put off.
|------------------------|
In order to generate a pulse output, follow the steps bellow :
Note : This ladder may follow the machine logic ladder. The total scan time of the ladder will be the scan
time for the above 4 rungs plus the scan time for the machine ladder logic. l Put 3002.8 on for first logic scan.
l Move proper value to output control Word 30018. On timer done system toggles the status of
which the corresponding bit in 30018 is set to 1.

9.23 9.24
l Move timer value in msec to 30029. The timing diagram shows two different Pulse Outputs. The Pulse ON time for outputs 0000.0 and 0000.1
l Put on the respective output using IMM_OUT instruction. are 23 msec. and 8 msec. respectively. Note that the outputs are not overlapping.
Assume scan time = 15 mSec.
l Set start Bit 3002.A on for one scan time.

Note : Scan 1 Scan 2 Scan 20

High Speed counter and Pulse Output can not be used simultaneously.
2 msec.
In Pulse Output mode, High Speed Counter input functions like normal Input.
8 msec.
First 8 Outputs i.e. 0000.0 to 0000.7 in Basic rack of Micro PLC can be used for generating Pulse Output;
However, Only one Pulse can be generated at a time. Pulse Pulse
activation activation
logic logic
related to related to
0000.0 0000.1

0000.0 23 msec.

0000.1
8 msec

9.25 9.26

RUNG NUMBER : 0 RUNG NUMBER : 2


WARM START PULSE
O/P ENABLE 1 SEC 1 SEC.
BIT. TIMER TIMER
3000.9 3002.8 BIT BIT
|--| |-------|--------------------------------------------------( )---| 2000.5 |MON.01-#00050-------1--| 2000.5
| |---| |----|ENBL PRESET RUN|------------------------------( )---|
| | |
COLD START | | |
| |
3000.8 | | |
|--| |-------| | |
| 020102 |
| CURENT |
RUNG NUMBER : 1 |-----------------------|

1SEC 1 SEC.
TIMER TIMER RUNG NUMBER : 3
BIT BIT
2000.5 |TON.01-#00100-------1--| 2000.5 INITIALISE OUTPUT CONTROL WORD
---|/|----|ENBL PRESET DONE|------------------------------( )---|
| | |MOVE---$00008-------19-|
| | |----------|ENBL SRCWRD PFLO|
| | | |
| | | MASK |
| | | WARD |
| 020100 | | |
| CURENT RUN | | 030018 |
|-----------------------| | DSTWRD |
|-----------------------|

9.27 9.28
RUNG NUMBER : 4 RUNG NUMBER : 6

MOVE TIMER VALUE IN MSEC TO 30029. PUT ON RESPECTIVE OUTPUT USING IMM_OUT INSTRUCTION.

|MOVE---$00005-------19-|
|----------|ENBL SRCWRD PFLO| |IMM_OUT--$00001------48-|
| | |--------|ENBL SLOT PFLO|
| PULSE | | |
| WIDTH. | | |
| |
| 030029 | | ERR |
| DSTWRD | |------------------------|
|-----------------------|

RUNG NUMBER : 5

SET START BIT 3002.A ON FOR ONE SCAN TIME.


TRIGRING
I/P PE

1000.3 2010.0 0000.3


|---| |--------|P|--------------------------------|----------------( )---|
|
|
| PULSE
| START
|
| 3002.A
|----------------( )---|

9.29 9.30

Frequency Measurement : This feature is useful for :


The High Speed Counter can be configured for frequency measurement (upto 2 KHz) 1. Use of temperature to frequency converters, voltage to frequency converters etc.
The number of pulses ( at frequency input / HSC input ) in predefined time interval can be measured. This 2. To indicate production rate in terms of meters per minute. This is essential in number of machines
is programmable in steps of 10 msec. In the following, Various associated system words, system bits & used in Textile Mills.
operational details are explained. 3. To calculate RPM from pulses at High Speed Counter Input.
1. 30020 - Time Interval (in steps of 10 msec.) The figure shows updation of System word with respect to time & PLC scan. The PLC scan time is
This word can be programmed as decimal value # 1,2,3 etc., so that respective time interval will be 21 msec and period is 1 sec.
10 msec., 20 msec., 30 msec. If user wants to measure frequency in Hertz (No. of pulses per
PS1 PS2 PS46 PS47 PS48 PS51 PS95 PS96
second), he should program system word 30020 as # 100.
2. 30031 - No. of pulses in particular time interval (programmed in system word 30020) are available in
this system word. This word is asynchronously updated with respect to Logic Scan. 1 Sec. 1 Sec.
In order to measure frequency, follow the steps below.
l Enable High Speed Counter in Count x 1 mode. System bits 3002.0, 3002.1 & 3002.2 should be set
for first logic scan. Any change in the status of these bits in subsequent PLC scan is ignored.
l Move suitable time interval in system word 30020. (E.g. # 1 for 10 msec. # 10 for 100 msec. & # 100
for 1 sec.). 1 2 1 2

l Move # 0000 to Counter Preset System word 30019. Note that initialization of preset value other than
# 0000 leads to unpredictable frequency measurement. 500 Pulses 450 Pulses

System word = 500 System word = 450


30031 30031

9.31 9.32
Frequency Measurement : RUNG NUMBER : 2
MOVE SUITABLE TIME INTERVAL IN SYSTEM WORD 30020.
RUNG NUMBER : 0
INITIALIZATION OF HSCM FOR COUNT X1 MODE |MOVE----#00100------19-|
CNT X1 |------|ENBL SRCWRD PFLO|
NORMALLY MODE | |
ON SELECT | |
3000.0 3002.0 | |
|--| |-------------------------------------------------------|---( )--- | |
| | Time Interval |
| CNT X1 | 030020 |
| MODE | DSTWRD |
| SELECT |-----------------------|
| 3002.1
|---( )--- RUNG NUMBER : 3
| Move #0000 to Counter Preset System Word 30019.
| CNT X1
| MODE |MOVE----#00000------19-|
| SELECT |------|ENBL SRCWRD PFLO|
| 3002.2 | |
|---( )--- | |
| |
RUNG NUMBER : 1 | |
NORMALLY Preset HSC | HSC Preset Value |
ON PE command bit | 030019 |
3000.0 2029.0 3001.8 | DSTWRD |
---| |------|P|---------------------------------------------------( )--- |-----------------------|
Note : Pulse count (frequency output) will be available in system word 30031.

9.33 9.34

Constant Scan : Timing Diagram below shows Constant Scan feature.


For a particular Ladder, PLC scan time is not always constant. It varies depending upon Number of
activated instructions in some applications there is a need of constant scan. The associated system Word
& system Bit are :
1. 30023 – In this system Word, actual current scan time is available in steps of 5 msec.
( eg. For value = 8 , 40 msec.) Start of
Output Scan
2. 30024 – This system Word holds minimum scan time of all previous scans.
3. 30025 – In the System word, maximum scan time in all the previous scan is available.
4. 30026 – User can program the constant scan time by programming necessary decimal value ( # 1
to 30 ) in this system Word. This value is multiplied by 5 msec ( respective constant scan time
will be from 5 msec to 150 msec ) to get desired constant scan time. At every scan, it is checked for PLC House PLC House PLC
a nonzero value in system Word 30026. If it is having a nonzero value, PLC is configured for constant Scan 1 Keeping Scan 2 Keeping Scan 3
Tv Activities Tv Activities Tv
scan. User can move a nonzero value at any stage of a ladder.
At the end of logic scan, the current scan time is checked. If this is less than the constant scan time,
idle time which is difference of constant scan time and current scan time is added and then only Tc Tc
output scan is started. So in this case, outputs are updated after constant time.
Start of Scan
If decimal number more than 30 is moved into 30026 (i.e. constant scan more than 150 msec.), then
it will be considered as 150 msec. Only.
Tc = Constant Scan
5. 3003.2 - If current scan time is greater than constant scan time programmed in system word 30026, Tv = Variable Wait time
system error bit 3003.2 is put on and constant scan time is not achieved.
The Constant scan feature is useful for sampling analog inputs and averaging etc.

9.35 9.36
Constant Scan : Real Time Clock ( RTC )
RUNG NUMBER : 0 The information of current time in hours (0-23), minutes (0-59) and Seconds (0-59) alongwith calendar
AT THE FIRST SCAN, CONSTANT SCAN TIME VALUE IS DEFINED. information such as year, month, date and the day of the week is available.
WARM START The above information is available in the systems words as under.
3000.9 2000.0
|--| |-------|--------------------------------------------------( )---| System words Description
| 30000 0 0 Y Y Year in BCD 00 to 99
|
COLD START | 30001 0 0 Mo Mo Months in BCD 01 to 12
3000.8 |
|--| |-------| 30002 0 0 Dt Dt Date in BCD 01 to 31
30003 0 0 H H Hours in BCD 00 to 23
RUNG NUMBER : 1 30004 0 0 Mn Mn Minutes in BCD 00 to 59
CONSTANT SCAN TIME IS DEFINED TO 100 MSEC. (20 X 5 MSEC).
30005 0 0 S S Seconds in BCD 00 to 59
2000.0 |MOVE---#0020--------19-| 30006 Day of Week in BCD 0 to 6
---| |----|ENBL SRCWRD PFLO| 0 0 Dy Dy
| |
| | Real Time Clock can be set in two ways as follows :
| |
| | 1. ON line modifications using the Programming devices such as “PG308” or “DOX-MINI”.
| |
| 30026 | 2. In Ladder program, to set the RTC, there are seven words. User has to move the required values in
| DSTWRD | these words and set the 3001.C Bit ( RTC Modify Bit )
|-----------------------|

9.37 9.38

30008 0 0 Y Y Year Modification Word (BCD 0000 to 0099 ) Example –

30009 0 0 Mo Mo Month Modification Word (BCD 0001 to 0012 ) To set time as 6:30:00 with a key switch input (1000.1).

30010 0 0 Dy Dy Date Modification Word (BCD 0001 to 0031 )


1000.1 MOVE $0006 19
30011 0 0 Dy Dy Hour Modification Word (BCD 00 to 0023 ) ENBL SRCWRD PFLO
30012 0 0 H H Minutes Modification Word (BCD 0000 to 0059 ) 30011
30013 0 0 Mn Mn Seconds Year Modification Word (BCD 0000 to 0059 ) DSTWRD

30014 0 0 S S Day of the Week Modification Word (BCD 0000 to 0006)


1000.1 MOVE $0030 19
ENBL SRCWRD PFLO
These system words should be modified by using appropriate function blocks in the ladder. These new
30012
values should be BCD values. After writing the appropriate values into these system words, the system DSTWRD
bit 3001.C should be set. After setting Real Time Clock, this system bit is cleared by PLC.
System Bit 3001.D gives the RTC status. If it is 1 (Set), It indicates that there is a failure in RTC hardware.
1000.1 MOVE $0000 19
ENBL SRCWRD PFLO

30013
DSTWRD
Set RTC
Command Bit

1000.1 2000.8 3001.C


P (s)

9.39 9.40
Applications –
1. Put ON alarms at desired time. Chapter 10 Trouble Shooting
2. Start or stop any operation at any time. e.g. start and stop pumps at a particular time of a day in water
pumping stations. This chapter explains the external / internal trouble shooting of the electrical system involving the Micro
PLC. The topics covered are -
3. For acquiring and storing desired data at a specific predefined time.
* The diagnostic LEDs on the CPU
* External / Internal trouble shooting
* Use of the alphanumeric display and the system bits for trouble shooting
* Step-by-step approach to solve a problem

Self Tests
The Micro PLC is specially designed for working in industrial environment and does not require regular
maintenance. The processor, during the power ON and during the normal course of program execution,
continuously carries out specific self tests to ensure the healthy and trouble free operation of PLC. In case
processor detects any fatal error in the PLC hardware, depending upon the type of error, it either
generates some alarm signals for user program or goes in STOP mode to avoid any accident on the
automated system. The results of these tests are displayed on the front panel of the processor module.
The status of their lights enable the operator to diagnose the cause of the failure and take the appropriate
remedial action.

9.41 10.1

Type Self Test carried LED Indicator Status Description


1. Power Supply – Continuous monitoring of internal and external voltages. ON ON Healthy condition, indicates that the supply generated by the power
2. Processor Module – Monitoring of power fail signals generated by the Power Supply Module. (Green LED) supply is O.K.
Monitoring of serial port dialogues. OFF – Supply to PLC is OFF or fuse blown.
Monitoring of Watchdog timer. – Power Supply faulty.
Monitoring of scan time. RUN ON Healthy condition indicating processor in program execution mode
Monitoring of internal data memory. (Green LED) (RUN mode). Lights up after power ON self test are over.
OFF – Processor in STOP mode.
Failures – CPU watchdog fault.

The malfunctioning of the Micro PLC can be caused by two types of failures. CPU OFF Indicates healthy condition of processor module.

— External failure Defective sensors or actuators. Incorrect supply voltage. Abnormal environmental (Red LED) ON – Hardware fault on processor module.
– Watchdog timer tripped.
or service conditions. (excessive temperature, humidity, metal dust etc.)
MEM OFF Indicates user program healthy.
— Internal failure Component failure. Failure because of incorrect user program.
(Red LED) ON – On board User Program Memory corrupted.
Consequently, it is essential to carefully trace the cause of any failure or its point of origin, since this may
be external to the PLC and must therefore be corrected before any modules are changed. Flashing – Indicates that the maximum single Scan Time has been exceeded
Trouble shooting using indicating lights LO BAT OFF – Indicates that the voltage of the battery for data memory of
(Red LED) processor module is healthy.
This section describes the functions of individual indicating lights and their behavior in the event of a
failure as well as in healthy state. This will help the operator to make a conclusion on type of fault and its ON – Indicates the voltage of the battery for data memory is low.
remedy. – Battery is faulty.

10.2 10.3
Refer the following chart for trouble shooting, using indicator LEDs, probable cause and its remedy. The
terminologies used here are : Indicator Lights Probable Cause Remedial Action
l Indicator light OFF
User program corrupted. Retransfer the program.
l Indicator light ON O l
RUN ON
O Don't care about the status
Flashing O l O
CPU MEM LO BAT
Indicator Lights Probable Cause Remedial Action
O l PLC in STOP mode. Connect "PG-308" or "DOX-Mini"
Supply to PLC is OFF or Switch ON and check if and set the PLC to RUN mode.
O O RUN ON
RUN ON improper. required.
Fuse on power supply blown. Check and replace if required. O O O
O O O
Power supply faulty. Contact Service Station. CPU MEM LO BAT
CPU MEM LO BAT

Low voltage of on board Keep PLC ON for 3 to 4 hours.


O l
On board EEPROM faulty. Contact Service Station. battery. Allow the battery to charge.
O l RUN ON
RUN ON Processor faulty.
O O l
l l O CPU MEM LO BAT
CPU MEM LO BAT
Note : CPU and RUN LEDs never become ON simultaneously

10.4 10.5

Indicator Lights Probable Cause Remedial Action


Appendix 1 Recommendations
Maximum allowable scan time Check for reverse Jump
O O
exceeded programmed in the ladder and
RUN ON This Appendix describes various recommendation which should be adopted by the PLC user for a trouble
remove them
free operation
O O
CPU MEM LO BAT Pressure Switches
Due to pressure fluctuations pressure switches in hydraulic and pneumatic systems, get off momentarily
after activation. This results in malfunctioning of the process. Thus whenever pressure switches are
interfaced to PLC, it becomes necessary to introduce a small delay in the activation to deactivation of the
the pressure switch sensing. In the example given below it is assumed that the input is wired as a
normally open contact of pressure switch.

10.6 A.1.1
Example : DC Power Supply for Inputs
The power supply for inputs should be as recommended on page number 9.2. Special emphasis should
Pressure Switch be given to confirm that the filter capacitor rating is as per the recommendations (1000 microfarads, 63
1000.0 2000.2 volts per ampere minimum)
( )
2000.1 Frequency of Inputs
For the inputs to get sensed ( either as ON or OFF ) the status change should remain for a minimum
1000.0 2000.1 amount of time. This time is scan time plus the hardware debouncing delay ( @ 10 milliseconds). Thus if
( ) any input is changing the status at a faster rate it may not get sensed correctly. This may happen for e.g.
2000.0 in case the proximity switch input is used to count the number of revolutions etc.

1000.0 2000.0 Protections at output


( ) It is necessary to install fuses of suitable rating between individual output and load. Also, connect R-C
and MOV across the outputs for AC loads and Free Wheel diodes for DC loads, externally.
In this way, the ON to OFF transition of pressure switch can be sensed after 3 scan delays by a flag bit
2000.2. Thus flag bit 2000.2 will now represent the correct status of the pressure switch 1000.0 Original Equipment Manufacturers
The Original Equipment Manufacturers are requested to rigorously observe the following things –
Back Up Program
1) Ensure that all documents in the form of PLC manuals, labeled ladder diagram and I/O List print outs
A copy of ladder program should be readily available on floppy disk. This is helpful in case the program etc. are handed over to the end users.
possessed by PLC gets corrupted.
2) Details of end user like , name and address,contact person / department, telephone number / telex
number etc. are to be forwarded to head office at PUNE. This helps in giving better service back up.

A.1.2 A.1.3

Byte – Eight bits or two nibbles grouped together form one byte.
Appendix 2 Basics in Digital Electronics Word – It is the maximum number of bits that are processed or handled at a time. Sixteen bits or four
nibbles or two bytes grouped together form one word.
This Appendix covers the basics of the numbering systems. The topics covered are -
* Numbering Systems
* bit, nibble, byte and word Numbering System
* logic gates
1. Binary Numbering System
(Most Significant Bit) (Least Significant Bit)
MSB LSB The binary numbering system uses a number set that consists of two digits viz., numbers 0 AND 1.
Each digit in a binary number has a weightage expressed as a power of '2'. The decimal equivalent
B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 of binary number is computed by multiplying each binary digit by its corresponding weightage and
1 0 0 1 0 1 1 0 1 1 0 0 0 0 1 1 adding these numbers together.

Bit 24 23 22 21 20
Nibble Binary Number 1 1 0 1 0

Byte
Decimal equivalent = 20 x 0 + 2 1 x 1 + 2 2 x 0 + 2 3 x 1 + 2 4 x 1
Word
= 0 + 2 + 0 + 8 + 16
Bit – Bit means binary digit. It is the smallest piece of digital information. It can be either 0 (OFF) = 26
or 1 (ON).
Nibble – Four bits grouped together form nibble.

A.2.1 A.2.2
2. Hexadecimal Numbering System Decimal / Hexadecimal / Binary Numbering System :
The hexadecimal numbering system has a number set of 16 digit viz. the numbers 0-9 and the letters
Decimal Hexa- Binary
A to F ( decimal numbers 10-15 respectively). Each digit in a hexadecimal number has a weightage decimal
expressed as a power of '16'. A hexadecimal number can be converted to a decimal number by 0 0 0000
multiplying the hexadecimal digit by its corresponding weightage,expressed as a power of '16' and 1 1 0001
then adding these numbers together. 2 2 0010
3 3 0011
4 4 0100
163 162 161 160 5 5 0101
6 6 0110
Hexadecimal Number 1 0 1 0 7 7 0111
8 8 1000
Decimal equivalent = 160 x 7 + 161 x 10 + 162 x 1 + 163 x 0
9 9 1001
= 7 + 160 + 256 + 0 10 A 1010
11 B 1011
= 423 12 C 1100
3. Binary Coded Decimal Numbering System 13 D 1101
14 E 1110
This numbering system is a subset of hexadecimal numbering system and contains digits from 0 to 15 F 1111
9 only. A digit of BCD number is the equivalent decimal number of the corresponding four digit binary 16 10 10000
number. 17 11 10001
18 12 10010
Refer following table for the comparison between Decimal, Hexadecimal and Binary number system. 256 100 –
512 200 –
1024 400 –
2048 800 –

A.2.3 A.2.4

Conversion from binary to hexadecimal – B) OR Gates – The output of an OR gate is 1 if one or more inputs are 1.
For converting binary number to hexadecimal numbers, group the binary number into nibbles. Convert The Boolean expression for OR gate is shown in the figure. The expression is to read as "Y equals A
these nibbles to corresponding hexadecimal numbers. For this refer the comparison of numbering or B - ------ or N ". Figure. shows the truth table for two input OR gate.
systems given earlier. e.g. convert binary number 0110 1100 1001 1010 to hexadecimal. C) XOR Gates – The output of a XOR gate is 1 if odd number of inputs are 1.
The Boolean expression for XOR gate is shown in the figure. The expression is to read as "Y equals
binary number A XOR B XOR ------- XOR N ". Figure shows the truth table for two input XOR gate.
D) NOT Gates – The output of a NOT gate is 1 if the input is 0 and vice versa.
0110 1100 1001 1010
The Boolean expression for NOT gate is shown in the figure. The expression is to read as "Y is not
↓ ↓ ↓ ↓ equal to A ". Figure shows the truth table for one input NOT gate.
6 C 9 A

Thus the corresponding hexadecimal number will be 6C9A.


For converting from hexadecimal to binary the reverse process is to be followed i.e. convert each
hexadecimal digit to binary (nibble). Join these to get the actual binary number. Y = AB .... N Y = A + B + ... + N Y = A ⊕ B ⊕ ... ⊕ N y=A

Logic Gates Input Output Input Output Input Output Input Output
A B Y A B Y A B Y A Y
A) AND Gates – The output of an AND gate is 1 if and only if all the inputs are 1.
0 0 0 0 0 0 0 0 0 0 0
The Boolean expression for AND gate is shown in the figure. The expression is to read as "Y equals 0 1 0 0 1 1 0 1 1 1 0
A and B - ------ and N ". Figure shows the truth table for two input AND gate. 1 0 0 1 0 1 1 0 1
1 1 1 1 1 1 1 1 0

A.2.5 A.2.6
Counter function blocks
Appendix 3 Function Blocks Lists 10 UPCTR Up counter
11 DNCTR Down counter
12 U/DCTR UP/DOWN counter
This Appendix enlists the function blocks in the sequential and alphabetical form
Comparison function block
Functional list of function blocks 13 COMPR Comparison Block

No. AbbreviatedFunction description Arithmetic function blocks


Description 14 ADD Single word addition
15 SUB Single word subtraction.
Timer function blocks–ON delay type 16 MUL 16 bit multiplication
01 TON.01 On Delay timer with .01 sec time base 17 DIV 16 bit division
02 TON0.1 On Delay timer with 0.1 sec time base Limit check function block
03 TON1.0 On Delay timer with 1 sec time base 18 LMTALM Limit check and alarm
Timer function blocks–OFF delay type Transfer function blocks
04 TOF.01 Off delay timer with .01 sec time base 19 MOVE Move the word value
05 TOF0.1 Off delay timer with 0.1 sec time base 20 TBLFIL Table fill
06 TOF1.0 Off delay timer with 1 sec time base 21 TBLMOV Table move
Monostable function blocks 22 TBLRD Table read
07 MON.01 Monostable with .01 sec time base 23 TBLWR Table write
08 MON0.1 Monostable with 0.1 sec time base 24 TBLSRH Table search
09 MON1.0 Monostable with 1 sec time base

A.3.1 A.3.2

Conversion function blocks Word Increment/Decrement function blocks


25 BCDHEX 4 digit conversion from BCD to HEX 40 WINCR Word increment
26 HEXBCD 4 digit conversion from HEX to BCD 41 WDECR Word decrement
27 HEXASC Conversion from Hex to ASCII codes 42 WRESET Word reset
28 ASCHEX Conversion from ASCII to HEX Shift function blocks
29 HEX7SG Hexadecimal to 7 segment code conversion 43 SFTLF Shift left
BitCheck, Set, Reset, Search function blocks 44 SFTRT Shift right
30 BITCHK BIT check 45 SFTLFC Shift left circular
31 BITSET BIT set 46 SFTRTC Shift right circular
32 BITRST BIT reset Immediate Input/Output function blocks
33 BITSRH BIT search 47 IMM_IN Immediate Inputs
FIFO, LIFO function blocks 48 IMMOUT Immediate Outputs
34 FIFO First In First Out Analog Input / Output function blocks
35 LIFO Last In First Out 49 REGMRD Register Module Read
Logic function blocks 50 REGMWR Register Module Write
36 AND Logical AND
37 OR Logical OR
38 XOR Logical XOR
39 CPL Compliment the word value

A.3.3 A.3.4
Alphabetical list of function blocks MOVE 19 Move the word value
Abbreviated No. Function description MUL 16 16 bit multiplication
Description OR 37 Logical OR
REGMRD 49 Register Module Read
ADD 14 Single word addition REGMWR 50 Register Module Write
AND 36 Logical AND SFTLF 43 Shift left
HEX7SG 29 Hexadecimal to 7 segment code conversion SFTLFC 45 Shift left circular
ASCHEX 28 Conversion from ASCII to HEX SFTRT 44 Shift right
BCDHEX 25 4 digit conversion from BCD to HEX SFTRTC 46 Shift right circular
BITCHK 30 BIT check SUB 15 Single word subtraction.
BITRST 32 BIT reset TBLFIL 20 Table fill
BITSET 31 BIT set TBLMOV 21 Table move
BITSRH 33 BIT search TBLRD 22 Table read
COMPR 13 Comparison Block TBLSRH 24 Table search
CPL 39 Compliment the word value TBLWR 23 Table write
DIV 17 16 bit division TOF.01 04 Off delay timer with .01 sec time base
DNCTR 11 Down Counter TOF0.1 05 Off delay timer with 0.1 sec time base
FIFO 34 First In First Out TOF1.0 06 Off delay timer with 1 sec time base
HEXASC 27 Conversion from Hex to ASCII codes TON.01 01 On Delay timer with .01 sec time base
HEXBCD 26 4 digit conversion from HEX to BCD TON0.1 02 On Delay timer with 0.1 sec time base
IMMOUT 48 Immediate Outputs TON1.0 03 On Delay timer with 1 sec time base
IMM_IN 47 Immediate Inputs U/DCTR 12 UP/DOWN Counter
LIFO 35 Last In First Out UPCTR 10 Up counter
LMTALM 18 Limit check and alarm WDECR 41 Word decrement
MON.01 07 Monostable with .01 sec time base WINCR 40 Word increment
MON0.1 08 Monostable with 0.1 sec time base WRESET 42 Word reset
MON1.0 09 Monostable with 1 sec time base XOR 38 Logical XOR
A.3.5 A.3.6
H J
INDEX High speed counter 2.13, 9.7 Jump 7.11, 8.8
Control word 9.12 Special Cases 7.12, 7.13
A D Current value 9.12
Addressing 5.1 Double Output updation 4.10 L
Empty output 9.1
Alphanumeric display 1.2, 2.9, 6.8, 9.1 DOX–MINI P.3 1.2, 1.4, 2.5, 2.13 Label 7.10, 7.11, 7.12
Mode Selection 9.8
Character set 9.2 DOX-MINI Manual P.3 Ladder Diagram 4.4, 7.1, 7.2
Operation 9.8
Analog Input 2.8, 2.16, 3.50 Presetting 9.11 M
E
Analog Output 2.8, 2.17, 3.49 Master control Relay
Earthing 3.13 I
C EEPROM 2.12, 4.6, 10.4 (MCR) 7.6, 7.7, 7.8, 8.4, 8.8
Input 1.3, 2.1, 3.34, 4.1
Constant Scan 9.35 Expansion Module 2.11, 2.19, 3.3, 5.4 Special Cases 7.9, 7.10
Addressing 5.1, 5.4
Counter Master End (ME) 7.6, 7.8, 7.10
F Frequency A.1.3
Down 8.20 Power supply 2.8, 3.7, 3.8, 3.9, 3.10 O
Flag 4.2
Up 8.18 Response 4.8 Output 1.3, 2.11, 3.36
Addressing 5.2,
Up/Down 8.22 Response improving 4.12 Addressing 5.1, 5.4
Frequency Measurement 9.31
Function Block 7.9, 7.13, 8.1 Response logging 4.11 Protection A.2.3
Lists A.3.1, A.3.6 Wiring 3.14 to 3.48 Response 4.8
Response improving 4.12

Response logging 4.11 R


Wiring 3.14 to 3.48 RAM word 2.12, 8.3, 8.4
Original Equipment Manufacturer A.1.3 Addressing 5.1, 5.4
Real Time Clock 9.38
Recommendations A.1.1
P
PLC S
Block diagram 1.3 System bit 6.1
Dimensional details 3.1 System word 6.6
Failures 10.2
Features 1.2
T
Table 7.14
Hardware configuration 2.18, 2.19
Addressing 5.3
Mounting 3.4, 3.5
Direct Access 7.15
Programming Devices 2.13
Indirect Access 7.16
Scan 4.6, 4.8
Timer
Self Test 10.1
OFF Delay 8.9, 8.10, 8.11
Troubleshooting 10.1, 10.2 Mitsubishi Electric India Pvt. Ltd.
ON Delay 8.5, 8.6, 8.7 Emerald House,
Power Supply 2.8, 3.7, 3.8, 3.9, 3.10 EL-3, J- Block MIDC, Bhosari,
Training P.4 Pune - 411026.(INDIA)
Pulse catch Input 1.2, 2.13, 9.21 Tel. : (+91)-20-2710 2000
Pulse Output 9.24 Fax : (+91)-20-2710 2100
Email : marketing.FA2@mei-india.com
Web : www.MitsubishiElectric.in

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