Performance Comparison of Two Level Inverter

with Classical Multilevel Inverter Topologies

Rushikesh Mali Nitin Adam Akshay Satpaise
Department of Electrical Engg. Department of Electrical Engg. Department of Electrical Engg.
Walchand College of Engineering Walchand College of Engineering Walchand College of Engineering
Sangli, India Sangli, India Sangli, India
rushikesh.mali024@gmail.com ntnadam099@gmail.com akshay.satpaise99@gmail.com

Prof. Dr. A. P. Vaidya

Department of Electrical Engg.
Walchand College of Engineering
Sangli, India
anil.vaidya@walchandsangli.ac.in

Abstract—Since the advent of power electronic devices,
Inverters have become an integral part in applications like
UPS, AC drives, HVDC transmission. These applications
mainly use voltage source inverters. Voltage source inverters
are classified based on the no. of levels in output voltage as two-
level inverter and multilevel inverters (diode clamped, flying
capacitor and cascaded H-bridge). This paper enlightens the
performance comparison of two-level inverter using space
vector PWM and all three classical multilevel inverters (5-level)
using phase disposition multi-carrier modulation. This
comparison is based on factors like total harmonic distortion,
EMI, switching frequency, switching losses and the no. of
switching devices. The simulation of all these inverters is done
in MATLAB/Simulink and the simulation results are used as a
source of comparison.
Keywords— Multilevel inverter, two-level inverter, space vector
PWM, phase disposition multi-carrier modulation, total
harmonic distortion, Simulink.
I. INTRODUCTION
Inverters use power electronics devices to convert DC
power to AC power at a particular switching frequency.
Single-phase inverter has two basic configurations i.e., half
bridge and full bridge with output voltage levels as ±Vdc/2
and ±Vdc respectively. The output frequency in both these
configurations is same as the switching frequency. The
harmonic spectrum of output voltage consists of all odd
harmonics with predominant third harmonic. The filter
design for such a waveform is quite difficult as the
application may involve continuous change in output
frequency. In addition, the filter requires bulky inductors,
which increases the size of inverters.
Three phase inverters find many industrial applications
but their use is limited to increasing power quality concerns.
Three phase inverters with 1800 mode of conduction also
known as square wave inverter or six-step voltage source
978-1-5386-8158-9/19/$31.00 ©2019 IEEE
inverter has high THD. The advancements in pulse-width
modulation techniques scales down the harmonic content
and thus gives a better output voltage waveform. The size
and cost of filter reduces due to high predominant harmonics
in PWM inverters [1]. However, high switching frequency
caters to high switching losses, thereby the overall
efficiency is reduced. Further, PWM inverters are used for
low and medium voltage applications and cannot be used for
high voltage applications because the voltage stresses on
each power electronic switch is high and switches with these
high voltage ratings are either not available or are very
costly.
Trade-off between THD and switching losses existed
before the evolution of multilevel inverters. Multilevel
inverter [2]-[3] gives more than two levels in the output
voltage waveform. The advantage of MLI over PWM
inverters is that it can be used to reduce the harmonic
content at low switching frequencies. Thus, it reduces the
switching losses and gives a near sinusoidal output. MLI
uses many power electronic devices thereby reducing the
voltage stress on each device. Many new multilevel inverter
topologies with reduced number of switches are proposed in
[4]-[5]. However, it is of utmost importance to understand
the basic MLI topologies before proceeding to new and
advanced topologies. The three basic topologies, also known
as classical topologies of MLI are:
1) Neutral Point Clamped (NPC-MLI) or Diode
Clamped (DC-MLI)
2) Flying Capacitor (FC-MLI)
3) Cascaded H-Bridge (CHB-MLI)
This paper is structured as follows. Section II explains in
brief about space vector PWM along with the basic idea of
operation of two-level inverter. Section III discusses the
basic multilevel inverter topologies and their simulation in
MATLAB/Simulink. Section IV discusses different
modulation strategies for multilevel inverters. Section V
contains the simulation results in MATLAB/Simulink.
Section VI gives the comparative analysis of two-level
inverter with multilevel inverters. Section VII concludes the
proposed work. The transformation of three phases to two phases can be
done using the matrix equation 4. The space vector is
obtained using equation 5.
II. TWO-LEVEL INVERTER
Two level inverter (3-phase) consists of six switches.
The switches must have bidirectional current carrying
capability along with unidirectional voltage blocking
capability. Thus, an IGBT with a parallel diode or a
MOSFET fulfills this requirement. These inverters when
employed with suitable modulation strategy can be used to
get desired sinusoidal current with less distortion. SPWM
and SVPWM are the two most popular modulation
techniques. DC bus utilization in case of SPWM is around A typical space vector diagram for a two level inverter is
78.5% while that of SVPWM is 90.7%. As a result, shown in figure 2. In all, there are eight switching states
SVPWM technique [6] is used for the switching of devices. which are divided into six active and two null states. The
This is quite a sophisticated technique with intensive active states (V1 to V6) represent the corners of the hexagon
computation and because of its superior performance; it is and the null states (V0 and V7) are present at the origin. In a
widely used in Industry. Figure 1 shows the simulation of six step inverter, each active state is held for one-sixth of the
two level inverter with SVPWM technique in fundamental time period. The reference space vector can be
MATLAB/Simulink. computed by synthesizing the two voltage vectors in a
particular sector. The time for which a particular vector is
applied can be computed by applying the volt-sec balance
[7] as given in equation 6.

Fig. 1. Two-level inverter with SVPWM Technique

A. Space Vector PWM

The space vector concept is derived from the theory of
rotating magnetic field of three-phase induction motor. The
three phases can be transformed to two phases in the
stationary α-β frame. The resultant of these two phases can
be called a rotating vector with fixed magnitude and
frequency. This rotating vector is used for modulating the
inverter output. Considering the operation of inverter as
balanced three-phase, the voltage of each phase is given in
equations 1, 2 and 3.
Fig. 2. Space Vector diagram with switching states
 III. CLASSICAL MULTILEVEL INVERTER TOPOLOGIES
Multilevel inverters have found their way for high
voltage and high power industrial applications. These can be
interfaced with renewable energy sources thereby catering to
high power applications. In the following subsections, the
three basic topologies are briefly introduced.
A. Diode Clamped or Neutral Point Clamped Multilevel
Inverter [DC-MLI or NPC-MLI]
Diode clamped multilevel inverter provides multiple
voltage levels at the output. The three phases are connected
to the series bank of capacitors which in turn is connected in
parallel with the DC voltage source. The original invention
was carried out to derive 3-level inverter from 2-level
inverter, thereby using 4 switches/leg and clamping diodes
between middle two switches. The concept further extended
to any no. of levels by increasing series capacitors and
switches. [7] explains the working of diode clamped MLI
using PWM scheme.
Fig. 4. One Leg of Diode Clamped or Neutral Point Clamped MLI
A 5-level multilevel inverter as shown in figure 4,
incorporates 4 DC link capacitors connected in series
clamped at midpoint with 8 switches per leg to provide 5
distinct voltage levels, where 4 capacitors contribute to 4
levels and additional level obtained is neutral point of DC
bus. So, this terminology is also called neutral point
clamped inverter. The voltage across each capacitor is
Vdc/4. Thus, the output voltage levels are ±Vdc/2, ±Vdc/4
and 0.
B. Flying Capacitor Multilevel Inverter [FC-MLI]
This topology is similar to DC-MLI. The only difference
is that here the capacitors are used to clamp the voltage
instead of diodes. Also, it does not require all the switches to
be conducting in a consecutive series as in case with the
DC-MLI. A 5-level FC-MLI as shown in figure 5, requires a
total of 4 DC link capacitors per leg which are used for
energy storage and 6 flying capacitors per leg to provide
multilevel voltage ability to the inverter. The flying
capacitors in one phase are independent from those of other
phases. All the capacitors have a voltage of Vdc/4. The
topology is named as such because the voltage of the flying
capacitor floats with respect to Earth's potential. A new and
better topology for FC-MLI is explained in [8]. Another
advantage of FC-MLI is that there are multiple switching
methods to produce a particular voltage level and thus it is
flexible for voltage synthesis. The output voltage levels are
similar to DC-MLI i.e., ±Vdc/2, ±Vdc/4 and 0.
Fig. 5. One Leg of Flying Capacitor MLI
C. Cascaded H-Bridge Multilevel Inverter [CHB-MLI]
Cascaded H-Bridge MLI as shown in figure 6, consists
of series connected single phase full bridge inverters per
phase. Each full bridge inverter requires a separate DC
voltage source and can produce 3 output voltage levels.
When two bridges are connected in series, together they can
produce 5 voltage levels. The voltage sharing capability is
automatic as independent sources are used. Hence, CHB-
MLI is used preferably for high power applications. Thus,
the levels of cascaded H-Bridge MLI [9] can be easily
increased by cascading more number of full bridge inverters
in series. If the voltage source in each bridge has the same
magnitude then they are called as symmetric CHB-MLI
whereas if the magnitude is different, then they are called as
asymmetric CHB-MLI. Asymmetric CHB-MLI are often
used to get better THD. The output voltage levels are
±2Vdc, ±Vdc and 0.
 Fig. 7. Phase Disposition Multi-Carrier PWM

Fig. 6. One Leg of Cascaded H-Bridge MLI

V. SIMULATION RESULTS
The simulation results are carried out for the same RL
IV. MODULATION STRATEGIES FOR MULTILEVEL load with R=10 Ω and L=100 mH. The switching frequency
INVERTER for two level inverter is 10 KHz, and for MLI it is 5 KHz.
The modulation strategy should have a provision to A. Output phase Voltage and phase Current Waveforms
regulate the output voltage with better quality waveform and
minimum harmonics. Since, single carrier PWM can be used Figure 8(a,b), 9(a,b), 10(a,b) and 11(a,b) shows the phase
to produce only two voltage levels, it has high harmonic voltage and current waveforms of each topology.
content and thus a distorted output. To overcome this
drawback, multi-carrier PWM is used to produce multiple
levels at the output. Multi-carrier modulation [10]-[11] can
be used at power as well as high switching frequencies.
Sinusoidal multi-carrier based high frequency modulation is
used in this paper owing to the fact that the output has low
distortion factor and harmonics. Sinusoidal wave is used as a
modulating wave.
An n-level multilevel inverter requires (n-1) carrier
waves. Depending on the phase relationships between these
carrier waves, the modulation technique can be further
subdivided as:
1) Alternate Phase Opposition Disposition (APOD):-
Every alternate carrier wave is 180 degrees out of
phase.
2) Phase Opposition Disposition (POD):- Carrier
waves above zero reference are in phase and in 180 Fig. 8(a). Phase voltage of Two-level Inverter
degrees out of phase with the carrier wave below
zero reference.
3) Phase Disposition (PD):- All carrier waves are in
phase.
Phase disposition multi-carrier modulation is used for the
simulation of all multilevel inverters in this paper as shown
in figure 7. It is easy to implement and quite popular of all
the above mentioned techniques.
 Fig. 8(b). Phase current of Two-level Inverter Fig. 10(a). Phase voltage of FC-MLI

.Fig. 9(a). Phase voltage of DC-MLI or NPC-MLI

Fig. 10(b). Phase current of FC-MLI

Fig. 9(b). Phase current of DC-MLI or NPC-MLI

Fig. 11(a). Phase voltage of CHB-MLI
 Fig. 11(b). Phase current of CHB-MLI Fig. 14. Fourier Analysis of FC-MLI

B. FFT Analysis of Output Current

Figure 12, 13, 14 and 15 shows the Fourier analysis of

phase current for each topology.

Fig. 15. Fourier Analysis of CHB-MLI

Fig. 12. Fourier Analysis of two-level inverter
VI. COMPARISON
Based on the simulation results, the comparison of two-level
inverters with multilevel inverters is given in table 1. The
comparison is done by taking into consideration the
simulation results.

2-level DC-MLI FC-MLI CHB-

MLI

No. of 2 2(n-1) 2(n-1) 2(n-1)

switches per
phase

No. of DC 1 (n-1) (n-1) (n-1)/2

Bus capacitors

No. of 0 (n-1)* 0 0
Clamping (n-2)
diodes per
phase
Fig. 13. Fourier Analysis of DC-MLI or NPC-MLI
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