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fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TIA.2019.2906580, IEEE
Transactions on Industry Applications

A Fast Instantaneous Power Calculation Algorithm for Single-phase Rectifiers Based

on Arbitrary Phase-delay Method

Chengxiang Zhang, Student Member, IEEE, Siru Yu, Student Member, IEEE,Keteng Jiang, Student Member, IEEE,
Xinglai Ge, Member, IEEE, and Junpeng Ma

Abstract—The instantaneous power for three-phase rectifier

can be calculated directly in the orthogonal coordinate system Pref ia
Three-
via coordinate transformation. However, it is difficult to phase ib
DPC PWM abc/dq
calculate the instantaneous power directly for single-phase ic
Qref rectifier
rectifier due to the lack of another phase. Therefore, an
orthogonal signal generator (OSG) is required to create an P id
orthogonal coordinate system. Currently, conventional OSG Power
Q iq
algorithms suffer from long response time. To remedy this calculation
problem, in this paper, an arbitrary phase-delay OSG algorithm (a) DPC in three-phase rectifier
is developed and applied to the direct power control system in
the single-phase rectifiers. Firstly, the instantaneous power Pref Single-
i
theory and direct power control are presented. Then, the DPC PWM phase OSG
principle of the arbitrary phase-delay OSG method is Qref rectifier iα iβ
introduced and the anti-interference ability of the proposed
method is analyzed. Through the dynamic response analysis, the P id
Power
developed algorithm brings faster response, easier Q
calculation iq αβ/dq
implementation and less computational burden compared with
other common OSG algorithms. Finally, the validity and (b) DPC in Single-phase rectifier
advancement of the proposed algorithm are verified by
Fig. 1. General block diagram of the direct power control scheme.
simulations and hardware-in-loop experimental tests. A
comparison with conventional OSG algorithms also proves the power theory. Hence, it has been widely studied and applied
advantages of the developed method. in three-phase system [15]-[20].
Keywords—Instantaneous power calculation; Single-phase To implement DPC in rectifier, it is necessary to calculate
rectifier; Orthogonal signal generator; Arbitrary phase-delay; the instantaneous active power and instantaneous reactive
Direct power control. power. For three-phase system, it is easy to calculate the
instantaneous active/reactive power in the orthogonal
I. INTRODUCTION coordinate system via Park/Clark transform, as shown in Fig.1
Single phase pulse rectifier has been widely used in (a). However, due to the lack of another phase in single phase
electric locomotives and high-speed electrical multiple units system, it’s difficult to constitute orthogonal coordinate
(EMUs) for various advantages, such as low harmonic content system to calculate the instantaneous power. Therefore, it is
of input current, high power factor in the grid side, and necessary to create a set of orthogonal signals according to the
bi-directional energy flow [1], [2]. With the rapid original signal [21]-[24].
development of high-speed railway, higher requirements are Orthogonal signal generators (OSG) mainly generate the
put forward for its control, and various approaches have been corresponding orthogonal signal xβ according to the detected
proposed in succession, such as indirect current control [3], single-phase signal xα, so that the orthogonal coordinate
[4], hysteresis current control [5], [6], transient current control system could be established for power calculation, as shown
[7], [8], predictive current control [9]-[11], D-Q current in Fig.1(b). In order to ensure that DPC in single-phase
decoupling control [12]-[14]. They are mainly based on the rectifier has the same excellent performance as DPC in
current regulation to achieve the unit power operation of the three-phase rectifier, the OSG introduced in single-phase
rectifier with different characteristics. Compared with the system should not bring additional adverse effects on the
current control, the direct power control (DPC), which is control performance of single-phase system. Therefore, the
characterized by simple algorithm and fast dynamic response, key issue of OSG in DPC for single-phase rectifier is to
can realize unit power factor by means of direct control of generate the orthogonal signal xβ quickly and accurately. The
active power and reactive power based on the instantaneous common methods of generating orthogonal signals include
This work was supported by the National Natural Science Foundation of
quarter-cycle delay method [22], [25], first-order
China under Grants 51677156 and 61733015. (Corresponding author: differentiating [26], filters method [23], [27], second-order
Xinglai Ge) generalized integrator (SOGI) [28]-[30] and so on. Among
All the authors are with the National Rail Transportation Electrification And them, quarter-cycle delay needs response time of 0.25 grid
Automation Engineering Technology Research Center, Southwest Jiaotong cycles when the original signal changes. The first-order
University, Chengdu 610031, China (e-mail: bk20111725@my.swjtu.edu.cn;
differentiating operator could generate a quadrature signal
yoosarou@163.com; ketengjiang@my.swjtu.edu.cn; xlgee@163.com;
junpeng_ma@163.com) with fast response, but the random noise is significantly
enlarged with high sampling frequency. If the sampling

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frequency is reduced, the orthogonal signal generated by
first-order differentiating method will produce a large
approximation error. In [27], xβ is chosen as zero to abandon
the OSG. However, there exists harmonic with double grid
frequency in d-q frame after the coordinate transformation.
Usually a notch filter or low pass filter is used to filter out the
harmonics, but this will lead to a reduction in the bandwidth
of the control loop and increase the response time. In recent
years, the OSG based on SOGI has attracted much attention
due to its frequency-adaptive performance
harmonic/noise immunity. However, it suffers from long
response time, although the research has focused on how to
optimize the response speed [31]. That limits its application
in fast detection and control in single-phase system.
Therefore, this paper focuses on an OSG with fast
response performance, which is used in DPC of single-phase
rectifier to ensure the control performance of single-phase
system is not affected by OSG and as excellent as in
three-phase rectifier. Considering the requirements of simple
digital implementation, low computation burden and fast
response speed, the quarter-cycle delay method and the
first-order differentiating method are still the main choices
for generating orthogonal signals. In order to overcome the
defects of the two algorithms in response speed, precision and
noise immunity, an OSG algorithm with arbitrary phase delay
is proposed in this paper to establish the orthogonal
coordinate system and calculate the instantaneous power of
the single-phase rectifier. The proposed OSG algorithm is
applied to the DPC system in single-phase rectifier and a
comparison with other traditional OSG algorithms is
provided to show the advantages of the proposed methods.
The validity and advancement of the proposed algorithm are
verified by simulations and hardware-in-loop experimental
tests.
The rest of this paper is structured as follows. Section II
describes the instantaneous power theory based on complex
vector and a common predictive DPC algorithm. Section III
explains the principles of the arbitrary phase-delay OSG
method. In section IV, a comparison of the proposed methods
and traditional OSG methods is carried out through
simulation and experimental tests. Finally, a conclusion is
conducted in Section V.
II. INSTANTANEOUS POWER THEORY AND DPC ALGORITHM
A. Instantaneous Power Theory Based on Complex Vector
The DPC of a three-phase rectifier is based on the
instantaneous reactive power theory, which was developed by
Akagi in orthogonal coordinates [32]. This paper explains the
instantaneous active power and reactive power by means of
space complex vector.
In the stationary α-β coordinate system, complex vectors
of the sinusoidal voltage Vs and current Is are defined as
follows:
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Vs  um e jt  u  ju

 =um cos t  j um sin t
 jt 
(1)
 Is  im e  i  ji

 =im cos t     j im sin t   
where ω refers to the fundamental angular frequency, uα and
uβ refer to the α axis component and the β axis component of
and the voltage complex vector respectively, iα and iβ refer to the α
axis component and the β axis component of the current
complex vector, respectively. um and im are the amplitudes of
the fundamental components in the voltage and current. φ is
the phase-lagging angle between the fundamental components
in current and voltage. It is noted that voltage complex vector
coincides with α axis at the initial time.
Then, complex power S can be expressed as
1
S  Vs Is *  P  jQ (2)
2
where the asterisk * denotes the complex conjugate value. P
and Q refer to the instantaneous active power and reactive
power corresponding to the real and imaginary parts of
instantaneous complex power, respectively.
Substituting (1) into(2), it follows that

1

 P  2 u i  u i 
 (3)
 2

Q  1 i u  i u
    
It is noted that the two components of the grid voltage
vector are not equal to 0 in the stationary α-β coordinate
system, the relationship between the active/reactive power and
the current vector is relatively complex.
Similarly, complex vectors of sinusoidal voltage Vr and
current Ir in the d-q coordinate system are defined as follows.
Vr  ud  juq

 (4)
 I r  id  jiq

where ud and uq refer to the d axis component and the q axis
component of the voltage complex vector respectively, id and
iq refer to the d axis component and the q axis component of
the current complex vector, respectively.
The d-q coordinate system rotates synchronously with
angular velocity ω, so that d axis coincides with the voltage
complex vector all the time. Thus, the coordinate
transformation relation between complex components in
stationary reference frame and rotating reference frame can be
deduced as
Vs  Vr e jt
 j t
(5)
 I s  I r e
Substituting (5) into(2), the relation among S, Vr and Ir
can be derived as
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T1a
where us refers to the grid voltage, is refers to the line current,
T1b idc i2 uab refers to the input voltage of the converter.
Id
L iC
D1a D1b Rd According to complex vectors defined by (1), the grid
L2 +
+ is + a Ud
us uab voltage us and the line current is can be described by complex
  b C2 Cd  vectors. That is,

us  uα  Re Vs 

T2a D2a T2b D2b  (11)
is  iα  Re  Is 

Fig. 2. Topology of the single-phase two-level PWM rectifier.
Similarly, uab can be described by complex vectors Vab,
1 which is defined as
S  Vr I r *  P  jQ (6)
2 uab  uabα  Re Vab  (12)
Substituting (4) into (6), P and Q could also be expressed
as Then, relation (10) can be rewritten in the stationary α-β
coordinate as



1
2

P  ud id  uq iq  Vs  L
dIs
 Vab (13)
 (7) dt

 2
d q 
Q  1 i u  i u
 q d  Substituting (5) into (13), a d-q mathematic model of the
rectifier is deduced as
Combining (1), (4) and (5), ud and uq could be expressed
as dI r
Vabr  Vr  L  js LI r (14)
dt
ud  um
 (8) where Vabr, Vr and Ir are complex vectors in rotating reference
uq  0
frame corresponding to Vab, Vs and Is in the stationary frame,
According to (8), in the d-q coordinate system, when d respectively.
axis is completely coincident with the grid voltage, uq=0. Substituting (4) and (8) to (14), relation (14) can be
Therefore, the formula (7) can be further simplified to decomposed into real part and imaginary part:
 did
 1 uabd  um  L dt   Liq
 P  2 um id  (15)
 (9)
u   L diq   Li
Q   1 u i  abq d
 m q dt
2
In this case, the active/reactive power is proportional to Multiply both sides of (15) with um and substitute (9) into the
the active/reactive current id/iq. Compared with stationary result. The d and q components of uab could be deduced as
reference frame, the relationship between power and current  2 L dP 2 L
in rotating reference frame is clearer and simpler. Thus, the uabd  um  u dt  u Q
 m m
rotating reference frame is adopted for the computation and  (16)
implementation of the power decoupling control algorithms. u  2 L dQ  2 L P
 abq um dt um
B. Predictive DPC Algorithm for Single-Phase Rectifier
The topology of a single-phase two-level converter in the The principle of predictive control is introduced [15]:
traction drive system is shown in Fig.2, where L is the  dP Pref  P
equivalent inductance of traction transformer, L2 and C2 are  L dt  L T
the inductance and capacitor of the second-order passive  s
 (17)
 L dQ  L Qref  Q
resonant filter, respectively; Cd is the buffer capacitor in the
DC-link; Rd is the equivalent resistance of inverter-motor side;  dt
T1a–T2a and T1b–T2b are IGBT modules with freewheel diodes
Ts
of phase a and phase b, respectively. where Ts refers to sampling period, Pref and Qref refer to the
As shown in Fig. 2, Kirchhoff voltage law (KVL) is reference value of active and reactive power, respectively.
applied to analyze the voltage across inductor L, which could According to(17), (16) can be further simplified as:
be expressed as
dis
us  L  uab (10)
dt

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Pref 2L 
Tsum
P
2ωL X2
uabd X1 s
um uab*
um
dq/αβ PWM x 2 x 1
2ωL 
Q um uabq
x 2 O x 1
Qref 2L
Tsum

Fig. 3. Diagram of predictive direct power control.

 2L 2 L
uabd  um  u T  Pref  P   u Q Fig. 4. Vector diagram of quarter-cycle delay method.
 m s m
 (18)
u  2 L 2 L β
Q  Q   P ωs
 abq umTs ref um X2
ωsΔT xβ2
Thus, based on the instantaneous power theory, the DPC X1
ωsT2
algorithm can be realized. The diagram of the predictive DPC xβ1 α
algorithm is shown in Fig. 3. xα2 xα1
ωs T1
III. ARBITRARY PHASE-DELAY OSG METHOD
A. Principle of the Proposed method
Due to the absence of another phase component in single
phase system, it is necessary to introduce a virtual orthogonal
component to form the space vector. The traditional method Fig. 5. Vector diagram of arbitrary phase-delay method.
for generating virtual orthogonal components is quarter-cycle
delay, whose vector diagram is depicted in Fig. 4.
 x 2  xm cos(sT2 )

 (21)
 x 2  xm sin(sT2 )
It is assumed that the complex vector X, which rotates with
angular frequency of the grid ωs and the amplitude of xm, 
coincides with α axis at the initial time. Thus, X could be Similarly, at the time T1
depicted as
 x 1  xm cos(sT1 )

X  xm e jst  x  jx (19)  (22)
 x 1  xm sin(sT1 )

where xα=xmcos(ωst) is the original component of single
phase system, xβ=xmsin(ωst) is the virtual quadrature phase The relationship between the two time moments is
component, which could be rewritten as T2=T1+ΔT. Substituting it into the equation (21) and according
to the trigonometric formula. The following expression is
x  xm sin s t   xm cos s t   / 2  (20) deduced as
The phase of xβ delays π/2 compared to xα, which is so  x 2  xm cos[s (T1  T )]
called the quarter-cycle delay. When implemented in a digital 
  xm [cos(sT1 ) cos(s T )  sin(sT1 )sin(s T )]
controller, the angle of space vector between X1 at time T1 
and X2 at time T2 is π/2 rad. According to the geometrical  x 2  xm sin[s (T1  T )]
relation, xβ2 equals to xα1 as shown in Fig. 4. Therefore, the   xm [sin(sT1 ) cos(s T )  cos(sT1 )sin(s T )] (23)
digital controller needs to store the data of x for more than 1/4 
cycle, which will result in long response time. When the Substituting (22) into (23), formula (23) could be
original signal changes, the virtual quadrature signal needs to simplified as
track the new signal for 1/4 cycle at least.
To shorten the response time, this paper proposes a  x 2  x 1 cos(s T )  x 1 sin(s T )

 (24)
 x 2  x 1 cos(s T )  x 1 sin(s T )
quadrature vector reconstruction method with reduced phase

shift. As shown in Fig. 5, the vector is located at X1 at timeT1,
after a time span of ΔT, vector at time T2 is located at X2. Then, xβ1 can be eliminated and xβ2 can be obtained as
Then, the virtual orthogonal component xβ2 at T2 can be follows
obtained from xα2, xα1 and time span ΔT.
x 1  x 2 cos(s T )
As illustrated in Fig. 5, at T2, xα2 and xβ2 can be expressed x 2  (25)
as sin(s T )

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where ΔT refers to delay time of the proposed algorithm.
When ωsΔT=π/2, Substituting it into equation (25) yields
xβ2=xα1. That is the quarter-cycle delay. When implemented in
digital controller, ΔT can be expressed as
T  KTs
where K is the number of delayed control cycles, Ts is the
sampling period of the controller. When K=1, ΔT can be set to
one control sampling period, that is ΔT=Ts. The response
speed of the proposed algorithm is fast as the first-order
differentiating algorithm and there is no calculation error
when calculating the quadrature signal. Therefore, the
proposed algorithm does not increase the computational
burden and benefits to the implementation of the digital
controller. Moreover, the proposed algorithm, which is
characterized by remarkable response speed and high accuracy,
overcomes the shortcomings of the quarter-cycle delay
algorithm and the first order differential method.
B. Analysis of Anti-interference Ability for the Proposed
Method
As stated above, when the angle frequency of sinusoidal
physical quantity is the rated frequency ωs, the orthogonal
signal can be calculated fast and precisely via the proposed
arbitrary phase-delay OSG method. However, when the signal
contains harmonic or the noise with the non-rated angle
frequency, the amplitude of these undesired signals will be
increased or attenuated by the proposed arbitrary phase-delay
OSG. Therefore, the anti-interference ability of the proposed
algorithm can be explained by the frequency response
characteristics of the discrete system.
Equation (25) could be transformed from discrete time
domain to Z domain, as shown in (27)
x1 ( z )  x 2 ( z ) cos(s T )
x 2 ( z ) 
sin(s T )
The time interval between xα2 and xα1 is ΔT, which
indicates that xα1 lags xα2 K sampling periods according to(26).
Then, based on the basic properties of Z transform, it can be
derived that
x 1 ( z )  z  K xa 2 ( z )
Substituting (28) into (27), the discrete transfer function of
the proposed arbitrary phase-delay OSG is derived as
x 2 ( z ) z  K  cos(s T )
G( z)   (29)
x 2 ( z ) sin(s T )
In order to draw its Bode diagram, the (29)can be
transformed into continuous domain. According to z=esT,
e sT  cos(s T )
G(s) 
sin(s T )
The Bode diagram of (30) is thus shown as Fig. 6.
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4
2
Magnitude(dB)
(26)
0
-2
-4
1 10 100 103
Frequency(Hz)
Fig. 6. Bode diagram of arbitrary phase-delay OSG.
It can be seen from the Fig.6 that the proposed algorithm
can attenuate some frequency signals and amplify others. This
feature will vary with different delay phase. Therefore, if there
exists specific-order harmonics in the signal, the proposed
OSG can attenuate the harmonics by choosing the appropriate
delay phase.
In order to evaluate the amplification characteristics of
noise or harmonics in the proposed OSG under the worst
conditions. Only the amplification of OSG for harmonic or
noise from OSG is considered below.
For the system described by the transfer function(30), the
amplitude frequency characteristic can be obtained as:
e jT  cos(s T )
G s s  j 
sin(s T )
e jT  cos(s T )
 (31)
(27) sin(s T )
1  cos(s T )
 A
sin(s T )
where A denotes the maximum amplification factor of the
proposed algorithm. The value of phase ωsΔT is in the range
of 0~90°, so that sin(ωsΔT) and cos(ωsΔT) in (31) are both
(28)
positive.
According to (31), the noise in the single phase sinusoidal
signal will be amplified with the coefficient A by proposed
OSG algorithm in the worst condition. The maximum noise
amplification factor A is linked to ωsΔT and the relationship is
shown in Fig. 7. After time domain analysis and simulation
tests, the relationship between the response time and the delay
phase of the proposed algorithm is also shown in Fig.7. When
the delay phase is within 15 degrees, the noise amplification is
more serious. With the increase of the delay phase, the noise
(30) amplification factor will be significantly reduced. So, in the
actual application, the appropriate phase delay can be selected
according to the concrete requirements of the operating
environment so that the noise can be limited to the acceptable
range. On the other hand, the response time increases linearly
with the increase of delay phase. Therefore, we must
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50 5
Noise amplification factor
Noise amplification factor 0

Response time /ms

40 4

30 3

Magnitude(dB)
response time
2
-20
20

10 1

0 0 -40
0 10 20 30 40 50 60 70 80 90
Delay phase/(°)

Fig. 7. Noise amplification factor and response time versus delay phase.
-60
1 10 100 103
Frequency(Hz)
compromise between the time of noise suppression and
response speed. In order to ensure the control effect, the Fig. 8. Bode diagram of second order notch filter.
sampled signals are filtered before sent to the controller,
which greatly reduces the influence of the arbitrarily phase 0.08
delay algorithm on the signal noise amplification. Therefore,
the delayed phase can be selected around 30 degrees or larger

Response time/s
0.06
in engineering applications, which can meet the requirements
in most occasions. The maximum noise amplification factor is
0.04
below 4, and the response time is fastest within 2ms under this
condition.
0.02
C. Dynamic Response Comparison and Analysis of Three
OSG Algorithms 0
In this section, two kinds of general OSG algorithms, 0 1 2 3 4 5
γ
notch filter and SOGI algorithm, are analyzed and compared
with the proposed algorithm. Fig. 9. Variation of response time versus γ in notch filter

The dynamic response time of an arbitrary phase delay

algorithm is shown in Fig. 7, where the response time is The Bode diagram of notch filter is shown as Fig. 8,where
within 5ms. And the maximum response time is 5ms when the the notch filter can only effectively filter out the second
delay phase is 90 degrees, which is the 1/4 periodic delay. In harmonic component. However, it should also be noted that
Fig. 6 and Fig. 7, the proper choice of delay phase angle will in order to ensure the dynamic response speed, the cut-off
not significantly increase or decrease the gain of the original frequency of the current loop should be much greater than
loop, thus having less impact on the original loop 100Hz. However, the enormous gain attenuation of notch
1) Notch Filter Method: The basic principle of generating filter will make the system loop gain traverse 0dB around 100
quadrature signal by filtering is setting up the virtual Hz. Therefore, the dynamic response performance of the
quadrature signal xβ=0 and then carrying on the coordinate system will be affected.
transformation. But in this way, the signal in the dq coordinate As for the damping ratio 1/(2γ), when the filter
system contains second harmonic components. So it is frequency ωf is determined, the response time of the filter is
necessary to use low pass filter or notch filter to filter the determined by the parameter γ. After time domain analysis
second harmonic to obtain the DC component [33]. A and simulation tests, the relationship between the filter
common second order notch filter is used, whose continuous response time and the quality factor is shown in Fig.9. When
transfer function is given as follow: γ=0.64, the shortest response time about 7.47ms could be
achieved. Considering the general engineering optimum
s 2  f2 damping ratio, which means γ=0.707, the response time of
GBSF ( s)  (32)
s  f  s  f2
2
the filter is about 11.3ms.
2) SOGI: With a input signal x, the output signal of SOGI
where f is the filter frequency and  is the quality factor. is xα and xβ, which represent the filtered signal of the input
According to the transfer function, the second order notch signal and the quadrature signal of the input signal,
filter can be regarded as a typical two level standardization respectively. Only orthogonal signal components xβ are
system. Its natural frequency is the system filter frequency f, considered here.
which is two times of the power frequency50 Hz The closed-loop transfer function of the quadrature signal
f  2π  100rad s (33) generator based on SOGI structure can be expressed as [30].
k02
GSOGI  s   2 (34)
s  k0 s  02

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TABLE I
0 COMPARISON OF THREE OSG ALGORITHMS
OSG Arbitrary phase-delay Notch filter SOGI
Response
≤5 ≥7.47 ≥11.5
Magnitude(dB)

-20 time (ms)

Filtering
Weak Weak Strong
capability
Impact on loop Little A little Great
-40

Power Stage

-60
1 10 100 103
Frequency(Hz)

Fig. 10. Bode diagram of second-order generalized integrator.

is
us Control Stage
0.25 PWM
OSG
isβ isα uab*
0.2 SOGI- ωst
αβ /dq dq/αβ
Response time/s

PLL
0.15 ud uq
id iq
um P P*
P=umid
0.1 Q DPC
Q=-iqum
Q*
0.05

0 Fig. 12. Schematic of the single-phase active rectifier together with the
0 1 2 3 4 5
k associated control blocks.

Fig. 11. Variation of response time versus k in SOGI

where ω0 represents the resonant frequency, which is the
power frequency, 50Hz in this formula. The parameter k
affects the bandwidth and response time of the closed-loop
system.
The Bode diagram of SOGI is shown as Fig. 10, where
SOGI can not only generate orthogonal signals, but also work
as a low-pass filter. Furthermore, SOGI needs to get
orthogonal signals at 50Hz, where the gain is 0dB, so the
bandwidth of SOGI is very small. SOGI also limits the
bandwidth of the control loop similarly to the notch filter. In
addition, it should be noted that the gain of SOGI in low
frequency band is not zero, which means that SOGI will
amplify DC component and low harmonic to some extent.
These problems will have a bad effect on the performance of
the control system.
The response time of SOGI is mainly determined by the k
in (34) [31]. The relation between the response time and the
gain k is shown in Fig.11, where the response time of SOGI
decreases first and then increases with the increase of k. The
minimum response time located around the k value of 1.56.
The minimum response time for SOGI is about 11.5ms.
In summary, the response time, filter capacity and the
influence on the control loop of the 3 OSG algorithms are
analyzed and the compared results are shown in Table I. It
can be seen that the proposed arbitrary phase delay OSG
algorithm has the fastest response and minimum impact on
control loop among them. So, the proposed method has
obvious advantages in the system without much noise but
requiring fast response.
IV. SIMULATION AND HIL EXPERIMENTAL TEST
In order to verify the effectiveness of the proposed
arbitrary phase-delay OSG algorithm, computer simulation
and hardware-in-the-loop experimental (HIL) tests are
implemented. The proposed algorithm is applied to the DPC
system for single phase rectifier, which is shown in Fig. 12. It
is noted that OSG is applied to the calculation of single-phase
current quadrature components isβ. A SOGI-based
phase-locked loop (SOGI-PLL) [31] is implemented for the
synchronization with the single-phase grid to provide phase
angle ωst to the dq-αβ or dq-αβ coordinate transformation,
which can calculate the grid voltage amplitude at the same
time. The structure of DPC is shown in Fig. 3. After dq-αβ
coordinate transformation, the output signal of the DPC is
transferred to a PWM in order to generate the switching
signals of the rectifier. The controller is implemented in the
per-unit system. The main system parameters are listed in
Table II.
A. Simulation Results
Fig. 13 shows the waveforms of the main voltage and the
line current in the predictive DPC method with power
calculation by using the any phase delay scheme (with 45
degrees) under the sudden change of power demand. The
voltage and current of the grid are the same in frequency and
phase. Simulink results show that the proposed algorithm can
achieve the unity power factor control. At the same time, the
current can smoothly transit to a new steady state without
fluctuation during variations of the reference active power
value from 1200kW to 1800kW at t=0.395s.
In order to assess the power calculation performance of

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TABLE II. SIMULATION AND EXPERIMENTAL SYSTEM PARAMETERS TABLE III. STEADY STATE PERFORMANCE OF DIFFERENT PHASE
DELAY ANGLE
Parameters Value
Steady state fluctuation
Nominal power P/kW 1200 Phase delay
THD (%) Active power Reactive power
degree (°)
(KW) (kvar)
Grid voltage ampltiude um/V 2200
0 2.27 22426.8 18949.92
Grid frequency fg/Hz 50 15 1.31 581.46 521.4
30 1.31 297.0 281.16
Grid filter inductance L/mH 2.2 45 1.30 190.96 176
60 1.32 163.68 159.72
Buffer capacitor Cd/mF 3 75 1.31 148.5 129.36.
90 1.36 124.74 110.88
Resonant filter inductance Lf/mH 0.84
Resonant filter capacitorCf /mF 3
TABLE IV. DYNAMIC PERFORMANCE OF DIFFERENT PHASE DELAY
The rated load RL/Ω 7.5 ANGLE
PWM frequency fp/kHz 2.5 Response time(ms)
Phase delay Power overshoot
Active Reactive
Sampling and control frequency(Simulink) Ts/kHz 100 degree (°) (kvar)
power power
Sampling and control frequency(DSP) Ts/kHz 25 0 \ \ \
15 66.66 1.0 1.0
30 114.8 1.9 2
45 153.78 2.6 2.6
3 60 205.92 3.6 3.5
Voltage(kV) , Current(kA)

us
75 257.4 4.2 4.2
2
90 353.1 5.0 5.3
1
is
0
clear that when the phase delay angle is too small, there is a
-1 very high noise in the power signal, which may affect the
-2 normal operation of the system. From 15 degrees to 90
-3 degrees, the THD value of grid current in steady state
0.36 0.38 0.40 0.42 0.44 remains at the same level, not affected by the change of the
Time(s) delayed phase. With the increasing phase delay, the power
Fig. 13. Simlink results in the predictive DPC with power calculation fluctuation in steady-state decreases and the response time of
by using the 45-degree phase delay scheme. power tracking increases. In industrial application,
appropriate phase delay can be selected according to the
specific situation to restrict noise amplification into an
acceptable range. Considering both noise reduction and
dynamic response speed, the 45-degree phase delay algorithm
is adopted for the following experiments.
B. Experimental Results
In order to further assess the power calculation
performance of the proposed OSG algorithm, a comparison
between arbitrary phase-delay OSG algorithms and other
common OSG algorithm is conducted in
hardware-in-the-loop experimental tests. The experimental
hardware prototype platform is shown in Fig. 15, which
mainly comprises a digital signal processor (DSP)
TMS320F28335, an RT-LAB real-time simulator from
OPAT-RT company, an oscilloscope for displaying signal
waveform and a computer as control interface. The control
module shown in Fig. 12 is implemented in the DSP and the
power circuit runs in the RT-LAB real-time simulator.
Fig. 14. Power calculation performance of different degrees phase
delay in the condition of power step change (Power:500kW/div;
Through the simulation results above, the conclusion can
time:10ms/div). be drawn that the arbitrary phase delay algorithm performs
better in the harmonic noise suppression and the speed of
the proposed OSG algorithm, the step changes of the response at 45 degree phase delay. So that the 45-degree
reference power are tested for any phase delay schemes with phase delay is selected in the dynamic performance test of the
different degree phase delay in Fig. 14, Table III and Table arbitrary phase delay OSG algorithm. SOGI and notch filter
IV show the respective results. At the instant t=0.395s, the were also tested to compare with the proposed algorithm. The
reference active power steps from 1200kW to 1500 kW. It is power mutation occurs at the moment when the current

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TABLE V. RESPONSE TIME FOR THREE POWER CALCULATION

DSP Oscilloscope
SCHEMES UNDER POWER DEMAND SUDDEN CHANGE
Host computer TMS320F28335
Crosslink
EThernet Analog Digital Signal algorithms Phase delay BPF SOGI
Cable Signal PWM
Steady state P(kW) 462.0 478.5 283.25
OP 5300
fluctuation Q(kvar) 489.5 517 302.5
CPU Digital to OP 5353 OP 5354
Core i7 Digital in Digital out response time/ms 4.3 8.4 10.8
Analog
computing time /μs 10.2 10.3 10.9
PCI-E Bus

us is Harmonic injection

Virtual controlled object P

OP5600 Real-Time Simulator

Fig. 15. Hardware-in-the-loop experiment system

Q

us
is
(a) Fifth harmonic injection

us is Harmonic injection
P
Q

Δts1
(a) P
us
is
Q

P
Q (b) Third harmonic injection
Δts2 Fig. 17. Experimental results of 45°- Phase-delay OSG algorithms
(b) with harmonic in main voltage. (us: 2.2kV/div; is: 6kA/div; P:
us 2250kW/div; Q: 2250kvar/div; time: 20ms/div).
is

arbitrary phase delay OSG algorithm with 45-degree phase. It

P for these three control schemes. When the reference active
Q
Δts3
(c)
Fig. 16. Power calculation performance of three schemes in the
condition of power step change (a) SOGI, (b) BPF and (c) arbitrary phase
delay (45-degree). (us: 2.2kV/div; is: 6kA/div; P: 2250kW/div; Q:
2250kvar/div; time: 20ms/div).
across through zero.
Fig.16 shows the experimental waveforms of active
power P, reactive power Q, gird voltage us and the line
current is of three OSG schemes in steady state and transient
state with the reference active power steps from 1200kW to
2400 kW. Fig.16 (a) and (b) show the results of the DPC
using the OSG algorithm based on SOGI and notch filter
respectively. Fig.16(c) show the results of the DPC using the
can be seen from Fig.16 that the line currents are drawn to be
sinusoidal in phase with the main voltages in the steady state
power steps from 1200kW to 2400 kW, the power calculation
based on SOGI and notch filter need more time to track new
reference value of active power compared with 45-degree
phase-delay OSG algorithm even with their optimum
parameters. And there are some overshoots of power
component in transient state for OSG algorithms based on
SOGI and notch filter. While there is no obvious overshoot in
45-degree Phase-delay OSG algorithm.
The performance of these three OSG algorithms in
hardware in the loop test is shown in Table V. From the
experimental results and analysis of Fig. 16 and Table V, the
arbitrary phase delay algorithm has better performance
comprehensively among them with optimal dynamic
performance, moderate steady state performance, and simple
algorithm.
In order to verify the performance of the proposed method

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under the condition of distorted main voltage, corresponding
experimental test has been done. Fig. 17 shows experimental
waveforms of line current and grid voltage. The main voltage
includes 10% of the fifth harmonic in Fig.17 (a) and 10% of
the third harmonics in Fig.17 (b). The waveform of the line
current, the active power and reactive power could operate
regularly and are not affected by the grid voltage even with
the harmonic. Therefore, the arbitrary phase delay OSG
algorithm can maintain the normal operation of rectifier
under the condition of harmonic voltage disturbance.
V. CONCLUSION
In this paper, a single-phase power calculation scheme for
DPC based on arbitrary phase-delay method has been
analyzed and developed for the single-phase rectifiers, which
are applied in the railway traction drive system. An arbitrary
phase-delay OSG algorithm based on the single-phase
complex vector is proposed to achieve the fast calculation of
the instantaneous power in single-phase system. The power
can be precisely calculated within 0.25 grid cycles, and the
set of the delay phase is flexible. Smaller phase delay could
result in faster response. Furthermore, compared with other
common OSG algorithms, such as SOGI, notch filter,
quarter-cycle delay method, the response speed of the
developed algorithm is significantly faster. The accuracy and
efficiency of the proposed algorithm has been verified by
both Simulation and experimental results.
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[27] D. Dong et al., "Modes of operation and system-level control of Keteng Jiang (S’17) received the B.S. degree in
single-phase bidirectional PWM converter for microgrid systems," in Electrical Engineering from Southwest Jiaotong
IEEE Trans. on Smart Grid, vol. 3, no. 1, pp. 93-104, Mar. 2012. University, Chengdu, China, in 2016. She is
[28] J. Matas, M. Castilla, J. Miret, L. García de Vicuña and R. Guzman, currently working toward the M.S. degree in
"An adaptive prefiltering method to improve the speed/accuracy electrical engineering with the School of Electrical
tradeoff of voltage sequence detection methods under adverse grid Engineering, Southwest Jiaotong University,
conditions," in IEEE Trans. Power Electron., vol. 61, no. 5, pp. Chengdu, China. Her research interest focuses on the
2139-2151, May 2014. stability analysis of electric multiple units and
[29] H. Hu, H. Tao, F. Blaabjerg, X. Wang, Z. He and S. Gao, traction in high-speed railway.
"Train–network interactions and stability evaluation in high-speed
railways–Part I: phenomena and modeling," in IEEE Trans. Power
Electron., vol. 33, no. 6, pp. 4627-4642, June 2018.
Xinglai Ge (M’15) received the B.S., M.S., and
[30] Z. Xin, X. Wang, Z. Qin, M. Lu, P. C. Loh and F. Blaabjerg, "An
Ph.D. degrees in electrical engineering from
improved second-order generalized integrator based quadrature signal
Southwest Jiaotong University, Chengdu, China, in
generator," in IEEE Trans. Power Electron., vol. 31, no. 12, pp.
2001, 2004, and 2010, respectively. He is currently a
8068-8073, Dec. 2016.
Full Professor in the School of Electrical
[31] A. Kulkarni and V. John, "A novel design method for SOGI-PLL for Engineering, Southwest Jiaotong University and a
minimum settling time and low unit vector distortion," in IECON 2013 Vice Director of Department of Power Electronics
- 39th Annual Conference of the IEEE Industrial Electronics Society, and Power Drive.
Vienna, 2013, pp. 274-279. From July to August of 2012, he was a visiting
[32] H. Akagi, Y. Kanazawa and A. Nabae, "Instantaneous reactive power scholar at George Mason University, VA, USA. From October 2013 to
compensators comprising switching devices without energy storage October 2014, he was a visiting scholar at the School of Electrical and
components," in IEEE Trans. Ind. Appl., vol. IA-20, no. 3, pp. 625-630, Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA.
May 1984. He is the author and co-author of more than 60 technical papers
[33] J. Salaet, S. Alepuz, A. Gilabert, and J. Bordonau, “Comparison His research interests include stability analysis and control of electrical
between two methods of DQ transformation for single phase converters traction system, fault diagnosis and hardware-in-the-loop simulation of
control. Application to a 3-level boost rectifier,” in Proc. IEEE 35th traction converter and motor drive system.
Annu. Power Electron. Spec. Conf., 2004, pp. 214–220.
Junpeng Ma was born in Dandong, Liaoning. He
received the B.S. degree and the Ph.D. degree from
Southwest Jiaotong University in 2013 and 2018,
Chengxiang Zhang (S’17) received the B.S. and
respectively. He was as a guest Ph.D. student at
M.S. degrees in electrical engineering from
Aalborg University during Nov. 2017 to May 2018.
Southwest Jiaotong University, Chengdu, China, in
Now, He is an associate research fellow in Sichuan
2015 and 2018, respectively. He is currently working
University, Chengdu, Sichuan, China.
toward the Ph.D. degree in electrical engineer at
Nanjing University of Aeronautics and Astronautics, His research topics include the modeling and
Nanjing, China. control of grid-connected multilevel converters
applied in the traction drive system, the new energy
His research interests include digital control and field, and the HVDC system
stability analysis of power converters in railway
traction applications and hardware-in-the-loop sim-
ulation of traction converter.

Siru Yu (S’17) received the B.S. degree in

Electrical Engineering in 2017 from Southwest
Jiaotong University, Chengdu, China, where he is
currently working toward the M.S. degree in
electrical engineering.
His research interest focuses on the harmonic
modeling and stability analysis of traction converter
in high-speed trains.

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