Table content

Isolated i/o..............................................................................................2

Memory mapped ....................................................................................3

Differences between memory mapped I/O and isolated I/O................4

Advantages and disadvantages Memory-Mapped I/O, Isolated I/O.....5

Applications of Isolated I/O and Memory-mapped I/O..........................6

8255 PPI (programmable peripheral interface).......................................7

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Isolated I/O
In the isolated I/O configurations, the CPU has definite input and output instructions, and each of
these instructions is related to the address of an interface register. When the CPU fetches and
decodes the operation code of an input or output instruction, it locates the address related to the
instruction into the common address lines.
Simultaneously, it enables the I/O read (for input) or I/O write (for output) control line. This
instructs the external elements that are connected to the common bus that the address in the
address lines is for an interface register and not for a memory word.
In other term, when the CPU is fetching an instruction or an operand from memory, it locates the
memory address on the address lines and enables the memory read or memory write control line.
This instructs the external elements that the address is for a memory word and not for an I/O
interface.
The isolated I/O method isolates memory and I/O addresses so that memory address values are
not concerned by interface address assignment because each has its own address space. The other
method is to use a similar address space for both memory and I/O.
This is the case in computers that use only one set of read and write signals and do not
differentiate between memory and I/O addresses. This configuration is defined as memory-
mapped I/O. The computer considers an interface register as being a component of the memory
system. The assigned addresses for interface registers cannot be used for memory words, which
lower the memory address range available.

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Memory-Mapped I/O
In a memory-mapped I/O organization there are no definite input or output instructions. The
CPU can handle I/O data occupying in interface registers with similar instructions that are used
to handle memory words. Each interface is arranged as a set of registers that counter to read and
write requests in the regular address space.
Usually, a segment of the total address space is constrained for interface registers, but mainly,
they can be based at any address considering there is not also a memory word that returns to the
equal address. Computers with memory-mapped l/O can employ memory-type instructions to
approach I/O data. It enables the computer to use similar instructions for either input-output
transfers or memory transfers.
The benefit is that the load and store instructions used for reading and writing from memory can
be used to input and output data from I/O registers. In a usual computer, there are extra memory-
reference instructions than I/O instructions. With memory-mapped I/O all instructions that define
memory are also accessible for I/O.

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Differences between memory mapped I/O and isolated I/O
Isolated I/O Memory Mapped I/O
Memory and I/O have separate address space Both have same address space
All address can be used by the memory Due to addition of I/O addressable memory
become less for memory
Separate instruction control read and write Same instructions can control both I/O and
operation in I/O and Memory Memory
In this I/O address are called ports. Normal memory address are for both
More efficient due to separate buses Lesser efficient
Larger in size due to more buses Smaller in size
It is complex due to separate logic is used to Simpler logic is used as I/O is also treated as
control both. memory only.

Advantages and disadvantages Memory-Mapped I/O, Isolated I/O

Advantages of Memory-Mapped I/O

 Faster I/O Operations: Memory-mapped I/O allows the CPU to access I/O devices at the
same speed as it accesses memory. This means that I/O operations can be performed
much faster compared to isolated I/O.
 Simplified Programming: Memory-mapped I/O simplifies programming as the same
instructions can be used to access memory and I/O devices. This means that software
developers do not have to use specialized I/O instructions, which can reduce
programming complexity.
 Efficient Use of Memory Space: Memory-mapped I/O is more memory-efficient as I/O
devices share the same address space as the memory. This means that the same memory
address space can be used to access both memory and I/O devices.
Disadvantages of Memory-Mapped I/O

 Limited I/O Address Space: Memory-mapped I/O limits the I/O address space as I/O
devices share the same address space as the memory. This means that there may not be
enough address space available to address all I/O devices.
 Slower Response Time: If an I/O device is slow to respond, it can delay the CPU’s access
to memory. This can lead to slower overall system performance.

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Advantages of Isolated I/O

 Large I/O Address Space: Isolated I/O allows for a larger I/O address space compared to
memory-mapped I/O as I/O devices have their own separate address space.
 Greater Flexibility: Isolated I/O provides greater flexibility as I/O devices can be added
or removed from the system without affecting the memory address space.
 Improved Reliability: Isolated I/O provides better reliability as I/O devices do not share
the same address space as the memory. This means that if an I/O device fails, it does not
affect the memory or other I/O devices.
Disadvantages of Isolated I/O

 Slower I/O Operations: Isolated I/O can result in slower I/O operations compared to
memory-mapped I/O as it requires the use of specialized I/O instructions.
 More Complex Programming: Isolated I/O requires specialized I/O instructions, which
can lead to more complex programming.

Applications of Isolated I/O and Memory-mapped I/O

Memory-mapped I/O applications
Graphics processing: Memory-mapped I/O is often used in graphics cards to provide fast access
to frame buffers and control registers. The graphics data is mapped directly to memory, allowing
the CPU to read from and write to the graphics card as if it were accessing regular memory.
Network communication: Network interface cards (NICs) often utilize memory-mapped I/O to
transfer data between the network and the system memory. The NIC registers are mapped to
specific memory addresses, enabling efficient data transfer and control over network operations.
Direct memory access (DMA): DMA controllers employ memory-mapped I/O to facilitate high-
speed data transfers between devices and system memory without CPU intervention. By
mapping the DMA controller registers to memory, data can be transferred directly between
devices and memory, reducing CPU overhead.
Isolated I/O applications
Embedded systems: Isolated I/O is commonly used in embedded systems where strict isolation
between the CPU and peripherals is necessary. This includes applications such as industrial
control systems, robotics, and automotive electronics. Isolation ensures that any faults or
malfunctions in peripheral devices do not affect the stability of the entire system.
Microcontrollers: Microcontrollers often rely on isolated I/O to interface with various
peripherals, such as sensors, actuators, and displays. Each peripheral is assigned a separate I/O
port, allowing the microcontroller to control and communicate with multiple devices
independently.

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Real-time systems: Isolated I/O is preferred in real-time systems that require precise timing and
deterministic behavior. By isolating the I/O operations, these systems can maintain strict control
over the timing and synchronization of external events, ensuring reliable and predictable
performance.

8255 PPI (programmable peripheral interface)

8255 is a general purpose programmable I/O device designed to interface the CPU with its
outside world such as ADC, DAC, keyboard etc. We can program it according to the given
condition. It can be used with almost any microprocessor.
 The 8255 PPI is a programmable peripheral interface device.
 It is a general-purpose programmable parallel I/O device.
 It contains 3 I/O ports which can be programmed in different modes.
 To program the function to all three I/O ports contains a register called control registers.
The control register defines the function of each I/O port and in which mode they should
operate.
 It is a programmable parallel I/O device.
 It contains 24 programmable I/O pins arranged as 2-8 bit ports and 2-4 bit ports.
 It has 3, 8-bit ports: Port A, Port B, and Port C, which are arranged in two groups of 12
pins.
 Fully compatible with Intel microprocessor families.
 Direct bit set/reset capability is available for port C.
 Improved DC driving capability.
 It can operate in Modes:
 BSR Mode – When MSB of the control register is zero (0), 8255 works in Bit
Set-Reset mode.in this only PC bit are used for set and reset.
 I/O Mode – When MSB of the control register is one (1), 8255 works in Input-
Output mode.it is further divided into three categories.
 Mode 0: Simple I/O In this mode all three ports (PA, PB, PC) can work as
simple input function or output function also in this mode there is no interrupt
handling capabilities.
 Mode 1: Strobed I/O In this either port A or port B can work and port C bits are
used as Handshake signal before actual data transmission plus it has interrupt
handling capabilities.
 Mode 2: Strobed bi-directional I/O In this only port A works and port B can
work either in Mode 0 or Mode 1 and the 6 bits of port C are used as Handshake
signal plus it also has to interrupt handling capability.

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 PA0-PA7 I/O Port A pins

PB0-PB7 I/O Port B pins

PC0-PC7 I/O Post C pins

D0-D7 I/O Data pins

RESET I Reset input

‾RD I Read input

‾WR I Write input

A0-A1 I Address pins

‾CS I Chip select

VCC-GND I +5 V supply ground

Symbol Name Function

D0-D7 Data Bus These are 8-bit bi-directional data bus lines, connected to the system data bus for data transfer
between CPU and 8255.

‾CS Chip These are input, active HIGH address lines used to distinguish different ports of 8255 such as
select Port A, Port B, Port C, and Control register.

‾RD Read This is an active low input signal used in coordination with another signal to send data to the
CPU through data lines.

‾WR Wait This is an active low input signal used in coordination with another signal to send data to 8255.

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A0-A1 Address These are input, active HIGH address lines used to distinguish different ports of 8255 such as
lines Port A, Port B, Port C, Control register.

RESET Reset This is an active HIGH input signal used to reset 8255. When 8255 is reset, it clears the control
word register and all ports are set to input mode.

PA0-PA7 Port A These are 8-bit bidirectional I/O pins used to send data to the peripheral or to read data from the
pins 0 to peripheral. The contents are transferred to/from Port A.
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PB0-PB7 Port B These are 8-bit bidirectional I/O pins used the same as PA0-PA7
pins 0 to
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PC0-PC7 Port C These are 8-bit bidirectional I/O pins. These lines are divided into 2 sections i.e. PC 0-PC3 and
pins 0 to PC4-PC7. These two sections can be individually used to transfer 4 bits of data from two
7 separate port C sections.