Course Objectives:

 To analyze and design combinational circuits.

 To analyze and design sequential circuits
 To understand the basic structure and operation of a digital computer.
 To study the design of data path unit, control unit for processor and to familiarize with the
hazards.
 To understand the concept of various memories and I/O interfacing
Course Outcomes:

CO1 : Design various combinational digital circuits using logic gates

CO2 : Design sequential circuits and analyze the design procedures
CO3 : State the fundamentals of computer systems and analyze the execution of an instruction
CO4 : Analyze different types of control design and identify hazards
CO5 : Identify the characteristics of various memory systems and I/O communication
Course Outcomes and Program Outcomes Mapping

CO PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12

CO1 3 3 3 - - - - - - - - -
CO2 3 3 3 - - - - - - - - -
CO3 3 3 3 - - - - - - - - -
CO4 3 3 3 - - - - - - - - -
CO5 3 3 3 - - - - - - - - -

Theory Classes:

UNIT –I COMBINATIONAL LOGIC

Propo Actual Delive
S.N Perio Topics to be covered sed Date ry Refere Remar
o d Date Metho nce ks
d
1 1 Combinatiional circuits C&T Syllabus
T1
2 1 Karnaugh Map,Problems C&T

3 1 Analysis Procedure C&T T1

 4 1 Design Procedure C&T
T1

5 1 BinaryAdder,Subtractor C&T
T1

6 1
DecimalAdder,Magnitude C&T
Comparator T1
Decoder C&T
7 1 T1
Encoder C&T
8 1 T1
Multiplexer C&T
9 1 T1
Demultiplexer C&T T1
10 1

UNIT –II: 8086 SYSTEM BUS STRUCTURE

Delive
Perio Topics to be covered Propo Actual ry Refere Remark
S.No
d sed Date Metho nce s
Date d
13 1 C&T T1
T1
14 1 C&T
T1
15 1  C&T

16 1 C&T
T1

17 1 C&T
T1

18 1 C&T
T1

19 1 C&T
T1

20 1 C&T
T1

21 1 C&T
T1

UNIT –III: I/O INTERFACING

S.N Perio Topics to be covered Remark

o ds Propo Actu Deliver Refere s
sed al y nce
 Date Date Method

T1
C&T

C&T T2

C&T
T2

C&T T1

C&T
T1

C&T T1

C&T T1

C&T T1

C&T T1

C&T

UNIT –IV: MICROCONTROLLER

Propo Actu Deliver Refere

S.N Perio Topics to be covered Remark
sed al y nce
o ds s
Date Date Method
8051 Architecture
32 1 PPT T1
Introduction
T1
33 1 Memory Organization PPT

Special Function
34 1 PPT T1
Register(SFR’s)

35 2 Pin diagram of 8051 and circuits PPT T1

Instruction set of 8051

 Arithmetic Instructions PPT
36 1 T1
 Logical Instruction
Data transfer Instruction
37 1 Instruction set of 8051 PPT
 Boolean Instruction T1
  Program Control
Instruction
 Branching Instruction

38 1 Addressing Modes PPT T1

Programming with 8051

 Addition
39 1  Subtraction PPT T1
 Complement
 Shifting
40 1 Revision PPT

UNIT –V: INTERFACING MICROCONTROLLER

Propos Actu Deliver Refere

S.N Peri Topics to be covered
ed Date al y nce Remarks
o ods
Date Method
8051 Programming Timers
41 1  Operating Modes PPT T2
Control Registers
Serial Port Programming
 Serial data Communication
42 1  Modes of operation PPT T2
 Multiprocessor
communication
Interrupt Programming
 Interrupts of 8051
43 1 PPT T1
 Interrupt control Register
Execution of Interrupt

44 1 Keyboard and LCD Interface PPT T1

ADC Interfacing and DAC

45 1 PPT T1
Interfacing

46 1 External Memory Interfacing PPT T2

47 1 Stepper motor Interface PPT T1

48 1 Wave form generations PPT T2

49 1 Revision PPT

Delivery Method: C&T – Chalk and Talk, PPT and Live Demonstration
Along with the above the following activities are also to be planned and included:

Activity Name No. of Activities Details

Per Semester
Assignments 3 8086 Architecture and 8086 Addressing Modes,
Programming with 8051
 Largest from an Array
 Sorting of an Array
Square of a number using look up table Interrupt
handling of 8051
IAT 2 IAT I (Unit 1,2), IAT II (Unit 3,4)
Model Exam 1 All 5 Units

TEXT BOOK:

1. Yu-Cheng Liu, Glenn A.Gibson, “Microcomputer Systems: The 8086 / 8088 Family -
Architecture, Programming and Design”, Second Edition, Prentice Hall of India, 2007.
2. Mohamed Ali Mazidi, Janice GillispieMazidi, RolinMcKinlay, “The 8051 Microcontroller
and Embedded Systems: Using Assembly and C”, Second Edition, Pearson Education,
2011

Prepared by Approved by

Signature
Name
V.Lavanya Dr.D.R Denslin Brabin
Designation
ASSISTANT PROFESSOR HOD
Submitted
Date