Afe77xxd Ti

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AFE7769D, AFE7728D, AFE7768D

SBASAG3 – JULY 2023

AFE77xxD Quad-Channel RF Transceiver With Dual Feedback Paths Integrating


CFR/DPD

1 Features 3 Description
• Quad transmitters based on 0-IF up-conversion The AFE77xxD is a pin-compatible family of high-
architecture: performance, multichannel transceivers, integrating
– Up to 650 MHz (AFE77x8D) / 730 MHz four (AFE7768D/AFE7769D) or two (AFE7728D)
(AFE7769D) of RF transmitted DPD expanded direct up-conversion transmitter chains, four
bandwidth per chain (AFE7768D/AFE7769D) or two (AFE7728D) direct
• Quad receivers based on 0-IF down-conversion down-conversion receiver chains, two wideband RF
architecture: sampling digitizing auxiliary chains (feedback paths)
– Up to 200 MHz (AFE77x8D) / 300 MHz and low-power Digital Pre-Distortion (DPD) engine
(AFE7769D) of RF received bandwidth per for Power Amplifier (PA) linearization. The high
chain dynamic range of the transmitter and receiver chains
• Feedback chain based on direct RF sampling enables wireless base stations to transmit and receive
architecture: 2G, 3G, 4G, and 5G signals. The integrated Crest
– Up to 650 MHz (AFE77x8D) / 730 MHz Factor Reduction (CFR) unit helps reduce the Peak-
(AFE7769D) of RF observed DPD expanded to-Average Ratio (PAR) of the input signal for more
bandwidth efficient transmission through the Power Amplifier.
• Integrated CFR/DPD for PA linearization The integrated hardware accelerated DPD estimator
and corrector provides flexible and efficient DPD
– Up to 200MHz (AFE77x8D) / 300MHz
solution for PA linearization. The integrated DPD
(AFE7769D) instantaneous bandwidth
engine corrects the distortion due to PA nonlinearity
– Up to 650MHz (AFE77x8D) / 730MHz
for signals up to 200MHz (AFE77x8D) / 300MHz
(AFE7769D) DPD expansion bandwidth
(AFE7769D) instanteous bandwidth, and within up
• Integrated CFR/DPD for PA linearization
to 650MHz (AFE77x8D) / 730MHz (AFE7769D) DPD
– Multistage CFR with configurable cancelling expanded bandwidth. A dedicated GaN corrector
pulses addresses the long-term nonlinear memory effects
– Hardware accelerated DPD estimation engine due to charge trapping of GaN PAs.
– Signal Dynamics based corrector for GaN PA
linearization The low power dissipation and high density channel
– Smart data capture integration of the AFE77xxD allow the device to
• RF frequency range: 600 MHz to 6 GHz address the power and size constraints of 4G and
• Four wideband fractional-N PLL, VCO for TX and 5G base stations. The wideband and high dynamic
RX LO range feedback path can assist the DPD of the power
• Dedicated integer-N PLL, VCO for data converters amplifiers in the transmitter chain through smart data
clock generation capture at various intercepting points. The available
• JESD204B and JESD204C SerDes interface 29.5Gbps SerDes speed can help reduce the number
support: of lanes required to transfer the data in and out.
– 4 SerDes transceivers up to 29.5 Gbps Package Information
– 8b/10b and 64b/66b encoding PART NUMBER PACKAGE(1) PACKAGE SIZE(2)
– 16-bit, 12-bit, 24-bit and 32-bit formatting
AFE77xxD ABJ (FCBGA, 400) 17.00 mm × 17.00 mm
– Subclass 1 multi-device synchronization
• Package: 17-mm × 17-mm FCBGA, 0.8-mm pitch (1) For all available packages, see the orderable addendum at
the end of the data sheet.
2 Applications (2) The package size (length × width) is a nominal value and
includes pins, where applicable.
• Macro remote radio unit (RRU)
• Small cell base station
• Active antenna system mMIMO (AAS)
• Distributed Antenna Systems (DAS)
• Repeater

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
AFE7769D, AFE7728D, AFE7768D
SBASAG3 – JULY 2023 www.ti.com

AFE7768D/AFE7769D Block Diagram

VDD1P2RFPLL
VDD1P8RFPLL
VDD1P2RX

VDD1P8RX
VDD1P2FB

VDD1P8FB

VSSRFPLL
VSSRFPLL
RXA_P/N
FB_P/N
VSSFB

VSSFB
DVDD
DGND

VSSRX

VSSRX

RF PLL_3
LO
VDD1P2TX Dist PLL-VCO
VSSTX TX Chain 1
From SPI

From SPI

TXA_P/N DAC
DAC
RF ADC

VDD1P8TX VDDT
VSST
RX Chain 1

VSSTX
From SPI ADC
VDDA
ADC

VSST

SRX4
TX DIG
FB DIG

SYSREF_P/N
RX DIG

Digital Backplane & JESD204C

STX4
TX DIG
PLL- VCO

PLL- VCO
Ref CLK

PLL- VCO

CLK_P/N SRX3
RF PLL_1

RF PLL_2

Controller / Mux
MUX

DC PLL

4x SerDes

VDD1P8RFPLL STX3
VSSRFPLL CFR/
Common Dig
Dist

Dist

Dist
LO

LO

DPD
LO

SRX2
VDD1P2RFPLL
From SPI
VSSRFPLL STX2
TX DIG
RX DIG

VDD1P8DCPLL
FB DIG

VSSDCPLL SRX1

VDD1P2DCPLL TX DIG STX1


VSSDCPLL
SYNC_IN
VDD1P8TX TX Chain 3
RX Chain 3

VSSTX SYNC_OUT
ADC

DAC ADC
TXC_P/N DAC
RF ADC

VDD1P2TX
From SPI

VSSTX From SPI Serd


RX out
MCU
GPIO

GPIOs
From SPI

Cong
RF PLL_4
F_SPI
SPI

LO
Dist
PLL-VCO
RXC_P/N
FB_P/N
DGND

VDD1P2RFPLL
VDD1P2RX

VDD1P8RX
VDD1P2FB

VDD1P8FB

VSSRX
VSSFB

VSSFB
DVDD

VDD1P8RFPLL
VSSRFPLL
VSSRFPLL
VSSRX

AFE7728D Block Diagram

2 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated

Product Folder Links: AFE7769D AFE7728D AFE7768D


AFE7769D, AFE7728D, AFE7768D
www.ti.com SBASAG3 – JULY 2023

Table of Contents
1 Features............................................................................1 6.1 Receiving Notification of Documentation Updates......5
2 Applications..................................................................... 1 6.2 Support Resources..................................................... 5
3 Description.......................................................................1 6.3 Trademarks................................................................. 5
4 Revision History.............................................................. 3 6.4 Electrostatic Discharge Caution..................................5
5 Description (cont.)...........................................................4 6.5 Glossary......................................................................5
6 Device and Documentation Support..............................5 7 Mechanical, Packaging, and Orderable Information.... 5

4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
DATE REVISION NOTES
July 2023 * Initial release.

Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 3

Product Folder Links: AFE7769D AFE7728D AFE7768D


AFE7769D, AFE7728D, AFE7768D
SBASAG3 – JULY 2023 www.ti.com

5 Description (cont.)
Each receiver chain of the AFE77xxD includes a 28-dB range digital step attenuator (DSA), followed by
a wideband passive IQ demodulator, and a baseband amplifier with integrated antialiasing low pass filters
with programmable bandwidth, driving continuous-time sigma-delta ADCs. The RX chain can receive an
instantaneous bandwidth (IBW) up to 200 MHz (AFE77x8D) / 300 MHz (AFE7769D). Each receiver channel
has two analog peak power detectors and various digital power detectors to assist an external or internal
autonomous AGC control for receiver channels, and a RF overload detector for device reliability protection. The
integrated QMC (quadrature mismatch compensation) algorithm is capable to continuously monitor and correct
for the RX chain I and Q imbalance mismatch without the need to inject any specific signals or perform offline
calibration.
Each transmitter chain includes two 14-bit, 3.3-Gsps IQ DACs, followed by a programmable reconstruction and
DAC image rejection filter, an IQ modulator driving a wideband RF amplifier with 39-dB range gain control. The
TX chain integrated QMC and LO leakage cancellation algorithms, leveraging the FB path can constantly track
and correct for the TX chain IQ mismatch and LO leakage.
Each FB path is based on RF sampling architecture, and includes an input RF DSA driving a 14-bit, 3.3-Gsps
RF ADC. The direct sampling architecture provides an inherently wideband receiver chain and simplifies the
calibration of the TX chains impairments. The FB path integrates two independent NCOs that allows a fast
switching between two observed RF input bands.
The synthesizer section integrates four fractional-N RF PLLs that can generate four different RF LOs, allowing
the device to support up to two different bands, each one configured as two transmitters, two receivers, and
one feedback path (with AFE7768D/AFE7769D), or one transmitter, one receiver, and one feedback path (with
AFE7728D) .

4 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated

Product Folder Links: AFE7769D AFE7728D AFE7768D


AFE7769D, AFE7728D, AFE7768D
www.ti.com SBASAG3 – JULY 2023

6 Device and Documentation Support


6.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
6.2 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
6.3 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
6.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.

6.5 Glossary
TI Glossary This glossary lists and explains terms, acronyms, and definitions.

7 Mechanical, Packaging, and Orderable Information


The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 5

Product Folder Links: AFE7769D AFE7728D AFE7768D


PACKAGE OPTION ADDENDUM

www.ti.com 30-Jul-2023

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)

AFE7728DIABJ ACTIVE FCBGA ABJ 400 90 RoHS & Green SNAGCU Level-3-260C-168 HR -40 to 85 AFE7728D Samples

AFE7768DIABJ ACTIVE FCBGA ABJ 400 90 RoHS & Green SNAGCU Level-3-260C-168 HR -40 to 85 AFE7768D Samples

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 1
PACKAGE OPTION ADDENDUM

www.ti.com 30-Jul-2023

Addendum-Page 2
PACKAGE MATERIALS INFORMATION

www.ti.com 31-Jul-2023

TRAY

L - Outer tray length without tabs KO -


Outer
tray
height

W-
Outer
tray
width
Text

P1 - Tray unit pocket pitch


CW - Measurement for tray edge (Y direction) to corner pocket center
CL - Measurement for tray edge (X direction) to corner pocket center

Chamfer on Tray corner indicates Pin 1 orientation of packed units.

*All dimensions are nominal


Device Package Package Pins SPQ Unit array Max L (mm) W K0 P1 CL CW
Name Type matrix temperature (mm) (µm) (mm) (mm) (mm)
(°C)
AFE7728DIABJ ABJ FCBGA 400 90 6 x 16 150 315 135.9 7620 19.5 21 19.2
AFE7768DIABJ ABJ FCBGA 400 90 6 x 16 150 315 135.9 7620 19.5 21 19.2

Pack Materials-Page 1
PACKAGE OUTLINE
ABJ0400A SCALE 0.750
FCBGA - 2.65 mm max height
BALL GRID ARRAY

17.2
BALL A1 CORNER A
16.8

17.2
( 16)
16.8

2.65
2.29 (1.4)
0.2 C
C

SEATING PLANE
0.76 NOTE 4
BALL TYP
0.56
0.12 C
0.5
TYP
0.3
15.2 TYP

SYMM
0.8 TYP (0.9) TYP

Y
W
V
U
T
R
P
N 15.2
M SYMM
L TYP
K
J
H
G
0.55 F
400X E
0.45 D
0.15 C A B C
B
0.08 C NOTE 3 A
1 3 5 7 9 11 13 15 17 19
2 4 6 8 10 12 14 16 18 20 0.8 TYP
4221311/D 03/2023

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Dimension is measured at the maximum solder ball diameter, parallel to primary datum C.
4. Primary datum C and seating plane are defined by the spherical crowns of the solder balls.
5. The lids are electrically floating (e.g. not tied to GND).

www.ti.com
EXAMPLE BOARD LAYOUT
ABJ0400A FCBGA - 2.65 mm max height
BALL GRID ARRAY

(0.8) TYP

A 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

(0.8) TYP C
D
E
F
400X ( 0.4) G
H
J
K SYMM
L
M
N
P
R
T
U
V
W
Y

SYMM

LAND PATTERN EXAMPLE


EXPOSED METAL SHOWN
SCALE:6X

( 0.4) 0.025 MAX


METAL 0.025 MIN METAL
UNDER
MASK

SOLDER MASK EXPOSED EXPOSED ( 0.4)


OPENING METAL METAL SOLDER MASK
OPENING
NON-SOLDER MASK SOLDER MASK
DEFINED DEFINED
(PREFERRED)

SOLDER MASK DETAILS


NOT TO SCALE
4221311/D 03/2023
NOTES: (continued)

6. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
For more information, see Texas Instruments literature number SPRU811 (www.ti.com/lit/spru811).

www.ti.com
EXAMPLE STENCIL DESIGN
ABJ0400A FCBGA - 2.65 mm max height
BALL GRID ARRAY

(0.8) TYP ( 0.4) TYP

A 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

(0.8) C
TYP
D
E
F
G
H
J
K SYMM

L
M
N
P
R
T
U
V
W
Y

SYMM

SOLDER PASTE EXAMPLE


BASED ON 0.15 mm THICK STENCIL
SCALE:6X

4221311/D 03/2023

NOTES: (continued)

7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.

www.ti.com
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