f Ch ap ter (3) Introduction to INTEL

X-86 Family
Probable marks : 4
Scop e of the syllabus :-
• - Intro ducti on to adva nced micro proce ssors
utes of the X-86 farn.il
• Intro ducti on to X-86 famil y and study of majo r attrib
proce ssors .
• Prog ramm ing mode l of X-86 famil y of micro proce ssors .

Q. 1 Draw a block diagr am of 8086 and expla in it.

Ans. : .-------------- -------------- ----------
' BJU~ - - -....
1) As show n in the block diagr am, Mem ory
Interfa ce
the 8086 C.P.U. is divid ed into
Contro l Bus
two indep ende nt funct ional parts :
1. Bus•I nterfa ce Unit (B.I.U.)
2. Exec ution Unit (E.U.)
6
2) The B.I.U . funct ional part conta ins
E.S. 5 Instruct ion:
queu e, segm ent regis ters and • c.s. 4 stream
I
I

byte I

instru ction point er. ss 3

queue I

3) Exec ution unit (E.U.) conta ins D.S. 2

IP
flag regist er, gener al purpo se regis ters, ,
stack point er regis ter and other
I
r--- - --- ------ ----··'
point ers, index regis ters.

AH AL
BH BL
CH CL
DH DL
SP
BP
SI
DI
-------------------------------------
Fig. 3.1

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fPS Computer Science - II 3-2 Intro. to INTEL X-86 Family

Q. 2 Explain in brief 8086 architecture.

;\ns,: The 8086 C.P.U. is divided into two independe nt functional parts:
I) Bus Interface Unit (B.I.U.)
II) Execution Unit (E.U.)
Bus Interface Unit (B.I.U.):
J.
The B.1.U. sends address, fetches .instruction from memory,_ reads data from
ports/mem o:y and writes data to ports/mem ory. In other word, B.I.U. handles transfer
of data and address on buses for execution unit. It consists of following parts :
(a) Queue: To speed-up execution of program, B.I.U. fetches 6 instruction bytes ahead
of time from memory and stores them for E.U. in the FIFO register, called queue.
(b) Segment registers : B.I.U. contains following 16-bit segment registers :
i) Extra segment (E.S.)
ii) Code segment (C.S.)
iii) _ Stack segment (S.S.)
iv) Data segment (D$.)
These 16-bit segment registers are used to store 16-bit starting address of memory
segment.
(c) Instruction pointer (I.P.) : The code segm~nt (C.S.) register holds 16-bit starting
address of segment, from which B.I.U. is fetching instruction code bytes. The IP
register holds 16-bit address of next coc.i.e byte within code segment.
II. Execution Unit (E.U.) :
· Execution unit of 8086 tells B.1.U. where t.9 fetch instruction s or data, decodes instruction
and executes them. The following sections describe functional part ~f E.U.:
(a) Flag register: Flag is a flip-flop, which indicate some condition. The 8086 has 16-bit
flag register with 9-active flags.
(b) General purpose registers: 8086 has 8 general purpose registers, labelled AH, AL,
BH, BL, CH, CL, DH and DL. These registers can be used individual ly for
temporary storage of 8-bit data. The AL register is also called as accumulat or.
These registers in certain pairs can be used as 16-bit registers. These pairs are AH
and AL (AX), BH and BL (BX), CH and CL (CX), DH and DL (DX).
(c) Stack pointer : The 8086 allows us to set 64KB of rnernqry as stack. The 16-bit
starting address of stack is stored in stack pointer. ,

Q. 3 Explain any two microproc essors in X-86 family in brief.

OR Explain the following microproc essors in Intel's X-86 family. (Oct. 04; March 18)
Ans.:
I) 8086:
1) 8086 is a 16-bit microproce&sor, introduced by INTEL in 1978.
2) It was designed to be used as C.P.U. in microcomp uter system. It's A.LU., internal
registers can work with 16 binary bits at a time.

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TPS Compute r Science - II · Intro. to INTEL X-8 6 F
~ ,
3) 8086 has 16-bit data bus and 20-bit address bus, so that it can address a ph ~~
w
memory of2 =1048576 =1 M Byte memory locations.
4) The least significa nt 8 bits of address bus are passed on same eight lines as that 01
data bus. This bus is known as multiplex ed bus.
5) In 8086, words are stored in two consecutive bytes. If_ first b_Yte of ~ord has even
address, then 8086 can read it in single operation. Else, it reqmres two operations,
· 6) This processo r supports multiplic ation and division operation s.
7) The 80186 is an improve d version of 8086. In addition to 16-bit C.P.U., it has
program mable peripher al·(I/O) devices integrate d in same package. Instruction set
o{ 80186 is superset of instructio n set of 8086.
II) 80286:
· 1) 80286 is a 16-bit micrqprocessor, introduc ed in 1982. This advanced version of 8086
is specially designed to be used as a C.P.U. in multiuse r/multita sking operating
systems.
2) 80286 has 16-bit data bus and 24-bit address bus~
3) In 1984, IBM introduc ed PC/ AT (Personal Comput er/ Advance d Technology)
version of its PC using 80286.
4) 286 was having real and protected modes of operation. In real mode, the processor
can address only 1 Mbyte of memory, whereas in protected mode it can address
16 Mbytes of memory.
5) Another new feature was the ability to work upto 1 Gbyte of virtual memory and
yet another feature was added hardwar e multitask ing.
6) The program written for 8086 can run on 80286, operating in its real address mode.
III) 80386: w
1) The INTEL's 80386 is a 32-bit microprocessor introduc ed in 1985.
2) . 80386 is a logical extension of 80286. It is more highly pipelined .
3) The instruction set of 80386 is a superset of other members of 8086 family.
4) It has 32-bit data bus and 32-bit nonmulti plexed address bus. It can address a
physical memory of 232 i.e.' 4 Gbytes. The 80386 memory managem ent allows it to
address 246 or 64 Tbytes.
5) The 386 can be operated in one of the following memory managem ent modes :
i) Paged mode
ii) Non-pag ed mode.
6) When oper~ted in pa?ed rn?de, the 386 switches the paging tmit then after t~~
11
segment unit. T~e ?agmg umt allows memory pages of 4 kB each to be swapped
and out from disk. In non-page d mode, memory managem ent unit operates very
similar to the 286. ·
7) Virtual addresse s are represented with selected compone nts and an offsel
compone nt as they are with 80286.

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rP5 CoJTlputer Science - II 3-4 Intro . to INTE L X-86 Fam ily
~
JV) 80486:
6 32 intro duce d in 1989 .
1) Intel's 8048 is a -bit micr opro cess or. It was
2) It has 32-bit addr ess bus and 32-bit data b us.
h contains a fast built-in, a mat h
3) The 486 is basi cally a larg e integ ral circuit whic
.U.), and ,~1-8 kbyt~~cach e mem ory.
coprocessor, a mem ory man agem ent unit (M.M
4) 80486 has DX and SX versions.
ion does not have on chip -num eric
5) All 486 proc esso rs have 32-bit data bus. SX vers
coprocessor.
its faster clock spee ds, inte rnal pipe
6) The 486 achi eves its high spee d oper atio n from
uctio n set com puti ng (RISC) to spee d
line d arch itect ure and the use of redu ced instr
up the inte rnal microcode.
doub le and tripl e clock spee d.
7) 486 also has 486 DX2 and 486 DX4 versions, with
V) Pentium or 80586 : OR
esso r. (Ma r.03 , 2011 , Oct. 04)
Explain the mai n feat ures of a pen tium proc
in 1993.
1) Pent ium is a 64 bit micr opro cess or, intro duce d
The use of supe r scal ar arch itec ture
2) It has 64 bit data bus and 32-bit addr ess bus.
lets the pen tium proc ess mor e than
inco rpor ates a dual -pip e line d processor, whi ch
one instr ucti on per clock cycle.
chip is also a feat ure desi gned to
3) The addi tion both of data and code caches on
imp rove proc essi ng spee d.
in pen tium is calle d the bran ch
4) A new adva nced com puti ng tech niqu e used
gues s whe re the next _inst ruct ion
pred ictio n, the pen tium mak es an educ ated
This prev ents inst ruct ion cache from
following a cond ition al instr ucti on will be.
runn ing dry duri ng cond ition al instr ucti ons.
that it can perf orm data tran sfer s with
5) The pen tium has 64-bit data bus. This mea ns
with a 32 bit data bus.
an exte rnal dev ice twice as fast as a proces~or
(Oct. 2011; l\far ch 2019 )
Q. 4 Com pare 8048 6 and 80586.
Ans.:
-
8048 6 8058 6 (Pen tium I)
Sr. No.
1. It is 32 bit Microp roce ssor . It is 64 bit mic ropr ocessor.
'--

2. It's oper atin g spee d - 25 to 50 MH z It has 50 - 100 MH z operatin g spee d .

It has 3~_b ytes cach e mem ory. It has_8 ,kby.tes cach e memory.
-- 4. 3.

-- 5.
It has ex ternal mat h co-p rocessor.
It w as · evol ved in 1989-SX and
l991 -DX vers ion .
It has Inte rnal mat h co-p roce ssor.
It was evolved in 1993 .
-

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 TPS Compu ter Science -Il 3-5 Intro. to INTEL X-s6 F

Q. 5
~
tffifi@"'-
Compa re any four attribu tes of 486 DX with Pentiu m Processor.
Ans.:
Attrib utes 80486 DX Pentiu m
Data bus It is 32 bit microprocessor. It is 64 bit microprocessor. ----
Opera ting speed (MHz) Clock frequency 25-50.MHz Clock frequency 50 - 100 rnB--;
Introd uction date It was evolve d in 1991. It was evolve d in 1993. ---
~

Instruc tion Cache It has 32 bytes memory. It has 8 Kbytes memor y.

Q. 6 Compa re any four attributes of 80386 & Pentiu m processor. (Oct. 12; March 191
Ans.:
Attrib ute 80386 Pentium -
It is 32 bit microprocessor It is 64 bit microprocesso;-
(1)
(2)
Data bus
Instruc tion cache It has 16 byte cache memor y It has 8 Kbyte cache -
(3) Data cache It's data cache is 256 bytes It's data cache is 8 Kbyte
(4) Math co-processor It has externa l co-processor It has interna l co-processor
(5) Interna l data word size Word size is 16 bit
.I. ,:'• •
Word size is 32 bits
(6) Introdu ction data It was introd ~ced u{ 1985 Introdu ced in 1993
(7) Operat ing speed in MHz 16-50M Hz 50-lO0 MHz
List the advanced microprocessors of INTEL X-86 family and mention
three
Q. 7
\ attributes of any one of them. ( 1 ~§ _" 1
lt•EN D
Ans.: List of INTEL X-86 microprocessors family :
;:::::=-_:::=-4 !,,-- J~ 3~
• 8086
' ' ) ( ' ) ('
-➔ L.t --"-J _"l , l ,

• 80286
4·- L1 \(,
~
•
•
80386
,80486 -
'

• INTEL PENTIUM I

'
,

• PENTI UMil
• PENTIUM III
PENTIUM IV
•
For w riting attributes of anyone of above please refer Q. No. 3.
Explain the advantages of the pentiu m processor with respect to the
followin g
Q. 8
featur es:
1) Dual pipelin ing 2) On-chip caches
9
3) Branch predic tion 4) 64-bit data bus (Mar. 06, 10, 20, Oct. 08, 10, Jul t l

Ans.:
1) Dua] pipelin ing : .,
m processor,
The use of super scalar architecture incorporates a dual-p ipelini ng in pentiu
a
which lets pentiu m to process more than one instruction per clo~k cycle and achieve
high level of p erform ance.

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I~
iPS Computer Science · Il Intro. to [\.,- m_ \.--&> f unuty

2) On-chip caches:
The data and ccx:ie on-chip caches 'improves the processing speed oi the pentium
processor.
3) Branch prediction : MftiNm)
i) The advantage of branch prediction is that, using it, the pentium makes ;m
educated guess where the next instruction follo\ving a conditional instruction will
be.
ii) This prevents the instruction cache from running dry during conditional
instruction.
4) 64-bit data bus :
i) P~ntium has 64 bit data bus which allows higher speed of data transfer to it.
ii) The data transfer speed of pentium is twice as fast as a processor with 32-bit data
bus.
Q.9 Compare any four attributes of 80286 and Pentium microprocessor. OR
State four differentiating features among any two X86 family micro.ressors.
tfoBMiliN•i 1111•18E@tbl
Ans.:
Attributes 80286 Pentium
Database It is a 16-bit microprocessor. It is a 64-bit microprocessor.
Address bus
-~ . -~~ --
\ Address bus is ,24-bit hence \
r--
~ d~esf bus is 32-bit hence can
I

can acces~ memory. cces~"gJ3_memory. _..,

Operating speed (MHz) Clock frequencies 6 MHz Clock frequencies
to20MHz. 50 MHz to 100 MHz.
Memory management External Internal
Math co-processor External Internal
Q. 10 Compare any four attributes of _80286 and 80486 Processors. (March ·2013; Julv 18)
Ans.:
Attributes 80286 80486
Data bus 16 bits. 32 bits
Ad<;iress bus 24 bits 32 bit
Operating speed 6-20MHz 25-S0MHz
Physical memory address 16 Mbytes 4 G bytes
Internal data word size 16 bits 32 bits
Introduction data 1982 1989
( U..Pu~-"· .
Programmmg Model of X-86 Famtly
. j
Q. 11 State any six advance features of X -86 Micropreocessor Family. ttit1EC@1
Ans: Advance features of X-86 Microprocessor family are as follows :
1) It is capable of performing various computing functions and making decisions to cha n~e
the sequence of program execution.
2) It is very powerful computing device .

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•
 TPS Computer Science - II 3-7 Intro. to INTEL X-86 Family

3) Coprocessor - A~vanced microprocessors are supported by n~eric _c?processor. It is

separate CPU which perform arithmetic functions & trigonometric functions.
4) Operating System : Microprocessor works with multiuser & multitasking operatin
~~~ . g
5) Virtual Memory : Advanced microprocessor supports virtual memory technique for
sto~g large volume of data. _
6) Microprocessor includes special instructions & internal h/w which allow a programmar
or to write s/w without knowing how much memory is available.
Q. 12 Explain the programming model for 32-bit version of X-86 fami-h suitable
diagram. rf►iffitJ t: •t4i•~ii
Ans.: 1) The 8088 and 8086 defines the base programming model for the entire X-86 family of
advanced microprocessors.
2) The newer members of X-86 family have greater computing power because they are
faster, they use 32-bit registers instead of 16-bit registers and they have advanced
addressing techniques.
3) Following figure shows programming model for 32-bit version of X-86 family used in 32
bit microprocessor family i.e. in 386, 486 and pentium.: ·
31 16'15 8'7 o Name
,
EAX AH AL Accumulator (AX)

EBX BH BL Base Index (BX)

ECX CH CL Count(CX)
~neral EDX DH DL Data (DX)'
Purpose
Registers ESI SI Source Index
EDI DI Destination Index
EBP BP Base pointer

\ ESP SP Stack pointer

cs Codesegment

Segment f ss Sta~k segment

~egiste, 't ES
OS
~
Data segments
GS
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FS J Instruction pointer
f.:IP IP
E Flag Plag H I Flag L Flag register
I

4) The programming model of 32-bit version of X-86 family consists of 3 register groups._ .
5) The first group contains eig_ht general purpose registers called EAX, EBX, ECX, EDX,
ESI, EDI, ESP and EBP registers. Where E tells us that these registers have extented
length. Each register can be addressed in 1, 8, 16 or 32-bit models. These registers are
used to store data during computations.

....,,,,,
rP5 Computer Science - II 3-8 Intro. to INTEL X-86 Family

6) The second group of registers is the segment group. This group consists of code
segment, stack segment and four data segment registers. The data segment registers are
DS, ES, FS and GS. These are 16-bit registers. These registers manage operation with
external memory. Address computations and data movements are performed here.
i):___Th_e_thir_._d_se_t-:o:--f:-r_egis=·:--:-te_r_s_co_ns_is_ts_o_f_Ins_tru_c_ti_o_n_P_o_in_t_e_r__:_(I_.P_..:_)_an_d_fl_a-=.g_r_egis=--·-t_e_r_.--:---;-
Q. 13 Draw neat labelled diagram and explain the :e_ros:!_amming_model of 16-bitversion
of X-86 family with register set. «•M•►l&fiiJmNJuujm@.mn,i:u
AnS-:
1) The 8088 and 8086 defines basic programming model for X-86 family.
2) The 16-bit version for programming model is used in 16-bit microprocessors of X-86
family i.e. in 8088, 8086 and 80286.
3) The 16-bit version of programming model of X-86 family is shown in the following
figure.
15 87 0
Accumulator
AX AH AL
Base Index
BX BH BL
Count
General
ex CH CL
Data
Purpose DX DH DL
Registers SI Source index

DI Destination index
BP Base pointer
· SP Stack pointer

cs Code segments ,
Segment ss Stack segments
register DS

\.
ES } Data segments

rn
Program.ming model of 16-bit version of X-86 family
Instruction pointer
Flag register

4) As shown in above figure the programming model of 16-bit version of X-86 family
consists of three register groups.
5) The first group contains 8-general purpose registers called A, B, C, D, SI, DI, SP and BP
registers. AL, BL, .... indicates lower bytes and AH, BH, .... indicates higher bytes. The
full 16-bit registers are referred as AX, BX, CX and DX, w here X stands for extended SI,
DI, BP, SP registers are always treated as 16-bit regis ters. These are pointer registers
because they are used to point locations within a segment.

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 TPS Compu ter Science -IT 3-9 Intro. to INTEL X-86 Fa,..,_-
·••tly
--....:_
6) of registe rs. Th.is group consists of
The second group of registe rs is the segme nt group
registe rs. Opera tion with external
code segme nt, stack segme nt and two data segme nt
perfor med here.
memo ry. Addre ss compu tations and data movem ents are
(IP) and flag register.
7) The third group of registe rs consist s of instruc tion pointe r
rocessor.
Q. 14 Enlist the differ~ nt flags provid ed by 8086 microp ----
Ans.:
flags, which are shoWn in
The microp rocess or 8086 has 16-bit flag registe r with 9 active
follow ing figure.
10 9 8 7 6" 5 4 3 2 1 0
15 14 13 12 11
I I I I I P U
I I I I Cy (U empty)
I
U U U U OF DF ! I:F TF S / Z U AC U
I I I I I
where ,
Cy - Carry flag,
P - Parity flag,
AC - Auxili ary carry flag,
Z - Zero flag,
S - Sign flag,
TF - Single step trap,
/ IF - Interru pt flag,
DF - directi on flag
OF - over flow flag
. (March 2003, Oct. 20051
Q. 15 Draw a neat labelle d diagram.of flag registe r of X86 family
Ans.:
ions. The flag registe r of X~6
Ffag registe r is used to store specia l results from data operat
family is shown in follow ing figure.
5 4 3 2 1 0
31 . . ... 18 17 16 15 14 13 12 11 10 9 8 7 6
IO PL O ,-D I j T S Z
I I NT I I I I A P
I I I - ,· I - I I - I ~
I
/ Revers ed Ac VM ·, RF O
I
where -
C ➔ Carry flag (CF)
P ➔ Parity flag (PF)
A➔ Auxill iary carry flag (AF)
Z ➔Zero flag (ZF)
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S ➔ Sign flag (SF)

T ➔ Trap _flag (TF)
I ➔ Interru pt flag (IF)
D ➔ String Direct ion flag (OF)
O ➔ Overfl ow flag (OF)