PCIM Europe 2019, 7 – 9 May 2019, Nuremberg, Germany

www.pcim­europe.com

Combining the benefits of SiC T-MOSFET and Si IGBT in

a novel ANPC power module for highly compact 1500-V grid-tied
inverters

Benjamin Sahan1, Christian R. Müller1, Andre Lenze1, Jens Czichon1, Maximilian Slawinski 1
1
Infineon Technologies AG, Germany

Corresponding author: Benjamin Sahan1, benjamin.sahan@infineon.com

The Power Point Presentation will be available after the conference.

Abstract
This paper proposes a special adaptation of the ANPC topology to optimally combine the latest 1200-V
SiC T-MOSFET with IGBT technology in a cost-effective way. A new power module with a fully
integrated ANPC topology is being presented enabling the implementation of highly compact and
efficient 1500-V grid-tied inverters. An output power of more than 200 kW at 48 kHz could be possible
with the newly developed Easy3B power module. Moreover, an almost circular P-Q diagram could be
achieved which supports emerging applications such as energy storage systems.

1 Introduction significant improvements are achieved in terms of

Photovoltaic systems have seen an enormous
growth during the last decade. Economy of scale
and innovations in the area of system technology,
which are leading to a reduction of the levelized
cost of energy (LoCE), are among the main
drivers behind this development [1]. Moreover, a
shift in DC system voltage from 1000 V to 1500 V
can be observed in utility-scale systems [2]. The
main motivation, however, is the reduction of
cable and installation costs as well as the
improvement of system power density due to high
DC and AC voltage levels. Moreover,
decentralized high-power string inverters in the
range of 75 kW to 150 kW per unit are emerging
in utility-scale systems, as they allow a more
flexible design and lower maintenance costs. In
addition, energy-storage systems that use DC
voltages up to 1500 V are also becoming more
prominent.
Although Si devices, i.e., IGBTs and diodes, are
widely used, they are not optimized for solar
applications. Especially with respect to their fast-
switching capability and cosmic-ray robustness,
existing 1200-V Si-IGBT technologies are
outperformed by wide-bandgap power
semiconductor technologies such as SiC
T-MOSFET. Even though SiC devices are pricey,
and the required gate-driver concepts are more
sophisticated with respect to, e.g., active Miller
clamping for suppressing parasitic turn-on,
losses. Thus, for fast-switching devices, the SiC
T-MOSFET is a remarkable alternative solution if
combined with cost-optimized Si devices. With
this approach, switching frequency can be
increased, total losses are lowered, and relevant
critical components like filters or heatsinks can be
minimized, which finally leads to optimized and
lowest system costs. In contrast to this, solutions
fully based on SiC do not allow a further reduction
of filters or heatsinks. Consequently, system
costs stay at a higher level with respect to the
more expensive SiC devices. Consequently, from
the system point of view, hybrid solutions as
proposed here are the best choice with respect to
performance and costs.
2 Proposed solution
2.1 Topology and modulation
To implement 1500-V high-power inverters, the
NPC1 topology with 1200-V IGBTs is a common
approach today [2]. The Active Neutral Point
Clamped (ANPC) topology with active switches in
the neutral path offers an additional degree of
freedom [5], but up to now has been mainly used
in the very high-power domain with IGBT or IGCT
components.
This paper proposes a special adaptation of the
ANPC topology to take full advantage of the

ISBN 978-3-8007-4938-6 693 © VDE VERLAG GMBH · Berlin · Offenbach

 PCIM Europe 2019, 7 – 9 May 2019, Nuremberg, Germany
T1 D1
T2 D2
T5
T6
T3 D3
T4 D4
a) b)
Fig. 1: a) ANPC topology with SiC T-MOSFET b)
Modulation scheme: T6 not shown due to its
complementarity to T5.
benefits of SiC T-MOSFETs in combination with
cost-effective and highly efficient Si-based IGBT
solutions. Figure 1a shows a phase leg of the
proposed implementation, whereby T1 to T4 are
composed of Si-based IGBTs with corresponding
Si-freewheeling diodes (FWD), and T5 and T6
consist of SiC T-MOSFETs with internal body
diodes. Using the modulation scheme presented
in [6] (Figure 1b), the IGBTs are only used to
reverse the polarity of the fundamental output
voltage, and are switched with grid frequency
(50/60 Hz). Hence, the IGBTs can be optimized
for lowest conduction losses. In this regard one
can make use of the newly introduced 1200-V
micro-pattern trench (MPT) IGBTs, which feature
a typical VCEsat of only 1.65 V (@ICnom, 125 °C) [7].
In this way, active switching losses are only
generated by fast and highly efficient SiC
components. Thus, the amount of SiC devices is
reduced to a minimum achieving an optimal cost
performance.
A similar approach has been recently published in
[8], but low-power, discrete devices were used.
However, in this paper, the focus is on a high
power application with power modules.
The duty cycle D of the fast-switching device T5
can be expressed by:
⎧ √2 ∙ | sin |,
⎪ 0.5 ∙
= (1)
⎨ √2 ∙
⎪1 −
∙ |sin | ,
⎩ 0.5 ∙
ISBN 978-3-8007-4938-6
www.pcim­europe.com
where Vgrid is the grid phase voltage (rms), VDC is
the DC-link voltage and m is the modulation
index. The switching signals of T6 (DT6) are
complementary to T5. However, a very short
interlock dead time of 100-200 ns must be added
depending on the properties of the gate driver
stage.
= (1 − ) (2)
2.2 Power-loss analysis of SiC
T-MOSFETs
The instantaneous conduction losses of the SiC
T-MOSFETs are a function of the on-state
resistance RDS,on, the grid current igrid, its phase
angle φ, and the duty cycle function (1). Due to
symmetry only the losses for T5 are considered:
(t) = , ∙ ( ) ∙ (t) (3)
(t, φ) = √2 ∙ ∙ sin(ωt + φ) (4)
When calculating the mean value of Eq. (3) it can
be shown that the overall conduction losses of the
SiC T-MOSFETs neither depend on the phase
angle (or power factor vice versa) nor the
modulation index. Fig. 2 depicts Eq. (3)
normalized to 2*Igrid2*RDSon with m and φ as a
parameter. It becomes evident that the mean
value over one time period is always constant
(0.25).
1
[A2]
0.8
0.25
pCT5/(2*Igrid *RDSon)
0.6
0.4
2
0.2
0
0 0.01 0.02
t[s]
Fig. 2: Normalized instantaneous conduction loss with
m=0.8, φ=0 (red); m=0.5, φ=90° (blue)
≥0 Neglecting the dynamic losses of the SiC
T-MOSFET’s body diode [3], the calculation is the
same as for a 2-level inverter [9] but with only half
of the DC-link voltage applied. Assuming a linear
<0
dependency between switching energies Esw,
drain current ID and DC-link voltage, the total
switching losses can be approximated as follows:
694 © VDE VERLAG GMBH · Berlin · Offenbach
 PCIM Europe 2019, 7 – 9 May 2019, Nuremberg, Germany
www.pcim­europe.com
√2 ∙
= ,
(5)
2∙
A significant advantage of the proposed
modulation scheme, in combination with the
ANPC topology, is the ability to work almost
independent of the power factor and without a
current derating on the SiC devices. This enables
the solution to be used in reactive power mode for
regions with unstable grid conditions. This is
becoming a key requirement in utility PV
applications. Moreover, the same hardware
platform could be used to serve both solar and
energy storage applications.
2.3 Power-loss analysis of IGBT and FWD
Due to the fact that the IGBTs are switched with
grid frequency (50/60 Hz), they mostly generate
conduction losses. However, small passive
switching losses, e.g., IGBT forward recovery,
occur as well. A detailed analysis of this topic is
provided in [10].
Due to symmetry, only the losses for T1, T3 and
D1, D3 are given. The conduction losses can be
calculated as follows:
1 a long commutation [2] takes place in all cases.
= ( ( )) ∙ ( )∙ ( ) (6)
1 (7)
= ( ( )) ∙ ( )∙ 1− ( )
1 The newly developed power module, named
= ( )∙ ( )∙ ( ) (8)
1
= ( )∙ ( )∙ 1− ( ) (9)
The conduction losses are then calculated and
normalized to the sum of T1 and T3. For reasons
of simplicity, the V-I output characteristic of the
IGBT equals that of the FWD. As can be
observed from Fig. 3, the losses shift from IGBT
to FWD depending on the phase angle. For a
typical operation of a solar inverter with cosφ=0.8,
the losses in the FWD are much smaller and
ISBN 978-3-8007-4938-6
hence a smaller rated device could be chosen.
However, if a storage application is considered
with a power factor of cosφ=-1, the losses in the
FWD are maximal and thus the device should be
equally rated to the IGBT.
Normalized IGBT Normalized FWD
conduction losses conduction losses
1 1
PCTtot PCDtot
0.8 0.8
PCT1 PCD1
0.6 PCT3 0.6 PCD3
0.4 0.4
0.2 0.2
0 0
0 1 2 3 0 1 2 3
Phase angle φ Phase angle φ
Fig. 3: Normalized conduction losses with m=0.7
versus phase angle for IGBT (left) and diode
(right)
3 New ANPC power module
In order to achieve high power densities, a new
highly efficient power module has been
developed. In Fig. 4, four different commutation
paths for the proposed ANPC power module are
shown depending on the sign of the grid current
and fundamental voltage. It can be observed that
That means there are always two SiC
T-MOSFETs and two IGBTs or FWDs involved.
Therefore, it is of high importance to provide a
low inductive and symmetrical layout [3]. This can
be addressed with the well tried and tested
baseplate-less EasyPACKTM platform. It has been
demonstrated in [12] that a stray inductance of
only 8 nH can be achieved in an Easy2B using
the strip-line concept.
Easy3B is depicted in Fig. 5. A whole phase leg
can be integrated with two 1200-V 6-mΩ
CoolSiCTM MOSFETs and four MPT IGBTs and
FWDs. More details about the new Easy3B
package concept can be found in [11].
Fig. 5 shows as an example a typical turn-off
waveform from a prototype of the proposed power
module (F3L6MR12W3M1_ENG). In Fig. 6, a
corresponding turn-on switching transient is
depicted. The test setup is a standard double-
pulse test using the body diode of the upper or
lower SiC T-MOSFET as a freewheeling diode. A
DC-link voltage of 750 V was applied which can
be regarded as a worst-case.
695 © VDE VERLAG GMBH · Berlin · Offenbach
 PCIM Europe 2019, 7 – 9 May 2019, Nuremberg, Germany
www.pcim­europe.com

DC+
v v

i i

i i
M

DC -
(a) (b)

v v

i i
Fig. 5: Picture of the new Easy3B module and turn-off
i i of F3L6MR12W3M1_ENG with VDC=750 V,
ID=200 A, Tvj=150 °C
20
VDS
1400
VGS 15
1200 5x ID
10
VDS [V], ID [A]

1000
5
(c) 800

VGS [V]
(d)
0
600
Fig. 4: Four different commutation paths for proposed
400 -5
ANPC power module (red: active state,
orange: freewheeling) 200 -10

In contrast to common IGBTs, unipolar SiC
devices do not provide any tail current during
turn-off. Therefore, typical oscillations are
observed on VDS and ID. The underlying
oscillatory circuit is due to parasitic inductances,
e.g., in the setup of the power module itself, and
capacitances originating from device and module
design, e.g., SiC MOSFET’s output capacitance
and substrate-coupling capacitances. The
significant impact of device capacitances on the
switching behavior is clearly identified by the first
current drop during turn-off. Here, part of the load
current is used to discharge SiC MOSFET’s
output capacitance. At any rate, these
phenomena are well known, and details can be
found elsewhere.
It should be also noted that the standard double-
pulse test and its current measurement setup
might lead to a higher parasitic inductance
compared to a fully integrated PCB design.
Hence in the final system the oscillations could be
less.
0 -15
-200 -20
0 250 500 750 1000 1250 1500 1750 2000
t [ns]
Fig. 6: Example for turn-on of F3L6MR12W3M1_ENG
with VDC=750 V, ID=200 A, Tvj=150 °C
4 Comparative evaluation
Three different configurations for an Easy3B
module were compared using the simulation tool
PLECS®. At first the classical NPC1 topology as
a silicon-based solution was considered using
fast 150-A rated H3 IGBTs with 150-A EC7
diodes in the neutral branch (NPC1 a). The
second variant was a hybrid solution with 150-A
rated H3 IGBTs and 50-A rated SiC FWDs in the
neutral branch (NPC1 b). Finally, the ANPC with
a 6-mΩ CoolSiCTM MOSFET and a 150-A
TRENCHSTOPTM IGBT7 was taken into
consideration. For the comparison, each variant
was calculated with its highest power density, i.e.,
maximized chip areas, and not at identical
nominal chip current. In both NPC calculations,
for the sake of simplicity, only H3 IGBTs were
considered in the simulation. More sophisticated
solutions with low-static-loss IGBTs at the phase

ISBN 978-3-8007-4938-6 696 © VDE VERLAG GMBH · Berlin · Offenbach

 PCIM Europe 2019, 7 – 9 May 2019, Nuremberg, Germany
www.pcim­europe.com

output will improve the performance of both 150 350

Max. junction temperatures [°C]

variants slightly, but will not change the given 140

Power losses per module [W]

300
conclusion significantly. 130
In Figure 7, the power losses per module and the 120 250
maximum grid output currents are plotted as a 110 200
function of the switching frequency fsw. The power 100 Tvjop T5
losses of the ANPC solution are considerably 90 150
Tvjop T1
below the ones of both NPC1 solutions. At 32 Tvjop D1
80 100
kHz, they are only one-fourth of the silicon-based Tvjop T3
NPC1, and even just 50% of the NPC1 hybrid 70
Tvjop D3 50
variant. Likewise, the achievable output currents 60
Ploss
are significantly higher. 50 0
-1,2 -0,8 -0,4 0,0 0,4 0,8 1,2
300 150
cosphi
Ploss NPC1 a)
Fig. 8: Junction temperatures and power losses as a

Max. rms current Igrid_max [A]

250 125
Power loss @ 50 A [W]

Ploss NPC1 b)
Ploss ANPC function of the power factor (Igrid= 100 A,
200 Imax NPC1 a) 100 VDC= 1200 V, Vout= 600 VAC, cosphi= 0.8, fsw=
Imax NPC1 b) 48 kHz, TA= 50°C, RthHA= 0.15 K/W)
150 Imax ANPC 75
125
100 50
100
Q [kVA]

50 25 75

0 0 50
0 8 16 24 32 40 48 56
fsw [kHz] 25
Fig. 7: Power loss per module NPC1 vs. ANPC
0
(Igrid= 50 A, VDC= 1200 V, Vout= 600 VAC, -125 -100 -75 -50 -25 0 25 50 75 100 125
cosphi= 0.8, TA= 50°C, RthHA= 0.15 K/W)
P [kW]
An important feature of such high-power string Fig. 9: Simulated P-Q diagram (VDC= 1200 V,
inverters is their easy handling. Two workers Vout= 600 VAC, fsw=48 kHz, TA= 50°C, RthHA=
should be able to carry and install one. This 0.15 K/W)
means that size and weight are of special The corresponding P-Q diagram (Fig. 9) has an
importance, and thus switching frequency should almost circular shape. Due to symmetry only one
be as high as possible in order to minimize the half is shown. The maximum achievable output
output filter. Under the given assumptions, an rms power in the positive direction is 116.4 kW and in
grid output current of 110 A would be possible at the negative direction it is 110.3 kW while the
fsw=48 kHz. Assuming a typical line-to-line AC maximum reactive power is 115.7 kVA.
grid voltage of 600 VAC, this means an output
power of more than 200 kW can be achieved Finally, the power loss distribution is depicted in
using two modules per phase in parallel. Fig. 10. It can be observed that switching losses
of T5 dominate at fsw=48 kHz. The conduction
Additionally, the junction temperatures and the losses are well-balanced between the devices.
total power losses of one ANPC module have
been plotted exemplarily in Fig. 8. The
temperature of the SiC T-MOSFET (T5) is
typically highest but still well below 150 °C. It is
practically independent of the power factor as
already discussed in section 2.2. This also holds
true for the total power losses. When reaching
almost cosφ=-1 the temperature of the FWD D1 is
higher than that of T5. Therefore, a small derating
in the output current or a slightly bigger diode
might be needed when power flow is required in
both directions.

ISBN 978-3-8007-4938-6 697 © VDE VERLAG GMBH · Berlin · Offenbach

 PCIM Europe 2019, 7 – 9 May 2019, Nuremberg, Germany
350
Power loss per module [W]
300
250
200
150
100
50
0 VDC photovoltaic central inverters up to 800 kVA”,
16 32
Switching frequency [kHz]
Fig. 10: Power loss distribution (Igrid= 100 A,
VDC= 1200 V, Vout= 600 VAC, fsw=48 kHz,
cosphi= 0.8, TA= 50°C, RthHA= 0.15 K/W)
5 Summary
For 1500-V grid-tied converters in the range of
150 to 200 kW, highly compact and efficient
power electronics solutions are required. A very
beneficial combination of SiC T-MOSFET and the
latest IGBT technology using a special adaptation
of the ANPC topology has been presented. For
typical operating conditions, the power losses are
considerably lower compared to the state-of-the-
art hybrid NPC1 solution with fast H3 IGBTs and
SiC FWDs. In contrast to other solutions with SiC
MOSFETs, no external SiC FWDs are needed for
the proposed ANPC solution when the SiC
T-MOSFETs are used in reverse-conducting
mode. This results in an optimal cost-
performance ratio. In order to achieve such high-
power densities, a novel, highly efficient and low-
inductive power module with a fully integrated
ANPC topology has been presented, analyzed,
and discussed in this paper.
A significant advantage of the proposed
modulation scheme, in combination with the
ANPC topology and SiC T-MOSFETs, is the
ability to work in an almost circular P-Q diagram
without a derating on the SiC devices. This
characteristic allows for a very flexible usage of
the power module, e.g. for applications requiring
a reactive power mode to support grid stability or
to operate the inverter in energy storage systems.
ISBN 978-3-8007-4938-6
www.pcim­europe.com
6 References:
Pcond D3 [1] S. Araujo et al., „Exploiting the Benefits of SiC by
Pcond T3 Using 1700 V Switches in Single-Stage Inverter
Pcond D1 Topologies Applied to Photovoltaic Systems”, PCIM
Pcond T1 Europe, 2011
Psw T5
[2] M. Slawinski et al., “Evaluation of a NPC1 phase
Pcond T5
leg built from three standard IGBT modules for 1500
48
ECCE Europe 2016
[3] D. Heer et al., “Switching performance of a 1200 V
SiC-Trench-MOSFET in a Low-Power Module”, PCIM
2016
[4] U. Schwarzer et al., “System Benefits fopr Solar
Inverter using SiC Semiconductor Modules”, PCIM
2014
[5] T. Bruckner et al., “The active NPC converter and
its loss-balancing control,” IEEE Trans. Ind. Electron,
2005
[6] D. Floricau et al., “The efficiency of three-level
active NPC converter for different PWM strategies,”
EPE, 2009
[7] C. R. Müller, et al., “New 1200 V IGBT and Diode
Technology with Improved Controllability for Superior
Performance in Drives Application”, PCIM Europe,
2018
[8] Q. Guan et al., "An Extremely High Efficient Three-
Level Active Neutral-Point-Clamped Converter
Comprising SiC and Si Hybrid Power Stages," in IEEE
Transactions on Power Electronics, vol. 33, no. 10, pp.
8341-8352, Oct. 2018
[9] Infineon “IPOSIM Dimensioning program IPOSIM
for loss and thermal calculation ofInfineon IGBT
modules”,
[10] A. Schittler et al., “Interaction of Power Module
Design and Modulation Scheme for Active Neutral
Point Clamped Inverters”. PCIM 2019
[11] C. R. Müller et al., “New 950 V IGBT and diode
technology integrated in a low-inductive ANPC
topology for solar application”, PCIM 2019
[12] C. R. Müller et al., "Low-inductive inverter
concept by 200 A / 1200 V half bridge in an EasyPACK
2B - following strip-line design," CIPS 2014
Acknowledgements
The authors would like to thank M. Prell, A. Siani,
R. Loer, S. Schmies, T. Ulbrich, A. Herbrandt,
D. Heer and T. Villbusch (company Schaffner) for
their valuable advice and support.
698 © VDE VERLAG GMBH · Berlin · Offenbach