Department of Instrumentation and Control Engineering

B.Tech Degree End Semester Examination SEP 2023

Electronic Circuits (U20ICT202)
Answer Key
Q.No Key Points Mark
allotted
Draw the hybrid π model of CE Amplifier.
1 2 Marks

Define CMRR.
2 2Marks
 The full form of CMRR is a Common Mode Rejection Ratio.

Give Two Application of class B Amplifier.

3  Applications of Class B amplifiers 2Marks

 These power amplifiers are used in battery-powered devices like transistors and FM radios.
4. Compare class A and Class C power amplifier.
2Marks
5 Distinguish between current and voltage sampling
2Marks

6. What are the classifications of oscillators

2Marks

7 Draw the circuit diagram of monostable multivibrator

2Marks

8 If input of high pass filter is saw tooth wave, then what will be the output waveform?
2Marks
 When the input applied to a high pass filter or differentiating circuit is a saw-tooth wave, output
will be a rectangular wave.
9 What is meant by blocking oscillator
 A blocking oscillator (sometimes called a pulse oscillator) is a simple configuration of discrete 2Marks

electronic components which can produce a free-running signal, requiring only a resistor, a
transformer, and one amplifying element such as a transistor or vacuum tube.

10 Define the term stagger tuned amplifier

 It is a circuit in which two single tuned cascaded amplifiers having certain bandwidth are taken and 2Marks

their resonant frequencies are adjusted such that they are separated by an amount equal to the
bandwidth of each stage. Since resonant frequencies are displaced it is called stagger tuned
amplifier.

PART B (5*5=25 MARKS)

11 Discuss in detail the construction of CG FET amplifier
Diagram
2 Marks
 In the Common Gate JFET configuration, the Gate terminal of JFET is common to both input and and
output. In this configuration, we will consider the Source and Drain terminals of the JFET amplifier Explanation
as the input and output terminals. The circuit diagram of the JFET Amplifier, which is configured 3 Marks
in Common Gate (CG), is shown below.
12 With relevant diagrams discuss the working of Class B power amplifier

Diagram
2 Marks
and
Explanation
3 Marks
 Push Pull Amplifier - If both the transistors are of same type (NPN or PNP)
Complementary Symmetry- If one of the transistors is NPN & the other one PNP or vice
versa.
CLASSBPUSHPULL POWERAMPLIFIER:

 In class B amplifier output collector current flows only for half cycle for full
cycle of the input hence distortion.

 To get out for full input signal we use Push Pull circuit. Two transformers are
used in Push pull amplifiers. one at the input and the other at the load side. Both
are centre tapped transformers.

 As shown in Fig 7it also contains two transistors Q1&Q2 both NPN type. Since
center tapped is used Q1 & Q2 are 180 degrees out of phase. (the voltages are
 equal but with opposite polarity).
 For positive half cycle Q1(Active region) gives output(shown in fig(7 & 8)) and Q2 is OFF(cut
off region). In negative cycle Q2 is ON &Q1isOFF.

Fig 2.(7):Class B Push Pull Circuit

Fig 2.(8):Class B Push Pull Circuit operation for half cycle

Expressions

Qpoint
at(VCC,0)RL’
=[N1/N2]2RL
Pdc=(2VCCI
m )/
∏Pac=(VmI
m )/2
%ƞ=∏/4(Vm/VCC)*100

%ƞmax = 78.5%Pd .
13 Classify and explain various feedback amplifier
Classification
2 Marks
and
diagram
3 Marks
 Classification of Feedback Amplifiers:
There are four types of feedback,
• Voltage series feedback.
• Voltage shunt feedback.
• Current shunt feedback.
• Current series feedback

14 Design Astable multivibrator emitter coupled circuit. Diagram

2 Marks
Emitter Coupled Astable Multivibrator: and
Explanation
3 Marks
• In an Emitter Coupled Astable Multivibrator circuit capacitor C is connected between emitters of
two transistors, as shown in Fig. 31.21. Transistor Q 1 remains either in saturation or in cutoff while
transistor Q2 is either in cut-off region or in active region. Capacitor C is a storage element. Let the
transistor Q2 start conducting first.
• An emitter coupled astable multivibrator has the following advantages over a collector-
coupled astable multivibrator.
• Collector of transistor Q2 is not connected to any part of the circuit, so it can be used to provide an
output terminal.
• Frequency adjustment is easy because of use of only one capacitor in the circuit.
 • Synchronization is easily possible at base of transistor Q1 as input at base is isolated.
• There are no recovery transients (such as overshoot voltages) in the output.

15 Discuss in detail about tuned class C Amplifier.

Diagram
2 Marks
and
Explanation
3 Marks

 The pulses of current charges the capacitor almost value equal to VCC as shown in below figure
denoted as ‘a’.
 After the movement of the pulse capacitor gets discharged rapidly and charges the inductor.
 When capacitor becomes completely discharged the magnetic field of inductor get collapse and
then rapidly charge the capacitor again to the value of VCC in a direction which it firstly get
charged.
 It completes the one halve signal cycle of oscillation as shown in figures denoted as b’ and c.
 After that transistor gets discharged again and increases the magnetic field of inductor.
 Then again inductor recharges the capacitor to positive peak value less then previous value it
occurs due to loss of energy in the winding.
 In this way, it completes one cycle as shown in figure denoted as d and e.
 So the value of peak to peak output voltage will be almost 2VCC.

PART C
16 Draw the h – Parameter model of a BJT – CC Amplifier and derive the equation for Voltage gain, Diagram
Current gain, Input Impedance and output impedance. 4 Marks
and
Derivation
6 Marks
17 Illustrate the circuit diagram of direct fed class A Power Amplifier and explain its operation .Show Diagram
That its conversion efficiency is only 25%. 4 Marks
and
 A power amplifier is called Class A amplifier the transistor used in the circuit conducts
Explanation
for full cycle of the input signal. 6 Marks

 The operating point (Q) is selected approximately at the (Biased) center, so that
the output current faithfully follows the input signal.

 The transistor remains in the active region for the full input signal. Transistor is
not operated in Cut off or Saturation region.

Fig2.(2)Class A Power amplifier

 Hence the efficiency of Class A power amplifier is Low

Fig2.(3):Loadlineanalysis

Advantages: (1) simple construction

(2)Distortion less output voltage

Disadvantage: (1) very low efficiency(25%)

  Large power dissipation in the transistors.

 Output Impedance is very large.

Expressions: IBQ=(VCC-0.7)/RB

ICQ=βIBQ

VEQ=VCC-ICQRL

Qpoint
at(VCEQ,ICQ)Pdc
= VCC ICQ

Pac = ((Vmax–Vmin)(Imax–Imin))/8

Efficiency %ƞ=
(Pac /Pdc)*100Powerdissipation Pd=Pdc-
Pac

Discuss in detail about wein bridge oscillator

18 Diagram
4 Marks
and
explanation
6 Marks

• The circuit mainly comprised of two transistors Q 1 and Q2 and Wien bridge circuit in which a
series RC circuit comprising of R1C1 is connected with a parallel RC circuit consisting of R2C2.

• The oscillations are set in the circuit by an arbitrary change in the base current of transistor
Q1 that can be due to noise or any other type of variation in dc supply. The collector circuit of
Q1 amplifies the variation of the base current but with 180⁰ phase shift. This amplified output is
then fed to the base of transistor Q2 through an intermediate capacitor C2.
• Now, Q2 again amplifies the signal and an amplified and twice phase reversed signal is obtained
at the output of transistor Q2. Thus the output will in phase with the input voltage.
Advantages
• It provides a variable frequency range of oscillation which can be achieved by varying the
capacitances C1 and C2 simultaneously.
• As the circuit consists of two transistors the overall gain of the system is high.
• Interference due to external magnetic fields does not occur as the inductors are not present
 in the circuit.
Disadvantages
• The circuit is somewhat complex as it requires two transistors and various other
components.
• Due to amplitude and phase shift characteristics, the maximum frequency output is limited
or restricted

19. Write the design procure for the schmit trigger along with its circuit diagram and waveforms. Diagram
4 Marks
 A Schmitt Trigger is a comparator circuit with hysteresis implemented by applying positive and
feedback to the noninverting input of a comparator or differential amplifier. A Schmitt Trigger uses explanation
6 Marks
two input different threshold voltage level to avoid noise in the input signal. The action from this
dual-threshold is known as hysteresis.
20 Diagram
Draw the circuit diagram of single tuned amplifier and explain its operation , also derive the
bandwidth 4 Marks
and
Explanation
6 Marks
1. Single tuned amplifier
Single Tuned Amplifiers consist of only one Tank Circuit and the amplifying frequency
range is determined by it. By giving signal to its input terminal of various Frequency
Ranges. The Tank Circuit on its collector delivers High Impedance on resonant
Frequency, Thus the amplified signal is Completely Available on the output Terminal.
And for input signals other than Resonant Frequency, the tank circuit provides lower
impedance; hence most of the signals get attenuated at collector Terminal.
 Staff Incharge HOD Dean Academics
J.Jeevanantham (Dr. L. M. Varalakshmi) (Dr.Arivalagar.AA)