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Fast Controller Design For Single-Phase Power-Factor Correction Systems
Fast Controller Design For Single-Phase Power-Factor Correction Systems
5, OCTOBER 1997
I. INTRODUCTION
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WALL AND JACKSON: FAST CONTROLLER DESIGN FOR SINGLE-PHASE POWER-FACTOR CORRECTION SYSTEMS 655
and can be large. These poor output voltage dynamics can structure like that of Fig. 2 can then be employed. The time-
cause oscillations when a load with undervoltage lockout is scale separation can also be used to simplify the output voltage
connected to the PFCS. controller design.
This paper describes a simple control scheme that gives As the actual slow dynamics are well approximated
the boost PFCS near sinusoidal input current and excellent by the ideal slow dynamics found by taking the limiting case
output voltage dynamics. Formal methods are used to identify . The error involved in this approximation is small, i.e.,
the time-scale separation in the system dynamics and justify [14]. This powerful simplification process is a singular
the use of a cascade control structure. An adaptive estimator perturbation because it results in reduction of model order.
is used to eliminate the ripple component of from the When applying a singular perturbation to variable structure
voltage-loop feedback path. This enables the output voltage systems, the discontinuous control input is replaced with
transient times and overshoots to be reduced by two orders of the smooth equivalent control [15]. After the singular
magnitude. Nonlinear controllers are used in the current and perturbation is applied to the fast dynamics of (4),
voltage loops to render the current loop dynamics linear in the smooth equivalent control that characterizes the ideal slow
the large and simplify the voltage-loop dynamics. Sufficient dynamics is found to have the following form:
conditions are given for the asymptotic stability of all sections
of the PFCS. Sufficient conditions are also given for avoiding (6)
oscillation at subharmonics of the PWM switching frequency.
The performance and robustness of this novel controller are Substitution of the above equivalent control into the output
verified with experimental results. voltage dynamics described by (1) yields the ideal slow
dynamics given below. The voltage-loop controller design
II. BOOST CONVERTER MODEL process is simplified considerably by adopting this model. Note
that the fast variable acts as the control input to the ideal
A state-space model for the boost PFCS in continuous
slow dynamics:
current mode can be found by the circuit analysis of Fig. 1.
The output voltage and input current dynamics are governed
by the variable structure equations (1) and (2), respectively. (7)
The logical variable is used to represent the state of the
boost switch, i.e., when the switch is open and when III. CURRENT-LOOP CONTROLLER
it is closed:
The boost PFCS of Fig. 1 is nonreversible, so to avoid
(1) crossover distortion, it is essential that the phase difference be-
tween and is negligible. In a cascade control structure,
(2) this requirement is satisfied if the current loop has excellent
tracking. The full-wave rectified signal has no significant
Singular perturbation methods provide a formal means of harmonic content above 1 kHz. Therefore, adequate tracking
identifying time-scale separations in state-space models [14]. should be possible with a current loop crossover frequency,
In order to apply this method, the right-hand sides of dynamic kHz. However, due to the nonlinear nature of (2), a
equations must be of the same order of magnitude. This is linear controller cannot be used without becoming distorted
accomplished by introducing and , which are nominal [13]. The distortion can be avoided if, in the closed loop,
values for the output voltage and output current at some typical the state-space averaged input current dynamics are linear
load condition. The system equations can now be placed into in the large. This can be achieved through the use of a
standard singular perturbation form, where : suitable nonlinear controller designed using formal feedback
linearization methods [16]. In this case, the correct controller
(3) form for feedback linearization can be found by inspection:
(4) (8)
In typical systems, and the right-hand sides of (3) A block diagram of the new controller is depicted in Fig. 3.
and (4) are of the same order of magnitude. For example, a The state-space averaged open-loop transfer function of the
typical converter has V, A, and . current loop is , where the plant transfer function
As is small, is defined by
(5) (9)
Clearly, is able to change much more quickly than With a control scheme employing feedforward, it is essential
, so a time-scale separation exists in the boost PFCS that the dynamic performance is robust to small errors and
dynamics. This can be exploited to simplify controller design noise in the feedforward path. Therefore, must contain
by partitioning the system into fast dynamics associated with some integral action. The proposed form of is given
and slow dynamics associated with . A cascade control below. This has integral action and a high-frequency rolloff
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656 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 44, NO. 5, OCTOBER 1997
TABLE I
PWM DESCRIBING-FUNCTION RADII
(13)
IV. VOLTAGE-LOOP CONTROLLER
The single-phase ac utility provides an input power that The traditional controller depicted in Fig. 2, with , is
pulsates at twice the line frequency ( ), while the output such that . This scheme has the disadvantage
power remains constant. Therefore, the energy stored in the that any distortion in also appears in . The problem
boost PFCS must also pulsate at . Mostly, this is reflected can be removed at the expense of adding a phase-locked loop
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WALL AND JACKSON: FAST CONTROLLER DESIGN FOR SINGLE-PHASE POWER-FACTOR CORRECTION SYSTEMS 657
(20)
(PLL) to the controller so that . Both It is clear from definition (15) that the gain of
schemes will be considered in the following analysis, each is instantaneously bounded into the interval , where
being identified by the index parameter , as described in is the greatest allowable value of . The nonlinear
Table II. block is, therefore, contained inside the sector
Consider , where is the . Sufficient conditions for the absolute stability of
instantaneous input voltage magnitude. This can be used to a linear transfer function in negative feedback with a sector
find the input power to the boost PFCS. Note that, for the nonlinearity are given by the circle criterion [19]. In this case,
purpose of stability analysis, the nonreversible nature of the the “circle” is the half plane . For
circuit must be considered: , the Nyquist locus runs up the imaginary
axis and returns via the infinite semicircle enclosing the right
(14) half plane. Clearly, the locus neither intersects nor encircles
when the critical area. Therefore, the voltage loop is stable for any
(15)
when positive value of .
The state-space equation for the output voltage dynamics The steady-state output voltage tracking error can
can now be found by substitution of the input power expression be found by considering the equilibrium point of (19) with
(14) into (13): constant and :
(16)
(21)
Full feedback linearization of the voltage loop is possible,
provided suitable estimates are available for , and .
The resulting controller gives excellent tracking and transient The stability of the voltage loop has been established, so
response, even in the presence of sudden changes in load [11]. we need only consider the normal operating region, where
Unfortunately, the scheme is not practical for universal input . Under this restriction, is bounded
boost PFCS’s, because varies widely but cannot be into the sector [ ], with being the smallest
measured directly. In traditional controller designs, a second- allowable value of . It follows that, in normal operation,
order low-pass filter is used to estimate from , but the is bounded into a positive interval. Clearly, the tracking
resulting system has a very poor response to sudden changes in error increases with and is reduced by high open-loop gain
, e.g., brownouts. A large, long-lasting overshoot in . In order to minimize , it is tempting to
is observed at the start and end of brownout conditions. The use a large value of . However, there is a limit beyond
problems are caused by a long (many line periods) estimation which this cannot be increased. The maximum controller gain
lag inherent in this type of low-pass filter. Recently, a number which corresponds to the point at which is
of methods have been established to provide an estimate given below. If , the current loop can no longer be
of , in less than a line period, e.g., [17] and [18]. assumed to track without error. Therefore, the input power
Some of these rapid estimators can be realized using simple expression (14) becomes invalid, and the subsequent analysis
analog hardware, but these require tuning to the nominal is no longer applicable. The greatest steady-state tracking error
utility frequency and are not suitable for universal input boost which can be expected under the condition is given
PFCS’s. by (23), where is the maximum allowable output current:
We propose a partial feedback linearization, which simpli-
fies the output voltage dynamics of (16), but does not require (22)
a measurement of . By inspection, a suitable controller
form is given by (23)
(17)
The peak tracking error predicted above may be reduced by
where is a constant gain. increasing either or . If a PI controller is used in place
Under the action of this controller, the voltage-loop dynamic of , then will be eliminated. It is not possible to
(16) can be readily partitioned into ripple and ripple-averaged prove stability of the voltage loop under the action of a PI
components: controller without making further assumptions. By ignoring
the possibility of negative , a strictly positive lower bound
(18)
can be placed on . Under this condition, asymptotic stability
of the voltage loop can be proved for a PI controller with a
(19)
sufficiently small amount of integral action.
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658 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 44, NO. 5, OCTOBER 1997
V. ESTIMATION OF
During normal operation, is held constant and
. Applying this condition to the output voltage
dynamic equations (18) and (19) gives the following estimate
for :
(24)
A block diagram implementation of this estimator is de-
picted in Fig. 5. The PLL required to produce the signal
can also be made to produce the signal needed
by the alternative voltage-loop controller design. The gain
is the nominal value of , the reactance of
at .
The required measurements of and can be obtained
using current transformers placed in the circuit of Fig. 2 at
points indicated by , and . The transformers all operate in
branches where the current is discontinuous or alternating at Fig. 6. Voltage-loop block diagram.
. This gives the core material time to reset in each switching
cycle. As , and operate at , they are low-cost small-size
units. Typically, a high turns ratio (for example, ) is latter is preferred, as it gives a signal which contains much less
used to improve the signal-to-noise ratio obtained for a given ripple. In practice, is a first-order filter with a 3-dB point
power loss. By summing the secondary currents of and , at Hz, this and the rectifier being realized with a single
the signal is obtained. A superior signal-to-noise ratio op-amp. is passed through an identical filter/rectifier
and substantially reduced losses make this scheme preferable combination before being subtracted from to form
to the use of a current-sensing resistor. In a similar fashion, the error signal .
the outputs of and are summed to obtain the measurement The mean value of is proportional to . To
of needed by the current loop. eliminate long-term estimation errors, is passed through an
The accuracy of is dependent on accuracy of . integrator with its output range limited to the possible range
With universal input systems, a substantial variation in line of error in . Finally, the integrator output is biased around
frequency must be tolerated ( Hz Hz). In unity, and the result is used as a multiplicative weight on .
addition to this, the output capacitor is of the electrolytic type It is necessary that the adaptive estimator feedback loop
and will have a wide tolerance giving a total variation in is stable and rejects the ripple component of . To satisfy
of around 30%. Simulations show that serious input-current the latter requirement, the estimator crossover frequency
distortion occurs if the error in exceeds 5%. So, the must be well below the ripple frequency . The feedback
output-voltage ripple estimator described here is only viable loop can be considered as a linear forward path , defined
if it contains an adaptive procedure to determine . Such a below, and the nonlinear return path , which is bounded
circuit is described in Section VI. in the sector . The limitations placed on the integrator
may be included in the nonlinear block without extending the
VI. ADAPTIVE RIPPLE ESTIMATOR sector bounds:
The proposed voltage-loop controller and adaptive estimator (25)
for are shown in the voltage-loop block diagram of Fig. 6.
The adaptive estimator is a simple control loop which, in The stability can again be determined from the circle
the steady-state, forces to have the same magnitude criterion. For , the Nyquist locus runs up
as . The fixed gain is preset to a central position in the the imaginary axis and returns via the infinite semicircle
range of possible values for . enclosing the right half plane. The “circle” is the half plane
A measurement , which approximates to a rectified Re . Clearly, the locus neither intersects
version of , is formed by the action on the output-voltage nor encircles the critical region, so the adaptive procedure is
error of a high-pass filter and a precision stable for any positive value of . The high frequency rolloff
rectifier. It is important that the filter has near unity gain at . rate is only 20 dB/decade, so must be at least an order of
Either half- or full-wave rectification can be employed, but the magnitude below to give adequate ripple rejection. An
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WALL AND JACKSON: FAST CONTROLLER DESIGN FOR SINGLE-PHASE POWER-FACTOR CORRECTION SYSTEMS 659
(c) (d)
(a) (b)
Fig. 8. Iin for 67 V(rms), 500-Hz supply, (a) Vin , (b) Iin , timebase in ms.
(26)
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660 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 44, NO. 5, OCTOBER 1997
Authorized licensed use limited to: INDIAN INSTITUTE OF TECHNOLOGY BOMBAY. Downloaded on October 08,2021 at 17:05:27 UTC from IEEE Xplore. Restrictions apply.