L03 Binary Logic

University of British Columbia
Electrical and Computer Engineering

Digital Design and Microcomputers CPEN312
L03: Binary Logic and Gate

Implementations.
Dr. Jesús Calviño-Fraga. P.Eng.
Department of Electrical and Computer Engineering, UBC
Office: KAIS 3024
E-mail: jesusc@ece.ubc.ca
Phone: (604)-827-5387
January 14/19, 2022
Copyright © 2009-2022, Jesus Calvino-Fraga. Not to be copied, used, or

revised without explicit written permission from the copyright owner.
Objectives
• Truth tables
• OR, AND, NOT gates.
• NOR, NAND, XOR, XNOR gates.
• Boolean expressions.
• Voltages and bits.
• The electronics of logic gates.
L03: Binary Logic 2

1
Binary Logic and Operations
• Binary variables are based on two states:
– On/Off, Yes/No, True/False, etc.
– When used in electronics the two states are
represented as voltages.
– For convenience we call one state 1 and the other 0.
• The basic operations we can perform with binary
variables are:
– AND, represented with a dot (.)
– OR, represented with a plus (+)
– NOT, represented with a prime (‘) or a bar (-)
L03: Binary Logic 3
Truth Table
• A truth table enumerates all possible
combinations of inputs and the output of a logic
operation. For example, for a two input AND gate:
A, B are inputs. A B Y Y is the output.

There could be 0 0 0
more than 2!
0 1 0
Input
row-base 1 0 0
column =
Input output .
1 1 1
base 2
binary
=
L03: Binary Logic 4

Two
Inputs Out
Q
X 4
2
AND Gate
AND gate
.
symbe use for
A B Y=A.B
A
Y
0 0 0
B 0 1 0
1 0 0
Y = A⋅ B 1 1 1
Y = AB Truth Table
For convenience we can
skip the dot!
L03: Binary Logic 5
OR Gate
A B Y=A+B
A 0 0 0
Y
B 0 1 1
1 0 1
Y = A+ B 1 1 1
E Truth Table
L03: Binary Logic 6

3
NOT Gate
-
Inverter gate
.
A Y=A’
A Y
0 1
1 0
O
Y=A
will use both
Y = A' -
-
L03: Binary Logic 7

Logic Gates
• They can have more than one input, but
they have only one output.
• The output of a gate can be the input to
another gate.
• Two or more outputs can not be
connected together.
L03: Binary Logic 8

4
AND and NOT
A Y A B Y=(A.B)’
B 0 0 1
0 1 1
1 0 1
Y = A⋅ B 1 1 0
This operation is referred as a NOT Truth Table
AND, or NAND
L03: Binary Logic 9

NAND Gate
For convenience, we collapsed the not
gate into a circle at the output!
A A B Y=(A.B)’
Y
B 0 0 1
0 1 1
1 0 1
Y = A⋅ B 1 1 0
Truth Table
L03: Binary Logic 10

5
OR and NOT
A B Y=(A+B)’
A Y 0 0 1
B 0 1 0
1 0 0
Y = A+ B 1 1 0
This operation is referred as a NOT

Truth Table
OR, or NOR

NOR Gate
A
A B Y=(A+B)’
Y
0 0 1
B
0 1 0
Y = A+ B 1 0 0
1 1 0
Truth Table

6
Circles at the Inputs:
A
Can be redrawn as:

NOT A
A ↓
B
NOT B .
Y=A’.B’
Y A B
= .

has one
gate only
output
Example 1
• Obtain the truth table of the gate below.
A B Y=A’.B’
A
Y 0 I 0I 1
B 0 I
10 0
18 0 I 0
Y=A’.B’
11 10 1 O 0
A
Y
B
7
Example 2
• Obtain the truth table of the gate below.
A B C Y=A.B.C
0 0 0 0
A Y
0 0 1 0
B 0 1 0 0
C
0 1 1 0
Y=A.B.C 1 0 0 0
1 0 1 0
Three input AND gate.
1 1 0 0
1 1 1 1
Gates with more than two inputs
X L03: Binary Logic

16
an
.
8
2fundamental gates
[
⑧
⑳
ge
e
Example 3
• Obtain the truth table of the circuit below.
A B C Y
A
NAND 0 0 0 1
B 0 0 1 1
Y
0 1 0 1
OR 0 1 1 1
C
1 0 0 1
1 0 1 1
1 1 0 0
1 1 1 1
+
AB
XOR GATE
A
A B Y
A 0 0 0
Y
B 0 1 1
1 0 1
Y = A⊕ B
A 1 1 0
exclusive or

9
XNOR GATE AB
AB'+
A B Y
A
Y
0 0 1
B 0 1 0
1 0 0
Y = A⊕ B
1 1 1

Multiple Outputs
• If the logic circuit has more than one output
the truth table can include all of them:
A B X Y
A
I X
Oplus
i 0 0 0 1
O
AND
of ot i B
0 1 0 0
s 1 0 0 0
%
Y
N OR
1 1 1 0
Truth Table
*** I 10
Equations to/from Gates
• Often we need to convert logic equations
to gates and vice versa. For example:
·
=
AND
A Cor -=
YOT
B NAND + =
OR
Y=(A.B)’+C
Y
OR
C

- E
Example 4
,
EI) -
• Draw the gates circuit for the logic equation

Y=(A’+B)’.C.D’. Use one or two input gates only.
A’ (A’+B)’
A
all ad
B Y
C
D
(A’+B)’.C.D’
C.D’
D’
One possible solution!

11
Implementation of Logic Gates
• AND & OR gates can be built using
switches:
SWA SWB LIGHT
If SWA is on AND SWB is

on, then LIGHT is on
AND AND serves

Implementation of Logic Gates

• AND & OR gates can be built using
switches:
SWA
LIGHT
If SWA is on OR SWB is
on, then LIGHT is on
or seines
For the NOT gate

SWB we need a relay.
↳ need inverter .
OR L03: Binary Logic 24

12
Some history
• Relay: invented in 1835 by Joseph Henry
(1797–1878).
• Binary Logic: developed in 1847 by
Boolean George Boole (1815–1864).
-
log • Mechanical Computer: the Analytical

Engine proposed in 1837 by Charles
Babbage (1791–1871)
• It took humanity 90 years to put the above
three developments together!
Claude Shannon
• Credited with founding both
digital computer and digital
circuit design theory in 1937.
• Master thesis “A Symbolic
Analysis of Relay and
Switching Circuits” showed Claude Shannon
how to implement logic circuits (1916–2001)
with relays. 21 years
old

13
Relay
http://upload.wikimedia.org/wikipedia/commons/3/39/Relay2.jpg
http://www.glolab.com/relays/NC%20RELAY.jpg
secon
Electro-magnet magnets
moves a switch eb
contact Electronic
Symbol

Relay NOT Gate

12V
Logic ONE is 12V
A A Logic Zero is 0V
Y
-
If switch A is open (logic zero),

12V output Y is 12V (logic one)
If switch A is closed (logic one),
output Y is 0V (logic zero)
1zV
A y
=
= 0
0V
0
y
=
-> A 12v
inverter
=

14
Relay NOR Gate
12V
A B
A B Y=(A+B)’
Y
0V 0V 12V
0V 12V 0V
12V
12V 0V 0V
12V 12V 0V
0V
Truth Table
Believe it or not, computers had been built with relay gates!
Logic representation using relays:

Ladder Logic In course
not taught
paral elwee
OR
NOT
RUNG
AND
Ladder Logic is extensively used in industry to “program”
Programmable Logic Controllers (PLCs).
15
Ladder Logic in Shannon’s work
Make-before-break: In a switching device, a

configuration in which the new connection path is
established before the previous contacts are opened.
This prevents the switched path from ever seeing an
open circuit.
Propagation Delay
• Logic circuits do not change their outputs immediately
after the inputs change. There will be always a
propagation delay!
12V 12V
A
A 0V
Y
12V
12V
Y 0V
toff ton
0V
Ao-12 delay Y , +0
For relays ton/toff is in the tens of mili-seconds

good
nu
venaanes 16
Propagation Delay
• Propagation delays can affect the output
of a logic circuit in unexpected ways:
A
A
Y
↳ bl
dance
Y
Q C
glitch FIF

Diode Logic
• Diodes behave somehow like switches.
They let DC current flow in one direction
only.
• Similarly to switch logic, only AND & OR
gates can be implemented.
• To implement NOT, NAND, or NOR gates
a transistor is needed.

17
0 ⑧
0
0
b 0
I I
I Diode Logic ADI

-
E I VA>Va
W
- I
-
I
08
OR Gate
http://en.wikipedia.org/wiki/Diode_logic
AND Gate
%
I
I
I !

Transistor Logic
• With transistors, which behave similarly to
relays, we can implement a NOT gate as
well as any other gate we want!
• There are two types of transistor we can
use: -no
– Bipolar Junction Transistors or BJTs.
– Metal Oxide Semiconductor Field Effect
Transistors or MOSFETs. r cheaper -
+
faster .

18
BJT NOT Gate
• The basic NOT gate with Say VCC=5V, Logic 1:
Vin>2.5V, Logic 0:
BJTs looks like this: Vin<0.6V, 0.6>Vin<2.5 is
forbidden!
VCC
Vin
RC
A Q1 Y 5V
Y
RB 0 off 1 One
A
Q1
"* 1 on 0 2.5V
avoid
NaN Forbidden!
6
PNP 0.6V
Zero
NPN
behaves like
L03: Binary Logic amplifier 37
revised without explicit written permission from the copyright owner. and amplifiers
consume a lot of
power
Diode-Transistor-Logic (DTL)
NAND Gate
• The basic NAND gate with a BJT and diodes:
VCC
A B D1 D2 Q1 Y
RC 0 0 on on off 1
RD
Y
RB 0 1 on off off 1
A Q1
1 0 off on off 1
B 1 1 off off on 0
This is called Diode-Transistor-Logic or DTL. It was

the technology used in the Apollo spacecraft. Look for
Truth Table
“Apollo guidance computer”.
-
- -
19
buy
can
Transistor-Transistor Logic (TTL) you today -
still

MOSFET Logic
• MOSFET logic, in particular Complementary MOSFETs
or CMOS, is the most widely used kind of logic. It is
small, fast, cheap, and reliable.
• CMOS uses two types of MOSFETs. The N-MOSFET is
turned on (closes) with logic one at the gate pin; the P-
MOSFET is turned on (closes) with logic zero at the gate
pin.
Source Drain
Gate Gate
Drain Source
P-MOSFET N-MOSFET

ENDL3 .
20
5GHz CMOS NOT Gate
upper
.
Say VDD=5V, Logic 1:

VDD Vin>3.5V, Logic 0:
Vin<1.5V, 1.5>Vin<3.5 is
PMOS forbidden!
Q1
Vin
I
A Y A Q1 Q2 Y
5V
VaD 0 on off 1 One
Q2 3.5V
1 off on 0
S
Forbidden!
1.5V
Truth Table
ros Zero
10-12-10-15
&
might
both
ENDL3 be onsame
e
CMOS NAND Gate

pin
Late
VDD
source
Q1 Q2
↳rain
A B Q1 Q2 Q3 Q4 Y
Y
0 0 on on off off 1
A 0 1 on off off on 1
Q3
1 0 off on on off 1
B 1 1 off off on on 0
Q4
Truth Table

21
CMOS NOR Gate
VDD
A
Q3
A B Q1 Q2 Q3 Q4 Y
B 0 0 off off on on 1
Q4
Y
0 1 off on on off 0
1 0 on off off on 0
Q1 Q2 1 1 on on off off 0
Truth Table

ask
will
Exercises exam
↓on
.
1. Obtain the truth table and draw the digital

circuit for the equation Y=A’.B’+A.B. Have you
seen that truth table before?
2. Design a three input NAND gate using a BJT,
diodes, and resistors.
3. Design a three input NOR gate using
MOSFETS.
4. Design a 2 input OR gate using MOSFETS.
5. Design a 2 input AND gate using MOSFETS.
6. Draw the digital circuit for the 2-input, 4-output
truth table in the next slide.
22
Exercises
OR
d
?
↓ a
?
NAND
Inputs Outputs
A B Y1 Y2 Y3 Y4
0 0 0 1 1 1
0 1 1 0 1 1
1 0 1 1 0 1
1 1 1 1 1 0
Truth Table

=D- -
D -
AND
=>) B
A
+
-
OR
Yz
=
NOT
-
Do-
+ B
NAND
=
DO- A
Yz
=
NOR =0-
XOR=1 -
XNOR =DO
-
It
ground
I
no name
23

L03 Binary Logic

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

L03 Binary Logic

Uploaded by

Copyright:

Available Formats

University of British Columbia

Electrical and Computer Engineering

L03: Binary Logic and Gate

January 14/19, 2022

Copyright © 2009-2022, Jesus Calvino-Fraga. Not to be copied, used, or

L03: Binary Logic 2

A, B are inputs. A B Y Y is the output.

L03: Binary Logic 4

symbe use for

L03: Binary Logic 6

L03: Binary Logic 7

L03: Binary Logic 8

L03: Binary Logic 9

L03: Binary Logic 10

This operation is referred as a NOT

L03: Binary Logic 11

L03: Binary Logic 12

Can be redrawn as:

L03: Binary Logic 13

Gates with more than two inputs

X L03: Binary Logic

L03: Binary Logic 18

L03: Binary Logic 19

L03: Binary Logic 21

• Draw the gates circuit for the logic equation

One possible solution!

If SWA is on AND SWB is

AND AND serves

L03: Binary Logic 23

Implementation of Logic Gates

For the NOT gate

OR L03: Binary Logic 24

log • Mechanical Computer: the Analytical

L03: Binary Logic 26

L03: Binary Logic 27

Relay NOT Gate

If switch A is open (logic zero),

L03: Binary Logic 28

Logic representation using relays:

Make-before-break: In a switching device, a

L03: Binary Logic 32

L03: Binary Logic 33

L03: Binary Logic 34

I Diode Logic ADI

L03: Binary Logic 35

L03: Binary Logic 36

This is called Diode-Transistor-Logic or DTL. It was

L03: Binary Logic 39

L03: Binary Logic 40

Say VDD=5V, Logic 1:

CMOS NAND Gate

L03: Binary Logic 42

L03: Binary Logic 43

1. Obtain the truth table and draw the digital

L03: Binary Logic 45

You might also like