Datasheet - HK Php78nq03lt 320813

PHP/PHB/PHD78NQ03LT
TrenchMOS™ logic level FET

Rev. 03 — 26 June 2002 Product data
1. Product profile
1.1 Description
N-channel logic level field-effect power transistor in a plastic package using
TrenchMOS™ technology.
Product availability:
PHP78NQ03LT in SOT78 (TO-220AB)

PHB78NQ03LT in SOT404 (D2-PAK)
PHD78NQ03LT in SOT428 (D-PAK).
1.2 Features
■ Low on-state resistance ■ Fast switching
1.3 Applications
■ Computer motherboards ■ DC to DC converters
1.4 Quick reference data

■ VDS = 25 V ■ ID = 75 A
■ Ptot = 93 W ■ RDSon = 9 mΩ
2. Pinning information
Table 1: Pinning - SOT78, SOT404, SOT428 simplified outlines and symbol
Pin Description Simplified outline Symbol
1 gate (g) mb mb
mb
2 drain (d) [1]
d
3 source (s)
mb mounting base,
connected to g
drain (d) 2 2
1 3 MBB076 s
1 3 MBK116
Top view MBK091
MBK106
1 2 3
SOT78 (TO-220AB) SOT404 (D2-PAK) SOT428 (D-PAK)
[1] It is not possible to make connection to pin 2 of the SOT404 or SOT428 packages.
Philips Semiconductors PHP/PHB/PHD78NQ03LT
3. Limiting values
Table 2: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDS drain-source voltage (DC) 25 °C < Tj < 175 °C - 25 V
VDGR drain-gate voltage (DC) 25 °C < Tj < 175 °C; RGS = 20 kΩ - 25 V
ID drain current (DC) Tmb = 25 °C; VGS = 5 V; Figure 2 and 3 - 61 A
Tmb = 100 °C; VGS = 5 V; Figure 2 - 43 A
Tmb = 25 °C; VGS = 10 V - 75 A
Tmb = 100 °C; VGS = 10 V - 53 A
VGS gate-source voltage - ±20 V
IDM peak drain current Tmb = 25 °C; pulsed; tp ≤ 10 µs; Figure 3 - 228 A
Ptot total power dissipation Tmb = 25 °C; Figure 1 - 93 W
Tstg storage temperature −55 +175 °C
Tj junction temperature −55 +175 °C
Source-drain diode
IS source (diode forward) current (DC) Tmb = 25 °C - 75 A
ISM peak source (diode forward) current Tmb = 25 °C; pulsed; tp ≤ 10 µs - 228 A
Avalanche ruggedness
EDS(AL)S non-repetitive drain-source unclamped inductive load; ID = 43 A; - 185 mJ
avalanche energy tp = 0.25 ms; VDD ≤ 15 V; RGS = 50 Ω;
VGS = 10 V; starting Tj = 25 °C
IDS(AL)S non-repetitive avalanche current unclamped inductive load; VDD ≤ 15 V; - 75 A
RGS = 50 Ω; VGS = 10 V
9397 750 09667 © Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data Rev. 03 — 26 June 2002 2 of 14

03aa16 03aa24
120 120
Pder Ider
(%) (%)
80 80
40 40
0
0
0 50 100 150 200
Tmb (°C) 0 50 100 150 200
Tmb (°C)
P tot ID
P der = ----------------------- × 100% I der = ------------------- × 100%
P °
I °
tot ( 25 C ) D ( 25 C )
Fig 1. Normalized total power dissipation as a Fig 2. Normalized continuous drain current as a
function of mounting base temperature. function of mounting base temperature.
003aaa175
103
ID
(A)
Limit RDSon = VDS / ID tp = 10 µs
102
100 µs
DC 1 ms
10
10 ms
100 ms
1
1 10 102
VDS (V)
Tmb = 25 °C; IDM is single pulse.

Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.

4. Thermal characteristics
Table 3: Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
Rth(j-mb) thermal resistance from junction to mounting base Figure 4 - - 1.6 K/W
Rth(j-a) thermal resistance from junction to ambient
SOT78 vertical in still air - 60 - K/W
SOT428 SOT428 minimum footprint; - 75 - K/W
mounted on a PCB
SOT404 and SOT428 SOT404 minimum footprint; - 50 - K/W
mounted on a PCB
4.1 Transient thermal impedance
003aaa233
10
Zth(j-mb)
(K/W)
1
δ = 0.5
0.2
0.1
10-1 0.05 tp
P δ=
T
0.02
tp t
single pulse T
10-2
10-5 10-4 10-3 10-2 10-1 1 10
tp (s)
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.

5. Characteristics
Table 4: Characteristics
Tj = 25 °C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Static characteristics
V(BR)DSS drain-source breakdown voltage ID = 0.25 mA; VGS = 0 V
Tj = 25 °C 25 - - V
Tj = −55 °C 22 - - V
VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS; Figure 9
Tj = 25 °C 1 1.5 2 V
Tj = 175 °C 0.5 - - V
Tj = −55 °C - - 2.3 V
IDSS drain-source leakage current VDS = 25 V; VGS = 0 V
Tj = 25 °C - 0.05 10 µA
Tj = 175 °C - - 500 µA
IGSS gate-source leakage current VGS = ±15 V; VDS = 0 V - 10 100 nA
RDSon drain-source on-state resistance VGS = 5 V; ID = 25 A; Figure 7 and 8
Tj = 25 °C - 11.5 13.5 mΩ
Tj = 175 °C - 20.7 24.3 mΩ
VGS = 10 V; ID = 25 A;
Tj = 25 °C - 7.65 9 mΩ
Dynamic characteristics
gfs forward transconductance VDS = 25 V; ID = 50 A - 34 - S
Qg(tot) total gate charge ID = 50 A; VDD = 15 V; VGS = 5 V; Figure 13 - 13 - nC
Qgs gate-source charge - 4.8 - nC
Qgd gate-drain (Miller) charge - 4.2 5.6 nC
Ciss input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz; Figure 11 - 1074 - pF
Coss output capacitance - 389 - pF
Crss reverse transfer capacitance - 156 - pF
td(on) turn-on delay time VDD = 15 V; ID = 25 A; VGS = 10 V; - 20 33 ns
tr rise time RG = 5.6 Ω; resistive load - 92 130 ns
td(off) turn-off delay time - 30 48 ns
tf fall time - 40 60 ns
Source-drain diode
VSD source-drain (diode forward) voltage IS = 25 A; VGS = 0 V; Figure 12 - 0.95 1.2 V
trr reverse recovery time IS = 20 A; dIS/dt = −100 A/µs; VDS = 25 V - 40 - ns
Qrr recovered charge - 32 - nC

003aaa170
003aaa169 40
60
10 V 4.5 V 4V ID VDS > ID x RDSon
6V
(A)
ID
5V
(A) 30
40
3.5 V
20
20 175 °C Tj = 25 °C
10
VGS = 3 V
0 0
0 0.5 1 1.5 2 1 2 3 4
VGS (V)
VDS (V)
Tj = 25 °C Tj = 25 °C and 175 °C; VDS ≥ ID x RDSON

Fig 5. Output characteristics: drain current as a Fig 6. Transfer characteristics: drain current as a
function of drain-source voltage; typical values. function of gate-source voltage; typical values.
003aaa171 03af18
0.06 2
3.5 V
VGS = 3 V
RDSon a
(Ω)
1.5
0.04
4V
0.02
0.5
5V
10 V
6V
0 0
0 20 40 60 -60 0 60 120 180
ID (A) Tj (°C)
Tj = 25 °C R DSon
a = ----------------------------
-
R DSon ( 25 °C )
Fig 7. Drain-source on-state resistance as a function Fig 8. Normalized drain-source on-state resistance
of drain current; typical values. factor as a function of junction temperature.

03aa33 03aa36
2.5 10-1
VGS(th) ID
(V) (A)
2 max 10-2
1.5 typ 10-3

min typ max
1 min 10-4
0.5 10-5
0 10-6
-60 0 60 120 180 0 1 2 3
Tj (°C) VGS (V)
ID = 1 mA; VDS = VGS Tj = 25 °C; VDS = 5 V

Fig 9. Gate-source threshold voltage as a function of Fig 10. Sub-threshold drain current as a function of
junction temperature. gate-source voltage.
003aaa173
003aaa172 40
104
IS
(A)
C
30
(pF)
Ciss
20
103
175 °C Tj = 25 °C
Coss
10
Crss
0
102
0 0.4 0.8 1.2 1.6
10-1 1 10 102 VSD (V)
VDS (V)
VGS = 0 V; f = 1 MHz Tj = 25 °C and 175 °C; VGS = 0 V

Fig 11. Input, output and reverse transfer capacitances Fig 12. Source (diode forward) current as a function of
as a function of drain-source voltage; typical source-drain (diode forward) voltage; typical
values. values.

003aaa174
10
VGS
(V)
8
0
0 10 20 30 40
QG (nC)
Tj = 25 °C; ID = 50 A; VDD = 15 V
Fig 13. Gate-source voltage as a function of gate charge; typical values.

6. Package outline
Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB SOT78
E A
p A1
q mounting
D1 base
L1(1) L2
Q
b1
L
1 2 3
b c
e e
0 5 10 mm
scale
DIMENSIONS (mm are the original dimensions)

L2
UNIT A A1 b b1 c D D1 E e L L1(1) p q Q
max.
mm 4.5 1.39 0.9 1.3 0.7 15.8 6.4 10.3 15.0 3.30 3.8 3.0 2.6
2.54 3.0
4.1 1.27 0.7 1.0 0.4 15.2 5.9 9.7 13.5 2.79 3.6 2.7 2.2
Note
1. Terminals in this zone are not tinned.
OUTLINE REFERENCES EUROPEAN

ISSUE DATE
VERSION IEC JEDEC EIAJ PROJECTION
00-09-07
SOT78 3-lead TO-220AB SC-46
01-02-16
Fig 14. SOT78 (TO-220AB).

Plastic single-ended surface mounted package (Philips version of D2-PAK); 3 leads

(one lead cropped) SOT404
E A1
D1 mounting
base
HD
Lp
1 3
b c
e e Q
0 2.5 5 mm
scale

D
UNIT A A1 b c D1 E e Lp HD Q
max.
mm 4.50 1.40 0.85 0.64 11 1.60 10.30 2.54 2.90 15.80 2.60
4.10 1.27 0.60 0.46 1.20 9.70 2.10 14.80 2.20

ISSUE DATE
VERSION IEC JEDEC EIAJ PROJECTION
99-06-25
SOT404
01-02-12
Fig 15. SOT404 (D2-PAK)

Plastic single-ended surface mounted package (Philips version of D-PAK); 3 leads

(one lead cropped) SOT428
seating plane
y
A
E A A2
b2 A1 E1
mounting
base
D1
D
HE
L2
2
L1
L
1 3
b1 b w M A c
e
e1
0 10 20 mm
scale

D1 L1 y
UNIT A A1(1) A2 b b1 b2 c D E E1 e e1 HE L L2 w
min. min. max.
mm 2.38 0.65 0.93 0.89 1.1 5.46 0.4 6.22 6.73 4.81 2.285 4.57 10.4 2.95 0.9
4.0 0.5 0.2 0.2
2.22 0.45 0.73 0.71 0.9 5.26 0.2 5.98 6.47 4.45 9.6 2.55 0.5
Note
1. Measured from heatsink back to lead.

ISSUE DATE
VERSION IEC JEDEC JEITA PROJECTION
99-09-13
SOT428 TO-252 SC-63
01-12-11
Fig 16. SOT428 (D-PAK)

7. Revision history
Table 5: Revision history

Rev Date CPCN Description
03 20020626 - Product data; supersedes data of 22 March 2002
Section 3 “Limiting values” Addition of Avalanche ruggedness.
Graphs updated to latest standard.
02 20020322 - Product data; supersedes data of 14 November 2001
Section 3 “Limiting values” Standardized VGS rating.
Section 4 “Thermal characteristics” Clarification of thermal resistances table.
01 20011114 - Product data; initial version.

8. Data sheet status
Data sheet status[1] Product status[2] Definition

Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors
reserves the right to change the specification in any manner without notice.
Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a
later date. Philips Semiconductors reserves the right to change the specification without notice, in order to
improve the design and supply the best possible product.
Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to
make changes at any time in order to improve the design, manufacturing and supply. Changes will be
communicated according to the Customer Product/Process Change Notification (CPCN) procedure
SNW-SQ-650A.
[1] Please consult the most recently issued data sheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
9. Definitions 10. Disclaimers

Short-form specification — The data in a short-form specification is Life support — These products are not designed for use in life support
extracted from a full data sheet with the same type number and title. For appliances, devices, or systems where malfunction of these products can
detailed information see the relevant data sheet or data handbook. reasonably be expected to result in personal injury. Philips Semiconductors
customers using or selling these products for use in such applications do so
Limiting values definition — Limiting values given are in accordance with
at their own risk and agree to fully indemnify Philips Semiconductors for any
the Absolute Maximum Rating System (IEC 60134). Stress above one or
damages resulting from such application.
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any Right to make changes — Philips Semiconductors reserves the right to
other conditions above those given in the Characteristics sections of the make changes, without notice, in the products, including circuits, standard
specification is not implied. Exposure to limiting values for extended periods cells, and/or software, described or contained herein in order to improve
may affect device reliability. design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
Application information — Applications that are described herein for any
licence or title under any patent, copyright, or mask work right to these
of these products are for illustrative purposes only. Philips Semiconductors
products, and makes no representations or warranties that these products are
make no representation or warranty that such applications will be suitable for
free from patent, copyright, or mask work right infringement, unless otherwise
the specified use without further testing or modification.
specified.
11. Trademarks
TrenchMOS — is a trademark of Koninklijke Philips Electronics N.V.
Contact information
For additional information, please visit http://www.semiconductors.philips.com.
For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com. Fax: +31 40 27 24825

Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.4 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 1
3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
4 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
4.1 Transient thermal impedance . . . . . . . . . . . . . . 4
5 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5
6 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12
8 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 13
9 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
10 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
11 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
© Koninklijke Philips Electronics N.V. 2002.

Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner.
The information presented in this document does not form part of any quotation or
contract, is believed to be accurate and reliable and may be changed without notice. No
liability will be accepted by the publisher for any consequence of its use. Publication
thereof does not convey nor imply any license under patent- or other industrial or
intellectual property rights.
Date of release: 26 June 2002 Document order number: 9397 750 09667

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PHP/PHB/PHD78NQ03LT

TrenchMOS™ logic level FET

PHP78NQ03LT in SOT78 (TO-220AB)

1.4 Quick reference data

SOT78 (TO-220AB) SOT404 (D2-PAK) SOT428 (D-PAK)

Product data Rev. 03 — 26 June 2002 2 of 14

Tmb = 25 °C; IDM is single pulse.

Product data Rev. 03 — 26 June 2002 3 of 14

4.1 Transient thermal impedance

Product data Rev. 03 — 26 June 2002 4 of 14

Product data Rev. 03 — 26 June 2002 5 of 14

Tj = 25 °C Tj = 25 °C and 175 °C; VDS ≥ ID x RDSON

Product data Rev. 03 — 26 June 2002 6 of 14

1.5 typ 10-3

ID = 1 mA; VDS = VGS Tj = 25 °C; VDS = 5 V

VGS = 0 V; f = 1 MHz Tj = 25 °C and 175 °C; VGS = 0 V

Product data Rev. 03 — 26 June 2002 7 of 14

Product data Rev. 03 — 26 June 2002 8 of 14

DIMENSIONS (mm are the original dimensions)

OUTLINE REFERENCES EUROPEAN

Fig 14. SOT78 (TO-220AB).

Product data Rev. 03 — 26 June 2002 9 of 14

Plastic single-ended surface mounted package (Philips version of D2-PAK); 3 leads

DIMENSIONS (mm are the original dimensions)

OUTLINE REFERENCES EUROPEAN

Fig 15. SOT404 (D2-PAK)

Product data Rev. 03 — 26 June 2002 10 of 14

Plastic single-ended surface mounted package (Philips version of D-PAK); 3 leads

DIMENSIONS (mm are the original dimensions)

OUTLINE REFERENCES EUROPEAN

Fig 16. SOT428 (D-PAK)

Product data Rev. 03 — 26 June 2002 11 of 14

Table 5: Revision history

Product data Rev. 03 — 26 June 2002 12 of 14

8. Data sheet status

Data sheet status[1] Product status[2] Definition

9. Definitions 10. Disclaimers

Product data Rev. 03 — 26 June 2002 13 of 14

© Koninklijke Philips Electronics N.V. 2002.

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