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Proceedings of 4th International Conference on Energy Efficient Technologies for Sustainability–ICEETS’18.

St.Xavier’s Catholic College of Engineering, Nagercoil, TamilNadu, India, from 5th to 7th April, 2018.
Available in SSRN eLibrary of Elsevier

CASCADED MULTI LEVEL THREE PHASE INVERTER WITH LEVEL


DOUBLING NETWORK USING MPPT AND DC-DC CONVERTER FOR
PHOTOVOLTAIC ARRAY
Abisha A*, Abragam Siyon Sing M**
*M.E - Power Electronics & drives, **Assistant Professor
Dept. of EEE, St.Xavier’s Catholic College of Engineering

Abstract - Solar radiant energy accounts for most of the usable renewable energy on this earth. Photovoltaic
(PV) is a method of generating electrical power by converting solar radiation into direct current electricity
using semiconductor that exhibit the photovoltaic effect. In this paper, the performance of a PV system with
dc/dc converter where switching is controlled by MPPT technique connected Multi Level Inverter topology is
modeled. Multilevel inverters are suitable in high voltage & high power application due to their ability to
synthesize waveforms with better harmonic spectrum. This paper presents the design and study of P-V and I-
V characteristics of photovoltaic cell and the output of this PV array is connected to dc/dc converter, for
which, the switching is done by Perturb and Observe MPPT algorithm. A symmetric cascaded H-bridge
multilevel inverter topology using a level doubling network (LDN) is coupled with the output of photovoltaic
system. The level doubling network will double the number of output voltage levels. The proposed multi-level
inverter alone is capable of producing seven level output. Using the level doubling network with the proposed
inverter, 13 level output is obtained which significantly reduces the harmonic content in the obtained output
voltage, and reduce the cost and size of the power filter. The performance of the proposed topology is verified
using MATLAB/SIMULINK.

Keywords – solar, photovoltaic, multilevel inverter, single-phase converter, maximum power point
tracking(MPPT), LDN, Total harmonic distortion(THD).

INTRODUCTION
As the electricity market is slowly moved towards generating power using renewable energy, researches are
going worldwide to enhance the power generation from these sources. The generation and implementation of
renewable energy is an issue that is gaining increasing significance in and around the world[1]. Among the renewable
energy, Solar Energy plays a vital role in electrictiy power generation because it is readily available in the earth at
free of cost, noiselessness, zero polluted source and simple in its operation and maintenence. Solar Photovoltaic is
going to be the disruptive technology in energy sector. The electricity can be generated from sunlight by converting
the photon energy into direct current electricity using a semi conductor material which have the photovoltaic
effect[2].
The elctricity power generated by the solar panel fluctuates due to the variations in temperature and radiation
from the sunlight. In order to mitigate these variations, Maximum Power Point Tracking(MPPT) techinique is
implemented to transfer the highest possible and most stable power from the source[3]. It gives maximum power
from the PV modules irrespective of solar irradiance and temperature. There are lots of MPPT algorithm like
distributed MPPT, the Gauss-Newton technique, adaptive perturbation and observation, estimated perturb and
perturb, adaptive fuzzy and particle swarm optimization(PSO)-basedMPPT, etc. among which Perturb & Obsrve(P &
O) algorithm is most commonly used it is simple and ease to use. [4]-[7]
In MPPT algorithm, the voltage and current output of the PV array is measured; the power is calculated and
duty cycle of the converter is adjusted for tracking MPP[8]. DC/DC converters are adopted to transfer the required
high quality dc power from photovoltaic power with lots of disturbances. These converters maintain the ouput voltage
tracking performance at an expected level. Various converters like boost converter, buck converter, cuk converter,
zeta converter, sepic converters and their modified versions are available. Zeta converter is used to extract the
maximum power available from the PV array. The zeta converter provides increase or decrease in the output voltage.
It provides the isolated output voltage or achieve power factor correction[9]-[14]. It is also used to reduce the current
ripple with the help of the capacitors in the converter. [15]. The regulated dc voltage output from the dc-dc converter
is fed into the voltage divider to divide the voltage into three equal inputs to the multi level inverter to get inverted
alternating output.
There are three main types of multilevel topologies, which include, diode clamped inverters, flying capacitor
clamped inverters and cascaded H bridge multilevel inverters[16]-[18]. Among the mentioned three topologis, the

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https://ssrn.com/abstract=3159787
Proceedings of 4th International Conference on Energy Efficient Technologies for Sustainability–ICEETS’18.
St.Xavier’s Catholic College of Engineering, Nagercoil, TamilNadu, India, from 5th to 7th April, 2018.
Available in SSRN eLibrary of ELSEVIER

former two have the main problem of balancing the dc voltage levels and the H bridge inverters have many isolated
dc sources. Multi-level inverters have obtained phenomenal attention as a single stage inverter. Due to their
advantages such as generating output voltage with extremely low distortion factor, small output filter size and low
total harmonic distortion, they still have great attention for the researchers in converting the power[19]-[20]. The
more the levels of the output ac voltage, the less the harmonics in the output. So level doubling network is adopted
with the multilevel inverter to double the level of the inverted output from the MLI. This LDN has the self balancing
capability during the positive and negative cycles of the ac output[21].

SYSTEM DESCRIPTION
Photovoltaic modules use light energy from the Sun to generate electricity through the photovoltaic effect.
Maximum Power Point Tracking is applied using Perturb and Observe algorithm to track the maximum power from
the pv array. In this algorithm the module voltage is continuously perturbed and the corresponding power is
compared with the previous power. A slight perturbation is introduced in this method. Due to this perturbation the
power of the module varies. If the power increases then perturbation is continued in that direction. After reaching at
peak point the power at MPP is zero and then decreases hence the perturbation reverses in that direction. The output
from solar panel using MPPT technique is fed to a DC-DC converter, which boost the solar output voltage required to
feed the multi-level inverter. Then the converter output is given to the cascaded H-bridge multilevel inverter through
voltage divider because, in three phase multilevel inverter each phase contain three bridges and each bridge contain
separate dc source so by using voltage divider total voltage is distributed to these three dc sources. In multilevel
inverter pulse width modulation technique is used. Then the output of the multilevel inverter is given to the LDN
system alternatively that means when the inverter produces an even voltage level with either positive or negative
polarity, the LDN will be bypassed and when an odd voltage level is generated, the LDN will be considered. In this
circuit produce 13 level output voltage using LDN.

Fig.1. Proposed system of MLI with LDN using MPPT and Converter for PV array
PV module
Usually a number of PV modules are arranged in series and parallel to meet the energy requirements. PV
modules of different sizes are commercially available. A PV array consists of several photovoltaic cells in series and
parallel connections. Series connections are responsible for increasing the voltage of the module whereas the parallel
connection is responsible for increasing the current in the array.

Fig.2. Equivalent circuit of solar cell

Electroniccopy
Electronic copy available
available at:
at: https://ssrn.com/abstract=3159787
https://ssrn.com/abstract=3159787
Proceedings of 4th International Conference on Energy Efficient Technologies for Sustainability–ICEETS’18.
St.Xavier’s Catholic College of Engineering, Nagercoil, TamilNadu, India, from 5th to 7th April, 2018.
Available in SSRN eLibrary of ELSEVIER

Typically a solar cell can be modeled by a current source and an inverted diode connected in parallel to it. It
has its own series and parallel resistance which represents the series and parallel connections. Series resistance is due
to hindrance in the path of flow of electrons from n to p junction and parallel resistance is due to the leakage current.

The output current from the photovoltaic array is

(1)

(2)

where Io is the reverse saturation current of the diode, q is the electron charge, Vd is the voltage across the diode, k is
Boltzmann constant (1.38 * J/K) and T is the junction temperature in Kelvin (K).
From eq. 1 and 2
(3)
Using suitable approximations,
( (4)
where, I is the photovoltaic cell current, V is the PV cell voltage and n is the diode ideality factor.

P & O MPPT Algorithm


MPPT algorithms is required in order to track and obtain the maximum power from a solar array. The P&O
method operates by periodically incrementing or decrementing the output terminal voltage of the PV cell and
comparing the power obtained in the current cycle with the power of the previous one (performs dP/dV ). If the
voltage varies and the power increases, the control system changes the operating point in that direction; otherwise, it
changes the operating point in the opposite direction. Once the direction for the change of voltage is known, the
voltage is varied at a constant rate. This rate is a parameter that should be adjusted to allow the balance between
faster response and less fluctuation in steady state.
When the stable condition is arrived the algorithm oscillates around the peak power point. In order to
maintain the power variation small, the perturbation size should remain very small. The technique is advanced in such
a way that a reference voltage of the module is set corresponding to the peak voltage of the module. It is observed
that there will be some power loss due to this perturbation and also fails to track the maximum power under fast
changing atmospheric conditions.

Figure.3. P & O Algorithm

DC to DC converter

Electronic copy available at: https://ssrn.com/abstract=3159787


Proceedings of 4th International Conference on Energy Efficient Technologies for Sustainability–ICEETS’18.
St.Xavier’s Catholic College of Engineering, Nagercoil, TamilNadu, India, from 5th to 7th April, 2018.
Available in SSRN eLibrary of ELSEVIER

A DC-to-DC converter is an electronic circuit that converts a source of direct current (DC) from
one voltage level to another. It is a type of electric power converter. It contains many types. Here zeta converter is
adopted as it gives the required voltage at the output.
A zeta converter is a fourth order non linear system being that, with regard to energy input, it can seen as buck-
boost-buck converter and with regard to the output, it can be seen as boost-buck-boost converter. The ideal switch
based realization of zeta converter is depicted. Although a number of operating modes are possible for this converter
depending on inductance value, load resistance and operating frequency, here only continuous inductor current is
analyzed using the well known state-space averaging method.

Voltage divider
In electronics, a voltage divider is an electrical circuit which creates an output voltage which is proportional
to an input voltage. Voltage dividers are also known as resistor divider and potential divider. It can be made of
two resistors or it can be one potentiometer (variable resistor). The output voltage is depends on component values, or
on the setting of the potentiometer. When an electrical load gets power from the divider's center point, the voltage
may change.

Multilevel Inverter with LDN


In this paper, cascaded multilevel inverter is connected with LDN network. LDN is the level doubling
network system. Here the output from the multilevel inverter is doubled. The topology is realized by adding an extra
half bridge connected to a capacitor that maintains half the voltage of other bridges by a self-balancing mechanism.
For a three-phase system, three half-bridges are connected in parallel. Note that the dc buses of these half-bridges do
not consume any power. If this delivers a given amount of power in the first half cycle, it will absorb the same
amount of power in the next half cycle.
If there are N numbers of H-bridges that are cascaded in the multilevel inverter, then the circuit can generate
2N + 1 levels of output voltage without the LDN. The circuit will generate 4N+1 levels of output voltage from multi-
level inverter with level doubling network.

Fig.4. Multilevel inverter with Level Doubling Network

Each phase of the inverter may operate in one of the four different modes. When the inverter produces an
even voltage level with either positive or negative polarity, the LDN will be bypassed. When an odd voltage level is
generated, LDN will always be in the circuit. For the positive side half cycle, LDN voltage will be added with the rest
of the converter voltage. When it is required to generate an odd voltage at negative half cycle, the positive LDN
voltage will be algebraically summed with the negative voltage of the rest of the converter.

Electronic copy available at: https://ssrn.com/abstract=3159787


Proceedings of 4th International Conference on Energy Efficient Technologies for Sustainability–ICEETS’18.
St.Xavier’s Catholic College of Engineering, Nagercoil, TamilNadu, India, from 5th to 7th April, 2018.
Available in SSRN eLibrary of ELSEVIER

The switching table is thus formed for the proposed inverter with three CHBs per phase (as shown in Table
I). Cells 1, 2, and 3 are of equal voltage. Cell 4 is at a voltage half of other cells and having only two switches (due to
half-bridge configuration). Cell 4 acts as a level doubling block for the entire inverter circuit. For a poly phase
system, these LDNs of all phases may be connected to a common dc bus and will also help in reducing the dc bus
current ripple (with corresponding reduction in dc bus capacitance). It is important to note that, for N number of
voltage cells, the symmetry restricts the maximum voltage levels in both positive and negative sides to be 2N,
resulting in a total of 4N + 1 levels (by including the LDN). Therefore, if the LDN is added to a 2N + 1 level MLI, the
topology will effectively behave like an MLI of 4N + 1 levels, where N is an integer.

Fig.5. Switching table for MLI and LDN

SIMULINK MODEL
Matlab/Simulink diagram of proposed thirteen level MLI (Symmetrical configuration) and its output voltage
and current wave form is shown in the following figures. From fig., the wave form contains thirteen level output
voltage and here the inverter uses twelve switches and connected with level doubling network system. LDN contain
two switches per phase.

Figure 6: Simulink model of three phase multilevel inverter with LDN

Electronic copy available at: https://ssrn.com/abstract=3159787


Proceedings of 4th International Conference on Energy Efficient Technologies for Sustainability–ICEETS’18.
St.Xavier’s Catholic College of Engineering, Nagercoil, TamilNadu, India, from 5th to 7th April, 2018.
Available in SSRN eLibrary of ELSEVIER

Figure 7: Simulink model single phase system

The solar photovoltaic array (SPVA) is modeled, designed and simulated in MATLAB/Simulink. The
MATLAB/Simulink model of PV array is shown in the form of subsystem in Fig. perturb and observe algorithm of
MPPT is also modeled in MATLAB including MOSFET based DC-DC zeta converter. The voltage and current
outputs of the SPV array is taken as input for the MPPT model and the maximum power point (MPP) of voltage and
currents is tracked by changing the duty cycle of zeta converter by switching of MOSFET. The outputs at the load
side of the converter i.e. voltage and current is modified by converter to maintain the maximum power at the load
side and zeta converter boost the PV array voltage to desired level.

Figure 8: Simulink model of photovoltaic system using MPPT algorithm

Voltage divider works on a Simple Principal, if three resistors are connected in series across a voltage source
there is a division of the total voltage. This division factor is completely dependent on value of resistances. If the
resistors are of same value, Voltage at Junction of three resistors is one-third of voltage source.

RESULTS AND DISCUSSIONS


The following fig. represents the V-I and P-V characteristics of photovoltaic cell with the maximum voltage
at around 28V for the considered PV cell. This voltage is increased to 300V voltage by the boost converter and the
obtained voltage is divided equally for the three bridges.

Electronic copy available at: https://ssrn.com/abstract=3159787


Proceedings of 4th International Conference on Energy Efficient Technologies for Sustainability–ICEETS’18.
St.Xavier’s Catholic College of Engineering, Nagercoil, TamilNadu, India, from 5th to 7th April, 2018.
Available in SSRN eLibrary of ELSEVIER

Fig.9. V-I characteristics and P-V characteristics of Photovoltaic cell

The cascaded multi-level inverter produces the three phase inverter voltage and current waveforms equal to
300V.

Fig.10.Voltage and current output waveforms of multilevel inverter with LDN

The output has only 6 levels without using level doubling network but 13 level voltage is obtained with level
doubling network. The total harmonic distortion (THD) is reduced to 6.60% with the level doubling network from the
THD value of 17.94% without Level doubling network.

Fig.10.THD of MLI without and with LDN

CONCLUSION
This paper has presented a new model to increase the number of levels in a cascaded multi-level inverter.
Through simulation P-V and I-V characteristics of photovoltaic cell has been studied. A bridge network is used to
almost double the number of levels of the three-phase cascaded multilevel inverter. The concept may be applied for
both symmetric and asymmetric topologies. However, when applied with a symmetric topology, this has not only
increased the levels but also maintained uniform power loading of the individual cell of the cascaded configuration.
The dc bus of the H-bridge block ideally remains in self-balancing condition. The operating principle of the circuit is
explained. The total harmonic distortion (THD) is improved with the level doubling network. A detailed simulation is
presented using MATLAB/Simulink.

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Electronic copy available at: https://ssrn.com/abstract=3159787


Proceedings of 4th International Conference on Energy Efficient Technologies for Sustainability–ICEETS’18.
St.Xavier’s Catholic College of Engineering, Nagercoil, TamilNadu, India, from 5th to 7th April, 2018.
Available in SSRN eLibrary of ELSEVIER

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