Enabling robust data communications within

a high voltage BMS

Jon Munson - May 31, 2016

Introduction

Achieving reliability, performance and longevity of battery packs is the primary purpose of the BMS
(battery management system). As part of this, the battery management electronics measures each
cell voltage and transmits this information to a central processor. For large high voltage battery
strings, such as is typical for automotive drivetrains, a modular, distributed pack is an attractive
choice; battery modules can serve as the basic building block for multiple pack designs. Modules
also allow for optimal weight distribution and maximum use of available space. The biggest
challenge is the datalink required to operate the pack as a single unit.

An electrically noisy environment, such as is typical within automobiles, is a big challenge for data
communication links. Although a CANbus link combined with isolation can provide sufficient noise-
rejection, it is a complex, costly solution. For this reason, Linear Technology developed isoSPI™, a
simple two-wire adaptation of the standard Serial Peripheral Interface (SPI).

The isoSPI interface translates a full-duplex SPI signal up to 1Mbps into a differential signal, which
is then transmitted via twisted pair and a simple, inexpensive transformer. This interface is
integrated into Linear Technology’s most recent battery stack monitors, a set of analog integrated
circuits designed to measure battery stack cell voltages. Two isoSPI ports are included in Linear
Technology’s 12-cell battery monitoring IC, the LTC6811. These isoSPI ports enable multiple
LTC6811 devices to be interconnected in a daisy-chain for monitoring long, high voltage battery
strings. With isoSPI, modules containing a subset of battery cells can communicate over long
distances to one master processor.

How the isoSPI interface works

The isoSPI interface uses differential signaling on a “balanced” pair of wires, where neither wire is
grounded. With this configuration, the “common mode” noise imparted onto the wires by external
EMI will be nearly identical on both wires; the transmitted difference-mode information signal
remains relatively unaffected. The isoSPI interface uses a tiny transformer to magnetically couple
and electrically isolate this signal between devices. This shields each device from large common-
mode voltage swings created by large system noise while transmitting the important difference
information across the dielectric barrier.

This is the same technique used in the highly successful Ethernet twisted-pair standards.
Furthermore, electrical isolation allows packs to be interconnected despite large DC voltage
differences between them. The transformer is simply selected for the appropriate DC stand-off
voltage. Figure 1 shows an idealized isoSPI differential waveform; the DC-free pulse signal is then
transformer coupled without information loss. The width, polarity, and timing of the pulses encode
the various state changes of the conventional SPI signals.

Figure 1: isoSPI Differential Signal Encodes SPI Activity on Twisted-Pair Wiring

All of these isoSPI characteristics were intentionally selected to ensure error-free transmission while
subjected to the rigors of bulk current injection (BCI) interference testing. In practice, full
performance against ultra-harsh 200mA BCI has been demonstrated at Linear Technology and
duplicated at key automotive companies, fully qualifying isoSPI links for chassis-harness vehicle
wiring. This is a key requirement if inter-module communication is necessary, and since electrical
isolation is ultimately required for safety, isoSPI provides significant cost savings, as well.

Reducing complexity with isoSPI

A BMS can be designed by connecting battery cells to an Analog Front End (AFE) device, such as
Linear Technology’s LTC6811. Multiple AFE devices can be interconnected and connected to a
central processor via a CANbus link. Figure 2(a) shows a structure like this with just two AFE
devices that support conventional SPI data connections. To achieve the galvanic isolation required
for safety and data integrity, dedicated data isolators are required for each AFE. To isolate each
cell-stack from the host microprocessor and the CANbus network, galvanic isolation can be provided
with magnetic, capacitive, or optical means. When using SPI, isolation is required on each of the
four SPI signals, with a significant cost implication.

Figure 2: Conventional BMS Isolation vs. isoSPI Method

Figure 2(b) shows the same functionality, but implemented with isoSPI. A small, inexpensive
transformer replaces the data isolator to provide the galvanic barrier between the host processor
elements and the battery pack potential. At the host microprocessor, a small adapter IC (LTC6820)
provides the isoSPI master interface. The ADC units shown (LTC6811-2) include integrated isoSPI
slave support so the only additional circuitry required is proper passive termination components that
a balanced transmission-line structure requires. While Figure 2 shows just two AFE devices, up to
sixteen can be serviced on a single extended isoSPI bus.
 Figure 3: Popular BMS configuration with isoSPI Daisy Chain

isoSPI devices support multidrop bus or point-to-point daisy-chain

isoSPI devices support multidrop bus or point-to-point daisy-chain

The isoSPI links will of course work fine with simple point-to-point connections, and as shown in
Figure 3, dual-port ADC devices (LTC6811-1) can form fully isolated daisy-chain structures. There is
a similar overall structural complexity involved in either the bus or daisy-chain approach, so
particular aspects of a design may favor one or the other depending on the subtleties involved. The
daisy chain tends to be less expensive, since it generally involves simpler transformers with a lower
DC standoff voltage; while transformers for the addressable topology must span the full voltage from
the isoSPI master (LTC6820) to the AFE, which can be at the top of the full battery stack.

On the other hand, the parallel addressable bus has better fault-tolerance since communication is
direct to the isoSPI Master. To avoid multiple points of EMI ingress and issues with multipath
reflections, bus structures are best kept to single-board implementations so that the bus itself is
compact and possibly protected by PCB ground-planes.

Partitioning the BMS electronics

One of the primary benefits of isoSPI is its ability to operate with lengthy exposed wiring in the
point-to-point and daisy-chained configurations. Prior to the implementation of isoSPI, the BMS
design was constrained to a centralized architecture, or to implementing an expensive isolated
CANbus for interconnection. The isoSPI interface has enabled a practical modular approach with all
of its associated benefits. Figure 4 shows a distributed daisy chain BMS structure that allows the
pack to be arbitrarily modular and function as a distributed network.

The network may have as many AFE devices (LTC6811-1) and harness-level interconnects as needed
to satisfy the desired distribution of circuitry. The use of isoSPI networking means that all data
processing activity can be consolidated into a single microprocessor circuit, and the microprocessor
can be placed practically anywhere. This total networking flexibility allows an isoSPI-based BMS
system to be designed for both high-performance and improved cost-effectiveness.
 Figure 4: Flexible Distributed BMS Structures with isoSPI

Note in Figure 4, wherever an isoSPI segment is exposed to harness-level EMC conditions, a small
common-mode-choke (CMC) is placed in the termination structure each AFE IC. The CMC is a very
small transformer element that completes the rejection of any residual very-high-frequency (VHF)
common-mode noise that may leak through the inter-winding capacitance of the coupling
transformer. Additionally, all harness wiring is fully isolated for complete safety.

Meeting new challenges

Since the isoSPI structure allows the minimization of electronics that is resident within cell modules,
new directives like ISO 26262 are more easily and cost-effectively addressed. Take redundancy
aspects for example, one can simply add extra copies of the AFE sections and add them to the isoSPI
network as needed. Also, with the consolidated processor functionality afforded by the networking
approach, it is a simple matter to provide redundant data paths and even dual processors without
major packaging impact; simply add additional circuitry in the various modules as needed to achieve
the reliability targets.

Conclusion

By integrating tried-and-true data communication techniques, isoSPI provides a robust and simple
means of remotely controlling standard SPI devices that formerly required an extra protocol
adaptation to CAN bus. The isoSPI two-wire data link is a cost effective way to improve the reliability
and structural optimization of Battery Management Systems through flexible networking of the
ADC’s. Consolidation of the processor function away from the cells enables simplification of pack
modules, thus minimizing the per-cell electronics content.

Jon Munson is a senior applications engineer at Linear Technology.

Also see:
● Designing battery-management systems
● How to structure a battery management system
● Maximizing cell monitoring accuracy and data integrity in energy storage Battery Management
Systems