Problem Sheet - 5

1. Determine the decimal numbers represented by the following binary numbers: (i) 1110012 (ii) 1010012 (iii) 111111102 (iv) 11001002 (v) 1101.00112 (vi) 1010.10102 (vii) 0.111002 2. Determine the binary numbers represented by the following decimal numbers: (i) 3710 (ii) 25510 (iii) 1510 (iv) 26.2510 (v) 11.7510 (vi) 0.110 3. Convert the following numbers from decimal to octal and then to binary. Compare the binary numbers obtained with the binary numbers obtained directly from the decimal numbers: (i) 37510 (ii) 24910 (iii) 27.12510 4. Find the decimal numbers represented by the following BCD codes: (i) 10000110 (ii) 00110001 (iii) 01010011 (iv) 100101110100 (iv) 0001100001100000.0111 5. Convert the following hexadecimal numbers to decimal: (i) E516 (ii) B2F816 6. Convert the decimal numbers in Problem 3 to hexadecimal and then to binary. Compare the binary numbers obtained with the binary numbers obtained directly from the decimal numbers. 7. Convert the binary numbers in Problem 4 to hexadecimal and then to decimal. Compare the decimal numbers obtained with the decimal numbers obtained directly from the binary numbers. 8. Encode the following decimal numbers in BCD codes: (i) 4610 (ii) 327.8910 (iii) 20.30510 9. Perform the following subtraction using 1s and 2s complement method: (i) 112 102 (ii) 1002 112 (iii) 10102 1112 (iv) 11012 10102 (vi) 101112 111112 (v) 10012 - 11102

10. Add the following BCD numbers: (i) 1000 + 0110 (ii) 0111 + 0101 (iii) 1001 + 1000 (iv) 1001 + 0111 (iv) 00100101 + 00100111 (v) 01010001 + 01011000 (vi) 10011000 + 10010111 (vii) 010101100001 + 011100001000 11. Prove the following using Boolean algebraic theorem; (i) + + = + (ii) + + = + + + + = + + (iii)

12. For an open-collector TTL NOT gate, the specifications are: VOH = 2.4V, VOL = 0.4V, IOH = 250A, IOL = 16mA, IIH = 40A, IIL = -1.6mA Calculate the value of RC required for the open collector gate. Assume VCC = 5V and a fan-out of 8.

13. A

The voltage waveform shown in above figure is applied at the input of 2-input AND, OR, NAND, NOR and XOR gates. Determine the output waveform in each case. 14. Minimize the four variable logic function: f(A, B, C, D) = + + + + + +

15. Minimize following logic functions and realize using NAND/NOR gates: (a) f1 (A, B, C, D) = m(1, 3, 5, 8, 9, 11, 15) + d(2, 13) (b) f2 (A, B, C, D) = M(1, 2, 3, 8, 9, 10, 11, 14). d(7, 15)

16. For a full adder, determine the propagation delay time for Sum output (Sn) and carry output (Cn), assuming the propagation delay time of gates as; EX-OR 20ns AND 10ns OR 10ns and presence of data inputs An, Bn and carry-in Cn-1 simultaneously. 17. Show how two four-bit parallel adders can be connected to form an eight-bit parallel adder. Show outputs for P7P6P5P4P3P2P1P0 = 10111001 and Q7Q6Q5Q4Q3Q2Q1Q0 = 10011110 18. Convert the following binary codes to gray codes using XOR gates; (a) 01012 (b) 001112 (c) 1010112