Electrical and Electronics Engineering Department

Işık University

ELEC1402 LOGIC DESIGN LABORATORY

EXPERIMENT REPORT

Experiment 3: BINARY ADDER CIRCUITS

LINA, AL-WHAIDI, 219SE2031

SEDEQ, AL SAKKAF, 219MC2007

Objective:

The purpose of this experiment is to show the basic design of building a simple
combination of circuit for full adder starting from half adder.

Components:

• C.A.D.E.T breadboard

• 1x74LS08 Quad 2-Input AND Gate

• 1x74LS32 Quad 2-Input OR Gate

• 1x74LS86 Quad 2-Input XOR Gate

• 1x74LS83 4-Bit Binary Full-Adder with Fast Carry

• Jumper Wir

Experimental Procedure:
We set up a simple logic circuit called half adder using XOR
(74LS86) gate, beadboard and AND(74LS08) gate and jumper
wires. Connecting the circuit as in figure below. In this circuit we
have two inputs (x,y), connected with the switches s1 ans s2. The
outputs are two, S(sum) and C(carry). We connected the outputs
with LEDs. After operating the circuit, we registered the output
values in the truth table
Inputs Outputs
X Y S C
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
we added another logic circuit with the half adder to
make full adder circuit, so the full adder circuit
contains from 2 XOR (74LS86), 2 AND(74LS08),
1 OR(74LS32) gates. We connected the circuit as in
the figure below. Also the circuit has three inputs
(x,y.z) connected to the switches s1,s2,s3 and two
outputs(S,C) connected to LEDs. we saw investigate
the outputs and put the results in the truth table.

the truth table of full adder circuit:

X Y Z S C

0 0 0 0 0

0 1 0 1 0

1 0 0 1 0

1 1 0 0 1

0 0 1 1 0

0 1 1 0 1

1 0 1 0 1

1 1 1 1 1

Finally, we connected 4-Bit Binary Full- Adder, it is a IC (74LS83).

It has eight inputs (A4, A3,A2,A1, B4,B3,B2,B1) connected to
the switches S1, S2,S3,S4,S5,S6,S7,S8 respectively and the
outputs are S1,S2,S3,S4 as the LEDs which they are the sums.
The carry in connected to the ground and the carry out connected
to pin 14. After connected and operated the circuit we observed
the outputs from the LEDs and recorded the values to the table.
Carr A4 A3 A2 A1 B4 B3 B2 B1 Cout S4 S3 S2 S1
y
0 1 0 1 1 1 0 0 1 1 0 1 0 0
0 1 1 1 0 1 0 0 1 1 0 1 1 1
0 0 1 1 0 0 0 1 0 0 1 0 0 0

We checked by hand the sum of the binary inputs as:

A4A3A2A1
B4B3B2B1 +
S4S3S2S1
0111 1110 0110
1001 1001 0010
0010 0111 1000

We got the same value in the table.

Simulation:
Figure.3.4. Half-Adder
Figure.3.5. Full-Adder

Parallel binary adder circuit:

Discussion and Conclusion:
In the experiment we introduce the design of a simple combination circuit
starting from half adder to parallel full adder. Firstly, we build the half adder
circuit that contains of only two gates XOR and AND. It has two inputs and two
outputs, one is the sum which is the output of XOR and the other is the carry-in
which is the output of the AND gate, because when the XOR sum up 1+1 the result
is 10 so the sum is 0 but the carry out is the 1 so we put AND to show it in the
output. We draw it in the Circuit verse, the results are the same. This half adder
only sums up the 2 bits so to sum up three bits, we introduced the full adder which
contains of two half adder and OR gate to sum up the carry-outs from the two half
adders. So, the full adder contains from three inputs and the outputs are the sum
and the carry-out. The results are the same in the truth table, all the half and full
adder have 1 in the carry-out. The parallel Binary Adder is an IC produces the
sum of two binary numbers in parallel. it contains of full adder connected in
parallel, each carry-out of full adder be the carry-in of the next full adder and each
full adder has one sum. After operating the circuit, we put the results in the table
and checked the value by hand it gave the same result that we got from the
experiment also we draw the 4-bit binary full adder in circuit verse we got the
same results.