Circuit Diagram

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 Peak Detector Using Op-Amplifiers.

Aim: To verify the operation of peak detector using Op-Amps.

Apparatus required:

S. No Name of the Component Ra ng Quan ty

1 LM741-Op-amp IC -- 1
2 Function Generator 3 GHz 1
3 DSO/CRO 30MHz-Dual Channel 1
4 Bread Board --- 1
5 Dual Channel RPS 0-30V, 2A 1
6 Diode IN4007 2
7 Resistors 10KΩ, 1KΩ 2,1
8 Capacitor 1µF 1
9 Connecting Wires Single Lead As Required

Theory:
Peak detector detects and holds the most positive value of attained by the input signal prior to
the time when the switch is closed.

Peak detector circuit is used to find the peak amplitude in a rapidly changing waveform. Peak
detectors are generally used in the sound measuring applications to find the maximum level
of sound in a particular area or place, that helps in determining the maximum loudness level
in that place. So, like this there are number of applications where a peak detector circuit is
used. For a basic peak detector circuit, we don't even need any complex electronics
components. A simple peak detector circuit can be built by using a diode and a capacitor.

Basic Peak Detector Circuit

A basic peak detector circuit is a connection of a diode and a capacitor in series. In our
circuit, we are giving a sine wave input from a 220V to 6V step-down transformer. The diode
is
 Posi ve Peak Detector

Simulated Graph:
placed in forward biased condition and for output, the oscilloscope probe is connected
between the diode and capacitor. Below is the schematics for a Basic Peak Detector Circuit.

In the positive half cycle of the signal, the diode will be forward biased and allows the
current to pass through it. At the same time, the capacitor starts charging to the peak value of
the input: signal until the diode remains forward biased.

Now, in the negative half cycle of the signal, the diode gets reverse biased and at that time
the capacitor holds the peak value of the previous half cycle. Hence, this is called as Peak
Detector and the output waveform will look like the image given bel
 Nega ve Peak Detector

Simulated Graph:
Practically the output is taken across some load connected to the circuit. So, when the input
signal is decreasing the capacitor starts discharging through the load R. To hold the charge
and slow down the discharging of capacitor choose the load R. of very high value. The output
of the circuit will be defined as

VOUT= VI - VD

Where VIN is the input signal voltage and VD is the voltage drop across the diode. Here, in
the output waveform, we can see the peak is shifted down because of the voltage drop across
the diode in the circuit. So, this voltage drop at diode reduces the efficiency of the circuit, and
to improve the design next, we will use Op-amp.

For detecting the negative peak of the input signal connect the diode in the reverse condition.

Op-amp based Peak Detector Circuit

Op-amp based peak detector circuit is the modification of basic peak detector circuit, used to
remove the voltage drop across the diode. Whenever the applied input voltage signal is
greater than the threshold voltage of the diode, the diode will get forward biased and acts as a
closed switch. Here, the diode is connected in the feedback and hence the circuit works as a
buffer circuit. So, whatever input is applied to the positive terminal of the op-amp will be
received at the output terminal.

Working of Op-amp peak detector is as shown below.

The operation can be explained as follows assume the switch is open and if
a) V out< Vin the op amp output V is positive so that the diode conducts and the capacitor
charges to the input value at that instant as it forms a voltage follower circuit.

b) When V out>Vin, op amp output V' is negative and the diode becomes reverse biased.

Thus, the capacitor charges to the most positive value of input. Hence the operation of op-
amp peak detector can be summarized as follows

 V out < Vin; D ON and C charges to peak value of input,

 V out < Vin; D OFF and C holds the peak value of input.

Procedure:
1. Connect the circuit diagram as shown in the above fig.

2. Switch on the power supply.

3. Give the suitable input voltage from Function generator to the circuit.

4. The first section of negative i/ps operates as a closed-loop inverter (A=-1) and the second
section is just a buffer for the positive o/p. When the i/p signal is +ve, then the output of first
op-amp remains saturated near GND, and the diode turn into high- impedance, letting the
signal to flow straight to the buffer stage non-inverted. The complex result is a full-wave
rectified waveform at the output of the buffer.

5. Observe and measure the Output voltage with the help of CRO.
Output:
Precautions:

1. Avoid loose connections.

2. Handle the components with due care.

Results: