EE6508 - Power Quality

Capacitor Switching Overvoltages

presented by

Asst. Prof. Amer M. Y. M. Ghias

School of Electrical and Electronic Engineering
Office: S2-B2C-109
Consulting Hours: Thursday 3pm-5pm or by appointments
Email: amer.ghias@ntu.edu.sg
Tel: 6790 5631
S2 AY2019-2020
Acknowledgement: these lectures are based on materials obtained from Prof. Abhisek Ukil
and Dr. Tan Kuan Tak, whose help is hereby gratefully acknowledged.
Revised Jan 2019. 1
 Lecture Outline

• Capacitor Switching Overvoltages

– LC circuit and utilization
– RLC circuit: damping
– Capacitor switching transients
– Managing effects of capacitor switching transients

2
 References
Texts:
1. Dugan R C, McGranaghan M F, Santoso S, and Beaty H W,
Electrical Power Systems Quality, Second Edition, McGraw-
Hill, 2002. 2.
2. Kennedy B W, Power Quality Primer, First Edition, McGraw-
Hill, 2000.
Reference:
3. Allan Greenwood, “Electrical Transients in Power Systems”,
2nd Edition, John Wiley & Sons Inc., 1991.

3
 The LC Circuit – Current Response
• Consider the LC circuit as
shown in the figure
• When the switch is closed,
the circuit equation using KVL
can be written as:
𝑑𝑑𝑑𝑑 𝑑𝑑𝑣𝑣𝑐𝑐
𝑣𝑣 = 𝐿𝐿 + 𝑣𝑣𝑐𝑐 , where 𝑖𝑖 = 𝐶𝐶
𝑑𝑑𝑑𝑑 𝑑𝑑𝑑𝑑
• Differentiating the equation we get:
𝑑𝑑 2 𝑖𝑖 𝑑𝑑𝑣𝑣𝑐𝑐 𝑑𝑑 2 𝑖𝑖 𝑖𝑖 𝑑𝑑 2 𝑖𝑖 𝑖𝑖
𝐿𝐿 2 + = 0 ⇒ 𝐿𝐿 2 + = 0 ⇒ 2 + =0
𝑑𝑑𝑑𝑑 𝑑𝑑𝑑𝑑 𝑑𝑑𝑑𝑑 𝐶𝐶 𝑑𝑑𝑑𝑑 𝐿𝐿𝐶𝐶
• Apply Laplace transformation:
2 ′
𝑖𝑖(𝑠𝑠)
𝑠𝑠 𝑖𝑖 𝑠𝑠 − 𝑠𝑠𝑠𝑠 0 − 𝑖𝑖 0 + = 0 −−− −(A)
𝐿𝐿𝐿𝐿
4
 The LC Circuit – Current Response
• As the initial current before and the moment when the switching is closed is
𝑖𝑖 0 = 0, and assuming the initial voltage of the capacitor is zero. The
inductor voltage at 𝑡𝑡 = 0, can be written as:
𝑑𝑑𝑑𝑑(0) ′
𝑣𝑣
𝑣𝑣𝐿𝐿 0 = 𝐿𝐿 = 𝑣𝑣 − 𝑣𝑣𝑐𝑐 0 = 𝑣𝑣 ⇒ 𝑖𝑖 0 = −−−− −(B)
𝑑𝑑𝑑𝑑 𝐿𝐿
• Using equation B in A, we get:
𝑣𝑣 𝑖𝑖 𝑠𝑠 1 𝑣𝑣 𝑣𝑣�
𝑠𝑠 2 𝑖𝑖 𝑠𝑠 − + = 0 ⇒ (𝑠𝑠 2 + )𝑖𝑖(𝑠𝑠) = ⇒ 𝑖𝑖(𝑠𝑠) = 𝐿𝐿
𝐿𝐿 𝐿𝐿𝐿𝐿 𝐿𝐿𝐿𝐿 𝐿𝐿 𝑠𝑠 2 + (1�𝐿𝐿𝐿𝐿 )
• Rearranging the above Laplace current equation as:
𝑣𝑣� 1�
𝐿𝐿 𝑣𝑣 𝐿𝐿𝐿𝐿
𝑖𝑖 𝑠𝑠 = =
2 1
𝑠𝑠 + �𝐿𝐿𝐿𝐿 𝐿𝐿� 𝑠𝑠 2 + ( 1� )2
𝐶𝐶 𝐿𝐿𝐿𝐿
𝜔𝜔
• Transforming the above equation to time domain using, sin 𝜔𝜔𝑡𝑡 =
𝑠𝑠 2 +(𝜔𝜔)2
𝑣𝑣 1⁄ 𝑡𝑡)
𝑖𝑖 𝑡𝑡 = sin( 𝐿𝐿𝐿𝐿
𝐿𝐿�
𝐶𝐶

5
 The LC Circuit – Current Response
𝑣𝑣 1⁄ 𝑡𝑡)
• The current time response of the LC circuit is 𝑖𝑖 𝑡𝑡 = sin( 𝐿𝐿𝐿𝐿
𝐿𝐿�
𝐶𝐶

• Note the two significant parameters:

– 𝐿𝐿⁄behaves as an impedance and it is so-called surge
𝐶𝐶
impedance of the circuit, which is denoted by Zo
– 1⁄ behaves as a angular frequency. It is called natural
𝐿𝐿𝐿𝐿
frequency and is denoted by 𝜔𝜔𝑜𝑜
𝑣𝑣
– Hence the current 𝑖𝑖 𝑡𝑡 = sin(𝜔𝜔𝑜𝑜 𝑡𝑡)
𝑍𝑍𝑜𝑜
• Note: The parameters, Zo and 𝜔𝜔𝑜𝑜 , determine the magnitude and the
frequency of the transient current. Hence they play a vital role in
transient analysis. Where:
– 𝑍𝑍𝑜𝑜 = 𝐿𝐿⁄ (Ω) is the surge impedance of the circuit
𝐶𝐶
– 𝜔𝜔𝑜𝑜 = 1⁄ (rad/sec) = angular natural frequency or
𝐿𝐿𝐿𝐿
𝜔𝜔𝑜𝑜 1
𝑓𝑓𝑜𝑜 = = (Hz) = natural frequency
2𝜋𝜋 2𝜋𝜋 𝐿𝐿𝐿𝐿

6
The LC Circuit –Capacitor Voltage Response
• For the Capacitor voltage,
Consider the LC circuit as
shown in the figure
• When the switch is closed,
the circuit equation using KVL
can be written as:
𝑑𝑑𝑑𝑑
𝑣𝑣 = 𝐿𝐿 + 𝑣𝑣𝑐𝑐 --- (C)
𝑑𝑑𝑑𝑑
𝑑𝑑𝑣𝑣
𝑖𝑖 = 𝐶𝐶 𝑐𝑐 --- (D)
𝑑𝑑𝑑𝑑
• Differentiating equation D will give,
𝑑𝑑𝑖𝑖 𝑑𝑑 2 𝑣𝑣𝑐𝑐
= 𝐶𝐶 2 --- (E)
𝑑𝑑𝑑𝑑 𝑑𝑑𝑑𝑑
• Rearranging equation C and using in equation E will give
𝑑𝑑 2 𝑣𝑣𝑐𝑐 𝑑𝑑𝑑𝑑 𝑣𝑣 𝑣𝑣𝑐𝑐 𝑑𝑑 2 𝑣𝑣𝑐𝑐 𝑣𝑣𝑐𝑐 𝑣𝑣 𝑑𝑑 2 𝑣𝑣𝑐𝑐 𝑣𝑣𝑐𝑐 𝑣𝑣
𝐶𝐶 2 = = − ⇒ 𝐶𝐶 2 + = ⇒ + = ---(F)
𝑑𝑑𝑑𝑑 𝑑𝑑𝑑𝑑 𝐿𝐿 𝐿𝐿 𝑑𝑑𝑑𝑑 𝐿𝐿 𝐿𝐿 𝑑𝑑𝑑𝑑 2 𝐿𝐿𝐶𝐶 𝐿𝐿𝐶𝐶
7
The LC Circuit –Capacitor Voltage Response
• Let say 𝜔𝜔𝑜𝑜2 = 1⁄𝐿𝐿𝐿𝐿, then the equation F can be written as:
𝑑𝑑 2 𝑣𝑣𝑐𝑐
+ 𝜔𝜔𝑜𝑜2 𝑣𝑣𝑐𝑐 = 𝜔𝜔𝑜𝑜2 𝑣𝑣 ---(G)
𝑑𝑑𝑑𝑑 2
• Using Laplace transformation of equation G, we get:
2 ′ 𝑣𝑣𝜔𝜔𝑜𝑜2
𝑠𝑠 𝑣𝑣𝑐𝑐 𝑠𝑠 − 𝑠𝑠𝑣𝑣𝑐𝑐 0 − 𝑣𝑣𝑐𝑐 0 + 𝜔𝜔𝑜𝑜2 𝑣𝑣𝑐𝑐 𝑠𝑠 = ---(H)
𝑠𝑠
• Assuming the capacitor is initialling charge to give the initial voltage
of 𝑣𝑣𝑐𝑐 0 , then equation H can we written as:
2 2
𝑣𝑣𝜔𝜔 𝑜𝑜 𝑣𝑣𝜔𝜔 𝑜𝑜
𝑠𝑠 2 𝑣𝑣𝑐𝑐 𝑠𝑠 + 𝜔𝜔𝑜𝑜2 𝑣𝑣𝑐𝑐 𝑠𝑠 = + 𝑠𝑠𝑣𝑣𝑐𝑐 0 ⇒ (𝑠𝑠 2 + 𝜔𝜔𝑜𝑜2 )𝑣𝑣𝑐𝑐 𝑠𝑠 = + 𝑠𝑠𝑣𝑣𝑐𝑐 0 ,
𝑠𝑠 𝑠𝑠
2
𝑣𝑣𝜔𝜔𝑜𝑜 𝑠𝑠𝑣𝑣𝑐𝑐 0 1 𝑠𝑠 𝑠𝑠
𝑣𝑣𝑐𝑐 𝑠𝑠 = 2 + 2 = 𝑣𝑣 𝑠𝑠 − 2 + 𝑣𝑣𝑐𝑐 0
2 2
𝑠𝑠(𝑠𝑠 + 𝜔𝜔𝑜𝑜 ) (𝑠𝑠 + 𝜔𝜔𝑜𝑜 ) 2
(𝑠𝑠 + 𝜔𝜔𝑜𝑜 ) (𝑠𝑠 2 + 𝜔𝜔𝑜𝑜2 )
• Transforming the above equation to time domain using: cos 𝜔𝜔𝑡𝑡 =
𝑠𝑠
𝑠𝑠 2 +(𝜔𝜔)2
𝑣𝑣𝑐𝑐 𝑡𝑡 = 𝑣𝑣 1 − 𝑐𝑐𝑐𝑐𝑐𝑐𝜔𝜔𝑜𝑜 𝑡𝑡 + 𝑣𝑣𝑐𝑐 0 𝑐𝑐𝑐𝑐𝑐𝑐𝜔𝜔𝑜𝑜 𝑡𝑡 = 𝑣𝑣 − [𝑣𝑣 − 𝑣𝑣𝑐𝑐 0 ] 𝑐𝑐𝑐𝑐𝑐𝑐𝜔𝜔𝑜𝑜 𝑡𝑡
8
The LC Circuit –Capacitor Voltage Response
• The behaviour of the capacitor voltage, 𝑣𝑣𝑐𝑐 is
graphically shown in the figure for different v (0)=0
C
values of 𝑣𝑣𝑐𝑐 (0). v (0)=-v
C

It can be observed that 𝑣𝑣𝑐𝑐 can exceed the v (0)=v/2

(t)
• C

C
v
exciting voltage 𝑣𝑣. v

– Its should be noted that the 𝑣𝑣𝑐𝑐 oscillates

about 𝑣𝑣, which is the steady state value of 𝑣𝑣𝑐𝑐 . 0

– For no initial charge on the capacitor, the t

capacitor voltage can reach a value of 2𝑣𝑣. For -v

certain values of initial charge voltage 𝑣𝑣𝑐𝑐 (0), the capacitor voltage can exceed
the voltage value of 2𝑣𝑣, i.e. For 𝑣𝑣𝑐𝑐 0 = −𝑣𝑣, the capacitor voltage oscillates
between (−𝑣𝑣 and 3𝑣𝑣).
– The capacitor voltage oscillation continues because of the undamped system
with no resistance.
• In practical/real systems with resistance in the circuit, the oscillations will be
damped out and the peak value usually does not reach 2𝑣𝑣.

9
 The LC Circuit in Power Systems
• LC circuits are very common in power systems.
• For example the shunt capacitor shown in the
diagram becomes a LC circuit whenever, the
resistance is ignored.
• The switching of the capacitor can produces over voltages in
the system, which are dependant on:
– The initial charge on the capacitor during the switching, and
– The instantaneous voltage during v (0)=0
C

the switching v (0)=-v

C
v (0)=v/2

(t)
• The inclusion of the resistance R in C

C
v
v
the analysis is important for the
realistic evaluation of the transient 0

overvoltage. t
-v
10
 The LC Circuit - Exercise
Figure shows a single-phase, 50-Hz system with Xs = 0.2Ω. The capacitor bank
was fully discharged. When the switch is closed, the maximum transient
voltage across the capacitor bank reaches 200kV with a frequency of 400 Hz.
a. Calculate the unknown voltage (x) in kV.
b. Calculate the unknown (z) in kVar and the surge impedance.

Solution will be solved in the class

Xs Bus
Load

Bus A
x kV
50Hz
x kV
z kVar

11
 The RLC Circuit: Damping
• Consider the RLC circuit as
shown in the figure
• When the switch is closed,
the circuit equation using KVL
can be written as:
𝑑𝑑𝑑𝑑
𝑣𝑣 = 𝑅𝑅𝑅𝑅 + 𝐿𝐿 + 𝑣𝑣𝑐𝑐 --- (I)
𝑑𝑑𝑑𝑑
𝑑𝑑𝑣𝑣𝑐𝑐
𝑖𝑖 = 𝐶𝐶 --- (J)
𝑑𝑑𝑑𝑑

• Differentiating equation J will give,

𝑑𝑑𝑑𝑑 𝑑𝑑 2 𝑣𝑣𝑐𝑐
= 𝐶𝐶 2 --- (K)
𝑑𝑑𝑑𝑑 𝑑𝑑𝑑𝑑

• Rearranging equation I and using in equation K will give

𝑑𝑑 2 𝑣𝑣𝑐𝑐 𝑑𝑑𝑑𝑑 𝑣𝑣 𝑣𝑣𝑐𝑐 𝑅𝑅 𝑑𝑑 2 𝑣𝑣𝑐𝑐 𝑣𝑣𝑐𝑐 𝑅𝑅 𝑣𝑣 𝑑𝑑 2 𝑣𝑣𝑐𝑐 𝑣𝑣𝑐𝑐 𝑅𝑅 𝑣𝑣
𝐶𝐶 2 = = − − 𝑖𝑖 ⇒ 𝐶𝐶 2 + + 𝑖𝑖 = ⇒ + + 𝑖𝑖 =
𝑑𝑑𝑑𝑑 𝑑𝑑𝑑𝑑 𝐿𝐿 𝐿𝐿 𝐿𝐿 𝑑𝑑𝑑𝑑 𝐿𝐿 𝐿𝐿 𝐿𝐿 𝑑𝑑𝑑𝑑 2 𝐿𝐿𝐿𝐿 𝐿𝐿𝐶𝐶 𝐿𝐿𝐿𝐿
𝑑𝑑 2 𝑣𝑣𝑐𝑐 𝑣𝑣𝑐𝑐 𝑅𝑅 𝑑𝑑𝑣𝑣𝑐𝑐 𝑣𝑣
+ + = ---(L)
𝑑𝑑𝑑𝑑 2 𝐿𝐿𝐿𝐿 𝐿𝐿 𝑑𝑑𝑑𝑑 𝐿𝐿𝐿𝐿
12
 The RLC Circuit: Damping
• Using Laplace transformation of equation L, we get:
𝑣𝑣𝑐𝑐 𝑠𝑠 𝑅𝑅 𝑅𝑅 𝑣𝑣
𝑠𝑠 2 𝑣𝑣𝑐𝑐 ′
𝑠𝑠 − 𝑠𝑠𝑣𝑣𝑐𝑐 0 − 𝑣𝑣𝑐𝑐 0 + + 𝑠𝑠𝑣𝑣𝑐𝑐 𝑠𝑠 − 𝑣𝑣 (0) = ---(M)
𝐿𝐿𝐶𝐶 𝐿𝐿 𝐿𝐿 𝑐𝑐 𝑠𝑠𝐿𝐿𝐿𝐿
• Assuming the capacitor initialling voltage is zero (𝑣𝑣𝑐𝑐 0 =0),
then equation M can we written as:
2
𝑣𝑣𝑐𝑐 𝑠𝑠 𝑅𝑅 𝑣𝑣 2
1 1 𝑣𝑣
𝑠𝑠 𝑣𝑣𝑐𝑐 𝑠𝑠 + + 𝑠𝑠𝑣𝑣𝑐𝑐 𝑠𝑠 = ⇒ (𝑠𝑠 + + 𝑠𝑠)𝑣𝑣𝑐𝑐 𝑠𝑠 = ,
𝐿𝐿𝐿𝐿 𝐿𝐿 𝑠𝑠𝑠𝑠𝑠𝑠 𝐿𝐿𝐿𝐿 𝐿𝐿/𝑅𝑅 𝑠𝑠𝑠𝑠𝑠𝑠
𝑣𝑣
𝑣𝑣𝑐𝑐 𝑠𝑠 = 1 1 ---(N)
𝑠𝑠𝑠𝑠𝑠𝑠(𝑠𝑠 2 + + 𝑠𝑠)
𝐿𝐿𝐿𝐿 𝐿𝐿/𝑅𝑅
L 1
• Lets say 𝑇𝑇∅ = and 𝑇𝑇 = = 𝐿𝐿𝐿𝐿, then equation N can be
R 𝜔𝜔𝑜𝑜
written as:
𝑣𝑣 𝑣𝑣 1
𝑣𝑣𝑐𝑐 𝑠𝑠 = 1 1 =
𝑠𝑠𝑇𝑇 2 (𝑠𝑠 2 + 2 + 𝑠𝑠) 𝑇𝑇 2 𝑠𝑠(𝑠𝑠 2 + 1 𝑠𝑠+ 12 )
𝑇𝑇 𝑇𝑇∅ 𝑇𝑇∅ 𝑇𝑇

13
 The RLC Circuit: Damping
• The solution requires:
−1
𝑣𝑣 1
ℒ
𝑇𝑇 2 𝑠𝑠(𝑠𝑠 2 + 1 𝑠𝑠 + 1 )
𝑇𝑇∅ 𝑇𝑇 2
which can be shown to be
2
1 𝑡𝑡 ′
−𝑡𝑡 ′ 𝑠𝑠𝑠𝑠𝑠𝑠 4𝜂𝜂 − 1 2
𝑡𝑡 ′
2𝜂𝜂 1
𝑓𝑓 𝜂𝜂 = 𝑣𝑣 1 − 𝜀𝜀 2𝜂𝜂 1 + 𝑐𝑐𝑐𝑐𝑐𝑐 4𝜂𝜂2 − 1 2
2𝜂𝜂
4𝜂𝜂2 −1 2

where,
𝑇𝑇∅ 𝐿𝐿/𝑅𝑅 𝑍𝑍𝑜𝑜 𝑡𝑡
𝜂𝜂 = = = , is called the damping constant, and 𝑡𝑡 ′ =
𝑇𝑇 𝐿𝐿𝐿𝐿 𝑅𝑅 𝑇𝑇
• The nature of the response depends on the value of 𝜂𝜂 or the degree
of damping. The response may be plotted for various values of 𝜂𝜂, as
shown in the figure in the next slide. Which can be easily used to find
the peak value and other characteristics of the response.
• It can be seen that the damping decreases as 𝜂𝜂 increases.
14
 The RLC Circuit: Damping 1 ′
−𝑡𝑡′ 𝑡𝑡
𝑠𝑠𝑠𝑠𝑠𝑠 4𝜂𝜂2 −1 2 2𝜂𝜂 1
𝑡𝑡 ′
𝑓𝑓 𝜂𝜂 = 𝑣𝑣 1 − 𝜀𝜀 2𝜂𝜂
1 + 𝑐𝑐𝑐𝑐𝑐𝑐 4𝜂𝜂2 − 1 2 [3]
• It is seen that the 4𝜂𝜂2 −1 2
2𝜂𝜂

system is undamped 2.0v η= ∞

and the maximum 1.9v η = 10.0

1.8v
voltage is 2v, as 1.7v η = 4.0

expected for 𝜂𝜂 = ∞ 1.6v

1.5v
(R ≈ 0). η = 2.0
1.4v
η = 1.5
• For 𝜂𝜂 between (0.5 and 1.3v

∞), the response is 1.2v η = 1.0

1.1v η = 0.75
oscillatory.
→

1.0v
f (η )

• At 𝜂𝜂 = 0.5, the system 0.9v η = 0.5

0.8v
is critically damped and
0.7v η = 0.3
the response ceases to 0.6v
be oscillatory. 0.5v

• For 𝜂𝜂 < 0.5, the system 0.4v η = 0.1

0.3v
is over damped and the 0.2v
response is quite slow. 0.1v
0 15
0 1 2 3 4 5 6 7 8 9
t′
Exercise

16
 Why is LC circuit important?
• LC circuits are
encountered everywhere
in power systems.
– Systems, e.g., lines and
capacitors
– Power system components,
e.g., transformers.
– All power components have
capacitance. For example,
transformers have
capacitance between turns,
from conductors to core
and to tank. All are
important different transient
conditions.
Figure: Transformer cut away view
17
 Why is LC circuit important?

Mutual inductances should be

considered, i.e., Mji is between j and i.

• The details needed or desired for the model depend on specific

problems.
• So is the importance or significance of resistance (R).

18
 Power System Components: Models & Parameters
• Power system performance is commonly analysed by using the
equivalent circuit of one phase of the circuit in actual units or in per
unit values.
• The component parameters are obtained from the rating or name
plate of the component.

• Star phase analysis: For a balanced three-phase system, star phase

of the system may be obtained by:
1 𝑉𝑉𝐿𝐿
– Reducing line voltage by a factor of ∶ 𝑉𝑉𝑝𝑝𝑝 =
3 3
1 𝑍𝑍∆
– Reducing delta connected impedances by a factor of ∶ 𝑍𝑍𝑌𝑌 =
3 3

19
 Per Unit (pu) System
• A very convenient technique especially when several voltage
levels are involved in a system.
• A proper and consistent base must be specified a different
sections of the system to obtain appropriate pu values.

20
 Shunt Compensation – for System Voltage Control
• The variation in voltage levels between different locations can be quite
significant depending up the load level and the power factor
• For lagging pf loads, it is obvious that VS>>VR

• If VR = 1pu, VS > 1pu, and

If VS = 1pu, VR < 1pu
• Shunt compensation consisting of capacitors banks are commonly utilized
to control the power factor to maintain VR and VS within acceptable range
around 1pu.
• After the compensation, 𝑉𝑉𝑆𝑆′ ≈ 𝑉𝑉𝑅𝑅
21
 Capacitor Switching Transients
• Consider a solidly grounded 60-Hz, 34.5kV distribution system:
– Fault current at the bus = 25kA
– C1 is 18MVA bank,
– C2 is 10MVA bank.

Figure 3.4 Switching capacitors on a substation bus [3].

• We investigate the transients following the closing of switch S1(picking up a

capacitor bank)

22
Capacitors

23
 Capacitor Switching Transients
• The effective circuit for closing the C1 is as shown:

Figure 3.4 Switching capacitors on a substation bus [3].

• Find the parameter of the circuit

– Find the value of L from the fault level specified at the bus:
34.5𝑘𝑘𝑘𝑘 34.5𝑘𝑘𝑘𝑘
𝑉𝑉𝐿𝐿𝐿𝐿 = , 𝐼𝐼𝑓𝑓 = 25𝑘𝑘𝑘𝑘 ⇒ 𝑍𝑍𝑓𝑓 = = 0.797Ω = 2 × 𝜋𝜋 × f × L,
3 3×25𝑘𝑘𝑘𝑘
0.797Ω
L= = 0.0021H
2 × 𝜋𝜋 × 60 24
 Capacitor Switching Transients
• Find the value of C1 from the capacitor bank rating:
6
18 × 10
𝑆𝑆𝐶𝐶𝐶 = 18𝑀𝑀𝑀𝑀𝑀𝑀 ⇒ 18 × 106 = 3𝑉𝑉𝑉𝑉 ⇒ 𝐼𝐼 = = 301.2A
3 × 34.5 × 103
𝑉𝑉𝐿𝐿𝐿𝐿 34500 1 1
𝑋𝑋𝐶𝐶 = = = 66.1Ω = ⇒ 𝐶𝐶1 = = 40.1μF
𝐼𝐼 3×301.2 2×𝜋𝜋×f×𝐶𝐶1 2×𝜋𝜋×f×66.1
• V is the instantaneous voltage across switch S1 at the time of
closing.
• If C1 is charged at the time of closing, the initial voltage has to
be accounted.
• Closing Switch S1
– Two characteristic parameters are:
1/2
𝐿𝐿 1/2 2.1×10−3
 Surge impedance: 𝑍𝑍𝑜𝑜 = = = 7.237Ω
𝐶𝐶 40.1×10−6
1 1/2 1 1/2 3446rad
 Natural frequency: 𝜔𝜔𝑜𝑜 = = =
𝐿𝐿𝐶𝐶 2.1×10−3 ×40.1×10−6 s
3446
𝑓𝑓𝑜𝑜 = = 548.4Hz
2𝜋𝜋
25
 Capacitor Switching Transients
• Inrush current from source in C1:
𝑉𝑉(0)
𝐼𝐼1 = 𝑠𝑠𝑠𝑠𝑠𝑠𝜔𝜔𝑜𝑜 𝑡𝑡
𝑍𝑍𝑜𝑜
– Peak inrush current if the switch closes at the voltage peak:
𝑉𝑉𝑝𝑝𝑝𝑝𝑝𝑝𝑝𝑝 34.5 2
𝑖𝑖𝑝𝑝𝑝𝑝𝑝𝑝𝑝𝑝 = = = 3.893kA
𝑍𝑍𝑜𝑜 3 × 7.237
Which is considerably greater than the steady state current.
• The peak voltage across C1 = 2 x 34.5 x 2/3 = 56.34kV
• This peak voltage will not be realized if we include the resistance inherently
present in the circuit in the analysis.

26
Figure 2.3: Low frequency oscillatory transient caused by capacitor bank energization, 34.5-kV bus voltage [3].
 Notable Observations
• Remarks:
– Time of closing switch is important – it determines the initial voltage impressed.
– Voltage or charge on the capacitor at the instant of switching is important, since
it will modify the initial voltage.
– Frequency of inrush is of the order
of 548.45Hz, which is very high
compared to the system frequency
of 60Hz. For this purpose of the
transient analysis, the system
voltage may be assumed to remain
constant at its initial value.
– The effect of damping has not been
included in the above analysis. Figure 2.3: Low frequency oscillatory transient caused
by capacitor bank energization, 34.5-kV bus voltage
Some resistance is inherent in the [3].
system. The maximum over voltage of 200% is rarely observed. A peak value of
between 130% to 170% is more common.

27
 Exercise
A 13.8-kV substation is supplied from a three-phase, 50-Hz, 10-
MVA source with equivalent reactance and resistance of 2pu and
0.5pu respectively. The substation is provided with shunt
compensation of 1-MVA, 13.8-kV capacitor bank.

• Draw the equivalent circuit to analyse the switching of the

capacitor bank
(practice drawing single line diagrams
and equivalent circuits).

• Determine the values of the circuit

components.

• Practice applying pu systems.

28
[ L = 121.2mH, R = 9.52Ω, and C = 16.71μ]
 Exercise – Previous Continue
• Derive the equation for the overvoltage during the switching process
and determine the maximum expected peak voltage in each phase.
(hint: Make use of the RLC plots discussed earlier)

𝑣𝑣 1
Practice deriving 𝑣𝑣𝑐𝑐 𝑠𝑠 =
𝑇𝑇 2 𝑠𝑠(𝑠𝑠 2 + 1 𝑠𝑠+ 12 )
𝑇𝑇∅ 𝑇𝑇

121.2 𝑍𝑍𝑜𝑜 85.16

Then, 𝑍𝑍𝑜𝑜 = 𝐿𝐿/𝐶𝐶 = 1000 = 85.16Ω and 𝜂𝜂 = = = 8.95
16.71 𝑅𝑅 9.52

from slide 15 figure, about 1.83 is the multiplying factor,

therefore. The maximum voltage Vpeak ≈ 1.83 x13.8 x 2/3 = 20.6kv
• Calculate T and use the figure to find out how long after the
switching does this maximum voltage occur, i.e., t and t’.

29
Managing Effects of Capacitor Switching Transients
• Switching times:
– Avoid a match between capacitor switching time and load pick up time.
Nuisance tripping's of Adjustable Speed Drives which are sensitive to
over voltages are avoided.
• Insertion of switching resistances
– Well established technique to insert resistances in series with the switch
during switching times to increase damping to reduce the peak voltage.
• Synchronous closing
– Its is a relatively new technique which attempts to switch on capacitors.
When the instantaneous system voltage is approximately the same as
the voltage across the capacitor.
• Adjusting capacitor location
– The over voltage is maximum at the vicinity of the capacitor location.
The effects may be reduced by moving the capacitor bank away from
sensitive loads.

30
 Managing the Effects of Magnification of Voltage

• Common way to manage/alleviate the effects of such

overvoltages are:
– Control the feeder capacitance switching transient. The
methods have been discussed earlier
– Provide suitable voltage arresters at customer’s end.
– Use of harmonic filters in place of capacitors at the
customers end.
– The presence of inductor improves the performance.
– Provide suitable reactance's in series of sensitive loads
such as variable speed drives.

31