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12 A Low-Power Low-Noise Amplifier For EEG ECG Signal Recording Applications
12 A Low-Power Low-Noise Amplifier For EEG ECG Signal Recording Applications
This paper presents a low-power low-noise amplifier Due to the low frequency ranging of EEGIECG
for electroencephalogram (EEG)/electrocardiogram signals, the dominating circuit noises shift from the
(ECG) signal recording applications. The presented thermal noise to IIf and popcorn noise. Many attempts
circuit contains a chopper-stabilized amplifier and a have been made to tackle the tradeoff between low
second-order continuous time Gm-C low pass filter (LPF) power and low noise under low power supply. Among
using very small Gm OTA. The circuit totally consumes these solutions, the chopper-stabilized technique is very
6.37J.lW with a single supply voltage of 1.2V. It achieves suited for low-power, portable, low-noise, very small
an AC gain of 40dB in mid-band, the input-referred offset and high performance applications such as
integrated noise of 1.08J.lVrms (0.1Hz-150Hz) and a high electronic sensors. As shown in Figure1, the system has
common-mode rejection ratio (CMRR) of 130dB in two parts: the chopper-stabilized amplifier and the
bandwidth. This circuit is implemented in SMIC 0.13J.lm 2nd-order Gm-C low pass filter. The chopper amplifier is
1P8M CMOS process. employed to eliminate low frequency noise and offset,
and the continuous-time Gm-C LPF is employed to
reduce ripple at the output of the amplifier.
1. Introduction
As the development of the IC technology, many
traditional medical monitor devices become portable and
wireless such as EEGIECG instruments. Patients can
make use of these small devices monitor their health
condition at home or hospital without the limitation of
mobility, and upload the data to data process equipment
or the hospital to make the further analysis. So this Vout
Vss
Figure 3. 2nd-order Gm-C LPF
Vn -+---+---'
1-__----1 C VOU!
Vbias2
As shown in Figure 2, the two stage folded cascode As shown in Figure 3, the LPF consists of two same
amplifier with two chopper modulators are implemented. OTA shown in Figure 4 and two grounded capacitors and
The first chopper switch is placed at the drains of the forms a second-order Butterworth structure. The
NMOS current source and its function is to demodulate high-pass cutoff frequency of this LPF is
the EEGIECG signal down to the baseband and modulate
the low frequency noise and offset of input transistors
Gm
and current source transistors up to chopper frequency.
�3dB (1)
The other chopper switch is placed at the drains of the
active load transistors and its function is to modulate the
low frequency noise and offset of active load transistors
To achieve very low cutoff frequency with the
up to chopper frequency. Then these noises can be
limitation of area, the capacitors can't be quite big, so
filtered by the latter LPF. To increase the output swing
the only way is to lower OTA's Gm. However, lowering
under low supply voltage, the common-source
Gm will increase the noise of the LPF and reduce the
architecture is employed as the second stage. As the 1If
open loop gain and GBW. This is a design tradeoff. To
noise and offset voltage has been eliminated by
achieve the very low Gm, the OTA with current division
chopper-stabilized technique, the input transistors can
and source degeneration is implemented [7]. So the total
pay attention to achieve high tranconductance and not
Gm is
need enlarge their area.
Authorized licensed use limited to: INDIAN INSTITUTE OF TECHNOLOGY BOMBAY. Downloaded on November 01,2023 at 18:47:37 UTC from IEEE Xplore. Restrictions apply.
response of the chopper-stabilized amplifier is given.
Figure 6 shows that the bandwidth is 0.085Hz-234.5Hz
and the mid-band gain is 40dB. The input integrated
noise from O.IHz to 150Hz is 1.08/lVrms, and CMRR is
135
130dB in bandwidth. With a I.2V single supply, the total
power consumption is 6.37/lW included bias circuits. a; 130
�
C>:
Table 1 summarizes the comparison of the parameters of C>:
- chopperoft
---'chopperon
/
//
....
-------_
10·8 '--:_
:--- �__;___�.......,;___�--'-:-�--'-:--
--------'
10" 10" la' 10' la' la'
Frequency (Hz)
Figure 7. Amplifier Noise Plot
4. Summary
This paper has designed a low-power low-noise
amplifier for EEGIECG signal measurement. The
Chopper-stabilized topology with AC feedback is
implemented to eliminate the low frequency noise and
d
40 --------- - -------- - offset, and a 2n -order Gm-C Butterworth LPF is
implemented to reduce ripple and achieve very low
high-pass cutoff frequency with the limitation of area
and noise. The amplifier has achieved a low integrated
noise 1.08/lVrms (0. IHz-150Hz) with a low power
consumption 6.37/lW with a 1.2V single supply.
Acknowledgments
This work is supported International Technical
�o" 10" la' la' la' la' Cooperation Project by of China (no. 201ODFBl3040).
Frequency (Hz)
Figure 6. Amplifier Gain Magnitude Plot
Authorized licensed use limited to: INDIAN INSTITUTE OF TECHNOLOGY BOMBAY. Downloaded on November 01,2023 at 18:47:37 UTC from IEEE Xplore. Restrictions apply.
Input referred noise 1.08flV nns, 2.7flV nns, 0.98flV nns, 2.5flV nns,
(0. IHz�150Hz) (0.05Hz�250Hz) (0.05Hz�100Hz) (0.05Hz�460Hz)
CMRR 130dB 61�64dB >80dB >71.2dB
PSRR >60dB 62�63dB -
>84dB
THD 0.083%, 5mVpp 0.053%, 5mVpp <0.1%, 0.6%, full swing
10Hz input signal 16Hz input signal 5mV nn input signal
Current 5.3flA(included 330nA IflA 895nA
bias)
Authorized licensed use limited to: INDIAN INSTITUTE OF TECHNOLOGY BOMBAY. Downloaded on November 01,2023 at 18:47:37 UTC from IEEE Xplore. Restrictions apply.