FPGA EB 02057 1 2 Avant E - Evaluation - Board

Avant Evaluation Board
User Guide
FPGA-EB-02057-1.2
March 2023
User Guide
Disclaimers
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All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
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Contents
Acronyms in This Document ................................................................................................................................................. 6
1. Introduction .................................................................................................................................................................. 7
1.1. Avant-E Evaluation Board.................................................................................................................................... 7
1.2. Features .............................................................................................................................................................. 7
1.3. Avant-E Device .................................................................................................................................................. 10
1.4. Applying Power to the Board ............................................................................................................................ 10
2. Jumper Definition ....................................................................................................................................................... 11
3. Power Scheme ............................................................................................................................................................ 16
4. Programming .............................................................................................................................................................. 19
4.1. JTAG Download Interface .................................................................................................................................. 19
4.2. Alternate JTAG Download Interface .................................................................................................................. 19
4.3. SPI Flash Device Selection in Programmer ........................................................................................................ 20
4.4. Global Setting in Lattice Radiant software ........................................................................................................ 21
4.5. Other Configuration Pins ................................................................................................................................... 25
4.6. Programming of Avant SRAM............................................................................................................................ 25
5. Avant Clock Sources.................................................................................................................................................... 27
6. Control Buses – I2C, UART, and SPI ............................................................................................................................. 28
6.1. I2C Topology ...................................................................................................................................................... 28
6.2. UART Topology .................................................................................................................................................. 28
6.3. SPI Topology ...................................................................................................................................................... 28
7. LEDs, Switches and Segment Displays ........................................................................................................................ 29
7.1. DIP Switch ......................................................................................................................................................... 29
7.2. General Purpose Push Buttons ......................................................................................................................... 29
7.3. General Purpose LEDs ....................................................................................................................................... 30
7.4. Segment Displays .............................................................................................................................................. 30
8. Headers/Connectors and Avant Device Ball Mapping ................................................................................................ 31
8.1. FMC1 Connector ............................................................................................................................................... 31
8.2. FMC2 Connector ............................................................................................................................................... 34
8.3. Parallel FMC1 Configuration Header ................................................................................................................. 38
8.4. Parallel FMC2 Configuration Header ................................................................................................................. 38
8.5. Raspberry PI Board GPIO Header ...................................................................................................................... 38
8.6. External Flash Configuration Header ................................................................................................................ 40
8.7. PMOD Header ................................................................................................................................................... 40
8.8. Through Hole Extended Area Header ............................................................................................................... 41
9. Software Requirements .............................................................................................................................................. 43
10. Storage and Handling ............................................................................................................................................. 43
11. Ordering Information .............................................................................................................................................. 43
Appendix A. Avant Evaluation Board Schematics ............................................................................................................... 44
Appendix B. Avant Evaluation Board Bill of Materials ........................................................................................................ 63
References .......................................................................................................................................................................... 76
Technical Support Assistance .............................................................................................................................................. 77
Revision History .................................................................................................................................................................. 78
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Figures
Figure 1.1. Top View of Avant-E Evaluation Board ...............................................................................................................8
Figure 1.2. Bottom View of Avant Evaluation Board ............................................................................................................9
Figure 1.3. 12 V DC Power Supply .......................................................................................................................................10
Figure 2.1. Top View of Avant Evaluation Board – Jumper Locations ................................................................................11
Figure 3.1. Board Power Scheme (1) ..................................................................................................................................16
Figure 3.2. Board Power Scheme (2) ..................................................................................................................................17
Figure 4.1. Configuration, UART and I2C Architecture ........................................................................................................19
Figure 4.2. SPI Flash Operation Dialog ................................................................................................................................20
Figure 4.3. Global Settings (1) .............................................................................................................................................22
Figure 4.6. Radiant Programmer .........................................................................................................................................25
Figure 4.7. Radiant Programmer – Device Properties ........................................................................................................26
Figure A.1. Title Page ..........................................................................................................................................................44
Figure A.2. Block Diagram ...................................................................................................................................................45
Figure A.3. USB Interface ....................................................................................................................................................46
Figure A.4. Bank-0/1 Flash, LEDs, FMC & Raspberry Pi .......................................................................................................47
Figure A.5. Bank-2 JTAG, UART, Config & Raspberry Pi ......................................................................................................48
Figure A.6. Bank-3/4/5 FMC1 & FMC2................................................................................................................................49
Figure A.7. HPC FMC1 .........................................................................................................................................................50
Figure A.8. Bank-6 Switches, Buttons, LEDs & Extended Bank ...........................................................................................51
Figure A.9. Bank-7/8/9 FMC2 .............................................................................................................................................52
Figure A.10. HPC FMC2 .......................................................................................................................................................53
Figure A.11. LPDDR4 ...........................................................................................................................................................54
Figure A.12. Bank-12/13 PMODs, FMC2 & Raspberry Pi ....................................................................................................55
Figure A.13. Bank-14 Segment Display & Raspberry Pi ......................................................................................................56
Figure A.14. Bank Power .....................................................................................................................................................57
Figure A.15. Power Decoupling...........................................................................................................................................58
Figure A.16. Power Supplies 1 ............................................................................................................................................59
Figure A.17. Power Supplies 2 ............................................................................................................................................60
Figure A.18. Ground ............................................................................................................................................................61
Figure A.19.Power Block Diagram.......................................................................................................................................62
Tables
Table 1.1. Board Power Supply ...........................................................................................................................................10
Table 2.1. Jumper Setting ...................................................................................................................................................12
Table 3.1. VCCIO Supply Options ...........................................................................................................................................17
Table 3.2. Status LED Definition ..........................................................................................................................................18
Table 4.1. JTAG Connections ...............................................................................................................................................19
Table 4.2. Other Configuration Signals ...............................................................................................................................25
Table 5.1. Clock Sources .....................................................................................................................................................27
Table 6.1. I2C Bus Connections ...........................................................................................................................................28
Table 6.2. UART Bus Connections .......................................................................................................................................28
Table 6.3. SPI Bus Connections ...........................................................................................................................................28
Table 7.1. DIP Switch Signals ..............................................................................................................................................29
Table 7.2. Push Button Switch Signals ................................................................................................................................29
Table 7.3. General Purpose LED Signals ..............................................................................................................................30
Table 7.4. Segment Display .................................................................................................................................................30
Table 8.1. FMC1 Pin Connections .......................................................................................................................................31
Table 8.2. FMC2 Pin Connections .......................................................................................................................................34
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Table 8.3. Parallel FMC1 Configuration Header Pin Connections ....................................................................................... 38

Table 8.4. Parallel FMC2 Configuration Header Pin Connections ....................................................................................... 38
Table 8.5. Raspberry PI header Pin Connections ................................................................................................................ 38
Table 8.6. SPI Flash Configuration Header Pin Connections ............................................................................................... 40
Table 8.7. PMOD Header Pin Connections ......................................................................................................................... 40
Table 8.8. Through Hole Extended Area Header Pin Connections ..................................................................................... 41
Table 11.1. Ordering Information ....................................................................................................................................... 43
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Acronyms in This Document

A list of acronyms used in this document.
Acronym Definition
AC/DC Alternating Current and Direct Current
ADC Analog-to-digital Converter
DIP Dual Inline Package
ESD Electro Static Discharge
FMC FPGA Mezzanine Card
FPGA Field Programmable Gate Array
FTDI Future Technology Devices International
GPIO General Purpose Input/Output
HPC High Pin Connector
I2C Inter-Integrated Circuit
I/O Input/Output
JTAG Joint Test Action Group
LED Light Emitting Diode
LVDS Low-Voltage Differential Signaling
OSC Oscillator
PC Personal Computer
PMOD Peripheral Module
POT Potentiometer
SerDes Serializer/Deserializer
SMA Subminiature Version A
SPI Serial Peripheral Interface
UART Universal Asynchronous Receiver Transmitter
USB Universal Serial Bus
FPGA-EB-02057-1.2 6
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1. Introduction
The Lattice Semiconductor Avant™-E Evaluation Board allows you to investigate and experiment with the features of
the Avant-E Field Programmable Gate Array (FPGA). The features of the Avant-E Evaluation Board can assist you with
the rapid prototyping and testing of your specific design. The Avant-E Evaluation board is part of the Avant-E Evaluation
Board Kit. This guide is intended to be referenced to demonstrate the Avant-E FPGA and introduce board resources.
The Avant-E Evaluation Board Kit includes the following:
• Avant-E Evaluation Board is pre-loaded with blinking lights demo design.
• USB-A to USB-B (Mini) cable for programming FPGA SRAM through a PC
• Lattice Programming Cable is needed to program the Flash device at this time.
• Programming Cable can be ordered here:
https://www.latticesemi.com/products/developmentboardsandkits/programmingcablesforpcs
• Future revisions of the board can allow programming of the Flash device through on-board J2 mini USB
connector, eliminating the need of the Lattice Programming Cable.
• 12 V AC/DC power adapter and international plug adapters
• Lattice Radiant® software download information
The contents of this user guide include top-level functional descriptions of the various portions of the evaluation board,
descriptions of the on-board headers, status indicators, push buttons and switches and a complete set of schematics.
1.1. Avant-E Evaluation Board

The Avant-E Evaluation Board features the Avant-E FPGA in the LFG1156 package. The board has the ability to expand
the usability of the Avant-E FPGA with FMC HPC, PMOD, and Raspberry PI connectors. Easy-to-use board resources of
the jumpers, LED indicators, push buttons and switches are available for user-defined applications.
Figure 1.1 shows the top view of Avant-E Evaluation Board. Figure 1.2 shows the bottom view of Avant-E Evaluation
Board.
1.2. Features
The Avant-E Evaluation Board includes the following features:
• Avant-E FPGA (LAV-AT-500E-3LFG1156C)
• General purpose Input/Output (GPIO) breakout with 2 FMC, PMOD, and Raspberry PI connectors
• Total of 95 wide-range I/O and 468 high-speed differential I/O (234 pairs) extended onboard
• USB-B (Mini) connection for device programming
• On-board Boot Flash – 512 Mb Serial Peripheral Interface (SPI) Flash, with Single/Dual/Quad support
• Eight input DIP switches, four push buttons, eight green LEDs, eight red LEDs and three seven-segment LEDs for
designer configuration
• Lattice Radiant® software programming support
• Two reference clock sources
Caution: The Avant-E Evaluation Board contains ESD-sensitive components. ESD safe practices
should be followed while handling and using the evaluation board.
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SPI Flash 8-Segment LEDs PMOD Connectors
Mini USB
FTDI Chip
Power LEDs
FMC1 Connector
LPDDR4 Memory
Avant FPGA
Main Power Switch

DIP Switch
12 V DC Power Jack
I/O Extended Area
Push Buttons FMC2 Connector
Figure 1.1. Top View of Avant-E Evaluation Board
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Raspberry Pi Connector
FTDI Flash
Figure 1.2. Bottom View of Avant Evaluation Board
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1.3. Avant-E Device

The Avant-E Evaluation Board features the Avant-E device in an LFG1156 package, also referred to as
LAV-AT-500E-3LFG1156C. The low-power general purpose FPGA can be used in a wide range of applications across
multiple markets and is optimized for bridging and processing needs in edge applications. For more information on the
capabilities of Avant-E device, see Avant Platform Data Sheet – Overview (FPGA-DS-02107) and Avant Platform Data
Sheet – Specifications (FPGA-DS-02112).
1.4. Applying Power to the Board

The Avant-E Evaluation Board can be powered up using the 12 V AC/DC power adapter included with the kit. The power
adapter should be connected to power input jack J50, which is connected to fuse F2, as shown in Figure 1.3 and
Table 1.1. The fuse can prevent the crashed current from flowing into the internal circuits and cause serious damage.
Power LEDs light up after connecting the 12 V DC power and toggling SW6 to the ON position to indicate that the board
is getting the proper board voltages.
Figure 1.3. 12 V DC Power Supply
Table 1.1. Board Power Supply

Part Designator Description
J50 12 V DC Input Supply Jack
F2 12 V DC Input Supply Fuse
SW6 ON/OFF Switch
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2. Jumper Definition
Figure 2.1. Top View of Avant Evaluation Board – Jumper Locations
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Table 2.1. Jumper Setting

Part Designator Description Setting Default
J23 Power Measurement Header for PMOD Header J6
J58 Power Measurement Header for VCCIO0
J57 Power Measurement Header for PMOD Header J6
J73 Power Measurement Header for Avant VCC
J74 Power Measurement Header for Avant VCCHP
J75 Power Measurement Header for Avant VCCCLK
J76 Power Measurement Header for Avant VCCAUX
J77 Power Measurement Header for Avant VCCAPLLW
J78 Power Measurement Header for Avant VCCAPLL10
Open – UART bus unconnected
JP1, JP2 FTDI UART Debug Close
Close – UART bus connected
Open – FTDI active
JP3 FTDI Reset Open
Close – Holds FTDI in reset
Open – I2C bus unconnected
JP4, JP5 FTDI I2C Open
Close – I2C bus connected
Open – 12 MHz oscillator goes only to FTDI chip
JP6 FTDI 12 MHz Oscillator Jumper Close – 12 MHz oscillator goes to FTDI chip & Open
ball U3 of FPGA through JP65
JP7 – Open, JP8 – Open, JP43 – Open: U10
Output = 1.5 V
JP7 – Open, JP8 – Close, JP43 – Open: U10
JP7, JP8 & JP43 are Used to Select U10 Output = 1.8 V
JP7 Open
Voltage Output JP7 – Close, JP8 – Open, JP43 – Open: U10
Output = 2.5 V
JP7 – Open, JP8 – Open, JP43 – Close: U10
Output = 3.3 V
Output = 1.5 V
JP7, JP8 & JP43 are Used to Select U10 JP7 – Open, JP8 – Close, JP43 – Open: U10
JP8 Close
Voltage Output Output = 1.8 V
JP7 – Close, JP8 – Open, JP43 – Open: U10
Output = 2.5 V
FPGA-EB-02057-1.2 12
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Output = 3.3 V
Open – Raspberry PI self-power
JP12 Raspberry PI Connector (JP26) Power Open
Close – 3.3 V supplied to Raspberry PI connector
Open – Raspberry PI self-power
JP13 Raspberry PI Connector (JP26) Power Open
Close – 5.0 V supplied to Raspberry PI connector
Open – MSPI boot mode
JP17 PROGRAMN Pull-down Jumper Open
Close – Secondary configuration mode
1–2 – Secondary boot mode, external Main
configures Avant’s SRAM
JP25 FPGA Configuration Mode Select 2–3
2–3 – Main auto boot mode, Avant downloads
bitstream from external Flash
1–2 – Flash (U4) powered by VCCIO1_IN
JP28 Flash Power Source 2–3
2–3 – Flash (U4) powered by VCC_3V30
JP31, JP32, JP33, JP34, JP35 & JP36 select
voltage to VCCIO6. Only one of these jumpers
should be inserted.
JP31 Avant Bank 6 Power Select (VCCIO6) Open
Open – VCCIO6 voltage based on JP32, JP33,
JP34, JP35 & JP36 settings
Close – VCCIO6 = 0.9 V
should be inserted.
should be inserted.
should be inserted.
should be inserted.
should be inserted.
JP36 Avant Bank 6 Power Select (VCCIO6) Close
Open – Leaves FMC1 VREF_A_M2C (J48D.H1)
pin open
JP37 FMC1 Reference Voltage Open
Close – Connects Avant ball AA11 to FMC1
VREF_A_M2C (J48D.H1)
FPGA-EB-02057-1.2 13
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pin open
Close – Connects Avant ball AG6 to FMC1
pin open
Close – Connects Avant ball AF13 to FMC1
pin open
pin open
pin open
Output = 1.5 V
JP7, JP8 & JP43 are Used to Select U10 Output = 1.8 V
JP43 Open
Voltage Output JP7 – Close, JP8 – Open, JP43 – Open: U10
Output = 2.5 V
Output = 3.3 V
Output = 1.5 V
JP44, JP45 & JP46 are Used to Select Output = 1.8 V
JP44 Open
U31 Voltage Output JP44 – Close, JP45 – Open, JP46 – Open: U31
Output = 2.5 V
Output = 3.3 V
Output = 1.5 V
JP45 Open
Output = 2.5 V
Output = 3.3 V
Output = 1.5 V
JP46 Close
Output = 2.5 V
Output = 3.3 V
JP47, JP48, JP49 & JP50 select voltage to
JP47 Avant Bank 12 Power Select (VCCIO12) VCCIO12. Only one of these jumpers should be Open
inserted.
FPGA-EB-02057-1.2 14
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Open – VCCIO12 voltage based on JP48, JP49 &
JP50 settings
VCCIO12. Only one of these jumpers should be
inserted.
JP50 settings
inserted.
JP50 settings
inserted.
JP50 Avant Bank 12 Power Select (VCCIO12) Close
Open – VCCIO12 voltage based on JP48 & JP49
settings
Open – Flash (U4) CS# is only connected to pin 2
of J3 Header
JP51 SPI Chip Select Close
Close – Connects Avant MCSN ball (P7) to Flash
(U4) CS# pin
Open – Leaves FMC2 VREF_B_M2C (J54E.K1) pin
open
VREF_A_M2C (J54E.K1)
1–2 – VCCIO5 = 1.8 V
JP58 Avant Bank 5 Power Select (VCCIO5) 1–2
2–3 – VCCIO5 = 1.2 V
1–2 – VCCIO4 = 1.8 V
2–3 – VCCIO4 = 1.2 V
1–2 – VCCIO3 = 1.8 V
2–3 – VCCIO3 = 1.2 V
1–2 – VCCIO7 = 1.8 V
2–3 – VCCIO7 = 1.2 V
1–2 – VCCIO8 = 1.8 V
2–3 – VCCIO8 = 1.2 V
1–2 – VCCIO9 = 1.8 V
2–3 – VCCIO9 = 1.2 V
1–2 – Avant ball U3 connected to Raspberry Pi
Header (JP26) pin 7
JP65 Avant Ball U3 1–2
2–3 – Avant ball U3 connected to 12 MHz
oscillator (X1) through JP6 jumper
Open – Leaves FMC2 VREF_B_M2C (J54E.K1) pin
open
Close – Connects Avant ball AE13 to FMC2
VREF_B_M2C (J48D.H1)
FPGA-EB-02057-1.2 15
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3. Power Scheme
The Avant Evaluation Board has majority of on-board regulators powered by 12 V and 5 V power. Refer to Appendix A.
Avant Evaluation Board Schematics to see the details of these power supply options.
Figure 3.1 and Figure 3.2 show the high-level power supply architecture of the board. Table 3.1 shows the voltage
options available for various VCCIO supplies.
The Avant Evaluation Board has two FMC connectors, designated as FMC1 and FMC2. The VFMC1_ADJ and VFMC2_ADJ
power supplies are required for the two FMC connectors according to the FMC standard. You can set the power output
level by changing the jumpers (JP7, JP8 and JP43) for FMC1 and (JP44, JP45 and JP46) for FMC2.
MAX15118 VCC_0V82
(U42)
AP62201TWU-7 VCC_0V90
(U40)
(U17)
(U35)
VCC_1V20
AP62201TWU-7
(U37)
VCC_1V35
AP62201TWU-7
(U41)
VCC_1V50
AP62201TWU-7
(U39)
VCC_12V00 VCC_5V00 (U36)
RT7298A (U43)
(U38)
(U34)
NCP133 (U44) 0.82 V
BD9D321EFJ VFMC1_3V30
(U6)
FMC1
VFMC1_ADJ
BD9D321EFJ
(U10)
BD9D321EFJ VFMC2_3V30
(U32)
VFMC2_ADJ FMC2
BD9D321EFJ
(U31)
Figure 3.1. Board Power Scheme (1)
FPGA-EB-02057-1.2 16
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VCC_1V20
VCC_1V80
VCC_3V30 VCC_3V30 VCC_3V30 VCC_3V30 VCC_3V30
VCC_2V50
VCC_3V30
WR BANK 0 WR BANK 1 WR BANK 2 WR BANK 12 WR BANK 13 WR BANK 14
VCC
VCCA_PLL_W
VCC_1V80 VCCAUX
VCCA_PLL4
AVANT – FPGA
VCCA_PLL7
LAV-AT-500-E-LFG1156 VCC_0V82
VCC_1V80 VCCAUXA VCCA_PLL10
VCCCLK
VCCHP
HP HP HP HP HP HP HP HP HP
BANK 3 BANK 4 BANK 5 BANK 6 BANK 7 BANK 8 BANK 9 BANK 10 BANK 11
VCC_0V90
VCC_1V00
VCC_1V20 VCC_1V20 VCC_1V20 VCC_1V10 VCC_1V20 VCC_1V20 VCC_1V20 VCC_1V10 VCC_1V10
VCC_1V80 VCC_1V80 VCC_1V80 VCC_1V35 VCC_1V80 VCC_1V80 VCC_1V80
VCC_1V50
VCC_1V80
Figure 3.2. Board Power Scheme (2)
Table 3.1. VCCIO Supply Options

VCCIO Bank 3.30 V 2.50 V 1.80 V 1.50 V 1.35 V 1.20 V 1.10 V 1.00 V 0.90 V
VCCIO0 Fixed — — — — — — — —
VCCIO1 Fixed — — — — — — — —
VCCIO2 Fixed — — — — — — — —
VCCIO3
VCCIO4 — — Default — — Selectable — — —
VCCIO5
VCCIO6 Default Selectable Selectable Selectable — Selectable Selectable Selectable
VCCIO7
VCCIO8 — — Default — — Selectable — — —
VCCIO9
VCCIO10 — — — — — — Fixed — —
VCCIO11 — — — — — — Fixed — —
VCCIO12 Default Selectable Selectable Selectable — — — — —
VCCIO13 Fixed — — — — — — — —
VCCIO14 Fixed — — — — — — — —
FPGA-EB-02057-1.2 17
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The Avant Evaluation Boards provide status LEDs to provide a visual indication of power status (Table 3.2).
Table 3.2. Status LED Definition
LED Designator Color Description
D1 Green J2 USB connector
D61 Green 1.00 V power on
D70 Green 0.82 V to Avant VCC and VCCCLK power rails
D74 Green 12.00 V from external power source, J50
D75 Green 0.82 V to Avant VCCHP and VCCA_PLLx power rails
FPGA-EB-02057-1.2 18
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4. Programming
The JTAG/SPI programming architecture of the Avant Evaluation Board is shown in Figure 4.1.
JTAG Header
J1 SPI Header
J3
Port A
Mini USB SPI
J2 FT2232 JP4&JP5 LAV-AT-500E
U1 U3 Flash
Port B Jumper U4
Reset UART
JP3 JP1&JP2
PROGRAMN CFGMODE
JP17 JP25
Figure 4.1. Configuration, UART and I2C Architecture
4.1. JTAG Download Interface

The Avant Evaluation Board has a built-in download controller for programming the Avant device. It uses FT2232H part
of Future Technology Devices International Ltd. (FTDI) to convert USB to JTAG. To use the built-in download cable,
connect the USB cable from a PC with Radiant Programmer installed to the mini USB connector (J2) on the board. A
USB-A to USB-B (Mini) cable is included in the Avant Evaluation Board Kit. The USB hub on the PC detects the cable of
the USB function on Port A, making the built-in cable available for use with the Radiant programming software.
4.2. Alternate JTAG Download Interface

J1 is a stand-alone eight-pin JTAG header that can be used with an external Lattice Programming Cable that is available
separately. When the FTDI part is disabled from the JTAG chain by installing the JP3 jumper, the USB Programming
Cable can be connected to J1 to interface with the Avant device. For details on the connection between the USB
Programming Cable and J1, refer to Programming Cables User Guide (FPGA-UG-02042). J1 can also be used as test
points when the configuration from USB to JTAG is working. The JTAG connections are listed in Table 4.1.
Table 4.1. JTAG Connections
J1 Pin Number JTAG Signal Name Avant Bank Avant Ball Location for JTAG
1 VCC_3V30 — —
2 TDO 2 U2
3 TDI 2 U1
4 — — —
5 — — —
6 TMS 2 R1
7 GND — —
8 TCK 2 T1
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4.3. SPI Flash Device Selection in Programmer

The on-board Flash device is Macronix MX25L51245G that powers up through the 3.3 V supply (Figure 4.2). The Flash
device can be programmed with Radiant Programmer through the J3 header with the Lattice Programming Cable.
Figure 4.2. SPI Flash Operation Dialog
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4.4. Global Setting in Lattice Radiant software

The Avant Evaluation Board has been downloaded with LED blinking project beforehand. Some Global settings in the
Device Constraint Editor are configured. These settings are shown in Figure 4.3, Figure 4.4, and Figure 4.5.
FPGA-EB-02057-1.2 21
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Figure 4.3. Global Settings (1)
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4.5. Other Configuration Pins

The Avant Evaluation Board provides test points for other configuration pins, as shown in Table 4.2.
Table 4.2. Other Configuration Signals
Signal Name Avant Bank Avant Ball Location Test Point Button/Jumper
PROGRAMN 2 P2 PROGRAMN SW2/JP17
INITN 2 T5 INITN —
DONE 2 U4 DONE —
CFGMODE 2 P1 N/A JP25
• INITN: Open drain pin. This signal is driven to LOW when the configuration sequence is started, indicating the
device is in initialization state. At this moment, the LED (D4) is lighted with red color. This signal is released after
initialization is completed, and the configuration download starts.
• DONE: Open drain pin. This signal is driven to LOW during configuration time. This signal releasing indicates the
device has completed configuration. At this moment, the LED (D5) is lighted with green color.
For more information on Avant JTAG and SPI programming, refer to Lattice Avant sysCONFIG User Guide
(FPGA-TN-02299).
4.6. Programming of Avant SRAM

Radiant Programmer can be used to program the .bit file to the Avant SRAM. Radiant Programmer is integrated into
the Radiant Software and is also available as a stand-alone version.
To program the Avant SRAM:
1. Connect the PC and Avant Evaluation Board (J2) using the USB cable.
2. In Radiant Software, click Tools > Programmer or in Windows, go to Start > Lattice Radiant Software 2022.1 >
Radiant Programmer.
3. The Radiant Programmer interface opens as shown in Figure 4.6. Double-click the Operation field.
Figure 4.6. Radiant Programmer
FPGA-EB-02057-1.2 25
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4. The Device Properties dialog box opens as shown in Figure 4.7. Select the following options:
• Target Memory – Compressed Random Access Memory (CRAM)
• Port Interface – JTAG
• Access Mode – Direct Programming
• Operation – Fast Configuration
• Programming file – Select the .bit file to be programmed.
Figure 4.7. Radiant Programmer – Device Properties
5. Click OK.
To program the .bit file, click the Program button in Radiant Programmer or select Run > Program Device. If successful,
the Status column shows PASS. The Output pane also shows INFO – Operation: successful.
The design and bitstream loaded into the Avant Evaluation Board flash (U4) can be found in the following link under
Design File:
https://www.latticesemi.com/products/developmentboardsandkits/avant-e-evaluation-board
FPGA-EB-02057-1.2 26
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5. Avant Clock Sources

The Avant Evaluation Board has two options for the Avant clock sources, as shown in Table 5.1.
Table 5.1. Clock Sources
Clock Frequency Avant Ball Clock
Signal Name Avant Bank Comments
(MHz) Location Source
12 12_MHz 2 U3 X1 JP6 is installed and JP65 set to 2-3.
100 F_DDR_100MHz_P/N 10 AA34/ AA33 Y1 HCSL differential output
FPGA-EB-02057-1.2 27
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6. Control Buses – I2C, UART, and SPI

This section describes the topology of the various configuration and communication buses.
6.1. I2C Topology

The Avant Evaluation Board has four sets of I2C buses. One I2C bus is through the output port B of the FTDI chip. The
second I2C bus is out of Bank 6 to a header. There is an I2C bus for each of the FMC connectors. The I2C connections are
summarized in Table 6.1.
Table 6.1. I2C Bus Connections
Signal Name Avant Bank Avant Ball Location Other Connection Comments
SCL 14 R12 U1.38 R103 and JP4 need to be inserted.
SDA 14 T11 U1.39 & U1.40 R104 and JP5 need to be inserted.
B6_SCL 6 AH16 JP64.3 Debug Header
B6_SDA 6 AG16 JP64.1 Debug Header
FMC1_SCL 0 T8 J48.C30 & J10.10 FMC Header and Debug Header
FMC1_SDA 0 U8 J48.C31 & J10.14 FMC Header and Debug Header
FMC2_SCL 13 R15 J54.C30 & J53.10 FMC Header and Debug Header
FMC2_SDA 13 R14 J54.C31 & J53.14 FMC Header and Debug Header
6.2. UART Topology

The board provides one UART communication interface by providing a flexible connection between the Avant device
and FTDI chip. Close the two jumpers, JP1 and JP2, to connect to two general-purpose I/O in Bank 2, as shown in
Table 6.2. This UART connection is shared with the I2C bus connection on the FTDI device.
Table 6.2. UART Bus Connections
Signal Name Avant Bank Avant Ball Location FTDI Chip Ball Location Jumper
TXD_UART 2 T3 38 JP1
RXD_UART 2 R3 39 JP2
6.3. SPI Topology

6.3.1. SPI Configuration
One of the major functions of SPI connections on the board is to support Avant configuration from the SPI Flash or the
Parallel Configuration Header (J3), as shown in Table 6.3. The Avant Evaluation Board can support both Master SPI
(MSPI) and Slave SPI (SSPI) modes for Avant configuration. Jumper JP51 selects chip select connection to flash (U4),
either from Avant or Header J3.
Table 6.3. SPI Bus Connections
Signal Name Avant Bank Avant Ball Parallel Configuration Header Pin
SPI_MCLK 1 P9 12
DQ0_MOSI 1 L12 5
DQ1_MISO 1 L11 7
CSSPIN 1 P7 8
DQ2 1 L10 11
DQ3 1 L9 9
FLASH_CS N/A N/A 2
FPGA-EB-02057-1.2 28
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7. LEDs, Switches and Segment Displays

This section describes the Avant Evaluation Board LEDs, switches and segment displays that can be used in demo and
customer designs.
7.1. DIP Switch

Eight Avant pins are connected to the DIP switch (SW3) to allow manual actuating input to the FPGA. One side of each
switch is connected to GPIOs within Bank 6, and is pulled up through 4.7 kΩ resistors. The other side is grounded. The
designated pins are connected as shown in Table 7.1.
Table 7.1. DIP Switch Signals
Signal Name Avant Ball Location Avant Bank
DIP_SW1 AA16 6
DIP_SW2 AA17 6
DIP_SW3 AL16 6
DIP_SW4 AM16 6
DIP_SW5 AB16 6
DIP_SW6 AB17 6
DIP_SW7 AP16 6
DIP_SW8 AN16 6
7.2. General Purpose Push Buttons

The Avant Evaluation Board provides four push button switches, SW1, SW2, SW4 and SW5, for demo and user
applications. One of the buttons is a pre-defined functional pin, and the other three are generic pins. Pressing these
buttons drives a logic level “0” to the corresponding I/O pins. The designated pins are connected as shown in Table 7.2.
Table 7.2. Push Button Switch Signals
Logic Level at Button
Signal Name Avant Bank Avant Ball Location Push Button Reference
Pressed
PROGRAMN 1 P2 SW2 0
PUSHBUTTON1 6 AC17 SW1 0
PUSHBUTTON2 6 AC16 SW4 0
PUSHBUTTON3 6 AP15 SW5 0
For more information on PROGRAMN, refer to Lattice Avant sysCONFIG User Guide
(FPGA-TN-02299). SW2, SW4, and SW5 can be used as generic input.
FPGA-EB-02057-1.2 29
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7.3. General Purpose LEDs

The Avant Evaluation Board provides 16 LEDs that are connected to I/O within Banks 1 and 6. The LEDs are either green
or red, as shown in Table 7.3.
Table 7.3. General Purpose LED Signals
Signal Name Avant Ball Location Avant Bank LED Avant Color
LED_0 N7 1 D6 Green
LED_1 L7 1 D7 Green
LED_2 L8 1 D8 Green
LED_3 P8 1 D9 Green
LED_4 M8 1 D10 Green
LED_5 M9 1 D11 Green
LED_6 P10 1 D12 Green
LED_7 N10 1 D13 Green
LED_8 AN15 6 D22 Red
LED_9 AH17 6 D23 Red
LED_10 AG17 6 D24 Red
LED_11 AM14 6 D25 Red
LED_12 AL14 6 D26 Red
LED_13 AK17 6 D27 Red
LED_14 AJ17 6 D28 Red
LED_15 AN14 6 D29 Red
7.4. Segment Displays

The Avant Evaluation Board provides a 3-Character, 7-Segment LED display (D60) that is connected to I/O within Bank
14. The designated pins are connected as shown in Table 7.4.
Table 7.4. Segment Display
Signal Name Avant Ball Location Avant Bank Segment Display
SEG_A V10 14 A
SEG_B T10 14 B
SEG_C V12 14 C
SEG_D V13 14 D
SEG_E W10 14 E
SEG_F V11 14 F
SEG_G W12 14 G
SEG_DP W11 14 DP
K_DIG1 W9 14 K_DIG1
K_DIG2 V9 14 K_DIG2
K_DIG3 R10 14 K_DIG3
FPGA-EB-02057-1.2 30
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8. Headers/Connectors and Avant Device Ball Mapping

This section describes the Avant Evaluation Board headers/connectors and ball mapping.
8.1. FMC1 Connector

Table 8.1. FMC1 Pin Connections
J48 Pin Name Signal Name Avant Bank Avant Ball Location
B1 FMC1_RES1 0 V5
B40 FMC1_RES0 0 W5
C10 FMC1_LA06_P 3 Y8
C11 FMC1_LA06_N 3 Y9
C14 FMC1_LA10_P 3 AC13
C15 FMC1_LA10_N 3 AC12
C18 FMC1_LA14_P 3 AC4
C22 FMC1_LA18_CLK_P 5 AN7
C23 FMC1_LA18_CLK_N 5 AP7
C26 FMC1_LA27_P 3 AB10
C30 FMC1_SCL 0 T8
C31 FMC1_SDA 0 U8
C34 FMC1_GA0 — —
D1 FMC1_PG_C2M 0 V4
D8 FMC1_LA01_CLK_P 3 AB1
D9 FMC1_LA01_CLK_N 3 AC1
D11 FMC1_LA05_P 3 AA8
D12 FMC1_LA05_N 3 AA9
D14 FMC1_LA09_P 3 AD12
D15 FMC1_LA09_N 3 AD11
D17 FMC1_LA13_P 3 AA3
D18 FMC1_LA13_N 3 Y3
D20 FMC1_LA17_CLK_P 3 AC8
D21 FMC1_LA17_CLK_N 3 AC9
D24 FMC1_LA23_N 3 AD10
D26 FMC1_LA26_P 5 AG12
D27 FMC1_LA26_N 5 AG13
D29 FMC1_TCK 0 T7
D30 FMC1_TDI 0 W1
D31 FMC1_TDO 0 V1
D33 FMC1_TMS 0 W7
D34 FMC1_TRST_L — —
D35 FMC1_GA1 — —
E2 FMC1_HA01_CLK_P 4 AH1
E3 FMC1_HA01_CLK_N 4 AJ1
E6 FMC1_HA05_P 4 AE5
E7 FMC1_HA05_N 4 AF5
E9 FMC1_HA09_P 4 AE2
FPGA-EB-02057-1.2 31
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E10 FMC1_HA09_N 4 AF2
E12 FMC1_HA13_P 4 AJ4
E13 FMC1_HA13_N 4 AK4
E15 FMC1_HA16_P 4 AM4
E16 FMC1_HA16_N 4 AL4
E18 FMC1_HA20_P 4 AF9
E19 FMC1_HA20_N 4 AE9
F1 FMC1_PG_M2C 0 W4
F4 FMC1_HA00_CLK_P 4 AF6
F5 FMC1_HA00_CLK_N 4 AE6
F7 FMC1_HA04_P 4 AE4
F8 FMC1_HA04_N 4 AF4
F10 FMC1_HA08_P 4 AG1
F11 FMC1_HA08_N 4 AG2
F13 FMC1_HA12_P 4 AJ2
F14 FMC1_HA12_N 4 AK2
F16 FMC1_HA15_P 4 AE11
F17 FMC1_HA15_N 4 AF11
F19 FMC1_HA19_P 4 AF10
F20 FMC1_HA19_N 4 AE10
G2 FMC1_CLK1_M2C_P 4 AP2
G3 FMC1_CLK1_M2C_N 4 AP3
G6 FMC1_LA00_CLK_P 3 Y7
G7 FMC1_LA00_CLK_N 3 Y6
G9 FMC1_LA03_P 3 AD6
G10 FMC1_LA03_N 3 AD5
G12 FMC1_LA08_P 3 AA2
G13 FMC1_LA08_N 3 Y2
G15 FMC1_LA12_P 3 AB4
G16 FMC1_LA12_N 3 AB5
G18 FMC1_LA16_P 3 AC3
G19 FMC1_LA16_N 3 AC2
G21 FMC1_LA20_P 3 AD3
G22 FMC1_LA20_N 3 AD4
G25 FMC1_LA22_N 5 AC14
G27 FMC1_LA25_P 5 AH10
G28 FMC1_LA25_N 5 AJ10
G30 FMC1_LA29_P 5 AK9
G31 FMC1_LA29_N 5 AK8
G33 FMC1_LA31_P 5 AM8
G34 FMC1_LA31_N 5 AM9
G36 FMC1_LA33_P 5 AN9
G37 FMC1_LA33_N 5 AN8
H1 FMC1_VREFA 3/4/5 AA11/AG6/AF13
H2 FMC1_PRSNT_M2C_L 0 U7
H4 FMC1_CLK0_M2C_P 4 AF1
H5 FMC1_CLK0_M2C_N 4 AE1
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H7 FMC1_LA02_P 3 AC7
H8 FMC1_LA02_N 3 AC6
H10 FMC1_LA04_P 3 Y11
H11 FMC1_LA04_N 3 Y10
H13 FMC1_LA07_P 3 AB13
H14 FMC1_LA07_N 3 AB12
H16 FMC1_LA11_P 3 AA4
H17 FMC1_LA11_N 3 Y4
H19 FMC1_LA15_P 3 AD2
H20 FMC1_LA15_N 3 AD1
H22 FMC1_LA19_P 3 AD7
H23 FMC1_LA19_N 3 AD8
H25 FMC1_LA21_P 5 AE14
H26 FMC1_LA21_N 5 AF14
H28 FMC1_LA24_P 5 AK10
H29 FMC1_LA24_N 5 AK11
H31 FMC1_LA28_P 5 AL8
H32 FMC1_LA28_N 5 AL9
H34 FMC1_LA30_P 5 AN6
H35 FMC1_LA30_N 5 AN5
H37 FMC1_LA32_P 5 AP9
H38 FMC1_LA32_N 5 AP8
J2 FMC1_CLK3_M2C_P 5 AJ12
J3 FMC1_CLK3_M2C_N 5 AJ11
J6 FMC1_HA03_P 4 AE7
J7 FMC1_HA03_N 4 AF7
J9 FMC1_HA07_P 4 AH4
J10 FMC1_HA07_N 4 AH3
J12 FMC1_HA11_P 4 AN1
J13 FMC1_HA11_N 4 AM1
J15 FMC1_HA14_P 4 AM3
J16 FMC1_HA14_N 4 AN3
J18 FMC1_HA18_P 4 AG7
J19 FMC1_HA18_N 4 AG8
J21 FMC1_HA22_P 5 AA15
J22 FMC1_HA22_N 5 AA14
K4 FMC1_CLK2_M2C_P 3 AB7
K5 FMC1_CLK2_M2C_N 3 AA7
K7 FMC1_HA02_P 4 AF3
K8 FMC1_HA02_N 4 AE3
K10 FMC1_HA06_P 4 AL1
K11 FMC1_HA06_N 4 AK1
K13 FMC1_HA10_P 4 AN4
K14 FMC1_HA10_N 4 AP4
K16 FMC1_HA17_CLK_P 5 AF12
K17 FMC1_HA17_CLK_N 5 AE12
K19 FMC1_HA21_P 4 AH6
K20 FMC1_HA21_N 4 AH5
FPGA-EB-02057-1.2 33
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K22 FMC1_HA23_P 5 AB14
K23 FMC1_HA23_N 5 AB15
8.2. FMC2 Connector

Table 8.2. FMC2 Pin Connections
B1 FMC2_RES1 13 R18
B40 FMC2_RES0 13 R19
C10 FMC2_LA06_P 7 AL20
C11 FMC2_LA06_N 7 AM20
C14 FMC2_LA10_P 7 Y17
C15 FMC2_LA10_N 7 Y18
C18 FMC2_LA14_P 7 AF19
C19 FMC2_LA14_N 7 AF20
C22 FMC2_LA18_CLK_P 8 AN28
C23 FMC2_LA18_CLK_N 8 AM28
C26 FMC2_LA27_P 7 AM23
C27 FMC2_LA27_N 7 AL23
C30 FMC2_SCL 13 R15
C31 FMC2_SDA 13 R14
C34 FMC2_GA0 — —
D1 FMC2_PG_C2M 13 T18
D8 FMC2_LA01_CLK_P 7 AG20
D9 FMC2_LA01_CLK_N 7 AH20
D11 FMC2_LA05_P 7 AN18
D12 FMC2_LA05_N 7 AP18
D15 FMC2_LA09_N 7 AE17
D17 FMC2_LA13_P 7 AE18
D18 FMC2_LA13_N 7 AE19
D20 FMC2_LA17_CLK_P 7 AP22
D21 FMC2_LA17_CLK_N 7 AN22
D23 FMC2_LA23_P 7 AK21
D24 FMC2_LA23_N 7 AA10
D26 FMC2_LA26_P 8 AK28
D27 FMC2_LA26_N 8 AK27
D29 FMC2_TCK 13 U15
D30 FMC2_TDI 13 U16
D31 FMC2_TDO 13 U17
D33 FMC2_TMS 13 W14
D34 FMC2_TRST_L — —
D35 FMC2_GA1 — —
E2 FMC2_HA01_CLK_P 9 AG33
E3 FMC2_HA01_CLK_N 9 AH33
E6 FMC2_HA05_P 9 AH30
E7 FMC2_HA05_N 9 AJ30
FPGA-EB-02057-1.2 34
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E9 FMC2_HA09_P 9 AK31
E10 FMC2_HA09_N 9 AK32
E12 FMC2_HA13_P 9 AN32
E13 FMC2_HA13_N 9 AP32
E15 FMC2_HA16_P 9 AL33
E16 FMC2_HA16_N 9 AL34
E18 FMC2_HA20_P 9 AJ31
E19 FMC2_HA20_N 9 AJ32
E21 FMC2_HB03_P 8 AD19
E22 FMC2_HB03_N 8 AD20
E24 FMC2_HB05_P 8 AG21
E25 FMC2_HB05_N 8 AF21
E27 FMC2_HB09_P 8 AG23
E28 FMC2_HB09_N 8 AG24
E30 FMC2_HB13_P 8 AN24
E31 FMC2_HB13_N 8 AP24
E33 FMC2_HB19_P 8 AM26
E34 FMC2_HB19_N 8 AM25
E36 FMC2_HB21_P 8 AL26
E37 FMC2_HB21_N 8 AK26
F1 FMC2_PG_M2C 13 T19
F4 FMC2_HA00_CLK_P 9 AM30
F5 FMC2_HA00_CLK_N 9 AL30
F7 FMC2_HA04_P 9 AH26
F10 FMC2_HA08_P 9 AP31
F11 FMC2_HA08_N 9 AN31
F13 FMC2_HA12_P 9 AN34
F14 FMC2_HA12_N 9 AN33
F16 FMC2_HA15_P 9 AK33
F17 FMC2_HA15_N 9 AK34
F19 FMC2_HA19_P 9 AH34
F22 FMC2_HB02_P 8 AJ23
F23 FMC2_HB02_N 8 AH23
F25 FMC2_HB04_P 8 AG25
F26 FMC2_HB04_N 8 AF25
F28 FMC2_HB08_P 8 AL29
F29 FMC2_HB08_N 8 AM29
F31 FMC2_HB12_P 8 AN25
F32 FMC2_HB12_N 8 AP25
F34 FMC2_HB16_P 8 AP26
F35 FMC2_HB16_N 8 AN26
F37 FMC2_HB20_P 8 AP29
F38 FMC2_HB20_N 8 AN29
G2 FMC2_CLK1_M2C_P 9 AP30
G3 FMC2_CLK1_M2C_N 9 AN30
G6 FMC2_LA00_CLK_P 7 AJ18
FPGA-EB-02057-1.2 35
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G7 FMC2_LA00_CLK_N 7 AK18
G9 FMC2_LA03_P 7 AM18
G10 FMC2_LA03_N 7 AL18
G12 FMC2_LA08_P 7 AN20
G13 FMC2_LA08_N 7 AP20
G16 FMC2_LA12_N 7 AA18
G18 FMC2_LA16_P 7 AL17
G19 FMC2_LA16_N 7 AM17
G22 FMC2_LA20_N 7 AH22
G25 FMC2_LA22_N 8 AH25
G27 FMC2_LA25_P 7 AP21
G28 FMC2_LA25_N 7 AN21
G31 FMC2_LA29_N 8 AB20
G34 FMC2_LA31_N 8 AA19
G36 FMC2_LA33_P 8 AP28
G37 FMC2_LA33_N 8 AP27
H1 FMC2_VREFA 7/8/9 AF18/AF24/AF27
H2 FMC2_PRSNT_M2C_L 13 T15
H4 FMC2_CLK0_M2C_P 9 AJ27
H5 FMC2_CLK0_M2C_N 9 AJ26
H8 FMC2_LA02_N 7 AJ20
H13 FMC2_LA07_P 7 AM21
H16 FMC2_LA11_P 7 AJ22
H19 FMC2_LA15_P 7 AH18
H20 FMC2_LA15_N 7 AG18
H25 FMC2_LA21_P 9 AF30
H31 FMC2_LA28_P 9 AH29
H34 FMC2_LA30_P 8 Y20
H35 FMC2_LA30_N 8 AA20
H37 FMC2_LA32_P 8 AL27
J2 FMC2_CLK3_M2C_P 8 AE22
FPGA-EB-02057-1.2 36
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J3 FMC2_CLK3_M2C_N 8 AE23
J7 FMC2_HA03_N 9 AG28
J9 FMC2_HA07_P 9 AJ28
J10 FMC2_HA07_N 9 AJ29
J13 FMC2_HA11_N 9 AM31
J15 FMC2_HA14_P 9 AJ34
J16 FMC2_HA14_N 9 AJ33
J19 FMC2_HA18_N 9 AF32
J22 FMC2_HA22_N 8 AL24
J24 FMC2_HB01_P 5 AG10
J25 FMC2_HB01_N 5 AG11
J27 FMC2_HB07_P 5 AH9
J28 FMC2_HB07_N 5 AG9
J30 FMC2_HB11_P 5 AK7
J31 FMC2_HB11_N 5 AJ7
J33 FMC2_HB15_P 5 AP5
J34 FMC2_HB15_N 5 AP6
J36 FMC2_HB18_P 5 AL5
J37 FMC2_HB18_N 5 AL6
K1 FMC2_VREFB 5/8 AE13/AF23
K4 FMC2_CLK2_M2C_P 7 AP17
K5 FMC2_CLK2_M2C_N 7 AN17
K8 FMC2_HA02_N 9 AF29
K10 FMC2_HA06_P 9 AK29
K11 FMC2_HA06_N 9 AK30
K13 FMC2_HA10_P 9 AM33
K14 FMC2_HA10_N 9 AM34
K16 FMC2_HA17_CLK_P 8 AK24
K17 FMC2_HA17_CLK_N 8 AK23
K20 FMC2_HA21_N 9 AG31
K22 FMC2_HA23_P 8 AK25
K23 FMC2_HA23_N 8 AL25
K25 FMC2_HB00_P_CC 8 AE20
K26 FMC2_HB00_N_CC 8 AE21
K28 FMC2_HB06_P_CC 5 AH7
K29 FMC2_HB06_N_CC 5 AH8
K31 FMC2_HB10_P 5 AJ5
K32 FMC2_HB10_N 5 AJ6
K34 FMC2_HB14_P 5 AM6
K35 FMC2_HB14_N 5 AM5
K37 FMC2_HB17_P_CC 5 AK5
K38 FMC2_HB17_N_CC 5 AK6
FPGA-EB-02057-1.2 37
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8.3. Parallel FMC1 Configuration Header

Table 8.3. Parallel FMC1 Configuration Header Pin Connections
1 VCC_3V30 — —
2 VCC_3V30 — —
3 FMC1_TCK 0 T7
4 FMC1_PG_C2M 0 V4
5 FMC1_PG_M2C 0 W4
6 FMC1_TRST_L — —
7 FMC1_TDI 0 W1
8 FMC1_PRSNT_M2C_L 0 U7
9 FMC1_TDO 0 V1
10 FMC1_SCL 0 T8
11 GND — —
12 GND — —
13 FMC1_TMS 0 W7
14 FMC1_SDA 0 U8
8.4. Parallel FMC2 Configuration Header

Table 8.4. Parallel FMC2 Configuration Header Pin Connections
1 VCC_3V30 — —
2 VCC_3V30 — —
3 FMC2_TCK 13 U15
4 FMC2_PG_C2M 13 T18
5 FMC2_PG_M2C 13 T19
6 FMC2_TRST_L — —
7 FMC2_TDI 13 U16
8 FMC2_PRSNT_M2C_L 13 T15
9 FMC2_TDO 13 U17
10 FMC2_SCL 13 R15
11 GND — —
12 GND — —
13 FMC2_TMS 13 W14
14 FMC2_SDA 13 R14
8.5. Raspberry PI Board GPIO Header

The Avant Evaluation Board provides a 40-pin receptacle, which is compatible with the GPIO header of Raspberry PI 2/3
serial models, or can be used for general purpose I/O.
Table 8.5. Raspberry PI header Pin Connections
JP26 Pin Name Signal Name Avant Bank Avant Ball Location
1 VCC_3V301 — —
2 VCC_5V001 — —
3 RASP_IO02 13 V15
FPGA-EB-02057-1.2 38
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JP26 Pin Name Signal Name Avant Bank Avant Ball Location
4 VCC_5V001 — —
5 RASP_IO03 13 T13
6 GND — —
7 RASP_IO042 2 U3
8 RASP_IO14 13 V14
9 GND — —
10 RASP_IO15 13 R13
11 RASP_IO17 13 V16
12 RASP_IO18 14 T12
13 RASP_IO27 2 P3
14 GND — —
15 RASP_IO22 0 W6
16 RASP_IO23 2 P4
17 VCC_3V301 — —
18 RASP_IO24 2 N5
19 RASP_IO10 2 R6
20 GND — —
21 RASP_IO09 2 R5
22 RASP_IO25 0 V2
23 RASP_IO11 14 U12
24 RASP_IO08 2 P5
25 GND — —
26 RASP_IO07 2 P6
27 RASP_ID_SD 14 T11
28 RASP_ID_SC 14 R12
29 RASP_IO05 14 V8
30 GND — —
31 RASP_IO06 14 W8
32 RASP_IO12 2 U5
33 RASP_IO13 14 R9
34 GND — —
35 RASP_IO19 14 R11
36 RASP_IO16 0 W2
37 RASP_IO26 14 T9
38 RASP_IO20 0 T6
39 GND — —
40 RASP_IO21 0 U6
Notes:
1. 3.3 V and 5 V provide the power to the Raspberry PI board when JP12 and JP13 are installed. When JP12 and JP13 are not
installed, Raspberry PI needs its own 3.3 V and 5 V power.
2. When JP65 = 1-2
When connecting directly to a Raspberry PI board, depending on the individual setup, an adapter may need to avoid
mechanical interference between the two boards. A generic 40-pin (2×20), 100-mil spacing header extender serves this
function. Alternately, the two boards can be connected by a length of ribbon cable with 2×20 connectors on either end.
FPGA-EB-02057-1.2 39
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8.6. External Flash Configuration Header

Table 8.6. SPI Flash Configuration Header Pin Connections
1 PROGRAMN 1 R8
2 FLASH_CS1 — —
3 — — —
4 DONE 2 U4
5 DQ0_MOSI 1 L12
6 INITN 2 T5
7 DQ1_MISO 1 L11
8 CSSPIN 1 P7
9 DQ3 1 L9
10 VCCIO1_IN — —
11 DQ2 1 L10
12 SPI_MCLK 1 P9
13 GND — —
14 GND — —
Note:
1. Connected to Pin 1 of Flash (U4) device.
8.7. PMOD Header

J6 and J7 headers can be used as GPIOs or as a connector for PMOD interface.
Table 8.7. PMOD Header Pin Connections
Pin Name Signal Name Avant Bank Avant Ball Location
1 PMOD2_1 12 P18
2 PMOD2_2 12 N19
3 PMOD2_3 12 N20
4 PMOD2_4 12 P20
J6
7 PMOD2_5 12 R17
8 PMOD2_6 12 M19
9 PMOD2_7 12 M20
10 PMOD2_8 12 P19
1 PMOD3_1 12 P14
2 PMOD3_2 12 N15
3 PMOD3_3 12 N16
4 PMOD3_4 12 R16
J7
7 PMOD3_5 12 P13
8 PMOD3_6 12 N14
9 PMOD3_7 12 P15
10 PMOD3_8 12 N17
FPGA-EB-02057-1.2 40
User Guide
8.8. Through Hole Extended Area Header

Table 8.8. Through Hole Extended Area Header Pin Connections
TP_AN13 EPS1_AN13_P 6 AN13
TP_AP13 EPS1_AP13_N 6 AP13
TP_AJ16 EPS2_AJ16_P 6 AJ16
TP_AK16 EPS2_AK16_N 6 AK16
TP_AL13 EPS3_AL13_P 6 AL13
TP_AM13 EPS3_AM13_N 6 AM13
TP_AG15 EPS4_AG15_P 6 AG15
TP_AH15 EPS4_AH15_N 6 AH15
TP_AK13 EPS5_AK13_P 6 AK13
TP_AF15 EPS6_AF15_P 6 AF15
TP_AF16 EPS6_AF16_N 6 AF16
TP_AP12 EPS7_AP12_P 6 AP12
TP_AN12 EPS7_AN12_N 6 AN12
TP_AH14 EPS8_AH14_P 6 AH14
TP_AG14 EPS8_AG14_N 6 AG14
TP_AP10 EPS9_AP10_P 6 AP10
TP_AP11 EPS9_AP11_N 6 AP11
TP_AK14 EPS10_AK14_P 6 AK14
TP_AE15 EPS11_AE15_P 6 AE15
TP_AD15 EPS11_AD15_N 6 AD15
TP_AL10 EPS12_AL10_P 6 AL10
TP_AL11 EPS12_AL11_N 6 AL11
0V82 VCC_0V82 — —
0V9 VCC_0V90 — —
1V VCC_1V00 — —
1V1 VCC_1V10 — —
1V2 VCC_1V20 — —
1V35 VCC_1V35 — —
1V5 VCC_1V50 — —
1V8 VCC_1V80 — —
2V5 VCC_2V50 — —
3V3 VCC_3V30 — —
F1_3V3 VFMC1_3V30 — —
F2_3V3 VFMC2_3V30 — —
F1_3V3AUX VFMC1_3V30AUX — —
F2_3V3AUX VFMC2_3V30AUX — —
F1_ADJ VFMC1_ADJ — —
F2_ADJ VFMC2_ADJ — —
5V VCC_5V00 — —
12V VCC_12V00 — —
GND6 GND — —
GND7 GND — —
GND8 GND — —
FPGA-EB-02057-1.2 41
User Guide

GND9 GND — —
GND10 GND — —
GND11 GND — —
GND12 GND — —
GND13 GND — —
GND14 GND — —
GND15 GND — —
FPGA-EB-02057-1.2 42
User Guide
9. Software Requirements
The following software versions are required to develop designs for the Avant Evaluation Board:
• Lattice Radiant Software 2022.1 or later
• Lattice Radiant Programmer 2022.1 or later
10. Storage and Handling

Static electricity can shorten the life span of electronic components. Observe these tips to prevent damage that can
occur from electrostatic discharge:
• Use antistatic precautions such as operating on an antistatic mat and wearing an antistatic wristband.
• Store the development board in the provided packaging.
• Touch a metal USB housing to equalize voltage potential between you and the board.
11. Ordering Information

Table 11.1. Ordering Information
Description Ordering Part Number China RoHS Environment-Friendly Use Period (EFUP)
Avant Evaluation Board LAV-500E-EVN
FPGA-EB-02057-1.2 43
User Guide
Appendix A. Avant Evaluation Board Schematics

5 4 3 2 1
Avant-E Evaluation Board

D
Rev - B D
01 - Title Page
02 - Block Diagram
03 - USB Interface
04 - Bank-0/1 Flash, LEDs, FMC1 & Raspberry Pi
05 - Bank-2 JTAG, UART, Config & Raspberry Pi

C
06 - Bank-3/4/5 FMC1 & FMC2 C
07 - HPC FMC1
08 - Bank-6 Switches, Buttons, LEDs & Extended Bank

09 - Bank-7/8/9 FMC2
10 - HPC FMC2
11 - LPDDR4
B B
12 - Bank-12/13 PMODs, FMC2 & Raspberry Pi
13 - Bank-14 Segment Display & Raspberry Pi

14 - Bank Power
15 - Power Decoupling
16 - Power Supplies 1
A
17 - Power Supplies 2 A
Lattice Semiconductor Applications
18 - Ground Email: techsupport@Latticesemi.com
Title
Title Page
19 - Power Block Diagram Size Project Schematic Rev 1.0
B Avant-E Evaluation Board (LAV-500E-EVN) Board Rev B
Date: Wednesday, March 22, 2023 Sheet 1 of 19
5 4 3 2 1
Figure A.1. Title Page
FPGA-EB-02057-1.2 44
User Guide
5 4 3 2 1
D D
C C
B B
A A
Email: techsupport@Latticesemi.com
Title
Block Diagram
Size Project Schematic Rev 1.0
5 4 3 2 1
Figure A.2. Block Diagram
FPGA-EB-02057-1.2 45
User Guide
5 4 3 2 1
VCC_3V30
C1 C2 C3 C4 C5
VCC_3V30 0.1uF 0.1uF 0.1uF 0.1uF 4.7uF
D FB1 VCC_3V30 D
MPZ1005S121CT000
1
VBUS_5V00 C6 C7
4.7uF R2 R3 R4
VCC_3V30 0.1uF
2
GREEN
2.2K R1
C8 FB3 J1 4.7K 4.7K 4.7K
1
0.1uF FB2 MPZ1005S121CT000 1 2
2
1
MPZ1005S121CT000 D1 C9 C10 VCC_1V80_FT VCC_3V30 3
4.7uF 3 4
0.1uF 4 5
2
5 6
6 7
J2 C11 C12 C13 7 8
USB_MINI_B 8
1 0.1uF 0.1uF 0.1uF Header 1x8
VCC VCC_3V30 R5
Route USB pair 90 ohm impedance U1
2 VCC_1V80_FT
12
37
64
20
31
42
56
D- 2.2K
4
9
3 FT2232HL
D+
VPLL
VCCIO
VCCIO
VCCIO
VCCIO
VPHY
VCORE
VCORE
VCORE
C C
4
NC 5 16 22 R6
GND ADBUS0 TCK {5,13}
50 17 0 R7 TDI {5,13}
6 VREGIN ADBUS1 18 0 R8
CASE ADBUS2 TDO {5,13}
7 49 19 0 R9 TMS {5,13}
CASE 8 VREGOUT ADBUS3 21
CASE 9 ADBUS4 22
CASE DM 7 ADBUS5 23
10 DP 8 DM ADBUS6 24 0-DNI R10
MH1 DP ADBUS7 PROGRAMN {4,5}
11 VCC_3V30
MH2 26
C14 C15 R11 2.2K 14 ACBUS0 27 VCC_3V30
VCC_3V30 RESET# ACBUS1 28
Part Number = 1734035-2 R12 R13 R14 10uF 0.1uF ACBUS2 29 JP1 JUMPER
R15 12K 6 ACBUS3 30 1 2
REF ACBUS4 32 R16 R17 TXD_UART {5}
ACBUS5 TXD_UART
33 10K 10K JP2 JUMPER
U2 10K 10K 10K ACBUS6 34 1 2
ACBUS7 RXD_UART {5}
8 1 63 RXD_UART
7 VCC CS 2 62 EECS 38
6 NU CLK 3 61 EECLK BDBUS0 39
5 ORG DI 4 EEDATA BDBUS1 40
C16 VSS DO R19 2.2K BDBUS2 41
93LC56C-I/SN 2 BDBUS3 43 JP4 JUMPER
B B
OSCI BDBUS4
1
0.1uF 44 1 2
JP3 BDBUS5 45 SCL {13}
FTDI_RST BDBUS6 FTDI_SCL
JUMPER 46 1 2 SDA {13}
3 BDBUS7 JP5 JUMPER
Default = OPEN
2
OSCO 48
BCBUS0 FTDI_SDA
52 DEFAULT SETTINGS:
BCBUS1 53
13 BCBUS2 54 JP1 = CLOSED
TEST BCBUS3
X1 BCBUS4
55 JP2 = CLOSED
57
1 3 BCBUS5 58
JP4 = OPEN
VBUS_5V00 1 3 FTDI High-Speed USB BCBUS6 59 JP5 = OPEN
2 4 BCBUS7
G1 G2
D3
C17 C18 FT2232H PWREN#
60
18pF 18pF
1 6 SXT32418BB16-12.000M 36
GND VBUS SUSPEND#
AGND
GND
GND
GND
GND
GND
GND
GND
GND
DP 2 5 DP
NC2 D+
DM 3 4 DM
10
1
5
11
15
25
35
47
51
NC3 D-
12_MHz
ESDR0502N-UDFN6 2 1
A
{5} 12_MHz JP6 A
JUMPER
Default = OPEN Email: techsupport@Latticesemi.com
Title
USB Interface
5 4 3 2 1
Figure A.3. USB Interface
FPGA-EB-02057-1.2 46
User Guide
5 4 3 2 1
VCCIO0 U3A
M12
VCCIO0 WRIO0_0A/UDQ00
W5
FMC1_RES0 {7}
LEDs Signal Map
V3 V5
VCCIO0 WRIO0_0B/UDQ01 FMC1_RES1 {7}
V7 U8
D C595 C596 C597 C598 VCCIO0 WRIO0_1A T8 FMC1_SDA {7} U3 pin Signal LED D
WRIO0_1B/PCLKT0_1/PCLKRT0_1 V4 FMC1_SCL {7}
10uF 0.1uF 0.1uF 0.1uF WRIO0_2A/UDQ02 W4 FMC1_PG_C2M {7}
WRIO0_2B/UDQ03 U7
FMC1_PG_M2C {7} N7 LED_0 D6
WRIO0_3A/UCSN0 FMC1_PRSNT_M2C_L {7}
T7 R55 22
WRIO0_3B/PCLKT0_0/PCLKRT0_0/UDS0 W1 FMC1_TCK {7} L7 LED_1 D7
WRIO0_4A/UDQ04 FMC1_TDI {7}
V1
WRIO0_4B/UDQ05 W7 FMC1_TDO {7} L8 LED_2 D8
WRIO0_5A/UCK0P W6 RASP_IO22 FMC1_TMS {7}
WRIO0_5B/UCK0N V2 RASP_IO25 RASP_IO22 {13} P8 LED_3 D9
BANK 0 WRIO0_6A/UDQ06
WRIO0_6B/UDQ07
W2 RASP_IO16 RASP_IO25 {13}
RASP_IO16 {13} M8 LED_4 D10
RASP_IO21
3.3V WRIO0_7A/PLLTO_IN
U6
T6 RASP_IO20 RASP_IO21 {13}
M9
WRIO0_7B/PLLTFB0_IN RASP_IO20 {13} LED_5 D11
LAV-AT-500-E_1156
P10 LED_6 D12
N10 LED_7 D13
VCCIO1 U3B
M7 L12 DQ0_MOSI
N8 VCCIO1 WRIO1_0A/MDQ0 L11 DQ1_MISO
C VCCIO1 WRIO1_0B/MDQ1 C
N11 R7
C19 C20 C589 C590 VCCIO1 ERASEKEY R8 R408 0
WRIO1_1B/MSDO L10 DQ2 PROGRAMN {3,4,5} R398
10uF 0.1uF 0.1uF 0.1uF WRIO1_2A/MDQ2 L9 DQ3
WRIO1_2B/MDQ3 P7 CSSPIN
WRIO1_3A/MCSN N7 LED_0
WRIO1_3B/PCLKRT1_0/MDS L7 LED_1 10k
WRIO1_4A/MDQ4 L8 LED_2 Parallel / SPI Config Header
WRIO1_4B/MDQ5 P9 R20 0 SPI_MCLK J3
WRIO1_5A/MCLK P8 LED_3 PROGRAMN 1 2 FLASH_CS
WRIO1_5B/MCLKN LED_4 {3,4,5} PROGRAMN 1 2
M8 3 4 DONE
WRIO1_6A/MDQ6 LED_5 DQ0_MOSI 5 3 4 DONE {5} VCCIO1_IN
M9 6 INITN
WRIO1_6B/MDQ7 LED_6 DQ1_MISO 7 5 6 INITN {5}
P10 8 CSSPIN
BANK 1 WRIO1_7A N10 LED_7 DQ3 9 7 8 10
WRIO1_7B 9 10
3.3V DQ2 11
11 12
12 SPI_MCLK
LAV-AT-500-E_1156 13 14
13 14
Header_2x7
Place close to Flash
B B
VCCIO1_IN
VCC_3V30
3 1
VCCIO1_IN LEDs
JP28
3-PIN
R56 R57 R58 R59 R60 R61 R62 R63
2
Default = 2-3
1K 1K 1K 1K 1K 1K 1K 1K
C23 C24 C25

D6 D7 D8 D9 D10 D11 D12 D13
R38 R39 0.1uF R40 R41 0.1uF 1uF
GREEN
GREEN
GREEN
GREEN
GREEN
GREEN
GREEN
GREEN
10K 10K_NP 10K_NP 10K_NP
G
Default = CLOSED U4
A CSSPIN JP51 FLASH_CS 1 8 A

DQ1_MISO R43 0 2 CS# VCC 7 R44 0 DQ3
SO/SIO1 RESET#/SIO3 Lattice Semiconductor Applications
DQ2 R45 0 3 6 SPI_MCLK LED_0
WP#/SIO2 SCLK DQ0_MOSI LED_1 Email: techsupport@Latticesemi.com
4 5 R46 0
9 GND SI/SIO0 LED_2
GND_1 LED_3 Title
MX25L51245GZ2I-08G LED_4
LED_5
Bank-0/1 Flash, LEDs, FMC & Raspberry Pi
512 Mb SPI Flash LED_6 Size Project Schematic Rev 1.0
LED_7
5 4 3 2 1
Figure A.4. Bank-0/1 Flash, LEDs, FMC & Raspberry Pi
FPGA-EB-02057-1.2 47
User Guide
5 4 3 2 1
VCCIO2
U3C
R2 N6
R4 VCCIO2 WRIO2_0A/SDQ0 N5 RASP_IO24 VCCIO2 VCCIO2
VCCIO2 WRIO2_0B/SDQ1 RASP_IO12 RASP_IO24 {13}
C586 C588 C587 C584 M10 U5
VCCIO2 WRIO2_1B/SSDO RASP_IO07 RASP_IO12 {13}
P6
WRIO2_2A/SDQ2 RASP_IO08 RASP_IO07 {13}
10uF 0.1uF 0.1uF 0.1uF P5
WRIO2_2B/SDQ3 RASP_IO10 RASP_IO08 {13}
R6 INITN indicator will light R22
WRIO2_3A/SCSN RASP_IO09 RASP_IO10 {13} if an error occurs during
R5 10k
WRIO2_3B/SDS P3 RASP_IO27 RASP_IO09 {13} JP65 configuration programming
D WRIO2_4A/SDQ4 RASP_IO23 RASP_IO27 {13} D
P4 3
WRIO2_4B/SDQ5 RASP_IO23 {13} 12_MHz {3}
U3 2
WRIO2_5A/PCLKRT2_0/SCLKP R3 1 RASP_IO04 R24 1K R INITN
WRIO2_6A/SDQ6 RXD_UART {3} RASP_IO04 {13}
T3 D4 RED
WRIO2_6B/SDQ7 TXD_UART {3} 1K INIT
T5 INITN 3-PIN Default = 1-2 R25
INITN
DONE
U4 DONE INITN {4}
DONE {4}
INITN
P2 PROGRAMN
PROGRAMN PROGRAMN {3,4}
P1 CFGMODE
CFGMODE DONE indicator will light when
T1 configuration is successfully VCCIO2
BANK 2 TCK
TMS
R1
TCK {3,13}
TMS {3,13}
D5 completed
3.3V
GREEN
U1 R26
G
TDI TDI {3,13} VCCIO2
U2
TDO TDO {3,13}
LAV-AT-500-E_1156
3
10k
R179 Q1 1 R28 10k DONE
MMBT2222ALT1G
DONE
2
DONE
JP25 10k
3
2
C C
1
R180
3-PIN
Default = 2-3 VCCIO2
10k
R27
4.7K
PROGRAMN
SW2
1 2 R29 100 PROGRAMN
A1 B1
3 4
A2 B2 C22
1
430182043816 JP17
0.1uF
PROGRAMN
2
B B
A A
Title
Bank-2 JTAG, UART, Config & Raspberry Pi
5 4 3 2 1
Figure A.5. Bank-2 JTAG, UART, Config & Raspberry Pi
FPGA-EB-02057-1.2 48
User Guide
5 4 3 2 1
VCCIO3 U3D VCCIO4 U3E

AB3 AB13 FMC1_LA07_P {7} AE8 AE11 FMC1_HA15_P {7}
AB6 VCCIO3 HPIO3_0A/DP0_DQ43 AB12 AG4 VCCIO4 HPIO4_0A/DP0_MCLKT0 AF11
VCCIO3 HPIO3_0B/DP0_DQ42 FMC1_LA07_N {7} VCCIO4 HPIO4_0B/DP0_MCLKC0 FMC1_HA15_N {7}
AB9 AD6 FMC1_LA03_P {7} AK3 AH6 FMC1_HA21_P {7}
C37 C616 C38 C39 C40 C531 AC11 VCCIO3 HPIO3_1A/DP0_DQ51 AD5 C41 C615 C42 C43 C44 C532 AN2 VCCIO4 HPIO4_1A/DP0_MCLKT1 AH5
VCCIO3 HPIO3_1B/DP0_DQ50 FMC1_LA03_N {7} VCCIO4 HPIO4_1B/DP0_MCLKC1 FMC1_HA21_N {7}
AC13 AF10
HPIO3_2A/DP0_DQ47 FMC1_LA10_P {7} HPIO4_2A/DP0_CKE0 FMC1_HA19_P {7}
10uF 10uF 0.1uF 0.1uF 0.1uF 0.1uF AC12 FMC1_LA10_N {7} 10uF 10uF 0.1uF 0.1uF 0.1uF 0.1uF AE10 FMC1_HA19_N {7}
HPIO3_2B/DP0_DQ46 AD3 HPIO4_2B/DP0_MA0 AJ4
HPIO3_3A/DP0_DQ55 FMC1_LA20_P {7} HPIO4_3A/DP0_CKE1 FMC1_HA13_P {7}
AD4 FMC1_LA20_N {7} AK4 FMC1_HA13_N {7}
HPIO3_3B/DP0_DQ54 AD12 HPIO4_3B/DP0_ODT1 AF9
HPIO3_4A/DP0_DQS5 FMC1_LA09_P {7} HPIO4_4A/DP0_MA1 FMC1_HA20_P {7}
AD11 FMC1_LA09_N {7} AE9
HPIO3_4B/DP0_DQSN5 HPIO4_4B/DP0_MA2 FMC1_HA20_N {7}
AC4 FMC1_LA14_P {7} AM4 FMC1_HA16_P {7}
HPIO3_5A/DP0_DQS6 AC5 HPIO4_5A/DP0_ODT0 AL4
HPIO3_5B/DP0_DQSN6 FMC1_LA14_N {7} HPIO4_5B/DP0_CS_N1 FMC1_HA16_N {7}
AD9 FMC1_LA23_P {7} AG7 FMC1_HA18_P {7}
D HPIO3_6A/DP0_DQ41 AD10 HPIO4_6A/DP0_MA3 AG8 D
HPIO3_6B/DP0_DQ40 FMC1_LA23_N {7} HPIO4_6B/DP0_MA4 FMC1_HA18_N {7}
AC3 AN4 FMC1_HA10_P {7}
HPIO3_7A/DP0_DQ49 FMC1_LA16_P {7} HPIO4_7A/DP0_CS_N0
AC2 FMC1_LA16_N {7} AP4 FMC1_HA10_N {7}
HPIO3_7B/DP0_DQ48 AD7 HPIO4_7B/DP0_MA9 AE7
HPIO3_8A/DP0_DQ45 FMC1_LA19_P {7} HPIO4_8A/DP0_MA5 FMC1_HA03_P {7}
AD8 FMC1_LA19_N {7} AF7 FMC1_HA03_N {7}
HPIO3_8B/DP0_DQ44 AD2 HPIO4_8B/DP0_MA6 AM3
HPIO3_9A/DP0_DQ53 FMC1_LA15_P {7} HPIO4_9A/DP0_MA10 FMC1_HA14_P {7}
AD1 AN3
HPIO3_9B/DP0_DQ52 FMC1_LA15_N {7} HPIO4_9B/DP0_MA11 FMC1_HA14_N {7}
AC8 FMC1_LA17_CLK_P {7} AF6 FMC1_HA00_CLK_P {7}
HPIO3_10A/PCLKT3_0/PCLKRT3_0/DP0_DM5 AC9 HPIO4_10A/PCLKT4_0/PCLKRT4_0/DP0_DP0_MA7 AE6
HPIO3_10B/PCLKC3_0/PCLKRC3_0 FMC1_LA17_CLK_N {7} HPIO4_10B/PCLKC4_0/PCLKRC4_0/DP0_MA8 FMC1_HA00_CLK_N {7}
AB1 FMC1_LA01_CLK_P {7} Default = OPEN AP2 FMC1_CLK1_M2C_P {7} B4_VREFA
HPIO3_11A/PCLKT3_1/PCLKRT3_1/DP0_DM6 AC1 HPIO4_11A/PCLKT4_1/PCLKRT4_1/DP0_MA12 AP3
HPIO3_11B/PCLKC3_1/PCLKRC3_1 AA11
FMC1_LA01_CLK_N {7}
JP37 HPIO4_11B/PCLKC4_1/PCLKRC4_1/DP0_MA13 AG6
FMC1_CLK1_M2C_N {7}
JP38
Default = OPEN
HPIO3_12A/VREF3/DP0_VREF3 FMC1_VREFA {6,7} HPIO4_12A/VREF4/DP0_VREF4 FMC1_VREFA {6,7}
AA10 TP_AA10 AG5
HPIO3_12B/EXT_RES3/DP0_EXT_RES3 Y1 TP_Y1 HPIO4_12B/EXT_RES4/DP0_EXT_RES4 AL2 TP_AL2 240 R460
HPIO3_13A/PLLT3_IN AA1 TP_AA1 HPIO4_13A/PLLT4_IN/DP0_PLLT4_IN AM2 TP_AM2
HPIO3_13B/PLLC3_IN Y11 HPIO4_13B/PLLC4_IN/DP0_PLLC4_IN AE5
HPIO3_14A/DP0_DQ59 FMC1_LA04_P {7} HPIO4_14A/DP0_DQ03 FMC1_HA05_P {7}
Y10 FMC1_LA04_N {7} AF5
HPIO3_14B/DP0_DQ58 HPIO4_14B/DP0_DQ02 FMC1_HA05_N {7}
AA2 FMC1_LA08_P {7} AN1 FMC1_HA11_P {7}
HPIO3_15A/DP0_DQ67 Y2 HPIO4_15A/DP0_DQ11 AM1
HPIO3_15B/DP0_DQ66 FMC1_LA08_N {7} HPIO4_15B/DP0_DQ10 FMC1_HA11_N {7}
Y8 FMC1_LA06_P {7} AE4 FMC1_HA04_P {7}
HPIO3_16A/DP0_DQ63 Y9 HPIO4_16A/DP0_DQ07 AF4
HPIO3_16B/DP0_DQ62 FMC1_LA06_N {7} HPIO4_16B/DP0_DQ06 FMC1_HA04_N {7}
AA3 FMC1_LA13_P {7} AL1
HPIO3_17A/DP0_DQ71 HPIO4_17A/DP0_DQ15 FMC1_HA06_P {7}
Y3 FMC1_LA13_N {7} AK1 FMC1_HA06_N {7}
HPIO3_17B/DP0_DQ70 AC7 HPIO4_17B/DP0_DQ14 AF3
HPIO3_18A/DP0_DQS7 FMC1_LA02_P {7} HPIO4_18A/DP0_DQS0 FMC1_HA02_P {7}
AC6 FMC1_LA02_N {7} AE3 FMC1_HA02_N {7}
HPIO3_18B/DP0_DQSN7 AB4 HPIO4_18B/DP0_DQSN0 AJ2
HPIO3_19A/DP0_DQS8 FMC1_LA12_P {7} HPIO4_19A/DP0_DQS1 FMC1_HA12_P {7}
AB5 FMC1_LA12_N {7} AK2 FMC1_HA12_N {7}
HPIO3_19B/DP0_DQSN8 AB10 HPIO4_19B/DP0_DQSN1 AE2
AC10 FMC1_LA27_N {7} AF2 FMC1_HA09_N {7}
HPIO3_20B/DP0_DQ56 AA4 HPIO4_20B/DP0_DQ00 AH4
Y4 AH3 FMC1_HA07_N {7}
HPIO3_21B/DP0_DQ64 FMC1_LA11_N {7} HPIO4_21B/DP0_DQ08
BANK 3 AA8 BANK 4 AG1
HPIO3_22A/DP0_DQ61 FMC1_LA05_P {7} HPIO4_22A/DP0_DQ05 FMC1_HA08_N {7}
AA9 AG2
1.8V HPIO3_22B/DP0_DQ60 Y5
FMC1_LA05_N
TP_Y5
{7} 1.8V HPIO4_22B/DP0_DQ04 AH2
FMC1_HA08_P
TP_AH2
{7}
HPIO3_23A/DP0_DQ69 AA5 TP_AA5 HPIO4_23A/DP0_DQ13 AJ3 TP_AJ3
HPIO3_23B/DP0_DQ68 AB7 HPIO4_23B/DP0_DQ12 AF1
HPIO3_24A/PCLKRT3_2/DP0_DM7 FMC1_CLK2_M2C_P {7} HPIO4_24A/PCLKRT4_2/DP0_DM0 FMC1_CLK0_M2C_P {7}
AA7 FMC1_CLK2_M2C_N {7} AE1
HPIO3_24B/PCLKRC3_2 HPIO4_24B/PCLKRC4_2/DP0_ALERT_N FMC1_CLK0_M2C_N {7}
C Y7 FMC1_LA00_CLK_P {7} AH1 FMC1_HA01_CLK_P {7} C
HPIO3_25A/PCLKRT3_3/DP0_DM8 Y6 HPIO4_25A/PCLKRT4_3/DP0_DM1 AJ1
HPIO3_25B/PCLKRC3_3 FMC1_LA00_CLK_N {7} HPIO4_25B/PCLKRC4_3/DP0_RST_N FMC1_HA01_CLK_N {7}
LAV-AT-500-E_1156 LAV-AT-500-E_1156
VCCIO5 U3F
AD14 AA15 FMC1_HA22_P {7}
AH12 VCCIO5 HPIO5_0A/DP0_DQ36 AA14
VCCIO5 HPIO5_0B/DP0_DQ37 FMC1_HA22_N {7}
C55 C614 C56 C57 C58 C533 AJ9 AK9 FMC1_LA29_P {7}
AL7 VCCIO5 HPIO5_1A/DP0_DQ20 AK8
VCCIO5 HPIO5_1B/DP0_DQ21 FMC1_LA29_N {7}
10uF 10uF 0.1uF 0.1uF 0.1uF 0.1uF AB14 FMC1_HA23_P {7}
HPIO5_2A/DP0_DQ32 AB15
HPIO5_2B/DP0_DQ33 FMC1_HA23_N {7}
AL8 FMC1_LA28_P {7}
HPIO5_3A/DP0_DQ16 AL9
HPIO5_3B/DP0_DQ17 FMC1_LA28_N {7}
AC15
HPIO5_4A/DP0_DQS4 FMC1_LA22_P {7}
AC14
HPIO5_4B/DP0_DQSN4 FMC1_LA22_N {7}
AM8 FMC1_LA31_P {7}
HPIO5_5A/DP0_DQS2 AM9
HPIO5_5B/DP0_DQSN2 FMC1_LA31_N {7}
AE14 FMC1_LA21_P {7}
B HPIO5_6A/DP0_DQ38 AF14 B
AN9 FMC1_LA33_P {7}
HPIO5_7A/DP0_DQ22 AN8
AG12
HPIO5_8A/DP0_DQ34 FMC1_LA26_P {7}
AG13 FMC1_LA26_N {7}
HPIO5_8B/DP0_DQ35 AP9
AP8
AJ12 FMC1_CLK3_M2C_P {7}
HPIO5_10A/PCLKT5_0/PCLKRT5_0/DP0_DM4 AJ11
HPIO5_10B/PCLKC5_0/PCLKRC5_0 FMC1_CLK3_M2C_N {7}
AN7 FMC1_LA18_CLK_P {7} Default = OPEN
HPIO5_11A/PCLKT5_1/PCLKRT5_1/DP0_DM2 AP7
HPIO5_11B/PCLKC5_1/PCLKRC5_1 FMC1_LA18_CLK_N {7}
AF13 JP39
HPIO5_12A/VREF5/DP0_VREF5 FMC1_VREFA {6,7}
AE13 JP66
HPIO5_12B/EXT_RES5/DP0_EXT_RES5 AP5 FMC2_VREFB {9,10}
HPIO5_13A/PLLT5_IN FMC2_HB15_P {10}
AP6 FMC2_HB15_N {10} Default = OPEN
HPIO5_13B/PLLC5_IN AK10 B5_VREFB
AK11 FMC1_LA24_N {7}
HPIO5_14B/DP0_DQ29 AN6
HPIO5_15A/DP0_MCLKT3 FMC1_LA30_P {7}
AN5 FMC1_LA30_N {7}
HPIO5_15B/DP0_MCLKC3 AH10
AJ10
AM6 FMC2_HB14_P {10}
HPIO5_17A/DP0_MCLKT2 AM5
HPIO5_17B/DP0_MCLKC2 FMC2_HB14_N {10}
AH9 FMC2_HB07_P {10}
HPIO5_18A/DP0_DQS3 AG9
HPIO5_18B/DP0_DQSN3 FMC2_HB07_N {10}
AL5 FMC2_HB18_P {10}
HPIO5_19A/DP0_MA16 AL6
HPIO5_19B/DP0_MA15 FMC2_HB18_N {10}
AG10 FMC2_HB01_P {10}
HPIO5_20A/DP0_DQ30 AG11
HPIO5_20B/DP0_DQ31 FMC2_HB01_N {10}
BANK 5 AK7 FMC2_HB11_P {10}
HPIO5_21A/DP0_MA14 AJ7
1.8V HPIO5_21B/DP0_WE_N AH7
FMC2_HB11_N {10}
HPIO5_22A/DP0_DQ26 FMC2_HB06_P_CC {10}
AH8 FMC2_HB06_N_CC {10}
HPIO5_22B/DP0_DQ27 AK5
HPIO5_23A/DP0_BA2 FMC2_HB17_P_CC {10}
AK6 FMC2_HB17_N_CC {10}
HPIO5_23B/DP0_BA1 AF12
HPIO5_24A/PCLKRT5_2/DP0_DM3 FMC1_HA17_CLK_P {7}
AE12 FMC1_HA17_CLK_N {7}
HPIO5_24B/PCLKRC5_2/DP0_CAS_N AJ5
A FMC2_HB10_P {10} A
HPIO5_25A/PCLKRT5_3/DP0_BA0 AJ6
HPIO5_25B/PCLKRC5_3/DP0_RAS_N FMC2_HB10_N {10}
LAV-AT-500-E_1156

Title
Bank-3/4/5 FMC1 & FMC2
C Avant-E Evaluation Board (LAV-500E-EVN) Board Rev B
5 4 3 2 1
Figure A.6. Bank-3/4/5 FMC1 & FMC2
FPGA-EB-02057-1.2 49
User Guide
5 4 3 2 1
VCC_3V30 VCC_3V30
J48A J48B R83 J48C R84

10k 10k
A1 B1 R215 FMC1_RES1 {4} C1 D1 FMC1_PG_C2M E1 F1 FMC1_PG_M2C FMC1_PG_M2C {4}
A2 GND RES1 B2 C2 GND PG_C2M D2 FMC1_PG_C2M {4} E2 GND PG_M2C F2
0-DNI {6} FMC1_HA01_CLK_P
A3 DP1_M2C_P GND B3 C3 DP0_C2M_P GND D3 E3 HA01_P_CC GND F3
DP1_M2C_N GND DP0_C2M_N GND {6} FMC1_HA01_CLK_N HA01_N_CC GND
A4 B4 C4 D4 E4 F4 FMC1_HA00_CLK_P {6}
A5 GND DP9_M2C_P B5 C5 GND GBTCLK0_M2C_P D5 E5 GND HA00_P_CC F5
GND DP9_M2C_N GND GBTCLK0_M2C_N GND HA00_N_CC FMC1_HA00_CLK_N {6}
A6 B6 C6 D6 E6 F6
DP2_M2C_P GND DP0_M2C_P GND {6} FMC1_HA05_P HA05_P GND
A7 B7 C7 D7 E7 F7 FMC1_HA04_P {6}
DP2_M2C_N GND DP0_M2C_N GND {6} FMC1_HA05_N HA05_N HA04_P
A8 B8 C8 D8 FMC1_LA01_CLK_P {6} E8 F8 FMC1_HA04_N {6}
A9 GND DP8_M2C_P B9 C9 GND LA01_P_CC D9 E9 GND HA04_N F9
GND DP8_M2C_N GND LA01_N_CC FMC1_LA01_CLK_N {6} {6} FMC1_HA09_P HA09_P GND
A10 B10 {6} FMC1_LA06_P C10 D10 {6} FMC1_HA09_N E10 F10 FMC1_HA08_P {6}
D
A11 DP3_M2C_P GND B11 C11 LA06_P GND D11 E11 HA09_N HA08_P F11 D
DP3_M2C_N GND {6} FMC1_LA06_N LA06_N LA05_P FMC1_LA05_P {6} GND HA08_N FMC1_HA08_N {6}
A12 B12 C12 D12 FMC1_LA05_N {6} E12 F12
GND DP7_M2C_P GND LA05_N {6} FMC1_HA13_P HA13_P GND
A13 B13 C13 D13 {6} FMC1_HA13_N E13 F13 FMC1_HA12_P {6}
A14 GND DP7_M2C_N B14 C14 GND GND D14 E14 HA13_N HA12_P F14
DP4_M2C_P GND {6} FMC1_LA10_P LA10_P LA09_P FMC1_LA09_P {6} GND HA12_N FMC1_HA12_N {6}
A15 B15 {6} FMC1_LA10_N C15 D15 FMC1_LA09_N {6} {6} FMC1_HA16_P E15 F15
A16 DP4_M2C_N GND B16 C16 LA10_N LA09_N D16 E16 HA16_P GND F16
GND DP6_M2C_P GND GND {6} FMC1_HA16_N HA16_N HA15_P FMC1_HA15_P {6}
A17 B17 C17 D17 FMC1_LA13_P {6} E17 F17 FMC1_HA15_N {6}
A18 GND DP6_M2C_N B18 C18 GND LA13_P D18 E18 GND HA15_N F18
DP5_M2C_P GND {6} FMC1_LA14_P LA14_P LA13_N FMC1_LA13_N {6} {6} FMC1_HA20_P HA20_P GND
A19 B19 C19 D19 E19 F19 FMC1_HA19_P {6}
DP5_M2C_N GND {6} FMC1_LA14_N LA14_N GND {6} FMC1_HA20_N HA20_N HA19_P
A20 B20 C20 D20 FMC1_LA17_CLK_P {6} E20 F20 FMC1_HA19_N {6}
A21 GND GBTCLK1_M2C_P B21 C21 GND LA17_P_CC D21 E21 GND HA19_N F21
GND GBTCLK1_M2C_N GND LA17_N_CC FMC1_LA17_CLK_N {6} HB03_P GND
A22 B22 C22 D22 E22 F22
DP1_C2M_P GND VCC_3V30 {6} FMC1_LA18_CLK_P LA18_P_CC GND HB03_N HB02_P
A23 B23 {6} FMC1_LA18_CLK_N C23 D23 FMC1_LA23_P {6} E23 F23
A24 DP1_C2M_N GND B24 C24 LA18_N_CC LA23_P D24 E24 GND HB02_N F24
GND DP9_C2M_P GND LA23_N FMC1_LA23_N {6} HB05_P GND
A25 B25 C25 D25 E25 F25
A26 GND DP9_C2M_N B26 C26 GND GND D26 E26 HB05_N HB04_P F26
DP2_C2M_P GND {6} FMC1_LA27_P LA27_P LA26_P FMC1_LA26_P {6} GND HB04_N
A27 B27 R90 R91 C27 D27 FMC1_LA26_N {6} E27 F27
DP2_C2M_N GND {6} FMC1_LA27_N LA27_N LA26_N HB09_P GND
A28 B28 4.7k 4.7k C28 D28 E28 F28
A29 GND DP8_C2M_P B29 C29 GND GND D29 FMC1_TCK E29 HB09_N HB08_P F29
GND DP8_C2M_N GND TCK FMC1_TCK {4} GND HB08_N
A30 B30 FMC1_SCL C30 D30 FMC1_TDI VFMC1_3V30AUX E30 F30
DP3_C2M_P GND {4} FMC1_SCL FMC1_SDA SCL TDI FMC1_TDO FMC1_TDI {4} HB13_P GND
A31 B31 C31 D31 FMC1_TDO {4} E31 F31
DP3_C2M_N GND {4} FMC1_SDA SDA TDO HB13_N HB12_P
A32 B32 C32 D32 E32 F32
A33 GND DP7_C2M_P B33 VCC_12V00 C33 GND 3P3VAUX D33 FMC1_TMS E33 GND HB12_N F33
FMC1_TMS {4}
FBMH2016HM121NT
A34 GND DP7_C2M_N B34 FMC1_GA0 C34 GND TMS D34 FMC1_TRST_L C620 FB4 E34 HB19_P GND F34
A35 DP4_C2M_P GND B35 C35 GA0 TRST_L D35 FMC1_GA1 0806 E35 HB19_N HB16_P F35
A36 DP4_C2M_N GND B36 C36 12P0V GA1 D36 E36 GND HB16_N F36
10uF
A37 GND DP6_C2M_P B37 VFMC1_3V30 C37 GND 3P3V D37 VFMC1_3V30 E37 HB21_P GND F37
A38 GND DP6_C2M_N B38 C38 12P0V GND D38 E38 HB21_N HB20_P F38
A39 DP5_C2M_P GND B39 C39 GND 3P3V D39 E39 GND HB20_N F39
DP5_C2M_N GND 3P3V GND VFMC1_ADJ VADJ GND
A40 B40 R216 FMC1_RES0 {4} C40 D40 E40 F40 VFMC1_ADJ
GND RES0 0-DNI GND 3P3V GND VADJ
ASP-134486-01 ASP-134486-01 ASP-134486-01
C C
VCC_3V30
J48D R217 J48E

10k VREFB1
G1 H1 FMC1_VREFA {6} J1 K1
G2 GND VREF_A_M2C H2 FMC1_PRSNT_M2C_L J2 GND VREF_B_M2C K2
{6} FMC1_CLK1_M2C_P CLK1_M2C_P PRSNT_M2C_L FMC1_PRSNT_M2C_L {4} {6} FMC1_CLK3_M2C_P CLK3_M2C_P GND
{6} FMC1_CLK1_M2C_N G3 H3 {6} FMC1_CLK3_M2C_N J3 K3
G4 CLK1_M2C_N GND H4 J4 CLK3_M2C_N GND K4
GND CLK0_M2C_P FMC1_CLK0_M2C_P {6} GND CLK2_M2C_P FMC1_CLK2_M2C_P {6}
G5 H5 FMC1_CLK0_M2C_N {6} J5 K5 FMC1_CLK2_M2C_N {6}
G6 GND CLK0_M2C_N H6 J6 GND CLK2_M2C_N K6
{6} FMC1_LA00_CLK_P LA00_P_CC GND {6} FMC1_HA03_P HA03_P GND
G7 H7 FMC1_LA02_P {6} J7 K7 FMC1_HA02_P {6}
{6} FMC1_LA00_CLK_N LA00_N_CC LA02_P {6} FMC1_HA03_N HA03_N HA02_P
G8 H8 FMC1_LA02_N {6} J8 K8 FMC1_HA02_N {6}
G9 GND LA02_N H9 J9 GND HA02_N K9
{6} FMC1_LA03_P LA03_P GND {6} FMC1_HA07_P HA07_P GND VCC_12V00
{6} FMC1_LA03_N G10 H10 FMC1_LA04_P {6} {6} FMC1_HA07_N J10 K10 FMC1_HA06_P {6}
G11 LA03_N LA04_P H11 J11 HA07_N HA06_P K11 U10 BD9D321EFJ
GND LA04_N FMC1_LA04_N {6} GND HA06_N FMC1_HA06_N {6}
G12 H12 J12 K12 8 7 VFMC1_ADJ
{6} FMC1_LA08_P LA08_P GND {6} FMC1_HA11_P HA11_P GND VIN BOOT VFMC1_ADJ
{6} FMC1_LA08_N G13 H13 FMC1_LA07_P {6} {6} FMC1_HA11_N J13 K13 FMC1_HA10_P {6} C100
G14 LA08_N LA07_P H14 J14 HA11_N HA10_P K14 C97 C98 C99 1 2.2uH SPM6530T-2R2M
GND LA07_N FMC1_LA07_N {6} GND HA10_N FMC1_HA10_N {6} EN
G15 H15 J15 K15 6 0.1uF
10uF 25V 1206
10uF 25V 1206

{6} FMC1_LA12_P LA12_P GND {6} FMC1_HA14_P HA14_P GND SW
G16 H16 FMC1_LA11_P {6} J16 K16 FMC1_HA17_CLK_P {6} 0.1uF 5 L13
{6} FMC1_LA12_N LA12_N LA11_P {6} FMC1_HA14_N HA14_N HA17_P_CC GND
G17 H17 FMC1_LA11_N {6} J17 K17 FMC1_HA17_CLK_N {6} R399 C101
G18 GND LA11_N H18 J18 GND HA17_N_CC K18 3 2 1.00k 1% R171
{6} FMC1_LA16_P LA16_P GND {6} FMC1_HA18_P HA18_P GND VREG FB
EPAD
G19 H19 FMC1_LA15_P {6} J19 K19 FMC1_HA21_P {6} C102 0.1nF C103 C104 1.0k
{6} FMC1_LA16_N LA16_N LA15_P {6} FMC1_HA18_N HA18_N HA21_P
G20 H20 FMC1_LA15_N {6} J20 K20 FMC1_HA21_N {6} 4
G21 GND LA15_N H21 J21 GND HA21_N K21 1uF SS 22uF 22uF
{6} FMC1_LA20_P LA20_P GND {6} FMC1_HA22_P HA22_P GND
G22 H22 FMC1_LA19_P {6} J22 K22 FMC1_HA23_P {6}
{6} FMC1_LA20_N {6} FMC1_HA22_N
9
G23 LA20_N LA19_P H23 J23 HA22_N HA23_P K23
G24 H24 J24 K24 C105 R401 R400 R111 R112
{6} FMC1_LA22_P LA22_P GND HB01_P GND
{6} FMC1_LA22_N G25 H25 FMC1_LA21_P {6} J25 K25 1.02k 1% 2.55k 1% 750 1% 422 1%
B
G26 LA22_N LA21_P H26 J26 HB01_N HB00_P_CC K26 3.3nF
B
GND LA21_N FMC1_LA21_N {6} GND HB00_N_CC
G27 H27 J27 K27
{6} FMC1_LA25_N G28 H28 FMC1_LA24_P {6} J28 K28 JP8 JP7 JP43
1
G29 LA25_N LA24_P H29 J29 HB07_N HB06_P_CC K29
GND LA24_N FMC1_LA24_N {6} GND HB06_N_CC
G30 H30 J30 K30 Use only below Jumpers:
JUMPER
JUMPER
JUMPER
G31 H31 FMC1_LA28_P {6} J31 K31
{6} FMC1_LA29_N
G32 LA29_N LA28_P H32 FMC1_LA28_N {6} J32 HB11_N HB10_P K32 No Jumper 1.5V
2
G33 GND LA28_N H33 J33 GND HB10_N K33 Only JP8 1.8V (Default)
G34 H34 FMC1_LA30_P {6} J34 K34 Only JP7 2.5V
{6} FMC1_LA31_N LA31_N LA30_P HB15_N HB14_P
G35 H35 FMC1_LA30_N {6} J35 K35
G36 GND LA30_N H36 J36 GND HB14_N K36 Only JP43 3.3V
G37 H37 FMC1_LA32_P {6} J37 K37
{6} FMC1_LA33_N LA33_N LA32_P HB18_N HB17_P_CC
G38 H38 FMC1_LA32_N {6} J38 K38
G39 GND LA32_N H39 J39 GND HB17_N_CC K39
VFMC1_ADJ VADJ GND VIO_B_M2C-1 GND
G40 H40 VFMC1_ADJ J40 K40
GND VADJ GND VIO_B_M2C-2
ASP-134486-01 ASP-134486-01
VFMC1_3V30 VFMC1_3V30 VCC_3V30

Parallel FMC CFG Header VFMC1_3V30AUX
VCC_3V30
VCC_12V00
U6 BD9D321EFJ R249 R250
8 7 R85 R86 R87
VIN BOOT C48 J10
C47 C45 C46 1 2.2uH SPM6530T-2R2M 1 2 4.7k-DNI 4.7k-DNI
R95 EN 6 0.1uF FMC1_TCK 3 1 2 4 FMC1_PG_C2M 4.7k 4.7k 4.7k
10uF
10uF
1k 0.1uF 5 SW L1 FMC1_PG_M2C 5 3 4 6 FMC1_TRST_L
FMC1_GA0
FMC1_GA1
GND C52 FMC1_TDI 7 5 6 8 FMC1_PRSNT_M2C_L FMC1_TDI
A A
3 2 R96 C49 C50 C51 FMC1_TDO 9 7 8 10 FMC1_SCL FMC1_TDO
VREG FB 9 10
EPAD
C53 1K 0.1nF 11 12 FMC1_TMS

4 1% 22uF 22uF 22uF FMC1_TMS 13 11 12 14 FMC1_SDA FMC1_TCK
1uF SS 13 14 R251 R252
Header_2x7
9
R92
C54 2.2K 1k 1k
R100 Lattice Semiconductor Applications
3.3nF 301R
1%
Title
HPC FMC1
5 4 3 2 1
Figure A.7. HPC FMC1
FPGA-EB-02057-1.2 50
User Guide
5 4 3 2 1
VCCIO6 Switch Signal Map

U3G
AD16 AA16 DIP_SW1
AJ15 VCCIO6 HPIO6_0A/DP1_DQ43 AA17 DIP_SW2 U3 pin Signal SWITCH
C64 C65 C66 C579 C580 AL12 VCCIO6 HPIO6_0B/DP1_DQ42 AL16 DIP_SW3 VCCIO6_IN
AL15 VCCIO6 HPIO6_1A/DP1_DQ51 AM16 DIP_SW4
10uF 0.1uF 0.1uF 0.1uF 0.1uF VCCIO6 HPIO6_1B/DP1_DQ50 AB16 DIP_SW5 AA16 DIP_SW1 1
HPIO6_2A/DP1_DQ47 AB17 DIP_SW6 R30 R32 R34 R36
HPIO6_2B/DP1_DQ46 AP16 DIP_SW7 R31 R33 R35 R37
HPIO6_3A/DP1_DQ55 AN16 DIP_SW8 AA17 DIP_SW2 2
HPIO6_3B/DP1_DQ54
HPIO6_4A/DP1_DQS5
AC17
AC16
PUSHBUTTON1
PUSHBUTTON2
DIP SWITCH
HPIO6_4B/DP1_DQSN5 AP15 PUSHBUTTON3 VCCIO6_IN 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K SW3 AL16 DIP_SW3 3
HPIO6_5A/DP1_DQS6 AN15 LED_8
HPIO6_5B/DP1_DQSN6 AH17 LED_9 DIP_SW1
D HPIO6_6A/DP1_DQ41 AG17 LED_10 DIP_SW2 AM16 DIP_SW4 4 D
HPIO6_6B/DP1_DQ40 AM14 LED_11 DIP_SW3
HPIO6_7A/DP1_DQ49 AL14 LED_12 DIP_SW4
HPIO6_7B/DP1_DQ48 AK17 LED_13 DIP_SW5 AB16 DIP_SW5 5
HPIO6_8A/DP1_DQ45 AJ17 LED_14 R542 R543 DIP_SW6
HPIO6_8B/DP1_DQ44 AN14 LED_15 4.7k 4.7k DIP_SW7
HPIO6_9A/DP1_DQ53 AP14 DIP_SW8 AB17 DIP_SW6 6
HPIO6_9B/DP1_DQ52 AH16 B6_SCL
HPIO6_10A/PCLKT6_0/PCLKRT6_0/DP1_DM5 AG16 B6_SDA TDA DIP-8
HPIO6_10B/PCLKC6_0/PCLKRC6_0 AN13 EPS1_AN13_P AP16 DIP_SW7 7
HPIO6_11A/PCLKT6_1/PCLKRT6_1/DP1_DM6 AP13 EPS1_AP13_N
HPIO6_11B/PCLKC6_1/PCLKRC6_1 AJ16 EPS2_AJ16_P
HPIO6_12A/VREF6/DP1_VREF6 AK16 EPS2_AK16_N AN16 DIP_SW8 8
HPIO6_12B/EXT_RES6/DP1_EXT_RES6 AL13 EPS3_AL13_P
HPIO6_13A/PLLT6_IN AM13 EPS3_AM13_N
HPIO6_13B/PLLC6_IN AG15 EPS4_AG15_P
HPIO6_14A/DP1_DQ59 AH15 EPS4_AH15_N
HPIO6_14B/DP1_DQ58 AK13 EPS5_AK13_P
HPIO6_15A/DP1_DQ67 AK12 EPS5_AK12_N
JP64 HPIO6_15B/DP1_DQ66 EPS6_AF15_P
AF15
B6_SCL 3 HPIO6_16A/DP1_DQ63 AF16 EPS6_AF16_N
2 HPIO6_16B/DP1_DQ62 AP12 EPS7_AP12_P
B6_SDA 1 HPIO6_17A/DP1_DQ71 AN12 EPS7_AN12_N
HPIO6_17B/DP1_DQ70 AH14 EPS8_AH14_P
HPIO6_18A/DP1_DQS7 AG14 EPS8_AG14_N LEDs Signal Map
3-PIN HPIO6_18B/DP1_DQSN7 AP10 EPS9_AP10_P
HPIO6_19A/DP1_DQS8 AP11 EPS9_AP11_N Minimize length as short as
HPIO6_19B/DP1_DQSN8 AK14 EPS10_AK14_P ST possible short_stub_trace. U3 pin Signal LED
HPIO6_20A/DP1_DQ57
HPIO6_20B/DP1_DQ56
AK15 EPS10_AK15_N TP close to FPGA
AN11 short_stub_trace 6T
BANK 6 HPIO6_21A/DP1_DQ65
HPIO6_21B/DP1_DQ64
AN10 AN15 LED_8 D22
6_inch_long_trace
1.8V HPIO6_22A/DP1_DQ61
AH13
AJ13
10T
AH17 LED_9 D23
HPIO6_22B/DP1_DQ60 AM10 10_inch_long_trace
HPIO6_23A/DP1_DQ69 AM11 AG17 LED_10 D24 VCC_3V30
HPIO6_23B/DP1_DQ68
HPIO6_24A/PCLKRT6_2/DP1_DM7
AE15 EPS11_AE15_P
EPS11_AD15_N AM14 LED_11 D25
LEDs
AD15
HPIO6_24B/PCLKRC6_2 AL10 EPS12_AL10_P Two 50 ohm Lookbacks Traces: 6 inches and 10 inches
C
HPIO6_25A/PCLKRT6_3/DP1_DM8 AL11 EPS12_AL11_N Place TPs close to FPGA AL14 LED_12 D26 C
HPIO6_25B/PCLKRC6_3 R521 R523 R524 R526 R528 R529 R532 R533

LAV-AT-500-E_1156
AK17 LED_13 D27 330R 330R 330R 330R 330R 330R 330R 330R
AJ17 LED_14 D28
VCCIO6_IN AN14 LED_15 D29 D22 D23 D24 D25 D26 D27 D28 D29
VCCIO6_IN
RED
RED
RED
RED
RED
RED
RED
RED
R48
R21
4.7K PB3
SW5
3
PB1 1 2 R51 100 PUSHBUTTON3
SW1 4.7K A1 B1 LED_8 R520 10K 1
1 2 R23 100 PUSHBUTTON1 3 4 C27
A1 B1 A2 B2 Q16
2
3 4 C21 430182043816 0.1uF BC817-40-TP
A2 B2
3
430182043816 0.1uF
LED_9 R522 10K 1
Q17
2
BC817-40-TP
3
LED_10 R525 10K 1
VCCIO6_IN
Q18
2
BC817-40-TP
3
R47 LED_11 R527 10K 1
Q19
2
4.7K PB2 BC817-40-TP
3
SW4
B LED_12 B
1 2 R50 100 PUSHBUTTON2 R530 10K 1
A1 B1
3 4 C26 Q20
2
A2 B2 BC817-40-TP
3
430182043816 0.1uF
LED_13 R531 10K 1
Q21
Through Hole Extended Area
2
BC817-40-TP
3
LED_14 R534 10K 1
Q22
2
VCC_0V82 VCC_0V90 VCC_1V00 VCC_1V10 VCC_1V20 VCC_1V35 BC817-40-TP
3
LED_15 R535 10K 1
0V82 0V9 1V 1V1 1V2 1V35 Q23
2
BC817-40-TP
VCC_1V50 VCC_1V80 VCC_2V50 VCC_3V30 VFMC1_3V30 VFMC2_3V30
1V5 1V8 2V5 3V3 F1_3V3 F2_3V3
VFMC1_3V30AUX VFMC2_3V30AUX VFMC1_ADJ VFMC2_ADJ VCC_5V00 VCC_12V00
F1_3V3AUX F2_3V3AUX F1_ADJ F2_ADJ 5V 12V
A A
EPS1_AN13_P EPS2_AJ16_P EPS3_AL13_P EPS4_AG15_P EPS5_AK13_P

EPS1_AP13_N TP_AN13 EPS2_AK16_N TP_AJ16 EPS3_AM13_N TP_AL13 EPS4_AH15_N TP_AG15 EPS5_AK12_N TP_AK13
TP_AP13 TP_AK16 TP_AM13 TP_AH15 TP_AK12
EPS6_AF15_P EPS7_AP12_P EPS8_AH14_P EPS9_AP10_P EPS10_AK14_P EPS11_AE15_P

EPS6_AF16_N TP_AF15 EPS7_AN12_N TP_AP12 EPS8_AG14_N TP_AH14 EPS9_AP11_N TP_AP10 EPS10_AK15_N TP_AK14 EPS11_AD15_N TP_AE15
TP_AF16 TP_AN12 TP_AG14 TP_AP11 TP_AK15 TP_AD15
EPS12_AL10_P Email: techsupport@Latticesemi.com
EPS12_AL11_N TP_AL10 GND6 GND8 GND10 GND12 GND14
TP_AL11 GND7 GND9 GND11 GND13 GND15
Title
Bank-6 Switches, Buttons, LEDs & Extended Bank
LVCMOS&LVDS Through Hole Extended Area C Avant-E Evaluation Board (LAV-500E-EVN) Board Rev B
5 4 3 2 1
Figure A.8. Bank-6 Switches, Buttons, LEDs & Extended Bank
FPGA-EB-02057-1.2 51
User Guide
5 4 3 2 1
VCCIO7 U3H VCCIO8 U3I

AD18 AB18 AC19 AC20 FMC2_LA29_P {10}
VCCIO7 HPIO7_0A/DP1_MCLKT0 FMC2_LA12_P {10} VCCIO8 HPIO8_0A/DP1_DQ37
AG19 AA18 AF22 AB20 FMC2_LA29_N {10}
VCCIO7 HPIO7_0B/DP1_MCLKC0 FMC2_LA12_N {10} VCCIO8 HPIO8_0B/DP1_DQ36
AL19 AK21 FMC2_LA23_P {10} AJ24 AK25 FMC2_HA23_P {10}
C543 C618 C544 C537 C538 C539 AL22 VCCIO7 HPIO7_1A/DP1_MCLKT1 AK22 C534 C617 C535 C540 C541 C536 AM27 VCCIO8 HPIO8_1A/DP1_DQ20 AL25
VCCIO7 HPIO7_1B/DP1_MCLKC1 FMC2_LA23_N {10} VCCIO8 HPIO8_1B/DP1_DQ21 FMC2_HA23_N {10}
Y17 FMC2_LA10_P {10} Y20 FMC2_LA30_P {10}
10uF 10uF 0.1uF 0.1uF 0.1uF 0.1uF HPIO7_2A/DP1_CKE0 Y18 10uF 10uF 0.1uF 0.1uF 0.1uF 0.1uF HPIO8_2A/DP1_DQ32 AA20
HPIO7_2B/DP1_MA0 FMC2_LA10_N {10} HPIO8_2B/DP1_DQ33 FMC2_LA30_N {10}
AM23 AL26
HPIO7_3A/DP1_CKE1 FMC2_LA27_P {10} HPIO8_3A/DP1_DQ16 FMC2_HB21_P {10}
AL23 FMC2_LA27_N {10} AK26 FMC2_HB21_N {10}
HPIO7_3B/DP1_ODT1 AD17 HPIO8_3B/DP1_DQ17 AB19
HPIO7_4A/DP1_MA1 FMC2_LA09_P {10} HPIO8_4A/DP1_DQS4 FMC2_LA31_P {10}
AE17 FMC2_LA09_N {10} AA19 FMC2_LA31_N {10}
D HPIO7_4B/DP1_MA2 AM21 HPIO8_4B/DP1_DQSN4 AK28 D
HPIO7_5A/DP1_ODT0 FMC2_LA07_P {10} HPIO8_5A/DP1_DQS2 FMC2_LA26_P {10}
AL21 FMC2_LA07_N {10} AK27 FMC2_LA26_N {10}
HPIO7_5B/DP1_CS_N1 AE18 HPIO8_5B/DP1_DQSN2 AD19
HPIO7_6A/DP1_MA3 FMC2_LA13_P {10} HPIO8_6A/DP1_DQ38 FMC2_HB03_P {10}
AE19 FMC2_LA13_N {10} AD20
HPIO7_6B/DP1_MA4 HPIO8_6B/DP1_DQ39 FMC2_HB03_N {10}
AL20 FMC2_LA06_P {10} AL27 FMC2_LA32_P {10}
HPIO7_7A/DP1_CS_N0 AM20 HPIO8_7A/DP1_DQ22 AL28
HPIO7_7B/DP1_MA9 FMC2_LA06_N {10} HPIO8_7B/DP1_DQ23 FMC2_LA32_N {10}
AF19 FMC2_LA14_P {10} AE20
HPIO7_8A/DP1_MA5 HPIO8_8A/DP1_DQ34 FMC2_HB00_P_CC {10}
AF20 FMC2_LA14_N {10} AE21 FMC2_HB00_N_CC {10}
HPIO7_8B/DP1_MA6 AN23 HPIO8_8B/DP1_DQ35 AL29
HPIO7_9A/DP1_MA10 FMC2_LA24_P {10} HPIO8_9A/DP1_DQ18 FMC2_HB08_P {10}
AP23 FMC2_LA24_N {10} AM29 FMC2_HB08_N {10}
HPIO7_9B/DP1_MA11 AG20 HPIO8_9B/DP1_DQ19 AE22
HPIO7_10A/PCLKT7_0/PCLKRT7_0/DP1_MA7 FMC2_LA01_CLK_P {10} HPIO8_10A/PCLKT8_0/PCLKRT8_0/DP1_DM4 FMC2_CLK3_M2C_P {10}
AH20 FMC2_LA01_CLK_N {10} AE23
HPIO7_10B/PCLKC7_0/PCLKRC7_0/DP1_MA8 HPIO8_10B/PCLKC8_0/PCLKRC8_0 FMC2_CLK3_M2C_N {10}
AP22 FMC2_LA17_CLK_P {10} AN28 FMC2_LA18_CLK_P {10}
HPIO7_11A/PCLKT7_1/PCLKRT7_1/DP1_MA12 AN22 HPIO8_11A/PCLKT8_1/PCLKRT8_1/DP1_DM2 AM28
HPIO7_11B/PCLKC7_1/PCLKRC7_1/DP1_MA13 AF18
FMC2_LA17_CLK_N {10}
JP40
Default = OPEN HPIO8_11B/PCLKC8_1/PCLKRC8_1 AF24
FMC2_LA18_CLK_N {10}
JP42
Default = OPEN
HPIO7_12A/VREF7/DP1_VREF7 FMC2_VREFA {9,10} HPIO8_12A/VREF8/DP1_VREF8 FMC2_VREFA {9,10}
AF17 AF23 JP52
HPIO7_12B/EXT_RES7/DP1_EXT_RES7 AP21 HPIO8_12B/EXT_RES8/DP1_EXT_RES8 AP29 FMC2_VREFB {6,10}
FMC2_LA25_P {10} 240 R461 FMC2_HB20_P {10}
HPIO7_13A/PLLT7_IN/DP1_PLLT7_IN AN21 HPIO8_13A/PLLT8_IN AN29
HPIO7_13B/PLLC7_IN/DP1_PLLC7_IN AH21
FMC2_LA25_N {10} HPIO8_13B/PLLC8_IN AG25
FMC2_HB20_N {10}
B9_VREFB
Default = OPEN
HPIO7_14A/DP1_DQ03 FMC2_LA20_P {10} HPIO8_14A/DP1_DQ28 FMC2_HB04_P {10}
AH22 FMC2_LA20_N {10} AF25 FMC2_HB04_N {10}
HPIO7_14B/DP1_DQ02 AN20 HPIO8_14B/DP1_DQ29 AP28
HPIO7_15A/DP1_DQ11 FMC2_LA08_P {10} HPIO8_15A/DP1_MCLKT3 FMC2_LA33_P {10}
AP20 AP27 FMC2_LA33_N {10}
HPIO7_15B/DP1_DQ10 FMC2_LA08_N {10} HPIO8_15B/DP1_MCLKC3
AH18 FMC2_LA15_P {10} AG23 FMC2_HB09_P {10}
HPIO7_16A/DP1_DQ07 AG18 HPIO8_16A/DP1_DQ24 AG24
HPIO7_16B/DP1_DQ06 FMC2_LA15_N {10} HPIO8_16B/DP1_DQ25 FMC2_HB09_N {10}
AN19 FMC2_LA04_P {10} AM26 FMC2_HB19_P {10}
HPIO7_17A/DP1_DQ15 AP19 HPIO8_17A/DP1_MCLKT2 AM25
HPIO7_17B/DP1_DQ14 FMC2_LA04_N {10} HPIO8_17B/DP1_MCLKC2 FMC2_HB19_N {10}
AJ22 AF21
HPIO7_18A/DP1_DQS0 FMC2_LA11_P {10} HPIO8_18A/DP1_DQS3 FMC2_HB05_N {10}
AJ21 FMC2_LA11_N {10} AG21 FMC2_HB05_P {10}
HPIO7_18B/DP1_DQSN0 AM18 HPIO8_18B/DP1_DQSN3 AP26
HPIO7_19A/DP1_DQS1 FMC2_LA03_P {10} HPIO8_19A/DP1_MA16 FMC2_HB16_P {10}
AL18 FMC2_LA03_N {10} AN26 FMC2_HB16_N {10}
HPIO7_19B/DP1_DQSN1 AK20 HPIO8_19B/DP1_MA15 AH24
HPIO7_20A/DP1_DQ00 AJ20
FMC2_LA02_P {10} BANK 8 HPIO8_20A/DP1_DQ30 AH25
FMC2_LA22_P {10}
HPIO7_20B/DP1_DQ01 FMC2_LA02_N {10} 1.8V HPIO8_20B/DP1_DQ31 FMC2_LA22_N {10}
BANK 7 AN18 FMC2_LA05_P {10} AN25 FMC2_HB12_P {10}
HPIO7_21A/DP1_DQ09 AP18 HPIO8_21A/DP1_MA14 AP25
1.8 V HPIO7_21B/DP1_DQ08 AK19
FMC2_LA05_N {10} HPIO8_21B/DP1_WE_N AJ23
FMC2_HB12_N {10}
HPIO7_22A/DP1_DQ05 FMC2_LA19_P {10} HPIO8_22A/DP1_DQ26 FMC2_HB02_P {10}
AJ19 AH23
HPIO7_22B/DP1_DQ04 FMC2_LA19_N {10} HPIO8_22B/DP1_DQ27 FMC2_HB02_N {10}
AM17 FMC2_LA16_N {10} AN24
HPIO7_23A/DP1_DQ13 HPIO8_23A/DP1_BA2 FMC2_HB13_P {10}
C AL17 FMC2_LA16_P {10} AP24 FMC2_HB13_N {10} C
HPIO7_23B/DP1_DQ12 AJ18 HPIO8_23B/DP1_BA1 AK24
HPIO7_24A/PCLKRT7_2/DP1_DM0 FMC2_LA00_CLK_P {10} HPIO8_24A/PCLKRT8_2/DP1_DM3 FMC2_HA17_CLK_P {10}
AK18 FMC2_LA00_CLK_N {10} AK23 FMC2_HA17_CLK_N {10}
HPIO7_24B/PCLKRC7_2/DP1_ALERT_N AP17 HPIO8_24B/PCLKRC8_2/DP1_CAS_N AM24
HPIO7_25A/PCLKRT7_3/DP1_DM1 FMC2_CLK2_M2C_P {10} HPIO8_25A/PCLKRT8_3/DP1_BA0 FMC2_HA22_P {10}
AN17 AL24 FMC2_HA22_N {10}
HPIO7_25B/PCLKRC7_3/DP1_RST_N FMC2_CLK2_M2C_N {10} HPIO8_25B/PCLKRC8_3/DP1_RAS_N
LAV-AT-500-E_1156 LAV-AT-500-E_1156
VCCIO9 U3J
AH27 AF28
VCCIO9 HPIO9_0A/DP2_DQ43 FMC2_HA02_P {10}
AH31 AF29 FMC2_HA02_N {10}
C547 C619 C548 C545 C546 C542 AL31 VCCIO9 HPIO9_0B/DP2_DQ42 AJ31
VCCIO9 HPIO9_1A/DP2_DQ51 FMC2_HA20_P {10}
AP33 AJ32 FMC2_HA20_N {10}
10uF 10uF 0.1uF 0.1uF 0.1uF 0.1uF VCCIO9 HPIO9_1B/DP2_DQ50 AF30
AG30
AJ34 FMC2_HA14_P {10}
AF31 FMC2_HA21_P {10}
B HPIO9_4A/DP2_DQS5 AG31 B
HPIO9_4B/DP2_DQSN5 FMC2_HA21_N {10}
AK29 FMC2_HA06_P {10}
HPIO9_5A/DP2_DQS6 AK30
AG32 FMC2_HA18_P {10}
HPIO9_6A/DP2_DQ41 AF32
AK31 FMC2_HA09_P {10}
HPIO9_7A/DP2_DQ49 AK32
AH34 FMC2_HA19_P {10}
AK33 FMC2_HA15_P {10}
HPIO9_9A/DP2_DQ53 AK34
AG33 FMC2_HA01_CLK_P {10}
HPIO9_10A/PCLKT9_0/PCLKRT9_0/DP2_DM5 AH33
HPIO9_10B/PCLKC9_0/PCLKRC9_0 FMC2_HA01_CLK_N {10}
AM30 B8_VREFA
HPIO9_11A/PCLKT9_1/PCLKRT9_1/DP2_DM6 FMC2_HA00_CLK_P {10}
AL30 FMC2_HA00_CLK_N {10} Default = OPEN
HPIO9_11B/PCLKC9_1/PCLKRC9_1 AF27 JP41
HPIO9_12A/VREF9/DP2_VREF9 AF26 FMC2_VREFA {9,10}
HPIO9_12B/EXT_RES9/DP2_EXT_RES9 AM32 240 R462
HPIO9_13A/PLLT9_IN FMC2_HA11_P {10}
AM31 FMC2_HA11_N {10}
HPIO9_13B/PLLC9_IN AG27
HPIO9_14A/DP2_DQ59 FMC2_HA03_P {10}
AG28
AL33 FMC2_HA16_P {10}
HPIO9_15A/DP2_DQ67 AL34
AH29 FMC2_LA28_P {10}
AM33
AM34
AH30 FMC2_HA05_P {10}
HPIO9_18A/DP2_DQS7 AJ30
AN34 FMC2_HA12_P {10}
HPIO9_19A/DP2_DQS8 AN33
AJ28 FMC2_HA07_P {10}
BANK 9 HPIO9_20B/DP2_DQ56 FMC2_HA07_N {10}
AN32 FMC2_HA13_P {10}
1.8V HPIO9_21A/DP2_DQ65 AP32
AH26
AG26
A AP31 FMC2_HA08_P {10} A
HPIO9_23A/DP2_DQ69 AN31
AJ27 FMC2_CLK0_M2C_P {10}
HPIO9_24A/PCLKRT9_2/DP2_DM7 AJ26
HPIO9_24B/PCLKRC9_2 FMC2_CLK0_M2C_N {10}
AP30 FMC2_CLK1_M2C_P {10}
HPIO9_25A/PCLKRT9_3/DP2_DM8 AN30
HPIO9_25B/PCLKRC9_3 FMC2_CLK1_M2C_N {10}
LAV-AT-500-E_1156
Title
Bank-7/8/9 FMC2
5 4 3 2 1
Figure A.9. Bank-7/8/9 FMC2
FPGA-EB-02057-1.2 52
User Guide
5 4 3 2 1
VCC_3V30 VCC_3V30
J54A J54B R327 J54C R328

10k 10k
A1 B1 R308 FMC2_RES1 {12} C1 D1 FMC2_PG_C2M E1 F1 FMC2_PG_M2C FMC2_PG_M2C {12}
GND RES1 GND PG_C2M FMC2_PG_C2M {12} GND PG_M2C
A2 B2 0-DNI C2 D2 {9} FMC2_HA01_CLK_P E2 F2
A3 DP1_M2C_P GND B3 C3 DP0_C2M_P GND D3 E3 HA01_P_CC GND F3
DP1_M2C_N GND DP0_C2M_N GND {9} FMC2_HA01_CLK_N HA01_N_CC GND
A4 B4 C4 D4 E4 F4 FMC2_HA00_CLK_P {9}
A5 GND DP9_M2C_P B5 C5 GND GBTCLK0_M2C_P D5 E5 GND HA00_P_CC F5
GND DP9_M2C_N GND GBTCLK0_M2C_N GND HA00_N_CC FMC2_HA00_CLK_N {9}
A6 B6 C6 D6 E6 F6
DP2_M2C_P GND DP0_M2C_P GND {9} FMC2_HA05_P HA05_P GND
A7 B7 C7 D7 {9} FMC2_HA05_N E7 F7 FMC2_HA04_P {9}
A8 DP2_M2C_N GND B8 C8 DP0_M2C_N GND D8 E8 HA05_N HA04_P F8
GND DP8_M2C_P GND LA01_P_CC FMC2_LA01_CLK_P {9} GND HA04_N FMC2_HA04_N {9}
A9 B9 C9 D9 FMC2_LA01_CLK_N {9} {9} FMC2_HA09_P E9 F9
D
A10 GND DP8_M2C_N B10 C10 GND LA01_N_CC D10 E10 HA09_P GND F10 D
DP3_M2C_P GND {9} FMC2_LA06_P LA06_P GND {9} FMC2_HA09_N HA09_N HA08_P FMC2_HA08_P {9}
DP3_M2C_N GND {9} FMC2_LA06_N LA06_N LA05_P GND HA08_N
A12 B12 C12 D12 FMC2_LA05_N {9} {9} FMC2_HA13_P E12 F12
A13 GND DP7_M2C_P B13 C13 GND LA05_N D13 E13 HA13_P GND F13
GND DP7_M2C_N GND GND {9} FMC2_HA13_N HA13_N HA12_P FMC2_HA12_P {9}
A14 B14 {9} FMC2_LA10_P C14 D14 FMC2_LA09_P {9} E14 F14 FMC2_HA12_N {9}
A15 DP4_M2C_P GND B15 C15 LA10_P LA09_P D15 E15 GND HA12_N F15
DP4_M2C_N GND {9} FMC2_LA10_N LA10_N LA09_N FMC2_LA09_N {9} {9} FMC2_HA16_P HA16_P GND
A16 B16 C16 D16 E16 F16 FMC2_HA15_P {9}
GND DP6_M2C_P GND GND {9} FMC2_HA16_N HA16_N HA15_P
A18 GND DP6_M2C_N B18 C18 GND LA13_P D18 E18 GND HA15_N F18
DP5_M2C_P GND {9} FMC2_LA14_P LA14_P LA13_N FMC2_LA13_N {9} {9} FMC2_HA20_P HA20_P GND
A19 B19 {9} FMC2_LA14_N C19 D19 {9} FMC2_HA20_N E19 F19 FMC2_HA19_P {9}
A20 DP5_M2C_N GND B20 C20 LA14_N GND D20 E20 HA20_N HA19_P F20
GND GBTCLK1_M2C_P GND LA17_P_CC FMC2_LA17_CLK_P {9} GND HA19_N FMC2_HA19_N {9}
A21 B21 C21 D21 FMC2_LA17_CLK_N {9} E21 F21
GND GBTCLK1_M2C_N GND LA17_N_CC {9} FMC2_HB03_P HB03_P GND
A22 B22 {9} FMC2_LA18_CLK_P C22 D22 {9} FMC2_HB03_N E22 F22 FMC2_HB02_P {9}
A23 DP1_C2M_P GND B23 VCC_3V30 C23 LA18_P_CC GND D23 E23 HB03_N HB02_P F23
DP1_C2M_N GND {9} FMC2_LA18_CLK_N LA18_N_CC LA23_P FMC2_LA23_P {9} GND HB02_N FMC2_HB02_N {9}
A24 B24 C24 D24 FMC2_LA23_N {9} {9} FMC2_HB05_P E24 F24
A25 GND DP9_C2M_P B25 C25 GND LA23_N D25 E25 HB05_P GND F25
GND DP9_C2M_N GND GND {9} FMC2_HB05_N HB05_N HB04_P FMC2_HB04_P {9}
A26 B26 C26 D26 FMC2_LA26_P {9} E26 F26 FMC2_HB04_N {9}
DP2_C2M_P GND {9} FMC2_LA27_P LA27_P LA26_P GND HB04_N
A27 B27 R321 R322 {9} FMC2_LA27_N C27 D27 FMC2_LA26_N {9} {9} FMC2_HB09_P E27 F27
A28 DP2_C2M_N GND B28 4.7k 4.7k C28 LA27_N LA26_N D28 E28 HB09_P GND F28
GND DP8_C2M_P GND GND {9} FMC2_HB09_N HB09_N HB08_P FMC2_HB08_P {9}
A29 B29 C29 D29 FMC2_TCK FMC2_TCK {12} E29 F29 FMC2_HB08_N {9}
A30 GND DP8_C2M_N B30 FMC2_SCL C30 GND TCK D30 FMC2_TDI VFMC2_3V30AUX E30 GND HB08_N F30
DP3_C2M_P GND {12} FMC2_SCL FMC2_SDA SCL TDI FMC2_TDO FMC2_TDI {12} {9} FMC2_HB13_P HB13_P GND
A31 B31 C31 D31 FMC2_TDO {12} E31 F31 FMC2_HB12_P {9}
DP3_C2M_N GND {12} FMC2_SDA SDA TDO {9} FMC2_HB13_N HB13_N HB12_P
A32 B32 C32 D32 E32 F32 FMC2_HB12_N {9}
A33 GND DP7_C2M_P B33 VCC_12V00 C33 GND 3P3VAUX D33 FMC2_TMS E33 GND HB12_N F33
FMC2_TMS {12} {9} FMC2_HB19_P
FBMH2016HM121NT
A34 GND DP7_C2M_N B34 FMC2_GA0 C34 GND TMS D34 FMC2_TRST_L C621 FB24 E34 HB19_P GND F34
DP4_C2M_P GND GA0 TRST_L {9} FMC2_HB19_N HB19_N HB16_P FMC2_HB16_P {9}
A35 B35 C35 D35 FMC2_GA1 0806 E35 F35 FMC2_HB16_N {9}
A36 DP4_C2M_N GND B36 C36 12P0V GA1 D36 E36 GND HB16_N F36
10uF
GND DP6_C2M_P VFMC2_3V30 GND 3P3V VFMC2_3V30 {9} FMC2_HB21_P HB21_P GND
A37 B37 C37 D37 {9} FMC2_HB21_N E37 F37 FMC2_HB20_P {9}
A38 GND DP6_C2M_N B38 C38 12P0V GND D38 E38 HB21_N HB20_P F38
DP5_C2M_P GND GND 3P3V GND HB20_N FMC2_HB20_N {9}
A39 B39 C39 D39 VFMC2_ADJ E39 F39
A40 DP5_C2M_N GND B40 R309 C40 3P3V GND D40 E40 VADJ GND F40
GND RES0 FMC2_RES0 {12} GND 3P3V GND VADJ VFMC2_ADJ
0-DNI
ASP-134486-01 ASP-134486-01 ASP-134486-01
C C
VCC_3V30
J54D R310 J54E

10k
G1 H1 FMC2_VREFA {9} J1 K1 FMC2_VREFB {6,9}
G2 GND VREF_A_M2C H2 FMC2_PRSNT_M2C_L J2 GND VREF_B_M2C K2
{9} FMC2_CLK1_M2C_P CLK1_M2C_P PRSNT_M2C_L FMC2_PRSNT_M2C_L {12} {9} FMC2_CLK3_M2C_P CLK3_M2C_P GND
G3 H3 J3 K3
{9} FMC2_CLK1_M2C_N CLK1_M2C_N GND {9} FMC2_CLK3_M2C_N CLK3_M2C_N GND
G4 H4 FMC2_CLK0_M2C_P {9} J4 K4 FMC2_CLK2_M2C_P {9}
G5 GND CLK0_M2C_P H5 J5 GND CLK2_M2C_P K5
GND CLK0_M2C_N FMC2_CLK0_M2C_N {9} GND CLK2_M2C_N FMC2_CLK2_M2C_N {9}
G6 H6 J6 K6
{9} FMC2_LA00_CLK_P LA00_P_CC GND {9} FMC2_HA03_P HA03_P GND
{9} FMC2_LA00_CLK_N G7 H7 FMC2_LA02_P {9} {9} FMC2_HA03_N J7 K7 FMC2_HA02_P {9}
G8 LA00_N_CC LA02_P H8 J8 HA03_N HA02_P K8
G9 H9 J9 K9
{9} FMC2_LA03_P LA03_P GND {9} FMC2_HA07_P HA07_P GND VCC_12V00
G11 LA03_N LA04_P H11 J11 HA07_N HA06_P K11 U31 BD9D321EFJ
{9} FMC2_LA08_P G12 H12 {9} FMC2_HA11_P J12 K12 8 7 VFMC2_ADJ
G13 LA08_P GND H13 J13 HA11_P GND K13 VIN BOOT C629 VFMC2_ADJ
{9} FMC2_LA08_N LA08_N LA07_P FMC2_LA07_P {9} {9} FMC2_HA11_N HA11_N HA10_P FMC2_HA10_P {9}
G14 H14 FMC2_LA07_N {9} J14 K14 FMC2_HA10_N {9} C626 C623 C625 1 2.2uH SPM6530T-2R2M
G15 GND LA07_N H15 J15 GND HA10_N K15 EN 6 0.1uF
{9} FMC2_LA12_P {9} FMC2_HA14_P
10uF 25V 1206
10uF 25V 1206

G16 LA12_P GND H16 J16 HA14_P GND K16 0.1uF 5 SW L14
{9} FMC2_LA12_N LA12_N LA11_P FMC2_LA11_P {9} {9} FMC2_HA14_N HA14_N HA17_P_CC FMC2_HA17_CLK_P {9} GND
G17 H17 FMC2_LA11_N {9} J17 K17 FMC2_HA17_CLK_N {9} R402 C624
G18 GND LA11_N H18 J18 GND HA17_N_CC K18 3 2 1.00k 1% R407
{9} FMC2_LA16_P LA16_P GND {9} FMC2_HA18_P HA18_P GND VREG FB
EPAD
G19 H19 FMC2_LA15_P {9} J19 K19 FMC2_HA21_P {9} C628 0.1nF C630 C622 1.0k
{9} FMC2_LA16_N LA16_N LA15_P {9} FMC2_HA18_N HA18_N HA21_P
G20 H20 FMC2_LA15_N {9} J20 K20 FMC2_HA21_N {9} 4
G21 GND LA15_N H21 J21 GND HA21_N K21 1uF SS 22uF 22uF
{9} FMC2_LA20_P LA20_P GND {9} FMC2_HA22_P HA22_P GND
9
G23 LA20_N LA19_P H23 J23 HA22_N HA23_P K23
G24 H24 J24 K24 C627 R406 R405 R404 R403
{9} FMC2_LA22_P LA22_P GND {6} FMC2_HB01_P HB01_P GND
{9} FMC2_LA22_N G25 H25 FMC2_LA21_P {9} {6} FMC2_HB01_N J25 K25 FMC2_HB00_P_CC {9} 1.02k 1% 2.55k 1% 750 1% 422 1%
G26 LA22_N LA21_P H26 J26 HB01_N HB00_P_CC K26 3.3nF
GND LA21_N FMC2_LA21_N {9} GND HB00_N_CC FMC2_HB00_N_CC {9}
{9} FMC2_LA25_P G27 H27 {6} FMC2_HB07_P J27 K27
B
G28 LA25_P GND H28 J28 HB07_P GND K28 JP46 JP44 JP45
B
{9} FMC2_LA25_N FMC2_LA24_P {9} {6} FMC2_HB07_N FMC2_HB06_P_CC {6}
1
G30 GND LA24_N H30
FMC2_LA24_N {9}
J30 GND HB06_N_CC K30
FMC2_HB06_N_CC {6} Use only below Jumpers:
JUMPER
JUMPER
JUMPER
{9} FMC2_LA29_P LA29_P GND {6} FMC2_HB11_P HB11_P GND No Jumper 1.5V
G31 H31 FMC2_LA28_P {9} J31 K31 FMC2_HB10_P {6}
{9} FMC2_LA29_N LA29_N LA28_P {6} FMC2_HB11_N HB11_N HB10_P
G32 H32 FMC2_LA28_N {9} J32 K32 FMC2_HB10_N {6} Only JP46 1.8V (Default)
2
G33 GND LA28_N H33 J33 GND HB10_N K33
{9} FMC2_LA31_P
G34 LA31_P GND H34
{6} FMC2_HB15_P
J34 HB15_P GND K34
Only JP44 2.5V
FMC2_LA30_P {9} FMC2_HB14_P {6}
{9} FMC2_LA31_N
G35 LA31_N LA30_P H35 FMC2_LA30_N {9}
{6} FMC2_HB15_N
J35 HB15_N HB14_P K35 FMC2_HB14_N {6}
Only JP45 3.3V
G36 GND LA30_N H36 J36 GND HB14_N K36
{9} FMC2_LA33_P LA33_P GND {6} FMC2_HB18_P HB18_P GND
{9} FMC2_LA33_N G37 H37 FMC2_LA32_P {9} {6} FMC2_HB18_N J37 K37 FMC2_HB17_P_CC {6}
GND LA32_N FMC2_LA32_N {9} GND HB17_N_CC FMC2_HB17_N_CC {6}
G39 H39 J39 K39
VFMC2_ADJ VADJ GND VIO_B_M2C-1 GND
G40 H40 VFMC2_ADJ J40 K40
GND VADJ GND VIO_B_M2C-2
ASP-134486-01 ASP-134486-01
VFMC2_3V30 VFMC2_3V30 VCC_3V30

Parallel FMC CFG Header VFMC2_3V30AUX
VCC_3V30
VCC_12V00
U32 BD9D321EFJ R323 R324
8 7 R314 R315 R316
VIN BOOT C564 J53
C560 C558 C561 1 2.2uH SPM6530T-2R2M 1 2 4.7k-DNI 4.7k-DNI
R307 EN 6 0.1uF FMC2_TCK 3 1 2 4 FMC2_PG_C2M 4.7k 4.7k 4.7k
10uF
10uF
FMC2_GA0
FMC2_GA1
1k 0.1uF 5 SW L10 FMC2_PG_M2C 5 3 4 6 FMC2_TRST_L
GND C559 FMC2_TDI 7 5 6 8 FMC2_PRSNT_M2C_L FMC2_TDI
3 2 R305 C565 C557 C556 FMC2_TDO 9 7 8 10 FMC2_SCL FMC2_TDO
VREG FB 9 10
EPAD
A C562 1K 0.1nF 11 12 FMC2_TMS A

4 1% 22uF 22uF 22uF FMC2_TMS 13 11 12 14 FMC2_SDA FMC2_TCK
1uF SS 13 14 R325 R326
Header_2x7
9
R317
C563 2.2K 1k 1k
R306 Lattice Semiconductor Applications
3.3nF 301R
1%
Title
HPC FMC2
5 4 3 2 1
Figure A.10. HPC FMC2
FPGA-EB-02057-1.2 53
User Guide
5 4 3 2 1
This schematic's LPDDR4 pinout should not

VCC_1V10 VCC_1V80
C483
10uF
C485
10uF C507 C509 C465 C468
be used as a reference. See FPGA-TN-02300
0402 0402 0.1uF
100V
0.1uF
100V
0.1uF
100V
0.1uF
100V
(Lattice Avant High-Speed I/O and External
Memory Interface User Guide) for pinout
guidelines.
AA10
VCCIO11
W12
AA8
AA5
AA3
AB9
AB4
D12
U10
H12
N12
N10
R12
U12
B10
K12
K10
F10
F12
W8
W5
W1
G4
G9
D1
D5
D8
U3
H1
H8
H5
N3
N1
R1
R5
R8
U5
U8
U1
B8
B3
B5
A4
A9
K3
K1
F3
F5
F8
F1
T9
T4
U3L U5
AA25 AA27 LPDDR4_DQ12_A
VDDQ_B8
VDDQ_B3
VDDQ_B5
VDDQ_B10
VDDQ_D1
VDDQ_D5
VDDQ_D8
VDDQ_D12
VDDQ_F3
VDDQ_F10
VDDQ_U3
VDDQ_U10
VDDQ_W12
VDDQ_W8
VDDQ_W5
VDDQ_W1
VDDQ_AA10
VDDQ_AA8
VDDQ_AA5
VDDQ_AA3
VDD2_AB9
VDD2_AB4
VDD2_A4
VDD2_A9
VDD2_F5
VDD2_F8
VDD2_H1
VDD2_H12
VDD2_H8
VDD2_H5
VDD2_K12
VDD2_K10
VDD2_K3
VDD2_K1
VDD2_N12
VDD2_N10
VDD2_N3
VDD2_N1
VDD2_R1
VDD2_R5
VDD2_R8
VDD2_R12
VDD2_U5
VDD2_U8
VDD1_U12
VDD1_F1
VDD1_F12
VDD1_G4
VDD1_G9
VDD1_T9
VDD1_T4
VDD1_U1
V23 VCCIO11 HPIO11_0A/DP2_DQ36 Y27 LPDDR4_DQ13_A
W27 VCCIO11 HPIO11_0B/DP2_DQ37 Y28 LPDDR4_DQ4_A
W31 VCCIO11 HPIO11_1A/DP2_DQ20 AA28 LPDDR4_DQ5_A
VCCIO11 HPIO11_1B/DP2_DQ21 V28 LPDDR4_DQ8_A
D HPIO11_2A/DP2_DQ32 U28 LPDDR4_DQ9_A D
HPIO11_2B/DP2_DQ33 U29 LPDDR4_DQ0_A LPDDR4_CS_A H4
HPIO11_3A/DP2_DQ16 V29 LPDDR4_DQ1_A LPDDR4_CS_A R4 CS0_A
HPIO11_3B/DP2_DQ17 U27 LPDDR4_UDQS_A_P CS0_B
HPIO11_4A/DP2_DQS4 V27 LPDDR4_UDQS_A_N
HPIO11_4B/DP2_DQSN4 Y29 LPDDR4_LDQS_A_P B2 LPDDR4_DQ0_A
HPIO11_5A/DP2_DQS2 W29 LPDDR4_LDQS_A_N DQ0_A C2 LPDDR4_DQ1_A
HPIO11_5B/DP2_DQSN2 AA26 LPDDR4_DQ14_A LPDDR4_A0_A H2 DQ1_A E2 LPDDR4_DQ2_A
HPIO11_6A/DP2_DQ38 Y26 LPDDR4_DQ15_A LPDDR4_A1_A J2 CA0_A DQ2_A F2 LPDDR4_DQ3_A
HPIO11_6B/DP2_DQ39 V30 LPDDR4_DQ6_A LPDDR4_A2_A H9 CA1_A DQ3_A F4 LPDDR4_DQ4_A
HPIO11_7A/DP2_DQ22 W30 LPDDR4_DQ7_A LPDDR4_A3_A H10 CA2_A DQ4_A E4 LPDDR4_DQ5_A
HPIO11_7B/DP2_DQ23 W26 LPDDR4_DQ10_A LPDDR4_A4_A H11 CA3_A DQ5_A C4 LPDDR4_DQ6_A
HPIO11_8A/DP2_DQ34 V26 LPDDR4_DQ11_A LPDDR4_A5_A J11 CA4_A DQ6_A B4 LPDDR4_DQ7_A
HPIO11_8B/DP2_DQ35 U30 LPDDR4_DQ2_A CA5_A DQ7_A B11 LPDDR4_DQ8_A
HPIO11_9A/DP2_DQ18 U31 LPDDR4_DQ3_A DQ8_A C11 LPDDR4_DQ9_A
HPIO11_9B/DP2_DQ19 V25 LPDDR4_UDM_A VCC_1V10 LPDDR4_CKE_A J4 DQ9_A E11 LPDDR4_DQ10_A
HPIO11_10A/PCLKT11_0/PCLKRT11_0/DP2_DM4 W25 CKE0_A DQ10_A F11 LPDDR4_DQ11_A
HPIO11_10B/PCLKC11_0/PCLKRC11_0 V32 LPDDR4_LDM_A VCCIO11 DQ11_A F9 LPDDR4_DQ12_A
HPIO11_11A/PCLKT11_1/PCLKRT11_1/DP2_DM2 V31 DQ12_A E9 LPDDR4_DQ13_A
HPIO11_11B/PCLKC11_1/PCLKRC11_1 T26 LPDDR4_CLK_A_P J8 DQ13_A C9 LPDDR4_DQ14_A
HPIO11_12A/VREF11/DP2_VREF11 U26 R294 240 R292 R293 CK_T_A DQ14_A B9 LPDDR4_DQ15_A
HPIO11_12B/EXT_RES11/DP2_EXT_RES11 U33 R0201 4.7k 4.7k LPDDR4_CLK_A_N J9 DQ15_A
HPIO11_13A/PLLT11_IN U32 CK_C_A D3 LPDDR4_LDQS_A_P
HPIO11_13B/PLLC11_IN U25 ODT_CA_A G2 DQS0_T_A E3 LPDDR4_LDQS_A_N
HPIO11_14A/DP2_DQ28 T25 ODT_CA_B T2 ODT_CA_A DQS0_C_A
HPIO11_14B/DP2_DQ29 V33 ODT_CA_B
HPIO11_15A/DP2_MCLKT3 W33 D10 LPDDR4_UDQS_A_P
HPIO11_15B/DP2_MCLKC3 AA24 DQS1_T_A E10 LPDDR4_UDQS_A_N
HPIO11_16A/DP2_DQ24 Y24 LPDDR4_A0_A R2 DQS1_C_A
HPIO11_16B/DP2_DQ25 U34 LPDDR4_A1_A P2 CA0_B C3 LPDDR4_LDM_A
HPIO11_17A/DP2_MCLKT2 V34 LPDDR4_A2_A R9 CA1_B DMI0_A C10 LPDDR4_UDM_A
HPIO11_17B/DP2_MCLKC2 W23 LPDDR4_A3_A R10 CA2_B DMI1_A
HPIO11_18A/DP2_DQS3 W24 LPDDR4_A4_A R11 CA3_B
HPIO11_18B/DP2_DQSN3 Y34 LPDDR4_A5_A P11 CA4_B AA2 LPDDR4_DQ0_B
HPIO11_19A/DP2_MA16 W34 CA5_B DQ0_B Y2 LPDDR4_DQ1_B
HPIO11_19B/DP2_MA15 U24 DQ1_B V2 LPDDR4_DQ2_B
HPIO11_20A/DP2_DQ30 T24 LPDDR4_CKE_A P4 DQ2_B U2 LPDDR4_DQ3_B
HPIO11_20B/DP2_DQ31 Y32 CKE0_B DQ3_B U4 LPDDR4_DQ4_B
C C
HPIO11_21A/DP2_MA14 Y33 DQ4_B V4 LPDDR4_DQ5_B
BANK 11 HPIO11_21B/DP2_WE_N
HPIO11_22A/DP2_DQ26
U23 DQ5_B
DQ6_B
Y4 LPDDR4_DQ6_B
LPDDR4_CLK_B_P LPDDR4_DQ7_B
1.1V HPIO11_22B/DP2_DQ27
U22
Y31
P8
CK_T_B DQ7_B
AA4
AA11 LPDDR4_DQ8_B
HPIO11_23A/DP2_BA2 Y30 LPDDR4_CLK_B_N P9 DQ8_B Y11 LPDDR4_DQ9_B
HPIO11_23B/DP2_BA1 V22 CK_C_B DQ9_B V11 LPDDR4_DQ10_B
HPIO11_24A/PCLKRT11_2/DP2_DM3 W22 DQ10_B U11 LPDDR4_DQ11_B
HPIO11_24B/PCLKRC11_2/DP2_CAS_N AA30 DQ11_B U9 LPDDR4_DQ12_B
HPIO11_25A/PCLKRT11_3/DP2_BA0 AA29 DQ12_B V9 LPDDR4_DQ13_B
HPIO11_25B/PCLKRC11_3/DP2_RAS_N LPDDR4_RESET T11 DQ13_B Y9 LPDDR4_DQ14_B
LAV-AT-500-E_1156 VCC_1V10 RESET_N DQ14_B AA9 LPDDR4_DQ15_B
R291 DQ15_B
A5 W3 LPDDR4_LDQS_B_P
ZQ0 DQS0_T_B V3 LPDDR4_LDQS_B_N
VCCIO10 240 DQS0_C_B
W10 LPDDR4_UDQS_B_P
DQS1_T_B V10 LPDDR4_UDQS_B_N
C631 C488 DQS1_C_B
10uF 10uF C473 C476 C478 C480 Y3 LPDDR4_LDM_B
0402 0402 0.1uF 0.1uF 0.1uF 0.1uF AA12 DMI0_B Y10 LPDDR4_UDM_B
U3K 100V 100V 100V 100V AB2 DNU_AA12 DMI1_B
AB22 AB25 LPDDR4_CLK_A_P AA1 DNU_AB2
AC28 VCCIO10 HPIO10_0A/DP2_MCLKT0 AC25 LPDDR4_CLK_A_N AB1 DNU_AA1
AC31 VCCIO10 HPIO10_0B/DP2_MCLKC0 AB30 LPDDR4_CLK_B_P AB11 DNU_AB1 P5
AD24 VCCIO10 HPIO10_1A/DP2_MCLKT1 AC30 LPDDR4_CLK_B_N AB12 DNU_AB11 NC_P5 R3
VCCIO10 HPIO10_1B/DP2_MCLKC1 AB26 LPDDR4_CKE_A B12 DNU_AB12 NC_R3 N8
HPIO10_2A/DP2_CKE0 AC26 LPDDR4_A0_A B1 DNU_B12 NC_N8 N5
HPIO10_2B/DP2_MA0 AD30 A12 DNU_B1 NC_N5 J5
HPIO10_3A/DP2_CKE1 AD29 A11 DNU_A12 NC_J5 K8
HPIO10_3B/DP2_ODT1 AB27 LPDDR4_A1_A A2 DNU_A11 NC_K8 K5
HPIO10_4A/DP2_MA1 AB28 LPDDR4_A2_A A1 DNU_A2 NC_K5 H3
HPIO10_4B/DP2_MA2 AE29 DNU_A1 NC_H3 G11
HPIO10_5A/DP2_ODT0 NC_G11
VSS_AB10
AE30 A8
VSS_W11
VSS_AB3
VSS_AB5
VSS_AB8
VSS_G12
VSS_G10
VSS_C12
VSS_D11
VSS_N11
VSS_A10
VSS_E12
VSS_K11
VSS_P12
VSS_P10
VSS_V12
VSS_Y12
VSS_T10
VSS_T12
VSS_J10
VSS_J12
HPIO10_5B/DP2_CS_N1 NC_A8
VSS_W2
VSS_W4
VSS_W9
VSS_G5
VSS_G8
VSS_G3
VSS_G1
VSS_C1
VSS_C5
VSS_C8
VSS_D2
VSS_D9
VSS_D4
VSS_N2
VSS_N9
VSS_N4
LPDDR4_A3_A
VSS_A3
VSS_E8
VSS_E5
VSS_E1
VSS_P3
VSS_K2
VSS_K4
VSS_K9
VSS_P1
VSS_V1
VSS_V5
VSS_V8
VSS_Y1
VSS_Y8
VSS_Y5
VSS_T3
VSS_T1
VSS_T5
VSS_T8
AC29
VSS_J3
VSS_J1
HPIO10_6A/DP2_MA3 AB29 LPDDR4_A4_A
HPIO10_6B/DP2_MA4 AA31 LPDDR4_CS_A
B HPIO10_7A/DP2_CS_N0 AB31 B
HPIO10_7B/DP2_MA9 AD27 LPDDR4_A5_A
A3
A10
C1
C5
C8
C12
D2
D9
D4
D11
E12
E8
E5
E1
G12
G10
G5
G8
G3
G1
P3
J10
K2
K4
K11
K9
N11
J12
J3
J1
P1
N2
N9
N4
P12
P10
T3
T1
T5
T8
T10
T12
V12
V1
V5
V8
W2
W4
W9
W11
Y1
Y8
Y12
Y5
AB3
AB5
AB8
AB10
HPIO10_8A/DP2_MA5 AC27 MT53E512M32D1ZW-046 WT:B
HPIO10_8B/DP2_MA6 AA32
HPIO10_9A/DP2_MA10 AB32
HPIO10_9B/DP2_MA11 AD26
HPIO10_10A/PCLKT10_0/PCLKRT10_0/DP2_MA7 AE26 VCCIO10
HPIO10_10B/PCLKC10_0/PCLKRC10_0/DP2_MA8 AA34 F_DDR_100MHz_P
HPIO10_11A/PCLKT10_1/PCLKRT10_1/DP2_MA12 AA33 F_DDR_100MHz_N
HPIO10_11B/PCLKC10_1/PCLKRC10_1/DP2_MA13 AE28
HPIO10_12A/VREF10/DP2_VREF10
HPIO10_12B/EXT_RES10/DP2_EXT_RES10
AE27
AD32
R290 240 Place R490, R491 &
R0201
HPIO10_13A/PLLT10_IN/DP2_PLLT10_IN
HPIO10_13B/PLLC10_IN/DP2_PLLC10_IN
AD31
AE24 LPDDR4_DQ3_B F_DDR_100MHz_P
R548 close to FPGA
HPIO10_14A/DP2_DQ03 AE25 LPDDR4_DQ2_B
HPIO10_14B/DP2_DQ02 VCC_1V80
AE31 LPDDR4_DQ11_B
HPIO10_15A/DP2_DQ11 AE32 LPDDR4_DQ10_B VCC_1V10
HPIO10_15B/DP2_DQ10 AC24 LPDDR4_DQ7_B
HPIO10_16A/DP2_DQ07
HPIO10_16B/DP2_DQ06
AB24 LPDDR4_DQ6_B HCSL
LVDS 100Mhz
HPIO10_17A/DP2_DQ15
AB33 LPDDR4_DQ15_B (Default) Y1
VCC_3V30 C510 C512
AB34 LPDDR4_DQ14_B R492 10uF 10uF C487 C489 C491 C493 C494 C496 C497
HPIO10_17B/DP2_DQ14 AC23 LPDDR4_LDQS_B_P R490 0402 0402 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
HPIO10_18A/DP2_DQS0 AD23 LPDDR4_LDQS_B_N R490 49.9 Ohms 49.9 Ohms 49.9R
NP
R537 4 6 100V 100V 100V 100V 100V 100V 100V
HPIO10_18B/DP2_DQSN0 AC34 LPDDR4_UDQS_B_P 1% 0R OUT VDD
HPIO10_19A/DP2_DQS1 AC33 LPDDR4_UDQS_B_N R491 49.9 Ohms 49.9 Ohms 0201 5 1
C632
HPIO10_19B/DP2_DQSN1 AD21 LPDDR4_DQ1_B R538 OUT# E/D
HPIO10_20A/DP2_DQ01 AD22 LPDDR4_DQ0_B R492 DNP 2K Ohms 0R 2 3
BANK 10 HPIO10_20B/DP2_DQ00 AD33 LPDDR4_DQ9_B NC GND
0.1uF
HPIO10_21A/DP2_DQ09 LPDDR4_DQ8_B R493 DNP 2K Ohms
1.1V HPIO10_21B/DP2_DQ08
AD34
Y21 LPDDR4_DQ5_B
R491
49.9R R548
R493
100 MHz
HPIO10_22A/DP2_DQ05 AA21 LPDDR4_DQ4_B R537 0 Ohm 0.1 uF 1% 0R
NP
HCSL
HPIO10_22B/DP2_DQ04 AE34 LPDDR4_DQ13_B 0201
HPIO10_23A/DP2_DQ13 AE33 LPDDR4_DQ12_B R538 0 Ohm 0.1 uF
HPIO10_23B/DP2_DQ12 AC21 LPDDR4_LDM_B
HPIO10_24A/PCLKRT10_2/DP2_DM0 AB21 R548 0 Ohm 0.1 uF
HPIO10_24B/PCLKRC10_2/DP2_ALERT_N AF33 LPDDR4_UDM_B
HPIO10_25A/PCLKRT10_3/DP2_DM1 AF34 LPDDR4_RESET
HPIO10_25B/PCLKRC10_3/DP2_RST_N F_DDR_100MHz_N
A A
LAV-AT-500-E_1156
VCC_1V10
VCC_1V10

C471 C474
C466 C469 10uF 10uF C475 C477 C479 C481 C482 C484 C486 C490 C492 C495 C498
10uF 10uF C499 C500 C502 C503 C504 C501 C505 C506 C508 C511 C467 C470 C472 0402 0402 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
0402 0402 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 100V 100V 100V 100V 100V 100V 100V 100V 100V 100V 100V Title
100V 100V 100V 100V 100V 100V 100V 100V 100V 100V 100V 100V 100V LPDDR4
5 4 3 2 1
Figure A.11. LPDDR4
FPGA-EB-02057-1.2 54
User Guide
5 4 3 2 1
VCCIO12 VCCIO12_IN VCCIO12_IN

U3M J6 J7
M14 N15 PMOD3_2
N18 VCCIO12 WRIO12_0A/UDQ120 N14 PMOD3_6
P16 VCCIO12 WRIO12_0B/UDQ121 N19 PMOD2_2 PMOD2_1 1 7 PMOD2_5 PMOD3_1 1 7 PMOD3_5
VCCIO12 WRIO12_1A
1
C33 C31 C32 C526 N17 PMOD3_8
WRIO12_1B/PCLK12_1/PCLKRT12_1 P15 PMOD3_7 PMOD2_2 2 8 PMOD2_6 R82 J23 PMOD3_2 2 8 PMOD3_6 R298 J57
1
10uF 0.1uF 0.1uF 0.1uF WRIO12_2A/UDQ122 N16 PMOD3_3 0.01 0.01
WRIO12_2B/UDQ123 Header_2x1 Header_2x1
M19 PMOD2_6 PMOD2_3 3 9 PMOD2_7 1% PMOD3_3 3 9 PMOD3_7 1%
D WRIO12_3A/UCSN12 D
2
M20 PMOD2_7
WRIO12_3B/PCLKT12_0/PCLKRT12_0/UDS12 P13 PMOD3_5 PMOD2_4 4 10 PMOD2_8 PMOD3_4 4 10 PMOD3_8
2
WRIO12_4A/UDQ124 P14 PMOD3_1
WRIO12_4B/UDQ125 P20 PMOD2_4 5 11 5 11
WRIO12_5A/UCK12P N20 PMOD2_3
BANK 12 WRIO12_5B/UCK12N
WRIO12_6A/UDQ126
R16 PMOD3_4 6 12 6 12
PMOD2_5
3.3V WRIO12_6B/UDQ127
R17
P19 PMOD2_8
WRIO12_7A/PLLT12_IN P18 PMOD2_1 PMOD 2x6 C36 PMOD 2x6 C525
WRIO12_7B/PLLTFB12_IN 10uF 10uF
0402 0402
LAV-AT-500-E_1156
VCCIO13
U3N
M13 R19
C VCCIO13 WRIO13_0A/UDQ130 FMC2_RES0 {10} C
T14 R18
VCCIO13 WRIO13_0B/UDQ131 FMC2_RES1 {10}
T16 R14
C528 C529 C527 C530 VCCIO13 WRIO13_1A R15 FMC2_SDA {10}
WRIO13_1B T18 FMC2_SCL {10}
10uF 0.1uF 0.1uF 0.1uF WRIO13_2A/UDQ132 T19 FMC2_PG_C2M {10}
WRIO13_2B/UDQ133 FMC2_PG_M2C {10}
T15
WRIO13_3A/UCSN13 FMC2_PRSNT_M2C_L {10}
U15 R345 22
WRIO13_3B/PCLKRT13_0/UDS13 U16 FMC2_TCK {10}
WRIO13_4A/UDQ134 FMC2_TDI {10}
U17
WRIO13_4B/UDQ135 W14 FMC2_TDO {10}
WRIO13_5A/UCK13P V14 RASP_IO14 FMC2_TMS {10}
WRIO13_5B/UCK13N RASP_IO17 RASP_IO14 {13}
V16
WRIO13_6A/UDQ136 RASP_IO02 RASP_IO17 {13}
V15
WRIO13_6B/UDQ137 RASP_IO03 RASP_IO02 {13}
T13
WRIO13_7A RASP_IO15 RASP_IO03 {13}
R13
BANK 13 WRIO13_7B RASP_IO15 {13}
3.3V LAV-AT-500-E_1156
B B
A A
Title
Bank-12/13 PMODs, FMC2 & Raspberry Pi
5 4 3 2 1
Figure A.12. Bank-12/13 PMODs, FMC2 & Raspberry Pi
FPGA-EB-02057-1.2 55
User Guide
5 4 3 2 1
Raspberry PI and User I/O Connector

7_SEGMENT_DISPLAY_SECTION
VCC_5V00
VCC_3V30
D JP12 JP12 & JP13 Power For JP14 JP13 D
1 2 Default Open 2 1
PI_3.3V PI_5V
JP26
1 2 RASP_5V
C600 RASP_IO02 3 1 2 4
{12} RASP_IO02 RASP_IO03 3 4
5 6 C599
{12} RASP_IO03 RASP_IO04 5 6 RASP_IO14 SEG_DP
0.1uF 7 8 R331 53.6R
{5} RASP_IO04 7 8 RASP_IO15 RASP_IO14 {12}
9 10 0.1uF
RASP_IO17 9 10 RASP_IO18 RASP_IO15 {12} SEG_A
11 12 R332 53.6R
{12} RASP_IO17 RASP_IO27 11 12 SEG_B
13 14 R333 53.6R
{5} RASP_IO27 RASP_IO22 13 14 RASP_IO23 SEG_C
15 16 R334 53.6R
{4} RASP_IO22 15 16 RASP_IO24 RASP_IO23 {5} SEG_D
17 18 R335 53.6R
RASP_IO10 17 18 RASP_IO24 {5} SEG_E
19 20 R336 53.6R
{5} RASP_IO10 RASP_IO09 19 20 RASP_IO25 SEG_F
21 22 R337 53.6R
{5} RASP_IO09 RASP_IO11 21 22 RASP_IO08 RASP_IO25 {4} SEG_G
23 24 R338 53.6R
23 24 RASP_IO07 RASP_IO08 {5}
25 26
RASP_ID_SD 25 26 RASP_ID_SC RASP_IO07 {5}
27 28
RASP_IO05 29 27 28 30
10
11
29 30
3
5
1
2
4
7
RASP_IO06 31 32 RASP_IO12
RASP_IO13 31 32 RASP_IO12 {5}
33 34
D
C
DP
B
A
F
RASP_IO19 35 33 34 36 RASP_IO16
RASP_IO26 35 36 RASP_IO20 RASP_IO16 {4}
37 38
K_DIG1
K_DIG2
K_DIG3
37 38 RASP_IO21 RASP_IO20 {4}
39 40 LDT-N2804RI
C 39 40 RASP_IO21 {4} Character Signal Map C
NC
Receptacle 20X2-DNI D60
U3 PIN D60 PIN SEGMENT
12
9
8
6
W11 3 DP
W12 5 G
K_DIG3
K_DIG2 V11 10 F
K_DIG1
W10 1 E
V13 2 D
4 C
VCCIO14 U3O V12
N12
VCCIO14 WRIO14_0A/UDQ140
V10 SEG_A
T10 7 B
U9 T10 SEG_B
U11 VCCIO14
VCCIO14
WRIO14_0B/UDQ141
WRIO14_1A
V12 SEG_C V10 11 A
C591 C592 C593 C594 V13 SEG_D
WRIO14_1B W10 SEG_E
10uF 0.1uF 0.1uF 0.1uF WRIO14_2A/UDQ142 V11 SEG_F
WRIO14_2B/UDQ143 W12 SEG_G
WRIO14_3A/UCSN14 W11 SEG_DP
WRIO14_3B/UDS14 W9 F_K_DIG1
WRIO14_4A/UDQ144 V9 F_K_DIG2
WRIO14_4B/UDQ145 U12 RASP_IO11 R106 22-DNI
B B
WRIO14_5A/PCLKRT14_0/UCK14P T12 RASP_IO18 R107 0-DNI TCK {3,5}
WRIO14_5B/UCK14N V8 RASP_IO05 R108 0-DNI TMS {3,5}
WRIO14_6A/UDQ146 W8 RASP_IO06 R105 0-DNI TDO {3,5}
WRIO14_6B/UDQ147 RASP_ID_SC TDI {3,5}
R12 R103 0-DNI
WRIO14_7A T11 RASP_ID_SD R104 0-DNI SCL {3}
WRIO14_7B T9 RASP_IO26 SDA {3}
WRIO14_8A R9 RASP_IO13
BANK 14 WRIO14_8B
WRIO14_9A
R11 RASP_IO19
F_K_DIG3
3.3V WRIO14_9B
R10
LAV-AT-500-E_1156
K_DIG1 K_DIG2 K_DIG3

Q4 Q2 Q3
R343 BC817-40-TP R339 BC817-40-TP R341 BC817-40-TP
3
3
A F_K_DIG1 1 F_K_DIG2 1 F_K_DIG3 1 A
2
2
330R 330R 330R
R344 4.7K R340 4.7K R342 4.7K
Title
Bank-14 Segment Display & Raspberry Pi
5 4 3 2 1
Figure A.13. Bank-14 Segment Display & Raspberry Pi
FPGA-EB-02057-1.2 56
User Guide
5 4 3 2 1
J65
1 2
JP60 VCCIO3_IN
J58
1 2 VCC_1V20 3 VCCIO3
VCC_3V30 VCCIO0 2 R137 0.01
1 0603 1%
VCC_1V80
R139 0.01
0603 1%
3-PIN
J59 Default = 1-2

1 2
VCC_3V30 VCCIO1_IN VCCIO1
J66
D D
R536 0 0.01 R143 1 2
JP59 VCCIO4_IN
1% 0603
VCC_1V20 3 VCCIO4
J60 2 R142 0.01
1 2 VCC_1V80 1 0603 1%
VCC_3V30 VCCIO2
R140 0.01 3-PIN

0603 1%
Default = 1-2
J61
1 2 J67
VCC_1V10 VCCIO10 1 2
JP58 VCCIO5_IN
R382 0.01 3
VCC_1V20 VCCIO5
0603 1% 2 R147 0.01
VCC_1V80 1 0603 1%
J62
1 2
VCC_1V10 VCCIO11 3-PIN
R385 0.01 Default = 1-2

0603 1%
J68
1 2 DEFAULT SETTINGS:
JP61
3
VCCIO7_IN
JP31 = OPEN
VCC_1V20 VCCIO7
J63 2 R378 0.01 JP32 = OPEN
1 2 1 0603 1% VCC_0V90
VCC_3V30 VCCIO13 VCC_1V80 JP33 = OPEN
3-PIN
JP31 JP34 = OPEN
R391 0.01
0603 1% VCC_1V00 JP35 = OPEN
Default = 1-2
C
JP32
JP36 = CLOSED C
VCC_1V10 J71
1 2
JP33 VCCIO6_IN VCCIO6
J69
1 2 VCC_1V35 R353 0.01
JP62 VCCIO8_IN 0603 1%
3 JP34
VCC_1V20 VCCIO8
J64 2 R370 0.01
1 2 1 0603 1% VCC_1V50
VCC_3V30 VCCIO14 VCC_1V80
JP35
R395 0.01 3-PIN
0603 1% VCC_1V80
Default = 1-2
JP36
J70
1 2
JP63 VCCIO9_IN
VCC_1V20 3 VCCIO9
2 R374 0.01
1 0603 1%
VCC_1V80 DEFAULT SETTINGS:
3-PIN
VCC_1V20
JP47 = OPEN
Default = 1-2 JP47 JP48 = OPEN
VCC_1V80 JP49 = OPEN
JP50 = CLOSED
JP48
VCC_2V50 J72
B B
1 2
JP49 VCCIO12_IN VCCIO12
VCC_3V30 R387 0.01

0603 1%
JP50
A A
VCCIO0 VCCIO1 VCCIO2 VCCIO3 VCCIO4 VCCIO5 VCCIO6 VCCIO7
VCCIO0 VCCIO1 VCCIO2 VCCIO3 VCCIO4 VCCIO5 VCCIO6 VCCIO7
GND1 GND2 GND3 GND4 GND5 J31 J32 J33

GND GND GND
1
1 1 1 Lattice Semiconductor Applications

VCCIO8 VCCIO9 VCCIO10 VCCIO11 VCCIO12 VCCIO13 VCCIO14
VCCIO8 VCCIO9 VCCIO10 VCCIO11 VCCIO12 VCCIO13 VCCIO14
Title
spread across board, easy access,thermal relief Bank Power
5 4 3 2 1
Figure A.14. Bank Power
FPGA-EB-02057-1.2 57
User Guide
5 4 3 2 1
J73 VCCORE VCCBAT_1V50 VCCPLL_0V82

1 2 J77
VCC_0V82 VCC_CORE VCCAPLLW VCCA_PLLW 1 2
R152 0.001
VCC_CORE = 0.82 V N22
U3R
M16
VCCA_PLLW_IN
FB22
1206 1% N24 VCC VCC_BAT P12 R267 1R 0402
C138 C139 C140 C142 C143 C144 C145 C146 C147 C148 C149 C150 C151 C152 R22 VCC VCCA_PLL_W AA23 0603 1% BLM15AX601SN1D
D C613 C612 R24 VCC VCCA_PLL10 AA13 D
VCC VCCA_PLL4 Y16
10uF
10uF
10uF
T20
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
22uF 22uF C291
0402 0402 T22 VCC VCCA_PLL7 W18 C288
U13 VCC VCCAUX Y12 0.1uF 10nF
U19 VCC VCCAUX Y22
U21 VCC VCCAUX P11
W17 VCC VCCAUXA N21 VCCPLL_0V82
Y14 VCC VCCCLK P21 J78
VCC VCCCLK R20 VCCAPLL10 VCCA_PLL10 1 2
VCCCLK V17 VCCA_PLL10_IN
VCCCLK V19 FB25
VCCCLK V21 R539 1R 0402
VCCCLK W13 0603 1% BLM15AX601SN1D
VCCCLK W15
VCCCLK AA12 C290
VCCHP AA22 C293
VCCHP W20 0.1uF 10nF
VCCHP Y15
VCCHP Y19
J74 VCCHP
VCCPLL_0V82 1 2 VCCHP LAV-AT-500-E_1156 J79 VCCPLL_0V82
VCC_HP_IN VCC_HP VCCAPLL4 VCCA_PLL4 1 2
VCCA_PLL4_IN
R153 0.01 FB26
C C
FB15 0603 1% R540 1R 0402
BLM31KN121SN1L 0603 1% BLM15AX601SN1D
C163 C403 C402 C164 C165 C166 C167 C404
10uF
10uF
10uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
C289
C287
0.1uF 10nF
VCCAPLL7 J80 VCCPLL_0V82

1 2
VCCA_PLL7 VCCA_PLL7_IN
FB27
R541 1R 0402
J75 0603 1% BLM15AX601SN1D
VCC_0V82 1 2 VCCCLK
VCC_CLK_IN VCC_CLK C292
C717
R155 1R 0.1uF 10nF
FB17 0603 1%
MPZ1005S121CT000
C168 C169 C405 C171 C172 C173 C174 C175 C176 C177 C178
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
10uF
10uF
10uF
B J76 B
VCCAUX 1 2 VCC_1V80
VCC_AUX VCC_AUX_IN
R154 0.1
0603 1% FB16
C396 C397 MPZ1005S121CT000
C398 C399 C400 C401 10uF 10uF
0402 0402
0.1uF
0.1uF
0.1uF
0.1uF
A A
Title
Power Decoupling
5 4 3 2 1
Figure A.15. Power Decoupling
FPGA-EB-02057-1.2 58
User Guide
5 4 3 2 1
VCC_3V30 VCC_3V30
R447 R453
VCC_5V00 330R VCC_5V00 330R
Output = 0.90V Output = 1.35V
U40 U41
3 6 VCC_0V90 3 6 VCC_1V35
VIN BST VIN BST
C661
C658 L19 1uH D68
C665
C662 L20 D69
0.1uF 0V90 0.1uF 2.2uH 1V35
2 2
R448 SW SRP4020TA-1R0M R454 SW SRP4020TA-2R2M
18.2 k 18.2 k
10uF
10uF
R450 C659 C660 R456 C663 C664
D D
1% 1.33K 22uF 22uF 1% 6.98K 22uF 22uF
0603 10V 10V R446 0603 10V 10V R452
3
5 4 0603 0603 10K 5 4 0603 0603 10K
EN FB 1 EN FB 1
Q13 Q14
2
R449 R451 BC817-40-TP R455 R457 BC817-40-TP
12.7 k
5V-0.9V 0603 10K 12.7 k
5V-1.35V 0603 10K
1% 1%
1 1
GND GND
AP62201WU-7 AP62201WU-7
VCC_3V30 VCC_3V30
R169 R444
VCC_5V00 330R VCC_5V00 330R
U17 U39
3 6 VCC_1V00 3 6 VCC_1V50
VIN BST VIN BST
C388
C385 L8 D61
C656
C657 L18
0.1uF 1.5uH 1V00 0.1uF 2.2uH D67
2 2 1V50
R233 SW R441 SW SRP4020TA-2R2M
18.2 k SRP4020TA-1R5M 18.2 k
10uF
10uF
R231 C386 C387 R445 C654 C655
C 1% 2.61K 22uF 22uF 1% 8.87K 22uF 22uF C
0603 10V 10V R229 0603 10V 10V R443
3
5 4 0603 0603 10K 5 4 0603 0603 10K
EN FB 1 EN FB 1
Q7 Q12
2
R234 R232 BC817-40-TP R440 R442 BC817-40-TP
12.7 k
5V-1V 0603 10K 12.7 k
5V-1.5V 0603 10K
1% 1%
1 1
GND GND
AP62201WU-7 AP62201WU-7
VCC_3V30 VCC_3V30
R417 R427
VCC_5V00 330R VCC_5V00 330R
U35 U36
3 6 VCC_1V10 3 6 VCC_1V80
VIN BST VIN BST
C641
C638 L15
C644
C645 L5
0.1uF 1.5uH D63 0.1uF 3.3uH D64
2 1V10 2 1V80
R418 SW R422 SW
18.2 k SRP4020TA-1R5M 18.2 k SRP4020TA-3R3M
10uF
10uF
R420 C639 C640 R425 C642 C643
1% 3.83K 22uF 22uF 1% 12.7K 22uF 22uF
B B
0603 10V 10V R416 0603 10V 10V R426
3
3
5 4 10K 5 4 10K
EN FB 0603 0603 EN FB 0603 0603
1 1
Q8 Q9
2
2
R419
12.7 k
5V-1.1V 0603
R421
10K
BC817-40-TP R423
12.7 k
5V-1.8V 0603
R424
10K
BC817-40-TP
1% 1%
1 1
GND GND
AP62201WU-7 AP62201WU-7
VCC_3V30 VCC_3V30
R433 R439
VCC_5V00 330R VCC_5V00 330R
U37 U38
3 6 VCC_1V20 3 6 VCC_2V50
VIN BST VIN BST
C648
C649 L16
C652
C653 L17
0.1uF 2.2uH D65 0.1uF 3.3uH D66
2 1V20 2 2V50
R428 SW SRP4020TA-2R2M R434 SW
18.2 k 18.2 k SRP4020TA-3R3M
10uF
10uF
R431 C646 C647 R437 C650 C651

1% 5.11K 22uF 22uF 1% 21.5K 22uF 22uF
A 0603 10V 10V R432 0603 10V 10V R438 A
3
3
5 4 10K 5 4 10K
EN FB 0603 0603 EN FB 0603 0603
1 1
Q10 Q11
2
2
R429
12.7 k
5V-1.2V 0603
R430
10K
BC817-40-TP R435
12.7 k
5V-2.5V 0603
R436
10K
BC817-40-TP
1% 1%
1 1
GND GND Email: techsupport@Latticesemi.com
AP62201WU-7 AP62201WU-7
Title
Power Supplies 1
5 4 3 2 1
Figure A.16. Power Supplies 1
FPGA-EB-02057-1.2 59
User Guide
5 4 3 2 1
Output = 5.00V
12V INPUT VCC_12V00 C674
694106301002 F2 SW6 0.1uF
J50 U43 VCC_5V00
D D
1 1 2 6 13
3 SPST 4 VIN BOOT L21 4.7uH
PRK22J5DBBNN 5 PVIN1 11
F1251CT-ND PVIN2 LX1 12 NR8040T4R7N
2
FUSE BRD MNT 10A 125VAC/VDC SMD C713 C714 PS_EN LX2
22uF 22uF R519 10 1%
3.7K EN 14 0603 R467
25V 25V PGOOD 7 100K R510
V12P10-M3/86A
0805 0805 FB
D52 1K
R466 0603 1 8 R463 1%
100K 1% RT/SYNC COMP 2 4.3K 0603 0.5% R464 C675 C676
GND 3 0603 176K 22uF 22uF
D74 C677 9 GND 15 C672 C673
SS/TR EPAD 10V 10V
12V00 10nF 180pF 8.2nF 0603 0603
RT7298AHGQW 50V 25V D73
5V00
12V to 5V
R465
1% 24K
0603
VCC_5V00
U34
3 6 VCC_3V30 VCC_3V30
VIN BST
C634 L4 Output = 3.30V
0.1uF 3.3uH
C637 2 R546
10uF R412 SW 330R
C 16V 18.2 k SRP4020TA-3R3M C
0603 R414 C635 C636
1% 31.6K 22uF 22uF R411
0603 10V 10V 330R
5 4
EN FB 0603 0603
D75
PLL_0V82
D62
R413 R415
12.7 k
5V-3.3V 0603 10K
3V30
Output = 0.82V
1%
VCCPLL_0V82 R547
3
1 VCC_3V30 10K
GND 1
AP62201WU-7
Q24
2
C719
BC817-40-TP
U44 R544
C720 VCC_1V20 4 1 30.1
0.1uF BIAS OUT 1%
EPAD
10V 6 0603
10uF
GND
3 IN 2
EN ADJ/NC
C718
NCP133
5
7
R545
1K
1%
10uF
0603
VCC_5V00
R477
10K U42_PG
VCC_3V30
B B
MAX_PGOOD
R472 C689 R475
4.7 0.47uF 330R
0603 16V
C682
1% R468 0.1uF R471 0603
0603 10 U42 1 1%
A6 A1 D70
PGOOD BST C683 Output = 0.82V 0V82
SRP5020C-R15Y
D4 4.7nF
A5 AIN L22
IN 10V
B5 0.15uH
C5 IN__1 A2
C666
C668
VCC_0V82
D5 IN__2 LX A3 R474
3
C680 C681 C678 C679 IN__3 LX__1 A4 10K
22uF 22uF 22uF 22uF LX__2 B2 1
LX__3 B4
10uF
10uF
LX__4 C2 C684 C685 C686 C687 C688 Q15
2
D6 LX__5 C4 1% R469 150uF 150uF 150uF 150uF 10uF BC817-40-TP
EN LX__6 0603 1.78K 1210 1210 1210 1210
B6
NC
B7
FB
C6
5V-0.82V
SKIP A7 R470
GSNS 1% 4.87K
B1 0603
C7 GND B3
SS/REFIN GND C1
GND C3
C690 GND D1
0.1uF GND D2
D7 GND D3
COMP GND
A A
MAX15118EWIT
R473
470R R489
1% 2.94K
0603
16V C711
0603 22pF
16V C712
0603 6.8nF
Title
Power Supplies 2
5 4 3 2 1
Figure A.17. Power Supplies 2
FPGA-EB-02057-1.2 60
User Guide
5 4 3 2 1
U3T U3S U3P U3U U3Q

D32 H5 A1 B8 M25 N26 K30 R26 M3 L26
D33 VSS VSS H6 A2 VSS VSS B9 N27 VSS VSS P26 K31 VSS VSS R27 L3 NC1 NC61 R34
E2 VSS VSS H8 A3 VSS VSS B11 N29 VSS VSS J33 K32 VSS VSS R29 M1 NC2 NC62 P34
E4 VSS VSS H9 A4 VSS VSS B12 P25 VSS VSS J32 K33 VSS VSS R31 L1 NC3 NC63 R32
E7 VSS VSS H11 A7 VSS VSS B14 T27 VSS VSS J27 K34 VSS VSS R33 J3 NC4 NC64 P32
E10 VSS VSS H12 A10 VSS VSS B15 T29 VSS VSS J26 L2 VSS VSS T2 H3 NC5 NC65 M34
E13 VSS VSS H14 A13 VSS VSS B17 N31 VSS VSS J20 L4 VSS VSS T4 J1 NC6 NC66 L34
D E16 VSS VSS H15 A16 VSS VSS B18 N33 VSS VSS J21 L19 VSS VSS T17 H1 NC7 NC67 M32 D
E19 VSS VSS H17 A19 VSS VSS B20 P23 VSS VSS J14 L21 VSS VSS T21 F3 NC8 NC68 L32
E22 VSS VSS H18 A22 VSS VSS B21 T31 VSS VSS J15 L23 VSS VSS T23 E3 NC9 NC69 R30
E25 VSS VSS H20 A25 VSS VSS B23 T33 VSS VSS J9 L25 VSS VSS T28 F1 NC10 NC70 P30
E28 VSS VSS H21 A28 VSS VSS B24 F31 VSS VSS J8 L27 VSS VSS T30 E1 NC11 NC71 R28
E31 VSS VSS H23 A31 VSS VSS B26 F34 VSS VSS K5 L29 VSS VSS T32 C3 NC12 NC72 P28
E34 VSS VSS H24 A34 VSS VSS B27 H31 VSS VSS L5 L31 VSS VSS T34 B3 NC13 NC73 M30
F2 VSS VSS H26 AA6 VSS VSS B29 H34 VSS VSS L14 L33 VSS VSS U14 C1 NC14 NC74 L30
F4 VSS VSS H27 AB2 VSS VSS B30 K25 VSS VSS L13 M2 VSS VSS U18 B1 NC15 NC75 M28
F5 VSS VSS H29 AB8 VSS VSS B32 K29 VSS VSS K7 M4 VSS VSS U20 M6 NC16 NC76 L28
F6 VSS VSS H30 AB11 VSS VSS B33 M23 VSS VSS G4 M5 VSS VSS V6 G5 NC17 NC77 J30
F8 VSS VSS H32 AB23 VSS VSS C2 B31 VSS VSS G2 M11 VSS VSS U10 G6 NC18 NC78 A33
F9 VSS VSS H33 AC18 VSS VSS C4 B34 VSS VSS D4 M15 VSS VSS V18 E5 NC19 NC79 A32
F11 VSS VSS J2 AC22 VSS VSS C7 D31 VSS VSS D2 M17 VSS VSS V20 E6 NC20 NC80 C33
F12 VSS VSS J4 AC32 VSS VSS C10 D34 VSS VSS N4 M18 VSS VSS V24 G8 NC21 NC81 C32
F14 VSS VSS J5 AD13 VSS VSS C13 J29 VSS VSS N2 M22 VSS VSS W3 G9 NC22 NC82 A30
F15 VSS VSS J7 AD25 VSS VSS C16 L24 VSS VSS L6 M24 VSS VSS W16 E8 NC23 NC83 A29
F17 VSS VSS J10 AD28 VSS VSS C19 F25 VSS VSS K13 M26 VSS VSS W19 E9 NC24 NC84 C30
F18 VSS VSS J13 AE16 VSS VSS C22 F28 VSS VSS K12 M27 VSS VSS W21 C5 NC25 NC85 C29
F20 VSS VSS J16 AF8 VSS VSS C25 H25 VSS VSS K10 M29 VSS VSS W28 C6 NC26 NC86 E33
F21 VSS VSS J19 AG3 VSS VSS C28 H28 VSS VSS K4 M31 VSS VSS W32 A5 NC27 NC87 E32
F23 VSS VSS J22 AG22 VSS VSS C31 K22 VSS VSS K2 M33 VSS VSS Y13 A6 NC28 NC88 G33
F24 VSS VSS J23 AH11 VSS VSS C34 M21 VSS VSS L15 N1 VSS VSS Y23 C8 NC29 NC89 G32
F26 VSS VSS J25 AH19 VSS VSS D1 B25 VSS VSS J11 N3 VSS VSS Y25 C9 NC30 NC90 E30
C VSS VSS VSS VSS VSS VSS VSS VSS NC31 NC91 C
F27 J28 AH28 D3 B28 D10 N9 A8 E29
F29 VSS VSS J31 AH32 VSS VSS D5 D25 VSS VSS D7 N13 VSS A9 NC32 NC92 G30
F30 VSS VSS J34 AJ8 VSS VSS D6 D28 VSS VSS B10 N23 VSS J6 NC33 NC93 G29
F32 VSS VSS K1 AJ14 VSS VSS D8 L22 VSS VSS B7 N25 VSS G11 NC34 NC94 J24
F33 VSS VSS K3 AJ25 VSS VSS D9 F19 VSS VSS L16 N28 VSS G12 NC35 NC95 A27
G1 VSS VSS K6 AL3 VSS VSS D11 F22 VSS VSS K16 N30 VSS E11 NC36 NC96 A26
G3 VSS VSS K8 AL32 VSS VSS D12 H19 VSS VSS H10 N32 VSS E12 NC37 NC97 C27
G7 VSS VSS K9 AM7 VSS VSS D14 H22 VSS VSS H7 N34 VSS G14 NC38 NC98 C26
G10 VSS VSS K11 AM12 VSS VSS D15 L20 VSS VSS F10 P17 VSS G15 NC39 NC99 A24
G13 VSS VSS K14 AM15 VSS VSS D17 B19 VSS VSS F7 P22 VSS E14 NC40 NC100 A23
G16 VSS VSS K15 AM19 VSS VSS D18 B22 VSS VSS L17 P24 VSS E15 NC41 NC101 C24
G19 VSS VSS K17 AM22 VSS VSS D20 D19 VSS VSS D16 P27 VSS C11 NC42 NC102 C23
G22 VSS VSS K18 AN27 VSS VSS D21 D22 VSS VSS D13 P29 VSS C12 NC43 NC103 E27
G25 VSS VSS K20 AP1 VSS VSS D23 K19 VSS VSS B16 P31 VSS A11 NC44 NC104 E26
G28 VSS VSS K21 AP34 VSS VSS D24 F13 VSS VSS B13 P33 VSS A12 NC45 NC105 G27
G31 VSS VSS K23 B2 VSS VSS D26 F16 VSS VSS L18 R21 VSS C14 NC46 NC106 G26
G34 VSS VSS K24 B4 VSS VSS D27 H13 VSS VSS J17 R23 VSS C15 NC47 NC107 E24
H2 VSS VSS K26 B5 VSS VSS D29 VSS VSS H16 R25 VSS A14 NC48 NC108 E23
H4 VSS VSS K27 B6 VSS VSS D30 VSS VSS LAV-AT-500-E_1156 A15 NC49 NC109 G24
VSS VSS K28 VSS VSS J12 NC50 NC110 G23
LAV-AT-500-E_1VSS
156 LAV-AT-500-E_1156 LAV-AT-500-E_1156 G17 NC51 NC111 J18
G18 NC52 NC112 A21
E17 NC53 NC113 A20
E18 NC54 NC114 C21
B B
G20 NC55 NC115 C20
G21 NC56 NC116 A18
E20 NC57 NC117 A17
E21 NC58 NC118 C18
C17 NC59 NC119
NC60
LAV-AT-500-E_1156
A A
Title
Ground
5 4 3 2 1
Figure A.18. Ground
FPGA-EB-02057-1.2 61
User Guide
5 4 3 2 1
D D
C C
B B
A A

Title
Power Block Diagram
5 4 3 2 1
Figure A.19.Power Block Diagram
FPGA-EB-02057-1.2 62
User Guide
Appendix B. Avant Evaluation Board Bill of Materials

Item Reference Qty Part PCB Comments Part Number Manufacturer Description
Footprint
1 VREFB1,B4_VREFA,B5_VREFB,6T,B8_VREFA, 10 VTTVREF TP_50 DNL — — Test Points
B9_VREFB,10T,VFMC1_3V30,VFMC2_3V30,ST
2 C1,C2,C3,C4,C7,C8,C10,C11,C12,C13,C16,C20, 100 0.1uF C0201 — GRM033R61E104KE14J Murata CAP CER 0.1UF 25V
C24,C31,C32,C38,C39,C40,C42,C43,C44,C46, Electronics 10% X5R 0201
C48,C56,C57,C58,C65,C66,C99,C100,C142,
C143,C144,C145,C146,C147,C148,C149,C150,
C151,C152,C164,C165,C166,C167,C171,C172,
C173,C174,C175,C176,C177,C178,C289,C290,
C291,C292,C398,C399,C400,C401,C404,C526,
C527,C529,C530,C531,C532,C533,C535,C536,
C537,C538,C539,C540,C541,C542,C544,C545,
C546,C548,C561,C564,C579,C580,C584,C587,
C588,C589,C590,C592,C593,C594,C596,C597,
C598,C599,C600,C625,C629
3 C5 1 4.7uF C0603 — ECJ-1VB0J475K Panasonic CAP CER 4.7UF 6.3V
Electronic 10% X5R 0603
Components
4 C6,C9 2 4.7uF C0603 — ECJ-1VB0J475K Panasonic CAP CER 4.7UF 6.3V
Electronic 10% X5R 0603
Components
5 C14 1 10uF C0402 — CL05A106MP8NUB8 Samsung CAP CER 10UF 10V
Electro- X5R 0402
Mechanics
6 C15,C21,C22,C26,C27 5 0.1uF C0201 — GRM033R61E104KE14J Murata CAP CER 0.1UF 25V
Electronics 10% X5R 0201
7 C17,C18 2 18pF C0402 — C0402C180K3GACTU Kemet CAP CER 18PF 25V
10% NP0 0402
8 C19,C33,C37,C41,C55,C64,C528,C534,C543, 19 10uF C0402 — CL05A106MP8NUB8 Samsung CAP CER 10UF 10V
C547,C586,C591,C595,C614,C615,C616,C617, Electro- X5R 0402
C618,C619 Mechanics
9 C23 1 0.1uF C0201 — GRM033R61E104KE14J Murata CAP CER 0.1UF 25V
Electronics 10% X5R 0201
10 C25 1 1uF C0603 — TMK107B7105KA-T Taiyo Yuden CAP CER 1UF 25V 10%
X7R 0603
FPGA-EB-02057-1.2 63
User Guide
Footprint
11 C36,C396,C397,C466,C469,C471,C474,C483, 14 10uF C0402 — C1005X5R0J106M050BC TDK CAP CER 10UF 6.3V
C485,C488,C510,C512,C525,C631 Corporation 20% X5R 0402
12 C45,C47,C558,C560 4 10uF C1206 — TMK316BJ106KL-T Taiyo Yuden CAP CER 10UF 25V
X5R 1206
13 C49,C50,C51,C103,C104,C556,C557,C565,C622, 14 22uF C0603 — GRM188R61A226ME15D Murata CAP CER 22UF 10V
C630,C678,C679,C680,C681 Electronics X5R 0603
14 C52,C101,C559,C624 4 0.1nF C0603 — CC0603JRNPO9BN101 Yageo CAP CER 100PF 50V
C0G/NPO 0603
15 C53,C102,C562,C628 4 1uF C0603 — TMK107B7105KA-T Taiyo Yuden CAP CER 1UF 25V 10%
X7R 0603
16 C54,C105,C563,C627 4 3.3nF C0201 — GRM033R71E332KA12D Murata CAP CER 3300PF 25V
Electronics X7R 0201
17 C97,C98,C623,C626 4 10uF 25V C1206 — TMK316BJ106KL-T Taiyo Yuden CAP CER 10UF 25V
1206 X5R 1206
18 C138,C139,C140,C163,C168,C169,C402,C403, 11 10uF C0402 — CL05A106MP8NUB8 Samsung CAP CER 10UF 10V
C405,C620,C621 Electro- X5R 0402
Mechanics
19 C287,C288,C293,C717 4 10nF C0402 — GRM155R60J103KA01D Murata CAP CER 10000PF 6.3V
20 C385,C632,C634,C638,C645,C649,C653,C657, 13 0.1uF cap0402 — GRM155R71H104KE14J Murata CAP CER 0.1UF 50V
C658,C662,C674,C682,C690 Electronics X7R 0402
21 C386,C387,C635,C636,C639,C640,C642,C643, 20 22uF C0603 — CL10A226MP8NUNE Samsung CAP CER 22UF 10V
C646,C647,C650,C651,C654,C655,C659,C660, Electro- X5R 0603
C663,C664,C675,C676 Mechanics
22 C388,C641,C644,C648,C652,C656,C661,C665, 13 10uF cap0805 — C2012X5R1E106M085AC TDK CAP CER 10UF 25V
C666,C668,C688,C718,C719 Corporation X5R 0805
23 C465,C467,C468,C470,C472,C473,C475,C476, 39 0.1uF C0201 — GRM033R61A104KE15D Murata CAP CER 0.1UF 10V
C477,C478,C479,C480,C481,C482,C484,C486, Electronics X5R 0201
C487,C489,C490,C491,C492,C493,C494,C495,
C496,C497,C498,C499,C500,C501,C502,C503,
C504,C505,C506,C507,C508,C509,C511
24 C612,C613 2 22uF C0402 — CM05X5R226M06AH080 KYOCERA AVX CAP CER 22UF 6.3V
X5R 0402
25 C637 1 10uF C0603 — EMK107BBJ106MA-T Taiyo Yuden CAP CER 10UF 16V
X5R 0603
26 C672 1 180pF C0402 — 04025C181KAT2A KYOCERA AVX CAP CER 180PF 50V
X7R 0402
FPGA-EB-02057-1.2 64
User Guide
Footprint
27 C673 1 8.2nF C0402 — GRM155R71E822KA01D Murata CAP CER 8200PF 25V
28 C677 1 10nF C0402 — CC0402KRX7R7BB103 YAGEO CAP CER 10000PF 16V
X7R 0402
29 C683 1 4.7nF C0402 — LMK105SD472KV-F Taiyo Yuden CAP CER 4700PF 10V
0402
30 C684,C685,C686,C687 4 150uF C1210 — CL32A157MQVNNNE Samsung CAP CER 150UF 6.3V
Electro- X5R 1210
Mechanics
31 C689 1 0.47uF C0402 — GMC04X5R474K25NT CAL-CHIP CAP CER 0.47UF 25V
ELECTRONICS, X5R 0402
INC.
32 C711 1 22pF C0603 — 0603YA220KAT2A KYOCERA AVX CAP CER 22PF 16V
NP0 0603
33 C712 1 6.8nF C0603 — 0603YC682KAT2A KYOCERA AVX CAP CER 6800PF 16V
X7R 0603
34 C713,C714 2 22uF C0805 — CC0805MKX5R8BB226 Yageo CAP CER 22UF 25V
X5R 0805
35 C720 1 0.1uF C0402 — GRM155R61A104KA01J Murata CAP CER 0.1UF 10V
36 TP_Y1,TP_AA1,TP_AM2,TP_AL2,TP_AH2,TP_AJ 11 TestPoint TP50 DNL — — Test Points
3,TP_Y5,TP_AA5,TP_AA10,INIT,DONE
37 D1,D5,D6,D7,D8,D9,D10,D11,D12,D13 10 GREEN APT1608 — 150060GS75000 Wurth LED GREEN CLEAR
Electronik 0603 SMD
38 D3 1 ESDR0502N UDFN6_0 — ESDR0502NMUTBG onsemi TVS DIODE 5.5VWM
-UDFN6 40 6UDFN
39 D4 1 RED LED0603 — 150060RS75000 Wurth LED RED CLEAR 0603
Electronik SMD
40 D22,D23,D24,D25,D26,D27,D28,D29 8 RED LED0603 — 150060RS75000 Wurth LED RED CLEAR 0603
Electronik SMD
41 D52 1 V12P10- TO-277A — V12P10-M3/86A Vishay General DIODE SCHOTTKY
M3/86A Semiconductor 100V 12A TO277A
- Diodes
Division
42 D60 1 LDT- display_1 — LDT-N2804RI Lumex DISPLAY 7SEG 0.28"
N2804RI 2P-PTH Opto/Compon TRP RED 12DIP
ents Inc.
FPGA-EB-02057-1.2 65
User Guide
Footprint
43 D61 1 1V00 led_0603 — SML-D12M8WT86 Rohm LED GREEN DIFFUSED
Semiconductor 0603 SMD
55 D75 1 PLL_0V82 led_0603 — SML-D12M8WT86 Rohm LED GREEN DIFFUSED
56 FB1,FB2,FB3,FB16,FB17 5 MPZ1005S FB0402 — MPZ1005S121CT000 TDK FERRITE BEAD 120
121CT000 Corporation OHM 0402 1LN
57 FB4,FB24 2 FBMH2016 806 — FBMH2016HM121NT Taiyo Yuden FERRITE BEAD 120
HM121NT OHM 0806 1LN
58 FB15 1 BLM31KN1 FB1206 — BLM31KN121SN1L Murata FERRITE BEAD 120
21SN1L Electronics OHM 1206 1LN
59 FB22,FB25,FB26,FB27 4 BLM15AX6 402 — BLM15AX601SN1D Murata FERRITE BEAD 600
01SN1D Electronics OHM 0402 1LN
60 F1_ADJ,1V,F2_ADJ,5V,GND6,GND7,GND8, 52 T POINT R TP DNL — — —
GND9,0V9,TP_AP10,TP_AL10,GND10,TP_AP11,
TP_AL11,GND11,1V1,TP_AP12,TP_AN12,
FPGA-EB-02057-1.2 66
User Guide
Footprint
TP_AK12,GND12,1V2,12V,TP_AP13,TP_AN13,
TP_AM13,TP_AL13,TP_AK13,GND13,TP_AK14,
TP_AH14,TP_AG14,GND14,TP_AK15,TP_AH15,
TP_AG15,TP_AF15,TP_AE15,TP_AD15,GND15,
1V5,TP_AK16,TP_AJ16,TP_AF16,1V8,2V5,3V3,
0V82,F1_3V3AUX,F1_3V3,1V35,F2_3V3AUX,
F2_3V3
61 F2 1 F1251CT- 154010 — 0154010.DR Littelfuse Inc. FUSE BRD MNT 10A
ND 125VAC/VDC SMD
62 GND1,GND2,GND3,GND4,GND5 5 TestPoint_ TP DNL — — Square test point,
Hole 40mil inner diameter,
63mil outer diameter
63 JP1,JP2,JP3,JP4,JP5,JP6,JP7,JP8,JP17,JP43,JP44, 13 JUMPER Header_1 — — — Regular 100mil Header
JP45,JP46 x2
64 JP12,JP13 2 JUMPER- Header_1 DNL — — Regular 100mil Header
DNI x2
65 JP25,JP28 2 3-PIN HDR254M Default : PEC03SAAN Sullins CONN HEADER VERT
-1X3 Pin 2 & 3 Connector 3POS 2.54MM
Solutions
66 JP58,JP59,JP60,JP61,JP62,JP63,JP65 7 3-PIN HDR254M Default : PEC03SAAN Sullins CONN HEADER VERT
-1X3 Pin 1 & 2 Connector 3POS 2.54MM
Solutions
67 JP64 1 3-PIN HDR254M — PEC03SAAN Sullins CONN HEADER VERT
-1X3 Connector 3POS 2.54MM
Solutions
68 JP26 1 Receptacle HDR254- DNL — — —
20X2-DNI 2X20_soc
ket
69 JP31,JP32,JP33,JP34,JP35,JP36,JP37,JP38,JP39, 19 J-2 Pin 0p1_2- — 0022284020 Molex CONN HEADER VERT
JP40,JP41,JP42,JP47,JP48,JP49,JP50,JP51,JP52, Jumper Pin_TH 2POS 2.54MM
JP66
70 J1 1 Header 1x8 hdr_amp_ — 0022284081 Molex CONN HEADER VERT
87220_8_ 8POS 2.54MM
1x8_100
71 J2 1 USB_MINI_ USB_MINI — 1734035-2 TE Connectivity CONN RCPT USB2.0
B _B- AMP MINI B SMD R/A
1734035- Connectors
2
FPGA-EB-02057-1.2 67
User Guide
Footprint
72 J3,J10,J53 3 Header_2x Header_2 — — — Regular 100mil Header
7 x7
73 J6,J7 2 PMOD 2x6 PPPC062L — PPPC062LJBN-RC Sullins CONN HDR 12POS 0.1
JBN-RC Connector GOLD PCB R/A
Solutions
74 J23,J57 2 Header_2x Header_2 — — — Regular 100mil Header
1 x1
75 J31,J32,J33 3 GND TUR_TH — 1573-2 Keystone TERM TURRET SINGLE
Electronics L=4.72MM TIN
76 J48,J54 2 ASP- ASP- — ASP-134486-01 Samtec Inc. CONN ARRAY RCPT
134486-01 134486- 400POS SMD GOLD
01
77 J50 1 694106301 69410630 — 694106301002 Würth CONN PWR JACK
002 1002 Elektronik 2.1X5.5MM SOLDER
78 J58,J59,J60,J61,J62,J63,J64,J65,J66,J67,J68,J69, 23 J- Header_2 — — — Regular 100mil Header
J70,J71,J72,J73,J74,J75,J76,J77,J78,J79,J80 Header_2x X1_100MI
1 L
79 L1,L10,L13,L14 4 2.2uH SPM6530 — SPM6530T-2R2M TDK FIXED IND 2.2UH 8.2A
SPM6530T- T-2R2M Corporation 19 MOHM SMD
2R2M
80 L4,L5,L17 3 3.3uH SRP4020T — SRP4020TA-3R3M Bourns Inc. FIXED IND 3.3UH 3.5A
A-3R3M 76 MOHM SMD
81 L8,L15 2 1.5uH SRP4020T — SRP4020TA-1R5M Bourns Inc. FIXED IND 1.5UH 4.5A
A-1R5M 42 MOHM SMD
82 L16,L18,L20 3 2.2uH SRP4020T — SRP4020TA-2R2M Bourns Inc. FIXED IND 2.2UH 4A
A-2R2M 61 MOHM SMD
83 L19 1 1uH SMD — SRP4020TA-1R0M Bourns Inc. FIXED IND 1UH 5A 27
MOHM SMD
84 L21 1 4.7uH 8mmx8m — NR8040T4R7N Taiyo Yuden FIXED IND 4.7UH 4.1A
m 23.4MOHM SM
85 L22 1 0.15uH SMD — SRP5020C-R15Y Bourns Inc. FIXED IND 150NH 18A
4 MOHM SMD
86 VFMC1_ADJ,VCCIO1,PB1,VFMC2_ADJ,VCCIO2, 31 TestPoint_ TPC32 DNL — — —
PB2,VCCIO3,PB3,VCCIO4,VCCAPLL4,VCCIO5, SMT
VCCIO6,VCCIO7,VCCAPLL7,VCCIO8,VCCIO9,
VCCIO10,VCCAPLL10,VCCIO11,VCCIO12,
VCCIO13,VCCIO14,U42_PG,VCCORE,VCCIO0,
VCCHP,VCCCLK,VCCAUX,VCCAPLLW,PS_EN,
FPGA-EB-02057-1.2 68
User Guide
Footprint
PROGRAMN
87 Q1 1 MMBT2222 MMBT222 — MMBT2222ALT1G onsemi TRANS NPN 40V 0.6A
ALT1G 2ALT-1 SOT23-3
88 Q2,Q3,Q4,Q7,Q8,Q9,Q10,Q11,Q12,Q13,Q14, 21 BC817-40- SOT23-3 — BC817-40-TP Micro TRANS NPN 45V 0.8A
Q15,Q16,Q17,Q18,Q19,Q20,Q21,Q22,Q23,Q24 TP Commercial Co SOT23
89 R1,R19 2 2.2K R0603 — RC0603FR-072K2L Yageo RES SMD 2.2K OHM
1% 1/10W 0603
90 R2,R3,R4,R21,R27,R30,R31,R32,R33,R34,R35, 15 4.7K R0603 — CRCW06034K70FKEA Vishay Dale RES SMD 4.7K OHM
R36,R37,R47,R48 1% 1/10W 0603
91 R5,R11,R92,R317 4 2.2K R0603 — CRCW06032K20FKEA Vishay Dale RES SMD 2.2K OHM
1% 1/10W 0603
92 R6 1 22 R0402 — ERJ-2RKF22R0X Panasonic RES SMD 22 OHM 1%
Electronic 1/10W 0402
Components
93 R7,R8,R9 3 0 R0402 — RC0402FR-070RL Yageo RES 0 OHM JUMPER
1/16W 0402
94 R10 1 0-DNI R0402 DNL RC0402FR-070RL Yageo RES 0 OHM JUMPER
1/16W 0402
95 R12,R13,R14 3 10K R0603 — RMCF0603JT10K0 Stackpole RES 10K OHM 1/10W
Electronics Inc 5% 0603
96 R15 1 12K R0603 — RC0603FR-0712KL Yageo RES 12K OHM 1/10W
1% 0603 SMD
97 R16,R17 2 10K R0603 — RC0603FR-0710KL Yageo RES SMD 10K OHM 1%
1/10W 0603
98 R20,R408 2 0 R0402 — RC0402FR-070RL Yageo RES 0 OHM JUMPER
1/16W 0402
99 R22,R26,R28 3 10k R0603 — RC0603FR-0710KL Yageo RES SMD 10K OHM 1%
1/10W 0603
100 R23,R29,R50,R51 4 100 R0402 — ERJ-2RKF1000X Panasonic RES SMD 100 OHM 1%
1/10W 0402
101 R24,R25,R56,R57,R58,R59,R60,R61,R62,R63 10 1K R0603 — RC0603FR-071KL Yageo RES 1K OHM 1/10W
1% 0603 SMD
102 R38,R477 2 10K R0402 — CRCW040210K0JNED Vishay Dale RES SMD 10K OHM 5%
1/16W 0402
103 R39,R40,R41 3 10K_NP 402 DNL ERJ-2GEJ103X Panasonic RES SMD 10K OHM 5%
Components
FPGA-EB-02057-1.2 69
User Guide
Footprint
104 R43,R44,R45,R46,R536 5 0 R0402 — ERJ-2GE0R00X Panasonic RES SMD 0 OHM
Electronic JUMPER 1/10W 0402
Components
105 R55,R345 2 22 R0402 — ERJ-2RKF22R0X Panasonic RES SMD 22 OHM 1%
Components
106 R82,R298 2 0.01 R0402 — PE0402FRF070R01L Yageo RES 0.01 OHM 1%
1/16W 0402
107 R83,R84,R217,R310,R327,R328 6 10k R0603 — RMCF0603JT10K0 Stackpole RES 10K OHM 1/10W
Electronics Inc 5% 0603
108 R85,R86,R87,R91,R314,R315,R316,R322,R543 9 4.7k R0603 — RC0603FR-074K7L Yageo RES 4.7K OHM 1%
1/10W 0603
109 R90,R321,R542 3 4.7k R0603 — CRCW06034K70FKEA Vishay Dale RES SMD 4.7K OHM
1% 1/10W 0603
110 R95,R251,R252,R307,R325,R326 6 1k R0603 — RC0603FR-071KL Yageo RES 1K OHM 1/10W
1% 0603 SMD
111 R96,R305 2 1K 402 — RC0402FR-071KL Yageo RES 1K OHM 1%
1/16W 0402
112 R100,R306 2 301R 402 — RC0402FR-07301RL Yageo RES 301 OHM 1%
1/16W 0402
113 R103,R104 2 0-DNI R0603 DNL RC0603JR-070RL Yageo RES 0 OHM JUMPER
1/10W 0603
114 R105,R107,R108 3 0-DNI R0402 DNL ERJ-2GE0R00X Panasonic RES SMD 0 OHM
Components
115 R106 1 22-DNI R0402 DNL ERJ-2RKF22R0X Panasonic RES SMD 22 OHM 1%
Components
116 R111,R404 2 750 1% R0402 — ERJ-2RKF7500X Panasonic RES SMD 750 OHM 1%
Components
117 R112,R403 2 422 1% R0402 — ERJ-2RKF4220X Panasonic RES SMD 422 OHM 1%
Components
118 R137,R139,R140,R142,R143,R147,R153,R353, 16 0.01 R0603 — PF0603FRE7T0R01Z Yageo RES 0.01 OHM 1%
R370,R374,R378,R382,R385,R387,R391,R395 0.3W 0603
119 R152 1 0.001 R1206 — PMR18EZPFV1L00 Rohm 1 mOhms ±1% 1W
Semiconductor Chip Resistor 1206
FPGA-EB-02057-1.2 70
User Guide
Footprint
120 R154 1 0.1 603 — RCWE0603R100FNEA Vishay Dale RES 0.1 OHM 1%
1/5W 0603
121 R155,R267,R539,R540,R541 5 1R 603 — ERJ-3BQF1R0V Panasonic RES SMD 1 OHM 1%
Components
122 R169,R339,R341,R343,R411,R417,R427,R433, 22 330R res0603 — ERJ-3EKF3300V Panasonic RES SMD 330 OHM 1%
R439,R444,R447,R453,R475,R521,R523,R524, Electronic 1/10W 0603
R526,R528,R529,R532,R533,R546 Components
123 R171,R407 2 1.0k R0402 — RC0402FR-071KL Yageo RES 1K OHM 1%
1/16W 0402
124 R179,R180,R398 3 10k R0402 — RC0402FR-0710KL Yageo RES SMD 10K OHM 1%
1/16W 0402
125 R215,R216,R308,R309 4 0-DNI R0603 DNL RC0603JR-070RL Yageo RES 0 OHM JUMPER
1/10W 0603
126 R229,R416,R426,R432,R438,R443,R446,R452, 18 10K res0603 — RC1608F103CS Samsung RES SMD 10K OHM 1%
R474,R520,R522,R525,R527,R530,R531,R534, Electro- 1/10W 0603
R535,R547 Mechanics
127 R231 1 2.61K 603 — RC0603FR-072K61L Yageo RES 2.61K OHM 1%
1/10W 0603
128 R232,R415,R421,R424,R430,R436,R442,R451, 9 10K 603 — RC0603FR-0710KL Yageo RES SMD 10K OHM 1%
R457 1/10W 0603
129 R233,R412,R418,R422,R428,R434,R441,R448, 9 18.2 k res0402 — RT0402BRD0718K2L YAgeo RES SMD 18.2KOHM
R454 0.1% 1/16W 0402
130 R234,R413,R419,R423,R429,R435,R440,R449, 9 12.7 k res0402 — ERJ-2RKF1272X Panasonic RES SMD 12.7K OHM
R455 Electronic 1% 1/10W 0402
Components
131 R249,R250,R323,R324 4 4.7k-DNI R0603 DNL ERJ-U03F4701V Panasonic RES 4.7K OHM 1%
Electronic 1/10W 0603 SMD
Components
132 R290,R294 2 240 R0201 — RC0201FR-07240RL Yageo RES 240 OHM 1%
1/20W 0201
133 R291 1 240 R0402 — RC0402JR-07240RL Yageo RES 240 OHM 5%
1/16W 0402
134 R292,R293 2 4.7k R0402 — RC0402FR-074K7L Yageo RES SMD 4.7K OHM
1% 1/16W 0402
135 R331,R332,R333,R334,R335,R336,R337,R338 8 53.6R res0402 — RC0402FR-0753R6L Yageo RES 53.6 OHM 1%
1/16W 0402
FPGA-EB-02057-1.2 71
User Guide
Footprint
136 R340,R342,R344 3 4.7K res0603 — RC0603JR-074K7L Yageo RES 4.7K OHM 5%
1/10W 0603
137 R399,R402 2 1.00k 1% R0402 — ERJ-U02F1001X Panasonic RES 1K OHM 1%
Electronic 1/10W 0402 SMD
Components
138 R400,R405 2 2.55k 1% R0402 — RK73H1ETTP2551F KOA Speer RES 2.55K OHM 1%
Electronics, 1/10W 0402
Inc.
139 R401,R406 2 1.02k 1% R0402 — RK73H1ETTP1021F KOA Speer RES 1.02K OHM 1%
Inc.
1/10W 0603
1/10W 0603
1/10W 0603
1/10W 0603
1/10W 0603
1/10W 0603
1/10W 0603
1/10W 0603
148 R460,R461,R462 3 240 R0402 — RC0402JR-07240RL Yageo RES 240 OHM 5%
1/16W 0402
1/10W 0603
150 R464 1 176K 603 — RT0603DRE07176KL Yageo RES SMD 176K OHM
0.5% 1/10W 0603
151 R465 1 24K 603 — RC0603FR-0724KL Yageo RES 24K OHM 1%
1/10W 0603
152 R466,R467 2 100K 603 — RC0603FR-07100KL Yageo RES 100K OHM 1%
1/10W 0603
FPGA-EB-02057-1.2 72
User Guide
Footprint
153 R468 1 10 603 — RC0603FR-0710RL Yageo RES 10 OHM 1%
1/10W 0603
154 R469 1 1.78K 603 — RC0603FR-071K78L Yageo RES SMD 1.78K OHM
1% 1/10W 0603
1/10W 0603
156 R471 1 1 603 — RC0603FR-071RL Yageo RES 1 OHM 1% 1/10W
0603
157 R472 1 4.7 603 — RC0603JR-074R7L Yageo RES 4.7 OHM 5%
1/10W 0603
158 R473 1 470R 402 — RC0402FR-07470RL Yageo RES 470 OHM 1%
1/16W 0402
1/10W 0603
160 R490,R491 2 49.9R R0201 — RC0201FR-0749R9L Yageo RES 49.9 OHM 1%
1/20W 0201
161 R492,R493 2 NP R0402 DNL — — —
162 R510 1 1K R0402 — CRCW04021K00JNED Vishay RES SMD 1K OHM 5%
1/16W 0402
163 R519 1 3.7K R0402 — RN73H1ETTP3701F50 KOA Speer RES 3.7K OHM 1%
Inc.
164 R537,R538,R548 3 0R R0402 — ERJ-2GE0R00X Panasonic RES SMD 0 OHM
Components
165 R544 1 30.1 603 — RC0603FR-0730R1L Yageo RES 30.1 OHM 1%
1/10W 0603
166 R545 1 1K 603 — RC0603FR-071KL Yageo RES 1K OHM 1%
1/10W 0603
167 SW1,SW2,SW4,SW5 4 430182043 43018204 — 430182043816 Wurth SWITCH TACTILE SPST-
816 3816 Electronik NO 0.05A 12V
168 SW3 1 TDA DIP-8 TDA08H0S — TDA08H0SB1 C&K SWITCH SLIDE DIP
B1 SPST 25MA 24V
169 SW6 1 SPST SWR — PRK22J5DBBNN ZF Electronics SWITCH ROCKER SPST
6A 125V
FPGA-EB-02057-1.2 73
User Guide
Footprint
170 U1 1 FT2232HL tqfp64_0p Customer FT2232HL FTDI IC USB HS DUAL
5_12p2x1 Supplied UART/FIFO 64-LQFP
2p2_h1p6
171 U2 1 93LC56C- so8_50_2 — 93LC56C-I/SN Microchip IC EEPROM 2KBIT SPI
I/SN 44 Technology 3MHZ 8SOIC
172 U3 1 LAV-AT- LAV-AT- Customer — — —
500- 500- Supplied
E_1156 L_1156
173 U4 1 MX25L512 8- — MX25L51245GZ2I-08G Macronix IC FLASH 512MBIT
45GZ2I- WSON_M SPI/QUAD 8WSON
08G AC
174 U5 1 MT53E512 BGA_SDR used PN MT53E512M32D1NP- Micron IC MEMORY DRAM
M32D1ZW- AM_200 from 305- 046 Technology 16G 512MX32 FBGA
046 WT:B PD-22-0022 Inc.
175 U6,U10,U31,U32 4 BD9D321EF HTSOP_8_ Customer BD9D321EFJ-E2 Rohm IC REG BUCK ADJ 3A
J BD9D321 Supplied Semiconductor 8HTSOP-J
176 U17,U34,U35,U36,U37,U38,U39,U40,U41 9 AP62201W TSOT26_A — AP62201WU-7 Diodes DCDC CONV HV BUCK
U-7 P62201W Incorporated TSOT26 T&R 3K
U-7
177 U42 1 MAX15118 BGA28N5 — MAX15118EWI+T Analog Devices IC REG BUCK
EWIT 0P4X7_20 Inc./Maxim ADJUSTABLE 18A
6X352X69 Integrated 28WLP
N
178 U43 1 RT7298AH 14-WQFN — RT7298AHGQW Richtek USA IC REG BUCK
GQW Inc. ADJUSTABLE 6A
14WQFN
179 U44 1 NCP133 XFDFN6 — NCP133AMXADJTCG onsemi IC REG LIN POS ADJ
500MA 6XDFN
180 X1 1 SXT32418B xtal_4p_S — SXT32418BB16- Suntsu CRYSTAL 12.0000MHZ
B16- XT32418B 12.000MT Electronics, 18PF SMD
12.000M B16_1200 Inc.
0M
181 Y1 1 100 MHz SMD6_AX — AX3HAF1-100.0000 Abracon LLC XTAL OSC XO 100MHZ
3HAF1 3.3V HCSL
182 Shunt for Headers 16 — — Load the SNT-100-BK-T Samtec Inc. 2 (1 x 2) Position
shunts Shunt Connector Black
mentioned Open Top 0.100"
in the BoM (2.54mm) Tin
and the
FPGA-EB-02057-1.2 74
User Guide
Footprint
remaining
are Bag &
Tag
183 Avant Evaluation Board RevB PCB 1 — — — 305-PD-22-0880 Pactron —
FPGA-EB-02057-1.2 75
User Guide
References
Related documents available from your Lattice Semiconductor sales representative are listed below.
• Programming Cables User Guide (FPGA-UG-02042)
• Lattice Avant sysCONFIG User Guide (FPGA-TN-02299)
• Lattice Avant Platform Data Sheet – Overview (FPGA-DS-02107)
• Lattice Avant Platform Data Sheet – Specifications (FPGA-DS-02112)
FPGA-EB-02057-1.2 76
User Guide
Technical Support Assistance

Submit a technical support case through www.latticesemi.com/techsupport.
For frequently asked questions, refer to the Lattice Answer Database at
www.latticesemi.com/Support/AnswerDatabase.
FPGA-EB-02057-1.2 77
User Guide
Revision History
Revision 1.2, March 2023
Section Change Summary
Avant Evaluation Board Updated the board schematics.
Schematics
Revision 1.1, February 2023

Programming Newly added the Programming of Avant SRAM section.
Revision 1.0, January 2023

All Production release.
Introduction Updated Figure 1.1. Top View of Avant-E Evaluation Board and Figure 1.2. Bottom View of
Avant Evaluation Board reflecting the most recent revision of the Board.
Revision 0.80, December 2022

All Initial Preliminary release.
FPGA-EB-02057-1.2 78
www.latticesemi.com

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Avant Evaluation Board

Table 8.3. Parallel FMC1 Configuration Header Pin Connections ....................................................................................... 38

Acronyms in This Document

1.1. Avant-E Evaluation Board

SPI Flash 8-Segment LEDs PMOD Connectors

Main Power Switch

I/O Extended Area

Push Buttons FMC2 Connector

Figure 1.1. Top View of Avant-E Evaluation Board

Figure 1.2. Bottom View of Avant Evaluation Board

1.3. Avant-E Device

1.4. Applying Power to the Board

Figure 1.3. 12 V DC Power Supply

Table 1.1. Board Power Supply

Figure 2.1. Top View of Avant Evaluation Board – Jumper Locations

Table 2.1. Jumper Setting

Part Designator Description Setting Default

Part Designator Description Setting Default

Part Designator Description Setting Default

NCP133 (U44) 0.82 V

Figure 3.1. Board Power Scheme (1)

WR BANK 0 WR BANK 1 WR BANK 2 WR BANK 12 WR BANK 13 WR BANK 14

VCC_1V80 VCCAUXA VCCA_PLL10

Figure 3.2. Board Power Scheme (2)

Table 3.1. VCCIO Supply Options

Figure 4.1. Configuration, UART and I2C Architecture

4.1. JTAG Download Interface

4.2. Alternate JTAG Download Interface

4.3. SPI Flash Device Selection in Programmer

Figure 4.2. SPI Flash Operation Dialog

4.4. Global Setting in Lattice Radiant software

Figure 4.3. Global Settings (1)

Figure 4.4. Global Settings (2)

Figure 4.5. Global Settings (3)

4.5. Other Configuration Pins

4.6. Programming of Avant SRAM

Figure 4.6. Radiant Programmer

Figure 4.7. Radiant Programmer – Device Properties

5. Avant Clock Sources

6. Control Buses – I2C, UART, and SPI

6.1. I2C Topology

6.2. UART Topology

6.3. SPI Topology

7. LEDs, Switches and Segment Displays

7.1. DIP Switch

7.2. General Purpose Push Buttons

7.3. General Purpose LEDs

7.4. Segment Displays

8. Headers/Connectors and Avant Device Ball Mapping

8.1. FMC1 Connector

8.2. FMC2 Connector

8.3. Parallel FMC1 Configuration Header

8.4. Parallel FMC2 Configuration Header

8.5. Raspberry PI Board GPIO Header

8.6. External Flash Configuration Header

8.7. PMOD Header

8.8. Through Hole Extended Area Header

Pin Name Signal Name Avant Bank Avant Ball Location