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Week 6 (Computer Arithmetic - New) (MFRDT)
Week 6 (Computer Arithmetic - New) (MFRDT)
Week 6 (Computer Arithmetic - New) (MFRDT)
Chapter 3 – Arithmetic
Computer Architecture and Organization by M. Murdocca and V. Heuring © 2007 M. Murdocca and V. Heuring Computer Architecture and Organization by M. Murdocca and V. Heuring © 2007 M. Murdocca and V. Heuring
3-3 Chapter 3 - Arithmetic 3-4 Chapter 3 - Arithmetic
Computer Architecture and Organization by M. Murdocca and V. Heuring © 2007 M. Murdocca and V. Heuring Computer Architecture and Organization by M. Murdocca and V. Heuring © 2007 M. Murdocca and V. Heuring
3-5 Chapter 3 - Arithmetic 3-6 Chapter 3 - Arithmetic
• Notice that discarding the carry out of the most significant bit during
two!s complement addition is a normal occurrence, and does not by
itself indicate overflow.
• As an example of overflow, consider adding (80 + 80 = 160)10, which • For negative numbers, we cannot simply pad the left side with 0s
produces a result of -9610 in an 8-bit two!s complement format: because that would change the value of the number:
01010000 = 80
+ 01010000 = 80
----------
10100000 = -96 (not 160 because the sign bit is 1.)
Computer Architecture and Organization by M. Murdocca and V. Heuring © 2007 M. Murdocca and V. Heuring Computer Architecture and Organization by M. Murdocca and V. Heuring © 2007 M. Murdocca and V. Heuring
3-7 Chapter 3 - Arithmetic 3-8 Chapter 3 - Arithmetic
Computer Architecture and Organization by M. Murdocca and V. Heuring © 2007 M. Murdocca and V. Heuring Computer Architecture and Organization by M. Murdocca and V. Heuring © 2007 M. Murdocca and V. Heuring
3-9 Chapter 3 - Arithmetic 3-10 Chapter 3 - Arithmetic
Computer Architecture and Organization by M. Murdocca and V. Heuring © 2007 M. Murdocca and V. Heuring Computer Architecture and Organization by M. Murdocca and V. Heuring © 2007 M. Murdocca and V. Heuring
3-11 Chapter 3 - Arithmetic 3-12 Chapter 3 - Arithmetic
• Two binary numbers A and B are subtracted from right to left, creating a
difference and a borrow at the outputs of each full subtractor for each
bit position.
Computer Architecture and Organization by M. Murdocca and V. Heuring © 2007 M. Murdocca and V. Heuring Computer Architecture and Organization by M. Murdocca and V. Heuring © 2007 M. Murdocca and V. Heuring
3-13 Chapter 3 - Arithmetic 3-14 Chapter 3 - Arithmetic
Computer Architecture and Organization by M. Murdocca and V. Heuring © 2007 M. Murdocca and V. Heuring Computer Architecture and Organization by M. Murdocca and V. Heuring © 2007 M. Murdocca and V. Heuring
3-15 Chapter 3 - Arithmetic 3-16 Chapter 3 - Arithmetic
Computer Architecture and Organization by M. Murdocca and V. Heuring © 2007 M. Murdocca and V. Heuring Computer Architecture and Organization by M. Murdocca and V. Heuring © 2007 M. Murdocca and V. Heuring
3-17 Chapter 3 - Arithmetic 3-18 Chapter 3 - Arithmetic
Computer Architecture and Organization by M. Murdocca and V. Heuring © 2007 M. Murdocca and V. Heuring Computer Architecture and Organization by M. Murdocca and V. Heuring © 2007 M. Murdocca and V. Heuring
3-19 Chapter 3 - Arithmetic 3-20 Chapter 3 - Arithmetic
Computer Architecture and Organization by M. Murdocca and V. Heuring © 2007 M. Murdocca and V. Heuring Computer Architecture and Organization by M. Murdocca and V. Heuring © 2007 M. Murdocca and V. Heuring
3-21 Chapter 3 - Arithmetic 3-22 Chapter 3 - Arithmetic
Computer Architecture and Organization by M. Murdocca and V. Heuring © 2007 M. Murdocca and V. Heuring Computer Architecture and Organization by M. Murdocca and V. Heuring © 2007 M. Murdocca and V. Heuring