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Whats New in Electronics
Whats New in Electronics
The What's New document for Ansys Electronics provides release information for the following:
l HFSS
l HFSS 3D Layout
l SIwave
l Maxwell
l Icepak
l Mechanical
l Q3D Extractor
l Circuit
l FilterSolutions
l EMIT
l Twin Builder
l Granta Materials
License Notice
2023 R2 is the last release of AEDT that supports legacy product licensing. Release 2024 R1
and onwards will only support product licenses from the Ansys Electronics Pro, Premium,
Enterprise portfolio. Detailed information can be accessed from the AEDT Welcome window or
Help menu.
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Ansys Electronics 2023 R2
HFSS
l 3D Component Array with platform geometries
l Sparse Direct Solver: Enhancement in profile report for memory usage
l Transient: Improved TDR at early time for matched dispersive ports
l Q3D DC Point
l Toolkits on the Automation ribbon tab
l RF Discharge simulation for Eigenmode type solutions
l Electron density calculation and visualization for RF Discharge simulation
l SBR+ Enhancements:
l Ray export
l Near-field with file-based point list
l Layout Component in HFSS 3D enhancement (Beta)
HFSS 3D Layout
l Rigid flex multizone full release
l Layout and ECAD usability and performance enhancements
l Improved Phi mesh performance for very large models
l New S-parameter handling options
l Q3D and RaptorX integration in 3D Layout IC workflow (Beta)
l HPC scalable, distributed adaptive refinement (Beta)
l Q3D DC with MCAD (Beta)
l New EDB Python API (Beta)
SIwave
l Improved performance and robustness of MCAD export
l Commercial release of AC/DC blending
l Electrothermal flow for power electronics
l DC power tree export enhancements
l New S-parameter handling options
l Add rated voltage, temperature, and tolerance filters to Capacitor Library Browser
l CPA enhancements:
l Robustness, reliability, and repeatability of results improvements
l Thermal aware package model extraction
l Current and power aware Smart Pin grouping
l Resynthesis of AC package netlist
l PSI robustness, reliability, and repeatability of results improvements
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Ansys Electronics 2023 R2
Icepak
l Solver preparation optimization
l Transient temperature patching
l Slider meshing enhancements
l TZR import enhancements
l Automation/Workflow tab improvements
l Boundary condition enhancements
l Commercial release of Hybrid Mesh post-processing
l CTM enhancements: flipping and UI
l ROM (SVD-ML) Toolkit for training data generation
l Commercial release of Delphi ROM
l Transition default gridcut using EDB method in Icepak Classic
Maxwell
l General Time Decomposition Method (TDM) for the A-Phi Transient solution
l Shell element for modeling airgap
l Integration of Maxwell Machine Toolkit with Motor-CAD post-processing
l TAU 2D band mapping angle mesh with close and symmetry
l TAU 2D density control in initial mesh
l Machine toolkits speedup
l Maxwell-Fluent co-simulation for electric arc applications
l Maxwell-Motion co-simulation enhancements
l Distributed parametric solve for Twin Builder coupling with Maxwell Transient
l Efficiency map creation based on ROM of induction machines with limited currents
l Support middle-point voltage method for Maxwell circuit coupling
l Improve magnetization workflow in target design with nonlinear material
l ECAD integration with A-Phi Transient solution (Beta)
l TAU 3D clone support for small band mapping angles (Beta)
Motor-CAD
l Coupling from Motor-CAD lab to Maxwell for efficiency map creation
l Standalone BPM, IM, and SYNC Lab FMU
l Option to specify gradient in vehicle duty cycle
l Winding MMF plots and phasor diagrams showing parallel paths
l Improved hairpin winding definition
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Ansys Electronics 2023 R2
AEDT Mechanical
l Slider meshing for Thermal
l Performance and robustness improvements
l Support for trace mapping in Thermal (Beta)
l Transient Thermal solution (Beta)
Q3D Extractor
l Electrothermal flow
l Scalable AC-RL solver for very large packages (Beta)
l Distributed memory CG solver improvements (Beta)
l Push excitations for Dynamic Link from Nexxim (Beta)
Circuit
General Enhancements:
l Power semiconductor model support:
l Semiconductor characterization tool
l New SiC MOSFET models in component library
l Automatic trigger to time stepping adaptivity
l S-parameter model order reduction via coupling thresholds
l EMI Receiver commercial release
l Circuit-Maxwell link via RL Toolkit (Beta)
l EMC and Power Electronics examples added
SPISim Enhancements:
l New FOM report option as part of IBIS modeling flow
l IBIS/AMI enhancements
IBIS/AMI Enhancements:
l Support for AMI Reserved Parameter DC_Offset
l Automatic setting for trise/tfall in IBIS-AMI Tx component
FilterSolutions
l Commercial release of Automated Discrete Optimization and port tuning
l Automated discrete optimization of diplexers
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Ansys Electronics 2023 R2
l Lumped elements using RLC sheet boundaries in distributed HFSS and 3D Layout
exports
l Integrated Electronics help
EMIT
l Emitter groups toolkit, new emitter models, enhanced parametric emitter waveforms
l Measurement file workflow improvements
l Enhancements to result window interface
l Toolkit access from the Automation ribbon
l PyAEDT API for EMIT results and post-processing (Beta)
Twin Builder
Reduced Order Model:
l Web-based standalone ROM viewer
l Improved ROM Viz using projection on mesh
l Improved dynamic ROM performance and behavior
l Icepak/Maxwell/HFSS data extraction for ROM Builders
l Improvements to Toshiba AccuROM
General Enhancements:
l Fusion capabilities for Transient data
l Enhanced post-processing for Hybrid analytics
l New APIs for container-based simulation
l New FMI composer
l Twin Builder/Maxwell parallel Transient co-simulation
l Improved Twin Builder solver with fixed time step and sample time
l Enhancements to Characterization Wizard
l Enhancements to Battery Wizard
l Improvements to fixed step-size simulation
l Support for Twin Builder Student Version
Granta
Granta Materials Library:
l Development has focused on continuing to provide accurate and reliable simulation-ready
materials data with standard updates to point and curve data. There are no new records in
the 2023 R2 release of MDS, but some data values have been updated.
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Ansys Electronics 2023 R2
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Ansys Electronics 2023 R2
does not imply the issues and limitations are applicable to future releases. Go to the Ansys
Electronics Desktop Customer Portal
(https://support.ansys.com/portal/site/AnsysCustomerPortal) for information about service
packs and any additional items not included in this document.
Workaround: From the AEDT Schematic tab, select Cleanup > Remove Unconnected
Wires.
l 834457 – When using Javascript equations for certain predefined specifications in
SPISim, S-Param > Generate Report > Advanced Reporting in VPro may issue alert
"Provider.org.openjdk.nashorn.api.scripting.NashornScriptEngineFactory not found."
EMIT
l 776007 – EMIT Results UI slows down when simulating large N-1 scenarios. The slower
performance is not generally observed for N<10.
FilterSolutions
l 797455 – Distributed filters exported from FilterSolutions may give an error during
optimization for some parametric variations due to geometry extending beyond the
substrate. The issue can be avoided by entering a larger substrate size in the AEDT
export dialog or adjusting the substrate size in the exported HFSS or 3D Layout design.
HFSS
l 777914 **Class 3** HFSS Projects simulates even if material is "undefined."
l 812095 **Class 3** Multiple plane wave sources are not simulated correctly in hybrid
design with SBR+ regions.
Icepak
l 659360 – Icepak Classic TZR file import will fail at meshing and solving in AEDT Icepak
for cases that have mesh regions coincident with the cabinet (flow region) on all 6 sides.
Workaround: Ensure a mesh region boundary setting is not touching cabinet on all sides
in Classic Icepak before importing the case in AEDT Icepak.
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Ansys Electronics 2023 R2
Maxwell
l 796956 – Problem with importing patterned objects from design modeler or Discovery
through Workbench or Discovery links. Objects may have unassigned IDs.
Q3D Extractor
l 732046 **Class 3** Adjacent or contained coplanar face outlines may be lost when using
the Classic mesher, and may result in incorrect assignments of boundaries, excitations,
etc. Such outlines are often created by imprinting a planar face onto another planar face.
To avoid this issue, use "Create Object From Face" to create a coincident sheet body in
the same location.
SIwave
l 743883 – AEDT launch issues during DDR/TDR/SIwizard circuit schematic generation
when SIwave is run in Ansys Cloud.