sensors
Communication
A CMOS Optoelectronic Receiver IC with an On-Chip
Avalanche Photodiode for Home-Monitoring LiDAR Sensors
Ji-Eun Joo 1,2 , Myung-Jae Lee 3 and Sung Min Park 1,2, *






Citation: Joo, J.-E.; Lee, M.-J.; Park,
S.M. A CMOS Optoelectronic
Receiver IC with an On-Chip
Avalanche Photodiode for
Home-Monitoring LiDAR Sensors.
Sensors 2021, 21, 4364. https://
doi.org/10.3390/s21134364
Academic Editor: Ali Khenchaf
Received: 31 May 2021
Accepted: 23 June 2021
Published: 25 June 2021
Publisher’s Note: MDPI stays neutral
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Copyright: © 2021 by the authors.
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This article is an open access article
distributed under the terms and
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Attribution (CC BY) license (https://
creativecommons.org/licenses/by/
4.0/).
Sensors 2021, 21, 4364. https://doi.org/10.3390/s21134364
1 Department of Electronic and Electrical Engineering, Ewha Womans University, Seoul 03760, Korea;
wxop02@ewhain.net
2 Graduate Program in Smart Factory, Ewha Womans University, Seoul 03760, Korea
3 Post-Silicon Semiconductor Institute, Korea Institute of Science and Technology, Seoul 02792, Korea;
mj.lee@kist.re.kr
* Correspondence: smpark@ewha.ac.kr
Abstract: This paper presents an optoelectronic receiver (Rx) IC with an on-chip avalanche photo-
diode (APD) realized in a 0.18-µm CMOS process for the applications of home-monitoring light
detection and ranging (LiDAR) sensors, where the on-chip CMOS P+ /N-well APD was implemented
to avoid the unwanted signal distortion from bondwires and electro-static discharge (ESD) protection
diodes. Various circuit techniques are exploited in this work, such as the feedforward transimpedance
amplifier for high gain, and a limiting amplifier with negative impedance compensation for wide
bandwidth. Measured results demonstrate 93.4-dBΩ transimpedance gain, 790-MHz bandwidth,
√
12-pA/ Hz noise current spectral density, 6.74-µApp minimum detectable signal that corresponds
to the maximum detection range of 10 m, and 56.5-mW power dissipation from a 1.8-V supply. This
optoelectronic Rx IC provides a potential for a low-cost low-power solution in the applications of
home-monitoring LiDAR sensors.
Keywords: avalanche photodiode; CMOS; feedforward; limiting amplifier; optoelectronic; tran-
simpedance amplifier
1. Introduction
Light detection and ranging (LiDAR) sensors have been proliferated for the past
decade because they can be applied to diverse fields such as 3-dimensional imaging for
unmanned self-driving cars, and medical and industrial applications [1]. Particularly,
LiDAR sensors can be a potential solution for home-monitoring elder-care systems because
they can inherently provide strong immunity against RF interferences, small form-factor,
and blurred images for the sake of portrait right protection [2].
In these LiDAR sensors, avalanche photodiodes (APDs) are mostly exploited as an
off-chip optical detector. However, these off-chip APD devices may increase the packaging
cost considerably in the cases of multi-channel Rx arrays and deteriorate signal integrity
because of the bondwires between APDs and receiver (Rx) chips. Furthermore, on-chip
electro-static discharge (ESD) protection diodes may be needed, hence shrinking the Rx
bandwidth by the increased input capacitance. Therefore, we present an on-chip CMOS
APD in this work which can be a better solution to resolve the aforementioned issues.
Yet, on-chip CMOS APDs suffer from low responsivity and limited bandwidth when
compared to the discrete APD devices. Especially, silicon CMOS implementation of on-chip
APDs restricts their operations only in the wavelength of 850 nm [3]. Nonetheless, an
optoelectronic Rx IC with an integrated on-chip APD is realized in this paper by using a
standard 0.18-µm CMOS process. In particular, various circuit techniques are exploited to
overcome the inherent defects of on-chip silicon photodiodes.
Figure 1 shows the block diagram of a typical linear-mode LiDAR system, where
the Rx consists of a photodiode for light detection, a transimpedance amplifier (TIA) for
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FORx FOR PEER
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Figure
Figure 1 shows
1 shows thethe block
block diagram
diagram of aoftypical
a typical linear-mode
linear-mode LiDARLiDAR system,
system, where
where thethe
Rx Rx consists
consists of aofphotodiode
a photodiode for for
lightlight detection,
detection, a transimpedance
a transimpedance amplifier
amplifier (TIA)
(TIA) for for
cur-cur-
rent-to-voltage
rent-to-voltage
current-to-voltagesignal
signal conversion,
conversion,
signal a post-amplifier
a post-amplifier
conversion, (PA)
a post-amplifier (PA)
for for voltage-gain
voltage-gain
(PA) for boosting,
boosting,
voltage-gain andandand
boosting,
an
anoutput
an output
output buffer
buffer
buffer (OB)
(OB) for for
(OB) for50-
50- impedance
impedance
50-Ω impedance matching
matching
matchingto ato aafollowing
following
to off-chip
off-chip
following circuitry,
circuitry,
off-chip e.g.,e.g.,
circuitry, e.g.,
time-to-digital
time-to-digital
time-to-digital converter
converter
converter (TDC).
(TDC).
(TDC).SinceSince an on-chip
an on-chip
Since an on-chipCMOSCMOS
CMOS APD APD
APD is integrated
is integrated with
thethe
withwith
is integrated Rx Rx
the Rx
circuits,
circuits, thisthis
circuits, work
this work is
is named
is named
work named as
as ‘an
as ‘an optoelectronic
optoelectronic
‘an optoelectronicRx RxRx IC’.
IC’.IC’.

Figure
Figure
Figure 1.
1.Block
Block
1. Block diagram
diagram of aof
diagram of aatypical
typical
typical lightlight
light detection
andand
detection
detection and ranging
ranging
ranging (LiDAR)
(LiDAR)
(LiDAR) sensor.
sensor.
sensor.

TheTheThe target
target
target application
application
application of ofof this
this this optoelectronic
optoelectronic
optoelectronic RxRxICICIC
Rx isishome-monitoring
home-monitoring
is home-monitoring LiDAR
LiDARLiDAR sensors
sen-
sen-
for
sorssors both
for for
both single
both
single elders
single elders
elders who
who who live
livelivealone
alone
alone and
andand senile
senile
senile dementia
dementia
dementia patients
patients
patients that
thatthat reside
reside
reside in either
in either
in either
hospitals
hospitals
hospitals orornursing
or nursingnursing
homes. homes.
homes. Therefore,
Therefore,
Therefore, thethethe optoelectronic
optoelectronic
optoelectronic LiDARLiDARLiDAR sensors
sensors
sensors mandate
mandate
mandate thethe the
fol-fol-
following
lowing specifications.
specifications. First,
First, it it should
should be be able
able toto detect
detect the
the distance
distance
lowing specifications. First, it should be able to detect the distance within 10 m. Second, within
within 1010 m.
m. Second,
Second,
owingowing
owing to thetothe
to thelack
lack lack ofresponsivity,
of responsivity,
of responsivity, avalanche
avalanche
avalanche multiplication
multiplication
multiplication should
should
should be equipped
be equipped
be equipped in on-chip
in on-chip
in on-chip
CMOS CMOS
CMOS photodiodes.
photodiodes.
photodiodes. Third,
Third,
Third, the
thethe generated
generated
generated photocurrents
photocurrents
photocurrents from
from from on-chip
on-chip
on-chip CMOS
CMOSCMOS APDs
APDs APDs may
may may be
still
be still in
be still the
in the
in the range
range
range of a few
of aoffewa fewmicro-amperes
micro-amperes
micro-amperes even
even with
even
with the
with avalanche
thethe avalanche
avalanche multiplication.
multiplication.
multiplication. Therefore,
There-
There-
fore,the
thefront-end
fore, the
front-end TIA
front-end circuit
TIATIA should
circuit
circuit provide
should
should high
provide
provide transimpedance
high
high transimpedance
transimpedance gain
gain so
soas
gain soto
as asrecover
to to recover
recover the
weak incoming signals. In other words, the LiDAR sensors should be able to lower the
thethe
weakweak incoming
incoming signals.
signals. In other
In other words,
words, thethe LiDAR
LiDAR sensors
sensors should
should be able
be able to lower
to lower thethe
minimum
minimum detectable
detectable signal
signal (MDS).
(MDS).
minimum detectable signal (MDS).
Section22 describes
Section describes the realization
realization ofof an
an on-chip
on-chip CMOS
CMOS APD. APD. Section
Section 33 presents
presents the the
Section 2 describes thethe realization of an on-chip CMOS APD. Section 3 presents the
circuit
circuit description
description of the
of the proposed
proposed Rx including a feedforward TIA and a limiting amplifier
circuit description of the proposed Rx Rx including
including a feedforward
a feedforward TIATIAandand a limiting
a limiting ampli-
ampli-
(LA)
fier with
(LA) withnegative
negative impedance
impedance compensation.
compensation. Section
Section IV
IV demonstrates
demonstrates the
the measured
measured
fier (LA) with negative impedance compensation. Section IV demonstrates the measured
results of the proposed optoelectronic Rx IC realized in a 0.18-µm CMOS process. Lastly, a
results
results of the
of the proposed
proposed optoelectronic
optoelectronic Rx Rx IC realized
IC realized in ain0.18-µ
a 0.18-µ m CMOS
m CMOS process.
process. Lastly,
Lastly,
conclusion follows.
a conclusion
a conclusion follows.
follows.
2. On-Chip CMOS P+ /N-Well APD
2. On-chip
2. On-chip CMOSCMOS P+/N-well
P+/N-well APD APD
Figure 2a depicts the cross-sectional view of an on-chip CMOS APD with P+ /N-well
Figure
Figure
architecture 2a depicts
2a depicts
that canthe the cross-sectional
cross-sectional
yield large view
view
avalanche of an
of owing
gain an on-chip
on-chip
to theCMOSCMOS
guard ringAPD
APD with
with P
of /N-well
+
P+/N-well
structure shallow
architecture
architecture thatthat
trench isolation can
can(STI).
yieldyield
The large
large avalanche
avalanche
avalanche gaingain owing
owing
multiplication to the
tooccurs
the guard
guard
in Pring
ring
the structure
+structure
/N-well of shal-
of shal-
junction. It
lowlow
shouldtrench
trench be isolation
isolation
noted (STI).
that(STI).
TheThe
the avalanche
Pavalanche
+ contacts in multiplication
multiplication areoccurs
the N-well occurs in the
in the
connected P+toPthe
+/N-well junction.
/N-well junction.
input node of
Itthe
should
It should be noted
be noted
following thatthat
TIA thethe
circuit, P + contacts in the N-well are connected to the input node of the
P+ contacts
hence in the N-well
excluding are connected
the slow diffusion to the input
currents node of the
contributed from
following
following TIATIA
the P-substrate. circuit,
circuit, hencehence excluding
excluding thethe
slowslow diffusion
diffusion currents
currents contributed
contributed fromfromthethe
P-substrate.
P-substrate.

(a) (a) (b) (b)

Figure
Figure
Figure 2.
2. (a) (a)
(a)Cross-sectional
2.Cross-sectional view
Cross-sectional view of
of the
of the
view the proposed
proposed on-chip
on-chip
proposed CMOS
CMOS
on-chip P+/N-well
P+/N-well
CMOS avalanche
avalanche
P+/N-well photodiode
photodiode
avalanche photodiode
(APD)
(APD) and and
(b) (b)
its its
chipchip photomicrograph
photomicrograph andand layout.
layout.
(APD) and (b) its chip photomicrograph and layout.
Sensors 2021, 21, x FOR PEER REVIEW 3 of 10

Sensors 2021, 21, x FOR PEER REVIEW 3 of 10

Sensors 2021, 21, 4364 The STI guard rings are designed to be deeper in depth than the P+/N-well junction, 3 of 10
so that the STI can prevent premature edge breakdown. Furthermore, the high electric-
field can be distributed uniformly at the planar junction [4].
The STI2b
Figure guard rings are
illustrates the designed
layout of to thebeon-chip
deeperCMOS in depth than theAPD
P+/N-well P+/N-well
and itsjunction,
chip mi-
The STI guard rings are designed to be deeper in depth than the P + /N-well junction,
so that the STI can prevent premature edge breakdown. Furthermore,
crophotograph, where the shape is octagonal to minimize the possible damage from edge the high electric-
so that
field canthebeSTI can prevent
distributed premature
uniformly edge
at the breakdown.
planar junction Furthermore, the high electric-field
[4].salicide blocking
breakdown. The P+ source/drain region is covered by the layer to form
can be distributed
Figurewindow. uniformly
2b illustrates at
the layoutthe planar
of junction
the on-chip [4].
CMOS P+/N-well APD and its chip mi-
an optical
Figure 2b illustrates
However,
the
the
layout
P + contacts located
of the on-chip
in
CMOS
the middle
+
P possible
of the
/N-welldamage
optical
APD and
window
its edge
chip
crophotograph, where
cannot be blocked because the shape
theshapeis octagonal
salicide to minimize
process reduces the
the contact resistivity from
[5]. from
microphotograph,
breakdown. The P+ where the
source/drain is octagonal
region is covered tobyminimize
the the blocking
salicide possible damage
layer to form
edge Area occupied
breakdown. Theby the P + contacts
P+ source/drain should be small
regionlocated
is covered enough
bymiddle not to deteriorate
the salicide blocking the
layerAPDto
an optical window.
responsivity. However,
In window.
this work,However, the P
the diagonal
+ contacts in the of the optical window
form an optical the length of thelocated
P+ contacts optical window is designed
in the middle of the to be 40
optical
cannot
µ m. becannot
blocked because the salicide process reduces the contact resistivity [5].
window be blocked because the salicide process reduces the contact resistivity [5].
Area occupied by the P++contacts should be small enough not to deteriorate the APD
Area occupied by the P contacts should be small enough not to deteriorate the APD
responsivity. In this work, the diagonal length of the optical window is designed to be 40
3. Circuit Description
responsivity. In this work, the diagonal length of the optical window is designed to be
µ m.
40 µm. Figure 3 depicts the detailed block diagram of the proposed optoelectronic Rx IC
which consists of an on-chip P+/N-well APD, a feedforward TIA, a three-stage LA with
3.
3. Circuit Description
Circuitimpedance
Description
negative compensation, and an OB.
Figure
Figure 3 depicts the
3 depicts the detailed
detailed block
block diagram
diagram of of the
the proposed
proposed optoelectronic
optoelectronic Rx Rx ICIC
which consists of an on-chip P +/N-well APD, a feedforward TIA, a three-stage LA with
+
which consists of an on-chip P /N-well APD, a feedforward TIA, a three-stage LA with
negative
negative impedance
impedance compensation,
compensation, and and anan OB.
OB.

Figure 3. Block diagram of the proposed optoelectronic Rx IC.

3.1. Feedforward TIA

Figure 3.
Figure Block diagram
3. Block diagram of
of the
the proposed
proposed optoelectronic
optoelectronic Rx
Rx IC.
IC.
The front-end feedforward TIA determines the overall performance of the optoelec-
3.1. Feedforward
tronic TIA
Rx IC, therefore mandating stringent requirements of high transimpedance gain to
3.1. Feedforward TIA
recover weak incoming
The front-end feedforward signals, TIA
low determines
noise current spectral
the overalldensity to minimize
performance the MDS,
of the optoelec-
The front-end
differential feedforward TIA determines the overall performance of the optoelec-
tronic Rx IC,signaling
thereforefor common-mode
mandating stringentnoise rejection, etc.
requirements of high transimpedance gain to
tronicFigure
Rx IC,4therefore
shows mandating
the schematic stringent requirements of highTIA
transimpedance gaincon-
to
recover weak incoming signals, lowdiagram of the spectral
noise current feedforward
density tothat comprises
minimize the aMDS,
recover weak incoming
ventional voltage-mode
differential signals, low noise
inverter (INV) input
signaling for common-mode current spectral
stage withetc.
noise rejection, density to minimize the MDS,
a feedback resistor (RF), a feed-
differential
forward signaling
common-source for common-mode
amplifier with noise
its gaterejection,
Figure 4 shows the schematic diagram of the feedforward etc.
connected to the gates
TIA of thecomprises
that INV stage,aa
Figure 4 shows
differential pair
conventional the schematic
with a low-pass-filter
voltage-mode diagram of the feedforward
for single-to-differential
inverter (INV) TIA that comprises
conversion,
input stage with a feedback and an
resistor a addi-
(R con-
F ), a
ventional voltage-mode
tional differential
feedforward inverter
gain stage for
common-source (INV) input
gain boosting
amplifier with itsstage with
further. a feedback resistor (R F), a feed-
gate connected to the gates of the INV
forward common-source
stage,According to the
a differential amplifier
pairsmall
with signal with its gate
analysis
a low-pass-filter offorconnected
the to the
simplified gates conversion,
feedforward
single-to-differential of the INVstage
input stage,
and an a
(as
differential
described in
additional pair with a low-pass-filter
[6]), the transimpedance
differential gain stage for gainfor single-to-differential
gainboosting
is givenfurther.
by, conversion, and an addi-
tional differential gain stage for gain boosting further.
According to the small signal analysis of the simplified feedforward input stage (as
described in [6]), the transimpedance gain is given by,

Figure 4. Schematic diagram of the feedforward TIA.

Figure 4. Schematic diagram of the feedforward TIA.
According to the small signal analysis of the simplified feedforward input stage (as
described in [6]), the transimpedance gain is given by,
Figure 4. Schematic diagram of the feedforward TIA.
vout ( gm1 + gm2 + gm3 ) R F − 1 ∼
ZT ( 0 ) = =− = −RF (1)
iin gm1 + gm2 + gm3 + r ||r ||1 r || R
o1 o2 o3 L
Sensors 2021, 21, x FOR PEER REVIEW 4 of 10

𝑣𝑜𝑢𝑡 (𝑔𝑚1 + 𝑔𝑚2 + 𝑔𝑚3 )𝑅𝐹 − 1

Sensors 2021, 21, 4364 𝑍𝑇 (0) = =− ≅ −𝑅𝐹 4 of 10
(1)
𝑖𝑖𝑛 1
𝑔 𝑚1 + 𝑔𝑚2 + 𝑔𝑚3 + 𝑟 ||𝑟 ||𝑟 ||𝑅
𝑜1 𝑜2 𝑜3 𝐿

where gmi(i=1 to 3) and roi(i=1 to 3) represent the transconductance and the output resistance of each
where gmi(i=1 to 3) and roi(i=1 to 3) represent the transconductance and the output resistance of
transistor.
eachThe transistor.
input-referred noise current spectral density of the simplified feedforward input
The
stage (as describedinput-referred in [6])noise
is givencurrent
by, spectral density of the simplified feedforward input
stage (as described in [6]) is given by,
4𝑘𝑇 1 1 1 1
𝐼2 𝑛,𝑇𝐼𝐴 (𝑓) ≅
𝑅𝐹
+ 4𝑘𝑇𝛤  (𝑔𝑚1 + 𝑔 )× [(2𝜋𝐶𝑇 )2 𝑓 2 + 𝑅2] + 4𝑘𝑇(𝛤 𝑔 + 𝑅𝐺 )×
𝑚2 𝑚3
1𝐹 (2)
I 2 n, TI A ( f ) ∼ 4kT
+ 4kTΓ
= R F 2 2 1gm1 4𝑘𝑇 1
+ 1
× ( 2πC 1T ) 2 2
f 1 + 1 + 4kT Γ 1
+ R G ×
 [(2𝜋𝐶
gm2
𝑇 ) 𝑓 + 𝑅 2 ] ≅ 𝑅 + 4𝑘𝑇𝛤 (𝑔 + +R2F ) × (2𝜋𝐶𝑇g)m32 𝑓 2 (2)
𝐹 𝐹  𝑚1 𝑔𝑚2 𝑔𝑚3 
(2πCT )2 f 2 + R12 ∼ = RF 4kT
+ 4kTΓ 1
+ 1
+ 1
× ( 2πC ) 2 2
f
where k is the Boltzmann’s constant, F
gm1
T is the absolute gtemperature,
m2 gm3 and T𝛤(≈ 2) is the Og-
awa’s noise factor of a MOSFET. Furthermore, CT (= CD + Cin,M1 + Cin,M2) represents the total
where k is the
capacitance at theBoltzmann’s
input nodeconstant, T is the absolute
of the feedforward TIA which temperature,
includes the and Γ(≈ 2) is ca-
photodiode the
factor of a MOSFET. Furthermore, C T (=C
pacitance (CD) and the input capacitance of the INV input stage, i.e., Cin,M1 + Cin,M2 = Cgs1the
Ogawa’s noise D + C in,M1 + C in,M2 ) represents +
Ctotal capacitance
gs2 + (1 + Av)· (Cgd1at+the Cgd2input
). It isnode
noted of that
the feedforward
RG is set to 1TIA kΩ which
in thisincludes
work sothe photodiode
that the noise
capacitance from
contribution (CD )RG and can bethe input capacitance of the INV input stage, i.e.,
negligible.
Cin,M1 + C
Then, in,M2 = C gs1
the input-referred + C + (1 + Av )·(Cgd1noise
gs2 mean-square + Cgd2 ). It isisnoted
current giventhat by, RG is set to 1 kΩ in
this work so that the noise contribution from RG can be negligible.
Then, the input-referred 4𝑘𝑇 4𝑘𝑇𝛤 1is given 1 by, 1
𝑖 2 𝑛,𝑇𝐼𝐴 ≅ mean-square
𝐵𝑊𝑛1 + noise current
𝐶𝑇2 𝐵𝑊 2
𝑛2 ( + + ) (3)
𝑅𝐹 3  𝑚1 𝑔 𝑔 𝑚2 𝑔𝑚3 
∼ 4kT 4kTΓ 2 2 1 1 1
where BWn1 is the i2 n,noise
TI A =bandwidth BWn1for + whiteCnoise T BWn2 and BWn2 + is the+noise bandwidth for(3) f2
RF 3 gm1 gm2 gm3
noise. For Q = 1/√2, BWn1 ≈ 1.11·BW33dB and BWn2 ≈ 1.49·BW3dB [7].
where In BW
Figure n1 is4,the
the√noise
valuebandwidth for white
of RL is selected to anoise
few tensandof BW n2 is the noise
kilo-ohm. Then,bandwidth for f 2
the bias current
3
(Inoise.
2) of M For
3 canQ =be1/mostly n1 ≈ 1.11through
2, BWsupplied ·BW 3dB the andPMOSBWn2 ≈ (M1.492) of·BW the3dB
INV[7].stage, because the
In Figure 4, the
DC drain voltage of M2 is fixed value of R is selected to a few tens
L by the action of the INV stage via theof kilo-ohm. Then, the biasresistor
feedback current
(I ) of
(R2F). Hence,M 3 can be mostly supplied through the
this action enables to boost the transconductance PMOS (M 2 ) of the (gm2) of M2 and helpsthe
INV stage, because to DC
re-
drainthe
duce voltage
noise of M2 isspectral
current fixed bydensitythe action of the
of the INV stageTIA.
feedforward via the feedback resistor (RF ).
Hence, this action
Post-layout enables to boost
simulations were the transconductance
conducted by utilizing (gm2the) ofmodel
M2 and helps to reduce
parameters of a
the noise current spectral density of the feedforward
standard 0.18-µ m CMOS process. Figure 5 shows the simulated frequency response where TIA.
Post-layoutTIA
the feedforward simulations
achieves were conductedtransimpedance
the differential by utilizing the gain model of parameters
75.3 dBΩ, the of band-
a stan-
dard 0.18-µm CMOS process. Figure 5 shows the simulated
width of 795 MHz, and the average input-referred noise current spectral density of 10.2 frequency response where the
feedforward TIA achieves the differential transimpedance
pA/√Hz which leads to the input referred root-mean-square (RMS) noise current of√287 gain of 75.3 dBΩ, the bandwidth
of 795 MHz, and the average input-referred noise current spectral density of 10.2 pA/ Hz
nArms.
which leads to the input referred root-mean-square (RMS) noise current of 287 nArms .

Figure 5. Simulated frequency response of the feedforward TIA.

Figure 5. Simulated frequency response of the feedforward TIA.
3.2. Limiting Amplifier
Limiting amplifier (LA) amplifies the small output voltage signals of the feedforward
TIA to sufficient levels so that a following TDC can detect the signals precisely. Furthermore,
the bandwidth of LA should be wide enough not to degrade the operating speed of the
preceding TIA. Figure 6 depicts the block diagram of the proposed LA which consists of
 however tiny it may be, can be amplified to saturate the output of the LA. Figure 6 shows
the proposed offset cancellation feedback network, where an RC low-pass filter is utilized
to extract the DC components from the output signals. Then, the extracted DC offset volt-
age is buffered by an error amplifier with a voltage gain of Af, consequently removing the
Sensors 2021, 21, 4364 offset voltage. 5 of 10
Even though the input offset voltage is suppressed by Af, a low cutoff-frequency is
1 𝐴𝑣,𝐿𝐴 𝐴𝑓 +1
newly introduced at × where Av,LA is the voltage gain of the LA [9]. Therefore,
2𝜋 𝑅𝐶
Af should
three be judiciously
cascaded selected
gain cells and to a reasonable
an offset value
cancellation so that
network. Inthe feedback
each network
gain cell, main-
the negative
tains the circuit stability.
impedance compensation techniques are incorporated to ensure wide bandwidth and high
Figure
voltage gain7[8]
depicts the asimulated
because substantialfrequency
voltage response of the
gain cannot proposedin
be obtained LA a which reveals
conventional
the voltage amplifier
differential gain of 20.3 dB and
owing the
to its bandwidthvoltage
unavoidable of 1.56 GHz.
headroom issue.

Figure 6. Schematic
Figure diagramdiagram
6. Schematic of the LA withLA
of the negative impedance
with negative compensation.
impedance compensation.

The schematic diagram of a gain-cell is shown in Figure 6, where the active negative
resistance circuit can alleviate the voltage-headroom issue. However, a rather large output
resistance and the unavoidable parasitic capacitance occurring from the active devices may
limit the bandwidth significantly. Therefore, a negative capacitance circuit is added in
parallel so that the bandwidth can be extended by canceling the output capacitance.
Small signal analysis shows that the equivalent resistance and capacitance are given by,

2
Req = − (4)
gm

!
1 gm + s Cgs + 2CN
Ceq =− × (5)
sCN gm

where gm represents the transconductance of transistors in the negative impedance cir-

cuits and Cgs represents the gate-source capacitance of transistors in the negative capaci-
tance circuit.
Moreover, a DC offset network should be employed because an input offset voltage,
however tiny it may be, can be amplified to saturate the output of the LA. Figure 6 shows
the proposed offset cancellation feedback network, where an RC low-pass filter is utilized
to extract the DC components from the output signals. Then, the extracted DC offset
voltage is buffered by an error amplifier with a voltage gain of Af , consequently removing
the offset voltage.
Even though the input offset voltage is suppressed by Af , a low cutoff-frequency is
1 A A +1
newly introduced at 2π × v,LARC f where Av,LA is the voltage gain of the LA [9]. Therefore,
Af should be judiciously selected to a reasonable value so that the feedback network
maintains the circuit stability.
Figure 7 depicts the simulated frequency response of the proposed LA which reveals
the voltage gain of 20.3 dB and the bandwidth of 1.56 GHz.
 Figure 7. Simulated frequency response of the proposed limiting amplifier (LA).

Sensors 2021,
Sensors 21, x4364
2021, 21, 4. Measured
FOR PEER REVIEW
Results 6 6ofof10
10
Test chips of the proposed optoelectronic Rx IC were fabricated in a standard 0.18-m
CMOS process. Figure 8 shows the chip microphotograph and its test setup, in which the
chip core occupies an area of 522 × 171 m2. DC measurements reveal that the optoelec-
tronic Rx IC consumes 56.5 mW from a single 1.8-V supply.
Figure 9a demonstrates the measured current-voltage characteristics of the on-chip
CMOS P+/N-well APD under the conditions of both dark and optical illuminations. It is
clearly seen that the dark current and the illumination current rise sharply at the break-
down voltage of 11.1 V owing to the avalanche multiplication process, where the incident
optical power is about –60 dBm. The responsivity (R) of the on-chip CMOS P+/N-well APD
is then given by,
𝐼𝑖𝑙𝑙𝑢𝑚𝑖𝑛𝑎𝑡𝑖𝑜𝑛 − 𝐼𝑑𝑎𝑟𝑘
𝑅= (6)
𝑃𝑜𝑝𝑡
where Iillumination and Idark represent the measured currents under illumination and dark
conditions, respectively. Popt represents the incident optical power. Figure 9b shows the
measured responsivity versus bias voltages, where the responsivity of 2.72 A/W is acquired
at the reverse bias voltage of 11.05 V.
Figure
Figure7.7.Simulated
Simulatedfrequency
frequencyresponse
responseof
ofthe
theproposed
proposed limiting
limiting amplifier
amplifier (LA).
(LA).
Figure 10 demonstrates the measured S-parameters of the optoelectronic Rx IC,
4.
whereMeasured Results
S21 of 26Results
4. Measured dB are achieved with a 50-Ω termination. It leads to the single-ended tran-
simpedance
Test gain
chips of(Z
Test chips of 21) of
the
the 87.4 dBΩ
proposed
proposed by the following
optoelectronic
optoelectronic ICequation,
Rx IC
Rx were fabricated
were fabricated in
in aa standard
standard 0.18-m
0.18-µm
CMOS process. Figure 8 shows the chip microphotograph
2𝑆21 𝑍02
CMOS process. Figure 8 shows the chip microphotograph and its test setup, in
and its test setup, in which which
the
the chip core occupies an area
chip core occupies an area of𝑍𝑇522
of 522 × 171 µm . DC measurements reveal
= × 171 m2. DC measurements reveal that the optoelec- that the
(7)
( 1 − 𝑆 )(1 − 𝑆 ) − 𝑆
optoelectronic Rx IC consumes 56.5 mW from a single 1.8-V supply.
11 22 21 𝑆12
tronic Rx IC consumes 56.5 mW from a single 1.8-V supply.
Figure 9a demonstrates the measured current-voltage characteristics of the on-chip
CMOS P+/N-well APD under the conditions of both dark and optical illuminations. It is
clearly seen that the dark current and the illumination current rise sharply at the break-
down voltage of 11.1 V owing to the avalanche multiplication process, where the incident
optical power is about –60 dBm. The responsivity (R) of the on-chip CMOS P+/N-well APD
is then given by,
𝐼𝑖𝑙𝑙𝑢𝑚𝑖𝑛𝑎𝑡𝑖𝑜𝑛 − 𝐼𝑑𝑎𝑟𝑘
𝑅= (6)
𝑃𝑜𝑝𝑡
where Iillumination and Idark represent the measured currents under illumination and dark
conditions, respectively. Popt represents the incident optical power. Figure 9b shows the
measured responsivity versus bias voltages, where the responsivity of 2.72 A/W is acquired
at the reverse bias voltage of 11.05 V.
Figure 8. Chip microphotograph of the proposed optoelectronic Rx IC and its test setup.
Figure 8. Chip microphotograph of the proposed optoelectronic Rx IC and its test setup.
Figure 10 demonstrates the measured S-parameters of the optoelectronic Rx IC,
whereFigure 9a dB
S21 of 26 demonstrates
are achieved the measured
with current-voltage
a 50-Ω termination. characteristics
It leads of the on-chip
to the single-ended tran-
+
CMOS P /N-well
simpedance gain (ZAPD
21) of under the by
87.4 dBΩ conditions of both
the following dark and optical illuminations. It is
equation,
clearly seen that the dark current and the illumination current rise sharply at the breakdown
2𝑆21 𝑍0
voltage of 11.1 V owing to the𝑍avalanche multiplication process, where the incident optical
𝑇 = (7)
(1 − 𝑆11 )((R)
power is about –60 dBm. The responsivity 1 −of𝑆22
the)− 𝑆21 𝑆12 CMOS P+ /N-well APD is
on-chip
then given by,
I − Idark
R = illumination (6)
Popt
where Iillumination and Idark represent the measured currents under illumination and dark
conditions, respectively. Popt represents the incident optical power. Figure 9b shows the
measured responsivity versus bias voltages, where the responsivity of 2.72 A/W is acquired
at the reverse bias voltage of 11.05 V.

Figure 8. Chip microphotograph of the proposed optoelectronic Rx IC and its test setup.
Sensors 2021,
Sensors 21, x4364
2021, 21, FOR PEER REVIEW 7 7ofof 10
10

Sensors 2021, 21, x FOR PEER REVIEW 7 of 10

(a) (b)
Figure
Figure9.
9. (a)
(a)Measured I–Vcurve
MeasuredI–V curveofofthe + /N-well
theP+P/N-well APD and
APD (b)(b)
and its its
responsivity.
responsivity.

Figure 10 demonstrates the measured S-parameters of the optoelectronic Rx IC, where

S21 of 26 dB are achieved with a 50-Ω termination. It leads to the single-ended tran-
simpedance gain (Z21 ) of 87.4 dBΩ by the following equation,

(a) 2S21 Z0 (b)

ZT = (7)
( 1 − S )( 1 − S
11 APD and
Figure 9. (a) Measured I–V curve of the P+/N-well ) − S
22 (b) its S
21 responsivity.
12

Figure 10. Measured S-parameters of the proposed Rx IC.

Figure 11 shows the measured output noise voltage of the optoelectronic Rx IC. Con-
sidering the background noise of the utilized oscilloscope (Agilent DCA 86100D), the in-
put referred average noise current spectral density is given by [10],

2√(4.01𝑚𝑉)2 − (0.660𝑚𝑉)2
𝐼𝑛,𝑖𝑛 ≡ = 337 𝑛𝐴𝑟𝑚𝑠 (8)
Figure10.
Figure MeasuredS-parameters
10.Measured S-parametersofofthe 87.4 𝑑𝐵𝛺
theproposed
proposed RxIC.
Rx IC.

Figure 11 shows the measured output noise voltage of the optoelectronic Rx IC.
Figure 11 shows the measured output noise voltage of the optoelectronic Rx IC. Con-
Considering the background noise of the utilized oscilloscope (Agilent DCA 86100D), the
sidering the background noise of the utilized oscilloscope (Agilent DCA 86100D), the in-
input referred average noise current spectral density is given by [10],
put referred average noise current spectral density is given by [10],
q
(4.01 mV)22 −
2 2√(4.01𝑚𝑉) 0.660 mV)22
− ((0.660𝑚𝑉)
(8)
𝐼𝑛,𝑖𝑛≡≡
In,in =
=337
337 𝑛𝐴
nA𝑟𝑚𝑠
rms (8)
87.4dBΩ
87.4 𝑑𝐵𝛺

In,in √
In,in,avg ≡ √ = 12 pA/ Hz (9)
790 MHz

Figure 11. Measured noise output voltage of the proposed Rx IC.

 Figure 11 shows the measured output noise voltage of the optoelectronic Rx IC. Con-
sidering the background noise of the utilized oscilloscope (Agilent DCA 86100D), the in-
put referred average noise current spectral density is given by [10],
Sensors 2021, 21, 4364 8 of 10
2√(4.01𝑚𝑉)2 − (0.660𝑚𝑉)2
𝐼𝑛,𝑖𝑛 ≡ = 337 𝑛𝐴𝑟𝑚𝑠 (8)
87.4 𝑑𝐵𝛺

Sensors 2021, 21, x FOR PEER REVIEW 8 of 10

𝐼𝑛,𝑖𝑛
𝐼𝑛,𝑖𝑛,𝑎𝑣𝑔 ≡ = 12 𝑝𝐴/√𝐻𝑧 (9)
Sensors 2021, 21, x FOR PEER REVIEW √790𝑀𝐻𝑧 8 of 10
This measured input-referred RMS noise of 337-nArms is then translated to 6.74-µ App
MDS since the signal-to-noise ratio (SNR) of 10 is required for successful detection [11].
With APD responsivity of 2.72 A/W, it corresponds to the minimum incident optical
Figure 11. Measured noise output voltage of the𝐼𝑛,𝑖𝑛 proposed Rx IC.
power11.
Figure of 2.48 µ W. Assuming
Measured noise output 𝐼that 1-mW
voltage
𝑛,𝑖𝑛,𝑎𝑣𝑔 ≡ of laser
thepower = 12is𝑝𝐴/√𝐻𝑧
proposed emitted,
Rx IC. the detection range can (9)
be estimated to be 10 m. Therefore, the √790𝑀𝐻𝑧noise performance of the optoelectronic
measured
This measured input-referred RMS noise of 337-nArms is then translated to 6.74-µApp
Rx
MDS ICThis
satisfies
since thethe
measured design specification
input-referred
signal-to-noise ratioRMS fornoise
(SNR) indoor
of 10ofishome-monitoring
337-nA
requiredrms is
forthen LiDAR detection
translated
successful sensors.
to 6.74-µ App
[11].
With Figure
MDSAPD 12 shows
sinceresponsivity the measured
the signal-to-noise
of 2.72ratio
A/W, eye-diagrams
(SNR) for 50-A
of 10 is required
it corresponds to thefor
pp 2 31-1 pseudo random bit se-
successful
minimum detection
incident [11].
optical
With APD
quence
power of(PRBS)
2.48responsivity
µW.inputs
Assuming of 2.72
at different A/W,
that 1-mW it
operation corresponds
laser to
100the
speedsisofemitted,
power Mb/sminimum
the and 500incident
detection Mb/s, optical
rangerespec-
can be
power
estimated of 2.48
to be µ W.
10 m.Assuming
Therefore, that
the 1-mW
measured laser power
noise is emitted,
performance
tively. Measurements confirm that the proposed optoelectronic Rx IC achieves wide and the
of thedetection range
optoelectronic can
Rx
besatisfies
IC
cleanestimated
eyes up theto be 10 m.
todesign Therefore,
specification
800-Mb/s operations. theindoor
for measured noise performance
home-monitoring LiDAR of the optoelectronic
sensors.
Rx IC satisfies the design specification for indoor home-monitoring 31 LiDAR sensors.
Figure 12 13 shows the measured
demonstrates eye-diagrams
the optically measured for 50-µA
pulse pp 2 -1 pseudo
responses, whererandom bit
the light
pulses Figure
sequence were 12 shows
(PRBS) inputs
generated the measured
byatutilizing
different eye-diagrams
anoperation
850-nm laser speedsfor of
50-A
source 100 2 (Seed
Mb/s
driver
pp 31 -1 and
pseudo
500 random
LDD, Mb/s, bit se-
Noticerespec-
Korea
tively.
quence
Ltd.) with (PRBS)
Measurements diodeconfirm
a laserinputs that the
at different
(Qphotonics, proposed
operation
USA). optoelectronic
Thespeeds of 100light
consecutive Mb/sRx IC achieves
and
pulses 500 wide
wereMb/s, and
respec-
incident on
clean
the eyes
on-chip
tively. up to
Measurements 800-Mb/s
CMOS P /N-well
+ operations.
confirm APD,
thatclearly showing
the proposed the final output
optoelectronic Rx voltage pulses.
IC achieves wide and
clean eyes up to 800-Mb/s operations.
Figure 13 demonstrates the optically measured pulse responses, where the light
pulses were generated by utilizing an 850-nm laser source driver (Seed LDD, Notice Korea
Ltd.) with a laser diode (Qphotonics, USA). The consecutive light pulses were incident on
the on-chip CMOS P+/N-well APD, clearly showing the final output voltage pulses.

Figure 12. Measured

Measured eye-diagrams at (a) 100 Mb/s,
Mb/s,(b)
(b)500
500Mb/s
Mb/sfor
for5050µ µA
Apppp 31 -1
2312-1 PRBS input.
PRBS input.

Figure 13 demonstrates the optically measured pulse responses, where the light pulses
were generated by utilizing an 850-nm laser source driver (Seed LDD, Notice Korea Ltd.)
with a laser diode (Qphotonics, USA). The consecutive light pulses were incident on the
on-chip CMOS
Figure 12. P+ /N-well
Measured APD, at
eye-diagrams clearly
(a) 100showing
Mb/s, (b)the
500 final
Mb/soutput
for 50 µ voltage
App 231-1 pulses.
PRBS input.

Figure 13. Optically measured pulse response of the proposed optoelectronic Rx IC.

Table 1 summarizes and compares the performance of the proposed optoelectronic

Rx IC with other prior arts. In [6], a 16-channel off-chip InGaAs PIN-PD array module
with 0.9-A/W responsivity was utilized. Therefore, it could not avoid the increase of cost
and form
Figure
Figure 13.
factor.
13.OpticallyReferences
Opticallymeasured
[12–15]
measuredpulse exploited
pulseresponse
response off-chip
ofthe
of the APDs,
proposed
proposed
which resulted
optoelectronic
optoelectronic IC. in hardware
RxIC.
Rx
complexity in an array configuration of multi-channel receivers.
This
Tablework is the firstand
1 summarizes attempt to integrate
compares an on-chip
the performance CMOS
of the APDoptoelectronic
proposed with analog
frontend
Rx IC with IC for theprior
other applications of LiDAR
arts. In [6], sensors.off-chip
a 16-channel DespiteInGaAs
the well-known inferior
PIN-PD array per-
module
formance
with 0.9-A/Wof anresponsivity
on-chip CMOS wasAPD, the proposed
utilized. Therefore,optoelectronic Rx ICthe
it could not avoid provides
increasecompa-
of cost
rable performance
and form with a little
factor. References expense
[12–15] of noise
exploited degradation.
off-chip Yet, itresulted
APDs, which would inbarely be a
hardware
Sensors 2021, 21, 4364 9 of 10

Table 1 summarizes and compares the performance of the proposed optoelectronic

Rx IC with other prior arts. In [6], a 16-channel off-chip InGaAs PIN-PD array module
with 0.9-A/W responsivity was utilized. Therefore, it could not avoid the increase of cost
and form factor. References [12–15] exploited off-chip APDs, which resulted in hardware
complexity in an array configuration of multi-channel receivers.

Table 1. Performance summary and comparison of the proposed optoelectronic Rx IC with other
prior arts.

Parameters This Work [6] [12] [13] [14] [15]

CMOS CMOS HV-CMOS CMOS CMOS CMOS
Technology (nm)
180 180 180 130 180 350
InGaAs
APD APD APD APD APD
Type PIN-PD
(on-chip) (off-chip) (off-chip) (off-chip) (off-chip)
(off-chip)
Cpd (pF) 0.5 * 0.5 0.5 2 1.2 1.2
PD
Responsivity
2.72 0.9 N/A N/A 50 N/A
(A/W)
Wavelength
850 1550 N/A N/A 905 N/A
(nm)
TZ gain (dBΩ) 93.4 76.3 88 78 86 100
Bandwidth (MHz) 790 720 700 640 281 450
Noise current spectral
√ 12 6.3 17 4.7 4.68 2.59
density (pA/ Hz)
Power Dissipation (mW) 56.5 29.8 180 114 200 6.6
* estimated from the measured breakdown voltage.

This work is the first attempt to integrate an on-chip CMOS APD with analog frontend
IC for the applications of LiDAR sensors. Despite the well-known inferior performance of
an on-chip CMOS APD, the proposed optoelectronic Rx IC provides comparable perfor-
mance with a little expense of noise degradation. Yet, it would barely be a critical issue for
home-monitoring sensors with 10-m detection range.

5. Conclusions
The first CMOS optoelectronic Rx IC was realized for the applications of indoor home-
monitoring LiDAR sensors. The on-chip P+ /N-well APD demonstrates the responsivity of
2.72 A/W at the reverse bias voltage of 11.05 V, and the whole optoelectronic Rx IC achieves
the differential transimpedance gain of 93.4 dBΩ, bandwidth of 790 MHz, and maximum
detection range of 10 m with power consumption of 56.5 mW. It can be concluded that this
work certainly provides a low-cost solution for short-range indoor LiDAR sensors.

Author Contributions: Conceptualization, S.-M.P.; methodology, M.-J.L. and S.-M.P.; validation,

J.-E.J. and M.-J.L.; writing—original draft preparation, J.-E.J.; writing—review and editing, M.-J.L. and
S.-M.P.; visualization, J.-E.J.; supervision, S.-M.P.; project administration, S.M.P.; funding acquisition,
S.-M.P. All authors have read and agreed to the published version of the manuscript.
Funding: This work was supported by the National Research Foundation of Korea (NRF) grant
funded by the Korea government (MSIP) (No. 2020R1A2C1008879). This work was supported by the
National Research Foundation (NRF), Korea, under project BK21 FOUR.
Institutional Review Board Statement: Not applicable.
Informed Consent Statement: Not applicable.
Data Availability Statement: Not applicable.
Acknowledgments: The EDA tool was supported by the IC Design Education Center.
Conflicts of Interest: The authors declare no conflict of interest.
Sensors 2021, 21, 4364 10 of 10

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