IR MOSFET

StrongIRFET™
IRL40SC228

Application HEXFET® Power MOSFET

 Brushed Motor drive applications
 BLDC Motor drive applications D
VDSS 40V
Battery powered circuits RDS(on) typ. 0.50m
 Half-bridge and full-bridge topologies max 0.65m
 Synchronous rectifier applications G

 Resonant mode power supplies ID (Silicon Limited) 557A

S
 OR-ing and redundant power switches
ID (Package Limited) 360A
 DC/DC and AC/DC converters
 DC/AC Inverters
D

Benefits S
Optimized for Logic Level Drive SS
SS
S
Improved Gate, Avalanche and Dynamic dV/dt Ruggedness G

Fully Characterized Capacitance and Avalanche SOA D2PAK-7Pin

Enhanced body diode dV/dt and dI/dt Capability IRL40SC228
Lead-Free*
RoHS Compliant, Halogen-Free G D S
Gate Drain Source

Standard Pack
Base Part Number Package Type Orderable Part Number
Form Quantity
IRL40SC228 D2PAK-7Pin Tape and Reel Left 800 IRL40SC228
RDS(on), Drain-to -Source On Resistance ( m )

5 600
ID = 100A LIMITED BY PACKAGE

4
500
ID, Drain Current (A)

400
3

300
2
200
TJ = 125°C
1
100

TJ = 25°C
0 0
0 4 8 12 16 20 25 50 75 100 125 150 175
V GS, Gate-to-Source Voltage (V) TC, Case Temperature (°C)

Fig 1. Typical On-Resistance vs. Gate Voltage Fig 2. Maximum Drain Current vs. Case Temperature

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Absolute Maximum Rating
Symbol Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 557
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 393
A
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Wire Bond Limited) 360
IDM Pulsed Drain Current  1440
PD @TC = 25°C Maximum Power Dissipation 416 W
Linear Derating Factor 2.8 W/°C
VGS Gate-to-Source Voltage ± 20 V
TJ Operating Junction and
-55 to + 175
TSTG Storage Temperature Range °C
Soldering Temperature, for 10 seconds (1.6mm from case) 300
Avalanche Characteristics
EAS (Thermally limited) Single Pulse Avalanche Energy  1275
mJ
EAS (Thermally limited) Single Pulse Avalanche Energy  2150
IAR Avalanche Current  A
See Fig 15, 16, 23a, 23b
EAR Repetitive Avalanche Energy  mJ
Thermal Resistance
Symbol Parameter Typ. Max. Units
RJC Junction-to-Case  ––– 0.36
RCS Case-to-Sink, Flat Greased Surface 0.50 ––– °C/W
RJA Junction-to-Ambient  ––– 62

Static @ TJ = 25°C (unless otherwise specified)

Symbol Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 40 ––– ––– V VGS = 0V, ID = 250µA
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient ––– 0.031 ––– V/°C Reference to 25°C, ID = 5mA 
––– 0.50 0.65 VGS = 10V, ID = 100A 
RDS(on) Static Drain-to-Source On-Resistance m
––– 0.60 0.90 VGS = 4.5V, ID = 50A 
VGS(th) Gate Threshold Voltage 1.0 ––– 2.4 V VDS = VGS, ID = 250µA
––– ––– 1.0 VDS = 40 V, VGS = 0V
IDSS Drain-to-Source Leakage Current µA
––– ––– 150 VDS = 40V,VGS = 0V,TJ =125°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V
IGSS nA
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
RG Gate Resistance ––– 2.2 ––– 

Notes:
Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 360A. Note that
Current imitations arising from heating of the device leads may occur with some lead mounting arrangements.
(Refer to AN-1140)
Repetitive rating; pulse width limited by max. junction temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.146mH, RG = 50, IAS = 100A, VGS =10V.
ISD  100A, di/dt  1008A/µs, VDD  V(BR)DSS, TJ  175°C.
Pulse width  400µs; duty cycle  2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS.
 R is measured at TJ approximately 90°C.
 Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 65A, VGS =10V.
 Pulse drain current is limited to 1440A by source bonding technology.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques
refer to application note #AN-994: http://www.infineon.com/technical-info/appnotes/an-994.pdf

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Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)

Symbol Parameter Min. Typ. Max. Units Conditions
gfs Forward Transconductance 264 ––– ––– S VDS = 10V, ID = 100A
Qg Total Gate Charge ––– 205 307 ID = 100A
Qgs Gate-to-Source Charge ––– 57 ––– VDS = 20V
nC
Qgd Gate-to-Drain Charge ––– 104 ––– VGS = 4.5V
Qsync Total Gate Charge Sync. (Qg– Qgd) ––– 101 –––
td(on) Turn-On Delay Time ––– 67 ––– VDD = 20V
tr Rise Time ––– 210 ––– ID = 30A
ns
td(off) Turn-Off Delay Time ––– 222 ––– RG= 2.7
tf Fall Time ––– 176 ––– VGS = 4.5V
Ciss Input Capacitance ––– 19680 ––– VGS = 0V
Coss Output Capacitance ––– 2305 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 1575 ––– pF ƒ = 1.0MHz, See Fig.7
Coss eff.(ER) Effective Output Capacitance (Energy Related) ––– 2690 ––– VGS = 0V, VDS = 0V to 32V
Coss eff.(TR) Output Capacitance (Time Related) ––– 3390 ––– VGS = 0V, VDS = 0V to 32V
Diode Characteristics
Symbol Parameter Min. Typ. Max. Units Conditions
Continuous Source Current MOSFET symbol D
IS ––– ––– 557
(Body Diode) showing the
A
Pulsed Source Current integral reverse G

ISM ––– ––– 1440

(Body Diode) p-n junction diode. S

VSD Diode Forward Voltage ––– ––– 1.2 V TJ = 25°C,IS =100A,VGS = 0V 

dv/dt Peak Diode Recovery dv/dt  ––– 2.0 ––– V/ns TJ = 175°C,IS = 100A,VDS = 40V
––– 42 ––– TJ = 25°C VDD = 34V
trr Reverse Recovery Time ns
––– 43 ––– TJ = 125°C IF = 100A,
––– 43 ––– TJ = 25°C di/dt = 100A/µs 
Qrr Reverse Recovery Charge nC
––– 45 ––– TJ = 125°C
IRRM Reverse Recovery Current ––– 1.7 ––– A TJ = 25°C 

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1000 1000

3.25V

ID, Drain-to-Source Current (A)

ID, Drain-to-Source Current (A)

3.25V

100 100
VGS VGS
TOP 15V TOP 15V
10V 10V
6.0V 6.0V
5.0V 5.0V
60µs PULSE WIDTH 4.5V 60µs PULSE WIDTH 4.5V
4.0V Tj = 175°C 4.0V
Tj = 25°C 3.5V
3.5V
BOTTOM 3.25V BOTTOM 3.25V

10 10
0.1 1 10 100 0.1 1 10 100
V DS, Drain-to-Source Voltage (V) V DS, Drain-to-Source Voltage (V)

Fig 3. Typical Output Characteristics Fig 4. Typical Output Characteristics

1000 2.2
ID = 100A

RDS(on) , Drain-to-Source On Resistance

V GS = 10V
ID, Drain-to-Source Current (A)

100 1.8

TJ = 175°C
(Normalized)

TJ = 25°C
10 1.4

1 1.0

V DS = 10V
60µs PULSE WIDTH
0.1 0.6
0 1 2 3 4 5 -60 -20 20 60 100 140 180
TJ , Junction Temperature (°C)
V GS, Gate-to-Source Voltage (V)

Fig 5. Typical Transfer Characteristics Fig 6. Normalized On-Resistance vs. Temperature

1000000 14
VGS = 0V, f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED ID= 100A
C rss = C gd
12
V DS= 32V
V GS, Gate-to-Source Voltage (V)

C oss = C ds + C gd
100000 V DS= 20V
10
C, Capacitance (pF)

V DS= 8V

Ciss 8
10000
Coss 6
Crss

4
1000

100 0
1 10 100 0 50 100 150 200 250 300 350 400 450 500
V DS, Drain-to-Source Voltage (V) QG, Total Gate Charge (nC)

Fig 7. Typical Capacitance vs. Drain-to-Source Voltage Fig 8. Typical Gate Charge vs. Gate-to-Source Voltage

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1000
OPERATION IN THIS AREA
LIMITED BY RDS(on)
1000

ID, Drain-to-Source Current (A)

ISD, Reverse Drain Current (A)

100 100µsec

100
TJ = 175°C
TJ = 25°C 1msec
10
10 LIMITED BY PACKAGE

10msec
1
1 Tc = 25°C
Tj = 175°C DC
V GS = 0V Single Pulse
0.1 0.1
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 0.1 1.0 10.0

V SD, Source-to-Drain Voltage (V) V DS , Drain-toSource Voltage (V)

Fig 9. Typical Source-Drain Diode Forward Voltage Fig 10. Maximum Safe Operating Area
V (BR)DSS, Drain-to-Source Breakdown Voltage (V)

52 2.0
Id = 5.0mA

50 1.6

48 Energy (µJ) 1.2

46 0.8

44 0.4

42 0.0
0 10 20 30 40
-60 -20 20 60 100 140 180
TJ , Temperature ( °C ) V DS, Drain-to-Source Voltage (V)

Fig 11. Drain-to-Source Breakdown Voltage Fig 12. Typical Coss Stored Energy

1.0
RDS(on), Drain-to -Source On Resistance ( m )

V GS = 3.5V
0.8
V GS = 4.5V
V GS = 6.0V
V GS = 8.0V
V GS = 10V
0.6

0.4
0 40 80 120 160 200
ID, Drain Current (A)

Fig 13. Typical On-Resistance vs. Drain Current

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1

Thermal Response ( Z thJC ) °C/W D = 0.50

0.1 0.20
0.10
0.05
0.01 0.02
0.01

0.001
SINGLE PULSE
Notes:
( THERMAL RESPONSE )
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)

Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case

1000
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming  Tj = 150°C and
Tstart =25°C (Single Pulse)
Avalanche Current (A)

100

10 Allowed avalanche Current vs avalanche

pulsewidth, tav, assuming j = 25°C and
Tstart = 150°C.

1
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)

Fig 15. Avalanche Current vs. Pulse Width

1400
TOP Single Pulse Notes on Repetitive Avalanche Curves , Figures 15, 16:
1200 BOTTOM 1.0% Duty Cycle (For further info, see AN-1005 at www.irf.com)
ID = 100A 1.Avalanche failures assumption:
EAR , Avalanche Energy (mJ)

Purely a thermal phenomenon and failure occurs at a

1000 temperature far in excess of Tjmax. This is validated for every
part type.
800 2. Safe operation in Avalanche is allowed as long asTjmax is not
exceeded.
3. Equation below based on circuit and waveforms shown in Figures
600 23a, 23b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
400 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage
increase during avalanche).
6. Iav = Allowable avalanche current.
200
7. T = Allowable rise in junction temperature, not to exceed Tjmax
(assumed as 25°C in Figure 14, 15).
0 tav = Average time in avalanche.
25 50 75 100 125 150 175 D = Duty cycle in avalanche = tav ·f
Starting TJ , Junction Temperature (°C)
ZthJC(D, tav) = Transient thermal resistance, see Figures 14)
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
Iav = 2T/ [1.3·BV·Zth]
Fig 16. Maximum Avalanche Energy vs. Temperature EAS (AR) = PD (ave)·tav

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2.5 28
IF = 60A
24
V GS(th) , Gate threshold Voltage (V)

V R = 34V
2.0
TJ = 25°C
20
TJ = 125°C
1.5
16

IRRM (A)
ID = 250µA
ID = 1.0mA 12
1.0 ID = 1.0A

8
0.5
4

0.0 0
-75 -25 25 75 125 175 0 200 400 600 800 1000
TJ , Temperature ( °C ) diF /dt (A/µs)

Fig 17. Threshold Voltage vs. Temperature Fig 18. Typical Recovery Current vs. dif/dt
28 2400
IF = 60A IF = 60A
24 V R = 34V 2000 V R = 34V
TJ = 25°C TJ = 25°C
20
TJ = 125°C 1600 TJ = 125°C

16
QRR (nC)
IRRM (A)

1200
12
800
8

400
4

0 0
0 200 400 600 800 1000 0 200 400 600 800 1000
diF /dt (A/µs) diF /dt (A/µs)

Fig 19. Typical Recovery Current vs. dif/dt Fig 20. Typical Stored Charge vs. dif/dt

2400
IF = 100A
2000 V R = 34V
TJ = 25°C
1600 TJ = 125°C
QRR (nC)

1200

800

400

0
0 200 400 600 800 1000
diF /dt (A/µs)

Fig 21. Typical Stored Charge vs. dif/dt

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Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs

V(BR)DSS

15V
tp

L DRIVER
VDS

RG D.U.T +
V
- DD
IAS A
20V
tp 0.01 I AS

Fig 23a. Unclamped Inductive Test Circuit Fig 23b. Unclamped Inductive Waveforms

Fig 24a. Switching Time Test Circuit Fig 24b. Switching Time Waveforms
Id
Vds

Vgs

VDD
Vgs(th)

Qgs1 Qgs2 Qgd Qgodr

Fig 25a. Gate Charge Test Circuit Fig 25b. Gate Charge Waveform

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D2Pak - 7 Pin Package Outline (Dimensions are shown in millimeters (inches))

D2Pak - 7 Pin Part Marking Information

PART NUMBER
INTERNATIONAL
RECTIFIER LOGO F1324S-7P
YWWP

17 89 DATE CODE
ASSEMBLY Y = YEAR
LOT CODE W = WEEK
P = LEADFREE

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Qualification Information
Industrial
Qualification Level
(per JEDEC JESD47F) †
MSL1
Moisture Sensitivity Level D2PAK-7Pin
(per JEDEC J-STD-020D†)
RoHS Compliant Yes

† Applicable version of JEDEC standard at the time of product release.

Revision History

Date Comments
05/12/2017  Corrected package picture added “s” on pin number 4 - page 1.

Published by
Infineon Technologies AG
81726 München, Germany
© Infineon Technologies AG 2015
All Rights Reserved.

IMPORTANT NOTICE
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics
(“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any
information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and
liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third
party.
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this
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the product of Infineon Technologies in customer’s applications.
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of
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completeness of the product information given in this document with respect to such application.
For further information on the product, technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies office (www.infineon.com).
WARNINGS
Due to technical requirements products may contain dangerous substances. For information on the types in question
please contact your nearest Infineon Technologies office.
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representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a
failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.

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