Professional Documents
Culture Documents
Schedule of STC - VLSI - Design
Schedule of STC - VLSI - Design
SCHEDULE OF SHORT-TERM COURSE ON “ Modern VLSI Design and EDA Tools Hands-on”
2nd-8th, November 2023, Hybrid Mode (Participant can attend either Online or Physical mode)
02.11.2023 03.11.2023 04.11.2023 06.11.2023 07.11.2023 08.11.2023
Thursday Friday Saturday Monday Tuesday Wednesday
10:00 AM– 12:00 NOON
Lunch Break
Flow Using Cadence Domino Logic and Nanometer SRAM Volatile Memories
Tool- Hands-on its Application for Hands-on Session Dr. Vikas Nehra
Digital VLSI Design Design
Prof. Sudebdas Gupta, Session Biomedical Devices Prof. Neeta Pandey,
Mr. Kumar Divya, DCRUST
Mr. Kamlesh, CoreEL Techn Pvt. Ltd. &
IIT Roorkee Dr. Ankur Kumar DTU Delhi
Entuple Technologies IIIT Una
Pvt. Ltd.
Velidictroy
Session
Patron: Prof. (Dr.) Ajay K Sharma, Director, National Institute of Technology Delhi
Convenor: Prof. (Dr.) Manoj Kumar & Dr. Preeti Verma, Dept. of ECE, National Institute of Technology Delhi,
Email: preetiverma@nitdelhi.ac.in, Contact Number: 9717063730
Coordinators: Dr. Manisha Bharti & Dr.D.Vaithiyanathan, Dept. of ECE , National Institute of Technology Delhi
For further details: https://nitdelhi.ac.in/wp-content/uploads/2023/10/BROCHURE.pdf
Registration Link: https://forms.gle/haMs23cgPAW9QcT67
Last date for registration is 31.10.2023