1. a. Differentiate between multi computers and multi processors.

b. Represent the number (+46.5)10 as a floating-point binary number with 24 bits. The
normalized fraction mantissa has 16 bits and exponent has 8 bits.
2. An 8-bit register contains the value 01111011 and the carry bit is equal to 1. Perform the
a. eight shift operations which were discussed. Each time, start from the initial value given
above.
b. What is RTN? Write and explain this notation to three address, two-address, single address,
and zero-address instruction types.
3. Design 4-bit Binary Adder with Full Adder.

Explain briefly about performance evaluation by using various bench marks. List out the
a.
types of bench marks and mention its advantage and disadvantage.
1.
Perform the following subtractions in the binary number system, using 2’s complements:
b.
(i) 1111 – 110 (ii) 1110 – 1100
A two-word instruction is stored in memory at an address designated by the symbol ‘W’.
The address field of the instruction (stored at W+1) is designated by the symbol ‘Y’. The
a. operand used during the execution of the instruction stored at an address symbolized by
2. ‘Z.’ An index register contains the value ‘X’. State how ‘Z’ is calculated from the other
addresses if the addressing mode of the instruction is 1. Direct 2. Indirect
b. Write control sequencing for the executing the instruction. Add R4, R5, R6.
3. a. Design 4 x 4 array multiplier with Full Adder.