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High Step Up Flyback With Low Overshoot
High Step Up Flyback With Low Overshoot
It is easy to achieve voltage transformation with the flyback topology because the
output–input voltage is governed by the mathematical relationship of Equation (1) [11].
vo Ns D
= (1)
v pv Np 1 − D
Equation (1) suggests that the output voltage could be varied by adjusting two vari-
ables, the duty cycle, D, and the winding turn ratio Ns /Np (see Appendix A for the derivation
of Equation (1)). The latter is important because by merely using a high ratio of turns, it is
possible to achieve a high step-up transformation (e.g., 18 to 380 V) while still maintaining
a manageable duty cycle. Such high step-up is not usually possible with transformer-less
topologies (such as boost, buck-boost, and Ćuk converter) because they usually require
an extremely high duty cycle to achieve such conversion. For example, stepping up from
18 to 380 V would require a duty cycle of 0.95 using a conventional boost converter. It is
undesirable to operate at such a duty cycle because the output will be incredibly sensitive
to a small variation of input PWM. High voltage step-up transformation is useful in grid-
connected photovoltaic (PV) AC modules (or microinverters). In such an application, the
PV panel is of low DC voltage (18–40 V) while the mains grid is of much larger voltage
(240 Vrms or 340 Vpeak ). Unlike a typical PV array system where mitigation techniques
are required to improve the performance under partial shading [12], microinverter system
performance is unaffected under partial shading because each of the ac-module PV panels
is independent of each other. Each PV panel has its own microinverter with an individual
maximum power point tracker (MPPT).
Channel 1: Secondary Snubberless SiC diode Diode blocking Further zoom at peak stress
voltage is Peak stress (1120V)
Secondary Diode Current overdeveloped Channel 3:
due to negative Secondary SiC
current stored
in leakage
Diode Voltage
Secondary
Ideal referred
Transformer leakage
Ls
Lm
Magnetizing Np : Ns
inductance
Figure 3.3.Flyback
Figure transformer
Flyback secondary
transformer leakage. leakage.
secondary
2.1. Problem with Using GaN as a Secondary Rectifier
2.1. Problem
New widewith Using
bandgap GaN as a Secondary
semiconductor Rectifier
technology of silicon carbide (SiC) [13–17], and
gallium nitride
New wide(GaN) [18–22] could
bandgap be used to address
semiconductor the reverse
technology ofrecovery
silicondiode
carbidecurrent(SiC) [13
problem. Due to their construction, SiC and GaN have no reverse recovery charges [20,21].
gallium nitride (GaN) [18–22] could be used to address the reverse recovery diod
However, this does not imply that the problem could be solved by simply switching to
problem.
GaN and SiC. Due to their construction, SiC and GaN have no reverse recovery cha
and To [21]. However,
develop this does
the blocking notthe
voltage, imply
currentthat the problem
charging couldcapacitor
of the junction be solved by simpl
must
go through
ing to GaN theandseries
SiC.leakage inductance, thus energizing the leakage inductance in the
process. The problem is illustrated in Figure 2d, once the rectifier has reached the desired
To develop the blocking voltage, the current charging of the junction capac
blocking voltage, there is still residual current stored in the leakage. Therefore, the excess
go through
energy stored the
in the series
leakageleakage inductance,
(or charge) must be dumpedthus energizing the leakage
onto the GaN/SiC junctioninductan
process.
capacitance. The Thisproblem
charge dumpis illustrated
causes theinvoltage
Figure of2d,the once
junctionthecapacitance
rectifier has reached th
blocking
voltage to be over-developed, exceeding the desired blocking
blocking voltage, there is still residual current stored in the leakage. Therefore, tvoltage (Equation (7)).
GaN and SiC diodes have no reverse recovery charge because they have no p–n
energy stored in the leakage (or charge) must be dumped onto the GaN/SiC jun
junction (unlike a normal silicon diode) [20]. Forming a depletion region in a p–n junction
pacitance.
requires the Thiscarrier charge dump causes
to be removed throughthe thevoltage
combined ofaction
the junction capacitance
of recombination (of block
age to be over-developed,
holes-electron pair) and excess carrier exceeding
sweep out thebydesired
negativeblocking
diode current voltage
([23] on (Equation
p. 537). (7))
Without a p–n junction, such a process is unnecessary. In
GaN and SiC diodes have no reverse recovery charge because they have noGaN transistors, the conduction
between drain and source (and vice versa) occurs in a two-dimensional electron gas channel
tion (unlike a normal silicon diode) [20]. Forming a depletion region in a p–n
(2DEG) [20,21]. Turning off the GaN or the blocking of current occurs when the gate depletes
requires the carrier
the 2DEG channel to betheremoved
underneath gate electrodethrough
[21] by the combined
applying actionvoltage
0 V or negative of recombin
holes-electron
at the gate of the GaN transistor. Without any p–n junction, there is no requirement current
pair) and excess carrier sweep out by negative diode for ([
reverseWithout
537). recovery a (no
p–nholes needed tosuch
junction, be returned
a process to theisp-type region andIn
unnecessary. vice
GaNversa for
transistors,
the electrons). Nonetheless, the GaN drain source still requires a reverse current to fill
duction between drain and source (and vice versa) occurs in a two-dimensional
up its effective drain-source capacitance (Coss ). It is an important concept to understand
gas
that achannel (2DEG)
reverse-biased [20,21].
rectifier (or a Turning
turned-off off the GaN
transistor) doesor notthe blocking
imply that zeroofcurrent
current occu
the
will gate depletes
flow through thethe 2DEG channel
semiconductor. Evenunderneath
in reverse-biased the (or
gate electrode
turned [21] by applyi
off) conditions,
negative voltage at the gate of the GaN transistor. Without any p–ncircuit.
current can still flow through the device if there is a potential difference in the junction, th
Through the semiconductor capacitor, the current can flow in both positive and negative
requirement for reverse recovery (no holes needed to be returned to the p-type re
directions, albeit through a higher impedance due to the reactance introduced by the
vice
junctionversa for the(pF).
capacitance electrons).
The blocking Nonetheless, the GaN
voltage is important drain
because source
it closes still requires
the potential
current to fillThe
gap in a circuit. upcurrent
its effective
will onlydrain-source
stop flowing once capacitance
there is no more (Coss ). It is an
potential important co
difference.
In the narrative of a power electronics engineer, the key is to
understand that a reverse-biased rectifier (or a turned-off transistor) does not imdevelop the blocking voltage
elegantly, such that no unnecessary spikes or overvoltage occurs during the transient.
zero current will flow through the semiconductor. Even in reverse-biased (or tu
Although GaN has no reverse recovery charge, a mitigation technique is still manda-
conditions,
tory in GaN tocurrent can still overvoltage
avoid irreversible flow through damage thetodevice if there is aAspotential
the semiconductor. suggesteddifferen
circuit.
in Figure Through
2, without any the snubber
semiconductor
interventioncapacitor,
on the secondary the current
rectifier,can flowvoltage
the peak in both pos
stress may reach up to 1.1 kV. The voltage step response in a series LC circuit is always
double the steady state (more details in theory Section 3.1 and Appendix C). It may not be
an issue should a 1.2 kV rated SiC diode be employed as the secondary rectifier. However,
to our best knowledge, as of 2022, a 1.2 kV GaN device does not yet commercially exist.
There is a limited number of GaN unique parts that are commercially available. Table 1
lists down the commercially available high-voltage GaN devices (rated drain-source volt-
Energies 2022, 15, 5092 5 of 34
age above 400 V) obtained through a search at the world’s major electronics distributors
Digikey Electronics (Thief River Falls, MN, USA), Mouser Electronics (Mansfield, TX, USA),
Element14 (Leeds, UK), RS Component (Corby, UK), Arrow (Centennial, CO, USA), and
LCSC (Shenzhen, China). Table 1 depicts a concerning trend; the drain-source voltage of
GaN is limited to a maximum of only 600 or 650 V. In the flyback high step-up application,
the steady state voltage of the GaN is around 600 V. This meant a requirement of an ultralow
near-zero overshoot for 600 V devices and 9% overshoot for 650 V. Both are difficult to
achieve with large secondary flyback transformer leakage. Exceeding the absolute voltage
rating of the drain-source will result in irreversible damage to the GaN semiconductor.
We may miss some commercial unique GaN parts (>400 V Vdss ); these components might
not be listed in the major distributors. We do acknowledge that these distributors may
not cover the entire stocks circulating globally. However, since they are the world’s major
electronics distributors, it could be inferred that GaN devices that are not listed at these
sites might be very difficult to obtain and use commercially. A 1.2 kV GaN does exist,
but to the best of our knowledge, it appears it is currently only in the laboratory. Such
recent work is demonstrated in [22] by researchers at MIT, in which a distinctive vertical
FinFET structure is used to achieve a GaN transistor with higher breakdown voltage (not
lateral structure).
Table 1. List of unique GaN parts (>400 V Vdss ) commercially available from major distributors
(Digikey, Mouser, Element14, RS Components, LCSC, and Arrow).
Table 1. Cont.
There are commercial GaN MOSFETs with higher voltage ratings, our search found that
there is only two commercially available GaN with 900 V (highlighted with asterisk *) rating
from Transphorm Inc. (Goleta, CA, USA), the TP90H050WS (newly released in 2022), and
TP90H180PS. However, it is important to note that they are not 100% GaN High Electron
Mobility Transistor (HEMT) devices. Instead, the manufacturer combined GaN HEMT and
silicon MOSFET and has them connected in cascode configuration. The main disadvantage of
this is that, unlike enhancement mode HEMT GaN, the body diode is not without a reverse
recovery charge. It is unclear whether there will be more of 900 V rated GaN in the future.
If so, the manufacturer would likely charge a premium for GaN devices with higher voltage
capabilities. Regardless, based on the trend in Table 1, it is self-evident that GaN rated at either
600 V or 650 V would remain in the market for years to come.
Additionally, it is interesting to note that Wolfspeed (previously Cree) is also a major
GaN manufacturer. However, Wolfspeed’s GaNs are RF GaNs that are meant for radio
frequency operation (such as radar). They are not meant for general power electronics usage.
These RF GaN devices are extremely fast that could work at GHz frequency. Some examples
include CG2H80015D, CG2H80030D (8 GHz transistor), CGH60008D, and CGH60030D
(6 GHz transistor). However, the drain-source breakdown voltage is limited to only
120 V. Such is typical for RF GaN. GaN has a wide application and is not only limited to
power electronics. Due to GaNs ability to conduct electrons more efficiently than silicon,
GaN is also used in radio, light-emitting diode [24–26], in HEMTs [27], laser photodiode
detectors [28], and radiation detectors [29].
It is preferable to use GaN as a synchronous rectifier due to the lower forward voltage
(small drain-source resistance). Using 1.2 kV SiC MOSFET is possible; however, unlike the
SiC diode, SiC MOSFET’s body diode is not without zero reverse recovery charge.
achieved by using a newly proposed leakage bypass technique to reduce the voltage stress
on the secondary GaN rectifier.
Qp PWM Qp ON Qp OFF
ip
Primary
Current
VQp
Primary
Switch
Voltage
is
Secondary
Current
VQs
Secondary
Rectifier
Voltage
time
is is
Maximum
secondary current
Secondary Secondary
No secondary oscillation
Current Current
current oscillation
Secondary Secondary
Rectifier Rectifier
Voltage Voltage
Figure 4.asQuasi-resonant
Figure 4. Quasi-resonant as arectifier
a solution to the solutionproblem
to the rectifier
is onlyproblem is in
possible only possible
DCM in DCM and BCM
and BCM.
3. Principle
Energies 2022, 15, x FOR PEER REVIEW 9 of 35
3.1. Theory of the Problem
As depicted in Figures 5 and 6, during state (a), the magnetizing inductance discharges
its energy and transfers them to the secondary. Hence, the secondary rectifier conducts in
3. Principle
forward bias. In this state, the rectifier’s voltage is simply the forward voltage drop of the
3.1. Theory
rectifier, of the
while theProblem
secondary rectifier current is given by Equation (2) (p. 53 in [23], noting
the dot convention).in Figures 5 and 6, during state (a), the magnetizing inductance dis-
As depicted
charges its energy and transfers them to theNsecondary.
p Hence, the secondary rectifier con-
the=rectifier’s
ducts in forward bias. In this state,i Qs im −voltage
ip is simply the forward voltage (2)
Ns
drop of the rectifier, while the secondary rectifier current is given by Equation (2) (p. 53
Qp turns ON (closes) at the start of state (b), as a result, the magnetizing inductance
in [23], noting the dot convention).
will experience a potential difference equivalent to the PV voltage (at maximum power
point vpv = Vmpp ). The dot convention implies= that−this voltage is reflected to the secondary
(2)
as a negative polarity voltage source as in Equation (3) and Figure 6b (p. 55 in [23], noting
the dotQconvention):
p turns ON (closes) at the start of state (b), as a result, the magnetizing inductance
Ns to the PV voltage (at maximum power
will experience a potential differencevsequivalent
= − Vmpp (3)
Np this voltage is reflected to the secondary
point vpv = Vmpp). The dot convention implies that
as aDuring
negative polarity
this time, voltage source as
the secondary in Equation
rectifier is still(3)forward
and Figure 6b (p.
biased 55 in [23],
because noting the
it carries
the dot convention):
residual current stored in secondary leakage. Due to the change in voltage source polarity,
the secondary residual current discharges to zero, and the differential equation governing
=− (3)
rectifier current is as in Equation (4) (derivation detail in Appendix D).
During this time, the secondary
diQs rectifier
1 Niss still forward biased because it carries the
residual current stored in secondary= −
leakage. DueVto
mpp +change
the vo in voltage source polarity, (4)
dt L s Np
the secondary residual current discharges to zero, and the differential equation governing
rectifier
At the current is as
start of in Equation
state (4) (derivation
(c), the current crossesdetail
zero.in Once
Appendix D).
the rectifier current crosses
zero, the rectifier would start to become reverse biased. As such, the rectifier would
transform from behaving as a forward-biased =− diode+ to a non-linear capacitor (with(4) its
junction capacitance varies with the reverse voltage). As shown in Figure 7c,d, the non-
At the start
linear capacitor of state (c), the
characteristic current crosses
is specified zero. Once the rectifier
in the manufacturer’s current
datasheet. Thecrosses
negative
zero, the rectifier would start to become reverse biased. As such, the rectifier would trans-
current charges the junction capacitance hence developing the rectifier’s blocking voltage
form from behaving as a forward-biased diode to a non-linear capacitor (with its junction
in the process. The junction capacitor forms a series LC circuit with the leakage. Through
capacitance varies with the reverse voltage). As shown in Figure 7c,d, the non-linear ca-
Kirchhoff’s KVL, the differential equation governing the current is given by Equation (5)
pacitor characteristic is specified in the manufacturer’s datasheet. The negative current
(note the derivation detail in Appendix D).
charges the junction capacitance hence developing the rectifier’s blocking voltage in the
process. The junction capacitordiQsforms a1 series
Ns LC circuit with the leakage. Through Kirch-
hoff’s KVL, the differential equation = −governing the+
Vmpp vo − vis
current Qs given by Equation (5) (note (5)
dt L s Np
the derivation detail in Appendix D).
leakage
Rectifier
current
conduct Residual energy stored in junction capacitor at the start of this period (the
magnetizing
current
(e) peak voltage) re-circulate through the series LC (leakage-junction capacitor)
circuit until all the excess energy are dissipated as heat or electromagnetic
radiation
t=0
time
Figure
Figure 5. 5.The
Thesecondary
secondaryrectifier
rectifier voltage
voltage and
and current
currentin
inthe
theexistence
existenceofof
leakage.
leakage.
Energies 2022,15,
Energies2022, 15,5092
x FOR PEER REVIEW 10 of 3510 of 34
Secondary
referred i m :Magnetizing current
Magnetizing current leakage i p :Primary current
discharging to secondary N : N i Qs :Secondary Rectifier current Qs forward biased
p s
ip i m Ls
Vmpp Qs Ls
Lm VQs
18V
Vo 380V Np
i Qs = im ip 380V Vo
Ns
Qp
Equivalent circuit
i Qs
i Qs
Qp to close at t = 0
(a)
Leakage carries Leakage carries
residual leakage residual leakage
current Qs still forward biased Qs forward biased
current
Ls Qs Ls VQs
Vmpp
18V Lm
Ns Vmpp
Vs 380V Np 380V Vo
Equivalent circuit
Qp
i Qs i Qs
Qp closes at t = 0
(b) Qs becomes
nonlinear capacitor
Leakage current Qs becomes nonlinear as characterized in
capacitor in reverse Leakage current datasheet
goes negative goes negative
biased
Ls Qs Ls VQs
Vmpp
18V Lm
Ns Vmpp
380V Np 380V Vo
Equivalent circuit
Qp
i Qs i Qs
(c)
Qs has to absorb Energy dumped
Leakage starts to Qs experienced peak Vpeak Ns Vmpp
Vo by leakage into
deenergized voltage stress Np
Peak negative current Qs capacitor
in leakage dumped on
Ls Qs Qs capacitance Ls
Vmpp VQs
18V Lm
Ns Vmpp
380V Np 380V Vo
Equivalent circuit
Qp
i Qs i Qs
(d)
Decayed oscillation between
Decaying oscillation until
Qs and Ls until steady state is Ns Vmpp
steady state is reached at VQs Vo
reached Np
Ls Qs Ls VQs
Vmpp
18V Lm
Ns Vmpp
380V Np 380V Vo
Equivalent circuit
Qp
i Qs
(e)
Figure
Figure6.6.The
Theswitching states
switching of snubber-less
states secondary
of snubber-less rectifier.
secondary (a) State
rectifier. (a)aState
(b) State b (c)
a (b) State
State c State c
b (c)
(d) State d (e) State e.
(d) State d (e) State e.
Energies 2022, 15,
Energies 5092
2022, 15, x FOR PEER REVIEW 1111ofof35
34
Silicon Carbide Schottky Barrier Diode Model [50] Parasitic Capacitance of Power MOSFET [19],[22],[51]
Junction
Anode Cathode Capacitance
Drain
Anode Cathode
Cgd
Rs Crss = Cgd
Diode I-V Gate
I Ij Ciss = Cgs+ Cgd
Cds
Ij and Rs are
In reverse bias the current Cgs Coss = Cds+ Cgd
determined from
source Ij from I-V curve is
I-V curve
zero, the model simplifies to
V only junction capacitance and
Reverse bias Forward bias the series equivalent resistance Source
(a) (b)
120 Coss
Junction Capacitance (pF)
Junction Capacitance (pF)
100 10 1
Effective drain source capacitance when voltage
across gate source is zero (gate-source shorted
hence MOSFET is OFF)
80
60
10 0
40
Crss
20
0 10 -1
10 -1 10 0 10 1 10 2 10 3 0 100 200 300 400 500 600 700
Reverse Diode Voltage (V) Drain Source Voltage (V)
(c) (d)
Figure 7. The
Figure junction
7. The capacitance
junction of semiconductor
capacitance of semiconductordevice. (a) The
device. (a) SiC
The diode model
SiC diode [50]. (b)
model [50].MOS-
(b)
FETMOSFET
parasitic parasitic
capacitances [19,22,51].
capacitances (c) SiC Diode
[19,22,51]. (c) SiCC4D02120 capacitance
Diode C4D02120 characteristic
capacitance adapted
characteristic
fromadapted from Cree
Cree C4D02120 C4D02120
datasheet [52].datasheet
(d) GaN [52]. (d) GaN capacitance
GS-065-011-L GS-065-011-Lcharacteristic
capacitance adapted
characteristic
from
adapted from GaN System GS-065-011-L
GaN System GS-065-011-L datasheet [53]. datasheet [53].
using numerical
simply methods.
the junction capacitance as in Figure 7c). Due to the nonlinearity introduced by the
semiconductor
The model ofjunction capacitance,
the non-linear it is difficult
capacitances and to the
obtain the solution
relevant to theis
references differential
shown in
equation
Figure of Equations
7a,b. This non-linear(5)capacitance
and (6) analytically.
behavior isNonetheless,
demonstrated it isinpossible to solve
[16,17] for them
SiC devices.
Theusing numerical
equivalent methods.
circuit for the SiC diode is shown in [50] and is redrawn in Figure 7a.
It could be noted that the current source in Figure 7a will be zero (hence open circuit)
under reverse-bias conditions; the equivalent circuit could then be reduced to only the
junction capacitance (with some equivalent series resistance ESR). As for GaN, the nonlinear
Energies 2022, 15, x FOR PEER REVIEW 12 of 35
The model of the non-linear capacitances and the relevant references is shown in Fig-
ure 7a,b. This non-linear capacitance behavior is demonstrated in [16,17] for SiC devices.
Energies 2022, 15, 5092 12 of 34
The equivalent circuit for the SiC diode is shown in [50] and is redrawn in Figure 7a. It
could be noted that the current source in Figure 7a will be zero (hence open circuit) under
reverse-bias conditions; the equivalent circuit could then be reduced to only the junction
capacitance
capacitance behavior is shown
(with some in EPC’s
equivalent (El Segundo,
series resistance CA,ESR).USA)As for application
GaN, the note [18]. Such
nonlinear ca-
non-linear
pacitance capacitance
behavior is of power
shown MOSFET
in EPC’s is also explained
(El Segundo, CA, USA)inapplication
[19,51]. Additionally,
note [18]. Such the
non-linear
non-linear capacitance
capacitance of power
behavior of theMOSFET is also explained
GaN employed in this paperin [19,51]. Additionally,isthe
(GS-065-011-1-L) also
non-linear in
documented capacitance
its datasheet behavior
[53]. As of the
for GaN
the SiC employed
diode usedin this paper (GS-065-011-1-L)
(C4D02120), the datasheet is is
also documented in its datasheet [53]. As for the SiC diode used
in [52]. The capacitances of GaN are redrawn from [18,19,51] as in Figure 7b. Note that in (C4D02120), the datasheet
is in [52]. The
off condition, it iscapacitances
the MOSFET’s of GaN
output are capacitance
redrawn from Coss[18,19,51] as in Figurefor
that is responsible 7b.theNote that
effective
in off condition, it is the MOSFET’s output capacitance C
drain-source voltage capacitance. Cgs is omitted because gate and source are shorted oss that is responsible for the ef-
fective drain-source voltage capacitance. C gs is omitted because gate and source are
together when MOSFET is off. Hence only Cds and Cgd (in parallel) are taken as the effective
shorted together
capacitance. when MOSFET
The physical capacitance is off.location
Hence only Cds andin
is shown CgdFigure
(in parallel) arereference
5 of the taken as the [18].
The nonlinearity arises from the depletion region which interested readers maythe
effective capacitance. The physical capacitance location is shown in Figure 5 of readrefer-
more
fromence
the[18].
S.M.The Szenonlinearity
Semiconductor arises from the
Devices: depletion
Physics region which
and Technology interested
textbook [54]readers
on page may100.
read more from the S.M. Sze Semiconductor Devices: Physics and Technology textbook [54]
It should be noted that the non-linearity of the junction capacitances is not limited to GaN
on page 100. It should be noted that the non-linearity of the junction capacitances is not
or SiC only. They are a common characteristic of semiconductor devices. The depletion
limited to GaN or SiC only. They are a common characteristic of semiconductor devices.
region is the area where there is an absence of free carriers, and such definition under
The depletion region is the area where there is an absence of free carriers, and such defi-
reverse biased is not exclusive to a normal p–n junction only. It has also been used in [50]
nition under reverse biased is not exclusive to a normal p–n junction only. It has also been
to explain the SiC junction capacitance. The interested reader may also read more on this in
used in [50] to explain the SiC junction capacitance. The interested reader may also read
Mohan’s Power
more on this in Electronics
Mohan’s Converters,
Power ElectronicsApplications
Converters,andApplications
Design textbook [23] textbook
and Design page 516.[23] The
capacitance–voltage relationship is non-linear
page 516. The capacitance–voltage relationship because capacitance
is non-linear because changes with the
capacitance width
changes
of the depletion region, which has a surd relationship to the electric
with the width of the depletion region, which has a surd relationship to the electric field field (voltage over area)
applied [23,50].
(voltage over area) applied [23,50].
TheTherelationship
relationshipbetween the charge
between the charge and voltage is oftenischaracterized
and voltage often characterizedby the SiC/GaN
by the
manufacturer
SiC/GaN manufacturer in their datasheet. If not provided, they can also beby
in their datasheet. If not provided, they can also be obtained performing
obtained by
under the graph
performing areathe
under integration
graph area (using trapezoidal
integration (usingnumerical
trapezoidalintegration) of the junction
numerical integration) of
capacitance
the junction vs. capacitance
the junction vs.voltage (Figure
the junction 7c,d).(Figure
voltage Such 7c,d).
a curve Such forathe SiCfor
curve diode is in
the SiC
Figure
diode 8a,b
is for GaN transistor
in Figure 8a,b for GaN (integration
transistor Coss charge).ofThe
of(integration Coss peak
charge). voltage stressvoltage
The peak can also
be obtained
stress can by alsomeasuring
be obtainedthe by total
measuringchargethe flowing into the
total charge flowingrectifier during
into the the during
rectifier turn-off
the turn-off
transient transient and
and performing performing
a total charge toa voltage
total charge to voltage
mapping (Figure mapping
8). The(Figure 8). The
total charge can
total charge
be measured ascan be measured
in Figure 9b. as in Figure 9b.
Silicon Carbide Schottky Diode Gallium Nitride MOSFET Charge Characteristic
Reverse Biased Charge Characteristic (C4D02120) [53] (GS-065-011-1-L)
Stored charge at peak stress voltage (Leakage 10uH) Leakage 34uH: Stored charge at peak stress voltage
(Leakage 34uH)
Leakage 10uH:
Stored charge at di/dt = 0 Leakage 34uH:
Stored charge at
di/dt = 0
Leakage
34uH:
Stored charge
at di/dt = 0
(a) (b)
Figure
Figure 8. Rectifier
8. Rectifier charge
charge relationshiptotovoltage
relationship voltage(from
(from manufacturer
manufacturer datasheet)
datasheet)(a)
(a)Charge
Chargecharacter-
character-
isticistic of SiC
of SiC Schottky
Schottky Diode
Diode C4D02120[52]
C4D02120 [52](b)
(b)Charge
Charge characteristic
characteristic of
ofGaN
GaNMOSFET
MOSFET GS-065-011-1-L.
GS-065-011-1-L.
Energies 2022, 15,
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2022, 15, x FOR PEER REVIEW 13 13
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35 34
vpeak
Peak voltage stress on rectifier vpeak
Charge Peak voltage
Charge stored in stress on
stored in junction rectifier
junction Rectifier capacitance
capacitance Voltage vQs at peak stress
Rectifier
at midpoint Voltage
Rectifier Current
Midpoint area is Rectifier
Current charge Current
Δt m
iQs Area ≈
Qm= 0.5Δi Δt m
Zero Δi Current area of
crossing leakage is the total
≈ i peak charge stored in
i peak di/dt =0 rectifier capacitance
(a) (b)
Figure
Figure 9. Rectifier
9. Rectifier waveform
waveform duringturn
during turnoff
offtransient
transient (a)
(a) charge
charge at
at midpoint
midpoint(di/dt
(di/dt= =0)0)is is
forfor
peak
peak
current estimation (b) total charge is for peak voltage stress estimation.
current estimation (b) total charge is for peak voltage stress estimation.
Any current flowing into the junction capacitance must also go through the series
Any current flowing into the junction capacitance must also go through the series
leakage, hence the current area (charge) of the leakage current must be equal to the charge
leakage, hence the current area (charge) of the leakage current must be equal to the charge
stored in the junction capacitance. For a linear series LC circuit, the peak of the negative
stored in the junction capacitance. For a linear series LC circuit, the peak of the negative
current coincides in time with the steady state voltage. The steady state voltage vss of the
current coincides in time with the steady state voltage. The steady state voltage vss of the
rectifier is the voltage of the secondary winding plus the output voltage as in Equation (7)
rectifier is the voltage of the secondary winding plus the output voltage as in Equation (7)
(refer to Equation (14) in [10]). It is important to note, that although leakage value or ca-
(refer to Equation
pacitance (14) in [10]).
characteristics It is may
of devices important to note,
differ, the peak that
stressalthough leakagesnubber
voltage without value or
capacitance characteristics of devices may differ, the peak stress voltage without
intervention will be double of Equation (7) (vpeak = 2 vss). This can be mathematically provensnubber
intervention will be
(as in Appendix C). double of Equation (7) (v peak = 2 vss ). This can be mathematically proven
(as in Appendix C).
Ns
vss = = Vmpp ++vo (7)(7)
Np
TheThe charge
charge going
going into
into the
the junctioncapacitance
junction capacitance(at
(at the
the midpoint
midpoint where
wheredi/dt
di/dt= =0)0)
could
could
be estimated using a triangle (Figure 9a) where Q m = 0.5 Δtm Δi. The di/dt could be esti-
be estimated using a triangle (Figure 9a) where Qm = 0.5 ∆tm ∆i. The di/dt could be estimated
mated to be as in Equation (4). Hence through the charge equivalence, the peak negative
to be as in Equation (4). Hence through the charge equivalence, the peak negative current
current could be estimated as in Equation (8) (derivation detail in Appendix D):
could be estimated as in Equation (8) (derivation detail in Appendix D):
s 2
= Δ ≈ 2Qm vss (8)
i peak = ∆i ≈ (8)
Ls
Qm (at vss) in Equation (8) could be obtained from the stored charge characteristic as
inQFigure
m (at v8a.
ss ) in
AsEquation
suggested(8) bycould be obtained
Equations from
(7) and (8), the stored
a lower leakagecharge characteristic
inductance, higheras
output voltage, higher secondary winding voltage, and higher
in Figure 8a. As suggested by Equations (7) and (8), a lower leakage inductance, higher semiconductor junction
charge
output characteristic,
voltage, all result winding
higher secondary in a higher magnitude
voltage, of peak
and higher reverse current.
semiconductor The Δtcharge
junction m or
characteristic, all result in a higher magnitude of peak reverse current. The ∆tm or the junction
the junction capacitance charging time before overshooting occur is estimated as in Δt m =
when leakage is relatively low, such as in Figure 2, the peak negative current (di/dt = 0)
occurs at the near midpoint (or the steady state Equation (7)). In this case, the characteristic
very much observes a normal LC circuit.
Equation (8) will not be accurate for the case of high leakage value because the effect
of junction capacitance non-linearity is more pronounced under high series inductance. It
should be noted in a normal linear LC circuit, the peak negative current (when di/dt = 0)
occurs at the midpoint (or the steady state). This is not the case for condition of large
leakages. For example, in Figure 17a,b (where leakage is 34 uH), the peak negative current
(when di/dt = 0) coincides with rectifier voltage at 200 V (one-third of midpoint), not at the
midpoint (near 600 V) as in a normal LC circuit because the large leakage transforms the
circuit into a very nonlinear LC circuit. The rectifier midpoint shifts to the right relative to
the peak negative current (di/dt = 0) under large leakage conditions. The general relationship
of negative peak current to charge for a given rectifier voltage could generally be estimated
as (derivation detail in Appendix D):
s
2Qv vQs
∆i ≈ (9)
Ls
where Qv is the charge characteristic for a given rectifier voltage vQs described by the
manufacturer as in Figure 8. For example, in Figure 17a, the negative peak current coincides
in time with around 200 V of rectifier voltage, the junction charge is 6 nC at 200 V (from
Figure 8a) and the leakage is 34 uH. Putting these values into Equation (9) gives an
estimation of 0.26 A, which agrees with the experimental measurement of Figure 17a.
Similarly for Figure 17b, at 200 V, the Coss charge (numerical integration of Coss in GS-065-
011-1-L datasheet) is 17.5 nC; Equation (8) estimates the peak negative current to be 0.45 A,
which also concurs with the experiment.
Qp VQp
(a) VQs
is
i pv ip im Ls
Vmpp
18V Lm Np Css Qs
Cs Secondary
Cpv Ns Vo 380V
Vpv Qps Conventional
Active Clamp
Qp VQp Q ss clamp
(b) Leakage
VQs
bypass
Vmpp i pv ip im Ls Qs
18V Lm Np is C ss Lss
Cs Leakage
C pv Ns Ds Vo 380V
Vpv Qps bypass
Qss Qssb
technique
VQp
Qp Active Dotted line going to MOSFET
clamp
Qps
Digital Signal Controller gate
source Qps
Voltage
Qp gate
sense Duty source Qp
Analog to vpv Qss gate
MPPT cycle PWM source Qss
Digital
vpv Qssb gate
source Qssb
DSPIC33EP128GS806
Qs gate
source Qs
PWM
Gate Drivers
(c) Signals
Figure
Figure10.
10.High
Highstep-up
step-up flyback under
flyback different
under secondary
different snubber
secondary configuration.
snubber (a) snubber
configuration. less less
(a) snubber
secondary
secondary(using
(using1.21.2kVkVSiC Diode)
SiC (b)(b)
Diode) conventional secondary
conventional clamp
secondary (using
clamp 650 V650
(using GaN) (c) the(c) the
V GaN)
proposed leakage bypass (using 650 V GaN).
proposed leakage bypass (using 650 V GaN).
Figure 11 shows the waveform of the technique, and the dotted area is zoomed in
Figure 12a. It is demonstrated that the active clamp branch absorbs the secondary leakage
energy in state 5 (Figure 12a) to prevent overvoltage on Qs . Then, the active clamp transistor,
Qss is turned on for a brief period before the turn on of Qs to return the leakage energy
to the input source (PV capacitor). Similarly, on the primary, the primary active clamp
transistor Qps is turned on for a brief period, before the turn on of Qp to return the primary
leakage energy. Such clamping sequences provide zero voltage turn-on for both Qp and Qs .
sistor, Qss is energy
turned in onstate
for a5 brief
(Figure 12a) before
period to prevent overvoltage
the turn on of Qon
s toQ s. Then,
return theleakage
the active clamp tran-
energy to thesistor,
inputQsource
ss is turned on for a brief
(PV capacitor). periodon
Similarly, before the turn the
the primary, on primary
of Qs to return
active the leakage
energy
clamp transistor Qps to
is the input
turned onsource (PV period,
for a brief capacitor). Similarly,
before the turnononthe
of Q primary, thethe
p to return primary active
primary leakageclamp transistor
energy. SuchQclamping
ps is turned on for a brief
sequences period,
provide zerobefore
voltagethe turn on
turn-on forofboth
Qp to return the
Energies 2022, 15, 5092 Qp and Qs. primary leakage energy. Such clamping sequences provide zero voltage turn-on 16 of 34for both
Qp and Qs.
vQs i Qs
Secondary
rectifier
vQs i Qs
Secondary
voltage and rectifier
current voltage and
current time
im time
Flyback ip is
im
transformer Flyback ip is
currents transformer time
currents time
vQp
Primary
switch
vQp
Primary
voltage switch
voltage time
Qp time
Qps Qp
PWM
Qss Qps
PWM
Qssb Qss
Qs Qssb
Qs dotted line zoom time
dotted line zoom time
Figure 11.Timing
Figure11. Timing waveform ofthe
waveform of thetechnique.
technique.
The key Figure 11. Timing
difference waveform
between of the technique.
the presented technique and the conventional active clamp
is in state 4 (Figures 12a and 13), during whichtechnique
The key difference between the presented the shuntand the conventional
inductive branch is active
activated
in state The
4 key
(Figures difference
12a and between
13), during the presented
to bypass the leakage. Doing so changes the circuit from having thebranch
clamp is which the technique
shunt and
inductive the conventional
current active
is acti-
reverse
characteristic of Equation (5) to a circuit that could be described by Equation (10): branch is acti-
vated to clamp
bypass the is in state
leakage. 4 (Figures
Doing so 12a
changesand 13),
the during
circuit which
from the
having shunt
the inductive
reverse current
characteristicvated to bypass
of Equation (5)the
to aleakage. Doing
circuit that so changes
could be describedthe circuit from having
by Equation (10): the reverse current
characteristic of Equation (5) to a circuit that could be described by Equation (10):
1 1
− = − 1+ +1 −
− = − + + − (10)
bypass current contribution leakage current contribution
(10)
(10)
bypass current contribution leakage current contribution
In which the current charging the rectifier junction capacitance is dominated by the
In which
bypass currentthe current
In which charging
the
contribution the
current
because rectifier
Lsscharging
<< Ls. the junction
rectifiercapacitance is dominated
junction capacitance by the by the
is dominated
bypass current contribution
bypass because Lss because
current contribution << Ls . Lss << Ls.
Note: A device with reverse recovery is undesirable as a flyback’s synchronous rectifier
because the body diode will temporarily conduct secondary leakage current in CCM as in
state 3 (Figure 12a). State 3 is short, typically less than 50 ns. Hence, it is difficult to perform
closed loop synchronous rectification; the GaN transistor does not have a body diode. GaN
can conduct in reverse without requiring an anti-parallel diode through the drain-source
2DEG channel. More explanation on this can be obtained from [20,21]. We use the term
body diode merely for ease of explanation.
Figure 14 demonstrates the prototype and Table 2 lists its parameters. The prototype
at 160 W of PV power was custom-built to be at a size no larger than the palm of a human
hand. The GaN transistors are soldered on a custom-designed, printed circuit board
(PCB) as a separate module. As in Figure 14b, the Qs modules consist of the main power
GaN transistor Qs , isolated gate drivers, active clamp transistor, bypass transistor, bypass
diode, active clamp capacitor, leakage bypass inductor, and the output capacitor Cs (using
Kemet’s 1812 high-voltage ceramic C0G capacitor). We named it a module because all these
components are integrated into a single PCB. The module is designed to be about the same
size as a normal IGBT (of TO-247 package). All the transistors on the secondary Qs module
are heatsink-less. Large heatsinks are not required (at 160 W power) because GaN losses
are low. Nonetheless, we did incorporate some vias on the polygon plane of the PCB to
add more surface area. In this way, the vias are used as a simple low-cost heatsink.
Energies 2022, 15, 5092 17 of 34
Energies 2022, 15, x FOR PEER REVIEW 17 of 35
1 2 3 4 5 6
Secondary vQs
rectifier voltage
and current
i Qs
time
Flyback is ip
transformer
currents im
time
Primary switch
voltage
vQp
time
Qp
Q ps
PWM
Q ss
Q ssb
Qs
time
Magnetizing
inductance transfers to
1 Leakage energized (a) Magnetizing
inductance transfers to 2
secondary Cs Ls secondary Cs Ls
Qs Qs
ip im is ip im is
Lm Lm C ss Lss
Css Lss
Cs Ds Cs
C pv Ds C pv
Qps turns OFF
Q ss Qssb Q ss Qssb
Cp Qps turns ON Cp
Qp Qp
ip im Ls Qs ip im Ls Qs
Lm Lm Lss
Lss
VCss
VCss Cs C ss Cs
C pv Css Ds Vo C pv Ds Vo
Qps OFF Qps OFF
Figure 12. Sequences of states (a) waveforms of the states (b) circuit states.
Figure 12. Sequences of states (a) waveforms of the states (b) circuit states.
Energies 2022, 15, x FOR PEER REVIEW 18 of 35
Energies 2022, 15, 5092 18 of 34
i Qs Before After i s i Qs
Figure
Figure 14. 14. Developed prototype
Developed prototype of of
high step-up
high flyback
step-up converter
flyback (a) the whole
converter (a) board (b) the board
the whole sec- (b) the
ondary module.
secondary module.
Energies 2022, 15, 5092 19 of 34
The input to the high step-up flyback is a PV array simulator, the Keysight E4350B.
This is a dated solar array simulator without any USB port, we had to use a USB to
GPIB device to perform communication between the solar array simulator and a personal
computer (PC). At full PV power, the parameters are as shown in Figure 15. The PV voltage
is regulated to be at the maximum power point as illustrated in Figure 16a. A digital
signal controller (DSPIC33EP128GS806) is used to maintain the PV voltage at 18 V using a
constant voltage MPPT. At startup, the controller measures the open circuit voltage (Voc ) of
the PV. The peak power voltage is then calculated as 0.8 Voc ; this is based on the calculation
stipulated in EN50530. Once the maximum power voltage has been determined, and the
switching process starts, the controller would actively measure the PV voltage and perform
the required adjustment of the duty cycle to maintain the PV voltage at the maximum
power point. No interrupt is used; the program simply runs in a loop. The flowchart for
this process is illustrated in Figure 16b. MPPT algorithm is not the focus of this paper; as
such, it is sufficient to use a very simple MPPT algorithm. The DSPIC33EP128GS806 mainly
outputs a PWM signal that controls the duty cycle of the main primary transistor Qp . All
Energies 2022, 15, x FOR PEER REVIEW 20 of 35
Energies 2022, 15,the other
x FOR supporting PWM signals (Qps , Qs , Qss, and Qssb ) are triggered based on
PEER REVIEW 20 the
of 35main
Figure 15. PV parameters at full power (Keysight E4350B Solar Array Simulator).
15. PV
FigureFigure 15.parameters at at
PV parameters full
fullpower
power (Keysight E4350B
(Keysight E4350B Solar
Solar Array
Array Simulator).
Simulator).
Constant Voltage MPPT
Constant Voltage MPPT
START
Closed Loop MPPT START Measure PV Voltage
Closed Loop MPPT
Digital Signal Controller
vpv
Measure PV Voltage
DSPIC33EP128GS806 Measure open vpv
Digital Signal Controller circuit voltage
DSPIC33EP128GS806
Desired PV Constant voltage MPPT Measure open Voc Calculate
voltage Duty circuit voltage
Desired PV (Vmpp = 18V) Constant voltage MPPT Cycle PV voltage Error = Vmpp − Vpv
Error Voc
voltage
Error
+_
Vmpp−Vpv
Duty of Qp High Step-up
Flyback
Calculate
Error = Vmpp − Vpv
(Vmpp = 18V) Duty Cycle
Cycle
D Step-up PV voltage Calculate
Error
+ = 0.8 V −
V _
mpp
Error
oc Vpv
Vmpp
Vpv of Qp
Error to D algorithm
High
Flyback Vmpp = 0.8 Voc
Duty Cycle D Calculate
Vpv PV voltage feedback Error < 0?
Measured
Error to D PV voltage
algorithm Vmpp = 0.8 Voc
Vmpp = 0.8 Voc
(Analog to Digital)
PV voltage feedback Start switching Error < 0?
Measured PV voltage
operation of Qp
(Analog to Digital)
(a) Start switching
D = D + ΔD D = D − ΔD
operation of Qp
(a) D = D + ΔD D = D − ΔD
(b)
Error to Duty Cycle algorithm
(b)
Figure 16. Controller software (a) Closed-loop MPPT (b) Constant voltage MPPT algorithm.
Figure 16.5.Controller
Experimental Results
software (a) Closed-loop MPPT (b) Constant voltage MPPT algorithm.
Figure 16. Controller software (a) Closed-loop MPPT (b) Constant voltage MPPT algorithm.
Figure 17 demonstrated the experimental result of the leakage bypass in comparison
5. Experimental
with theResults
conventional secondary active clamp and snubber-less secondary. Figure 17
shows
Figure that the leakagethe
17 demonstrated bypass provides aresult
experimental lowerof
clamping voltage
the leakage (630 in
bypass V) comparison
compared to the
with theconventional
conventional (695 V). As suggested
secondary in Figure
active clamp and17b, the GaN used
snubber-less (GS-065-011-1-L)
secondary. could
Figure 17
in fact operate above its rated voltage of 650 V, which is known as overrated operation of
shows that the leakage bypass provides a lower clamping voltage (630 V) compared to the
semiconductors.
conventional (695 V). As suggested in Figure 17b, the GaN used (GS-065-011-1-L) could
in fact operate above its rated voltage of 650 V, which is known as overrated operation of
Energies 2022, 15, 5092 20 of 34
5. Experimental Results
Figure 17 demonstrated the experimental result of the leakage bypass in comparison
with the conventional secondary active clamp and snubber-less secondary. Figure 17
shows that the leakage bypass provides a lower clamping voltage (630 V) compared to the
conventional (695 V). As suggested in Figure 17b, the GaN used (GS-065-011-1-L) could
Energies 2022, 15, x FOR PEER REVIEW 21 of 35
in fact operate above its rated voltage of 650 V, which is known as overrated operation of
semiconductors.
0.25A 695V
Voltage (V)
Secondary diode current (0.5A/div)
630V
(a)
Secondary GaN (650V Rated)
with Conventional Clamp
(c)
Figure 17. Experimental result of current and voltage of secondary rectifier (a) with snubber-less 1.2
Figure 17. Experimental result of current and voltage of secondary rectifier (a) with snubber-less
kV SiC Diode C4D02120 (b) with conventional active clamp 650 V GaN GS-065-011-1-L (c) with
1.2 kV SiC Diode
leakage bypassC4D02120
650 V GaN (b) with conventional active clamp 650 V GaN GS-065-011-1-L (c) with
GS-065-011-1-L.
leakage bypass 650 V GaN GS-065-011-1-L.
However, continuous and repetitive peaks above the absolute maximum rating are
However,
not continuous
recommended becauseandit repetitive peaksbyabove
is unwarranted the absolute Although
the manufacturer. maximumoverrated
rating are not
recommended
peak operation because it is unwarranted
is possible, by the below
keeping the operation manufacturer. Although
650 V as specified by overrated
the manu- peak
facturerisispossible,
operation always more desirable
keeping the because derating
operation below will
650 prolong the lifespan
V as specified byand
thereliability
manufacturer
of the semiconductor
is always more desirable device.
because derating will prolong the lifespan and reliability of the
Anotherdevice.
semiconductor thing to note, the peak negative current of the leakage bypass is much higher
than that of the conventional. This is because Lss is much lower than Ls, which results in
higher (but still manageable) di/dt, and dv/dt compared to the conventional. The di/dt and
dv/dt (or the turn-off time) could be adjusted by manipulating the value of Lss. It is also
Energies 2022, 15, 5092 21 of 34
Another thing to note, the peak negative current of the leakage bypass is much higher
than that of the conventional. This is because Lss is much lower than Ls , which results in
higher (but still manageable) di/dt, and dv/dt compared to the conventional. The di/dt and
dv/dt (or the turn-off time) could be adjusted by manipulating the value of Lss . It is also
demonstrated from Figure 17 that the turn-off transient of the leakage bypass is much faster
at 50 ns compared to the conventional which has a relatively slow turn-off period of around
120 ns. Figure 17 also highlights the total charge. Table 3 shows the experimental peak
voltage stress to measured experimental charge (and its relation to datasheet charge). It
could also be observed from Table 3 that although the turn-off time is different, the area
under the graph or junction capacitance charge remains almost similar for both cases.
Figure 18 shows the experimental result of the transformer primary and secondary
currents. As suggested in Figure 18 and Table 4, the leakage bypass provides a lower charge
circulation per cycle. This is possible because the leakage is not intentionally energized
during the turn-off transient of the rectifier. This is important because the key to low
voltage stress on the rectifier is not to have the leakage energized in the first place. It is
demonstrated that the leakage bypass technique allows the circulating leakage charge to be
reduced to a quarter of the conventional secondary clamp. Lower circulating current (or
reactive power) will also result in lower conduction losses per cycle.
Figure 19 shows the power measurement of the experimental setup. The measurement
is made by using Hioki 3194, a precision power/motor analyzer. The input to the converter
(Keysight E4350B Solar Array Simulator), is programmed to produce a varying PV power
of Pmpp = 16 W (10% power) to 160 W (100% power). The maximum power point voltage
is fixed at Vmpp = 18 V. As illustrated in Figure 16a, the maximum power point tracking
is performed using a simple closed-loop constant voltage algorithm, in which the duty
cycle is adjusted to track the PV maximum power point. The output voltage is consistently
maintained at 380 V, utilizing an adjustable load resistor, such that the resistance is manually
adjusted to produce 380 V at the output.
Figure 20 demonstrates the experimental performance comparison of the leakage
bypass to the conventional clamp and snubber-less secondary. It is indicated that the
leakage bypass technique reduces the voltage overshoot percentage by an average of 57%
(or 2.3 times lower) compared to the conventional secondary active clamp and 92% (or
12.66 times lower) compared to snubber-less secondary. The lower overshoot voltage
advantage of the leakage bypass, however, does come at a price. The obvious one is it
requires extra components (and therefore cost). A more uncomfortable fact is that the
experimental data appear to suggest that leakage bypass will result in lower efficiency
compared to the conventional secondary clamp. At 240 kHz of switching frequency,
the experimental data demonstrate that the leakage bypass has an average 0.22% lower
efficiency compared to the conventional (peak reduction at full PV power is 0.43%). The
reason for this is due to switching loss of the bypass MOSFET Qssb (we observed during the
experiment that the bypass transistor has a higher temperature compared to other switches).
The leakage bypass GaN transistor Qssb is turned on with hard switching (for simplicity
reasons). Its drain-source capacitance (Coss ) could not be discharged due to the existence of
the diode Ds , which limits the current flow in only one direction (the diode is necessary to
prevent current flow in a negative direction once the steady state has been reached). As a
result, Qssb switches on with a relatively high voltage of 380 V (the output voltage) stored
Energies 2022, 15, 5092 22 of 34
in its Coss junction capacitance. A 0.22% (or peak 0.43%) reduction in efficiency may not
seem significant, however, it must be pointed out that GaN is not meant to be switched
attoonly
be switched
240 kHz; at itonly 240fact,
is, in kHz; it is, inoffact,
capable thecapable
multi-MHzof theswitching
multi-MHz switching Because
frequency. fre-
quency. Because switching power loss for Qssb will be higher at a higher switching fre-
switching power loss for Qssb will be higher at a higher switching frequency, it is deduced
quency, it is deduced that efficiency will drop proportionally higher with an increase in
that efficiency will drop proportionally higher with an increase in switching frequency.
switching frequency. As a result, a practical approach would be to limit the leakage bypass
As a result, a practical approach would be to limit the leakage bypass technique to only
technique to only around 200 kHz–300 kHz operation. It may be possible to fix the switch-
around 200 kHz–300 kHz operation. It may be possible to fix the switching loss dilemma.
ing loss dilemma. Such implementation will require a zero-voltage switching at the turn-
Such implementation will require a zero-voltage switching at the turn-on instant of Qssb .
on instant of Qssb. We are actively performing such research to discharge the Coss before
We are actively
turning on Qssb.performing such research
Such implementation willtoallow
discharge the Coss
the leakage work atona Q
beforetoturning
bypass ssb . Such
much
implementation will allow the leakage bypass to work at a much higher
higher frequency without any reduction in efficiency. In fact, improvement in efficiency frequency without
any reduction
compared in efficiency.active
to conventional In fact, improvement
clamp in efficiency
could be expected due tocompared to conventional
lower conduction loss
active clamp could
with leakage bypassbe expected
(lower due toloss
conduction lowerdueconduction losscirculation
to lower charge with leakageper bypass (lower
cycle with
conduction loss due
leakage bypass). Thistowill
lower charge circulation
be contingent per cyclethat
on the condition with leakage
Qssb bypass).
switches This
with the will be
zero-
contingent technique. that Qssb switches with the zero-voltage switching technique.
on the condition
voltage switching
Charge circulation
Active clamp
Leakage bypass
Secondary Flyback Current (1A/div) Conventional
Current (A)
secondary clamp
Charge circulation
Active
clamp
Leakage
bypass
Figure18.
Figure 18. Experimental
Experimental result
resultofofflyback
flybacktransformer current.
transformer current.
Energies 2022, 15, 5092 23 of 34
Energies 2022, 15, x FOR PEER REVIEW 24 of 35
Figure
19. 19. Experimentalpower
Experimental powermeasurements.
measurements. VV1: PV Voltage; I1: PV Current; P1: PV Power; V2:
Figure 1 : PV Voltage; I1 : PV Current; P1 : PV Power;
Output Voltage; I2: Output Current; P2: Output Power; ⴄ1: Efficiency.
V2 : Output Voltage; I2 : Output Current; P2 : Output Power; η 1 : Efficiency.
Energies 2022, 15, 5092 24 of 34
Energies 2022, 15, x FOR PEER REVIEW 25 of 35
90 90.86% 1000
88.8%
88.59%
88.02%
Snubberless SiC Secondary Diode
85 84.90%
900 Leakage Bypass Method
Conventional Active Clamp on Secondary
80 800
650V GaN Stress Voltage Limit Line
Snubberless SiC Secondary Diode 667.26V 699.21V 697.26V 693.35V 693.35V 691.40V 693.35V 689.40V
75 Leakage Bypass Method
700 667.96V
666.01V
Conventional Active Clamp on Secondary
626.95V 646.48V
70.47% 634.77V 636.71V 644.52V 636.71V 638.66V 634.77V 636.71V 630.85V
70 600
10 20 30 40 50 60 70 80 90 100 10 20 30 40 50 60 70 80 90 100
Power Percentage (%) Power Percentage (%)
80
Overshoot Percentage (%)
82.85%
70
60
50 Snubberless SiC Secondary Diode
Leakage Bypass Method
40 Conventional Active Clamp on Secondary
30
17.00% 17.32% 17.00%
20 16.33% 16.33% 16.01% 16.33%
15.67%
12.07%
11.75%
10
5.193% 8.141% 8.470% 7.157%
6.505% 6.831% 6.831% 6.505% 6.831% 5.847%
0
10 20 30 40 50 60 70 80 90 100
Power Percentage (%)
Figure 20. Experimental performance comparison with different techniques.
Figure 20. Experimental performance comparison with different techniques.
6. Conclusions
6. Conclusions
UtilizingGaN
Utilizing GaNfor
forhigh
highstep-up
step-up (or
(or high
high gain)
gain)flyback
flybackapplications
applicationsrequires a unique
requires a unique
kind of technique to limit the voltage stress to below 650 V. It is experimentally
kind of technique to limit the voltage stress to below 650 V. It is experimentally shown
shown
that the proposed leakage bypass could reduce the overshoot voltage, thereby achieving
that the proposed leakage bypass could reduce the overshoot voltage, thereby achieving
the required lower than 650 V voltage stress. However, the experimental result suggests
the required lower than 650 V voltage stress. However, the experimental result suggests
this comes at the price of lower efficiency due to increased switching loss on the bypass
this comes at the price of lower efficiency due to increased switching loss on the bypass
shunt branch. Future work needs to implement a zero-voltage switching technique on the
shunt branch. Future work needs to implement a zero-voltage switching technique on the
bypass transistor.
bypass transistor.
Author Contributions: Conceptualization, R.Z.; methodology, R.Z.; validation, R.Z.; formal analy-
Author investigation,Conceptualization,
Contributions:
sis, R.Z.; R.Z.; resources, R.Z.;R.Z.;
data methodology, R.Z.; validation, R.Z.;
curation, R.Z.; writing—original draftformal analysis,
preparation,
R.Z.; investigation,
R.Z.; writing—reviewR.Z.;and
resources,
editing,R.Z.;
R.Z.,data curation,
J.J., Y.Y. R.Z.; writing—original
and N.A.R.; visualization, R.Z.;draft preparation,
supervision, N.A.R.R.Z.;
writing—review and have
and J.J. All authors editing,
readR.Z., J.J., Y.Y.toand
and agreed the N.A.R.; visualization,
published version of theR.Z.; supervision, N.A.R. and
manuscript.
J.J. All authors have read and agreed to the published version of the manuscript.
Funding: UMPEDAC-2020 (MOHE HICOE-UMPEDAC), Ministry of Education Malaysia, IF006-
2021, RU002-2021.
Funding: UMPEDAC-2020 (MOHE HICOE-UMPEDAC), Ministry of Education Malaysia, IF006-2021,
RU002-2021.
Institutional Review Board Statement: Not applicable.
Institutional ReviewStatement:
Informed Consent Board Statement: Not applicable.
Not applicable.
Informed Consent Statement: Not applicable.
Data Availability Statement: Not applicable.
Energies 2022, 15, 5092 25 of 34
Acknowledgments: The authors thank the technical and financial assistance of UM Power Energy
Dedicated Advanced Centre (UMPEDAC) and the Higher Institution Centre of Excellence (HICoE)
Program Research Grant, UMPEDAC-2020 (MOHE HICOE-UMPEDAC), Ministry of Education
Malaysia, IF006-2021, RU002-2021, University of Malaya.
Conflicts of Interest: The authors declare no conflict of interest.
Nomenclature
Appendix A. Derivation
Appendix A.ofDerivation
Equation of
(1)Equation (1)
Figure A1 illustrates theillustrates
Figure A1 flyback under on-state
the flyback and
under off-states.
on-state The figures
and off-states. are
The usefulare useful
figures
for the
for the derivation of derivation of Equation (1).
Equation (1).
Qs Qs
v p Lm v p Lm
L L
O O
v pv vs vo A v pv vs vo A
D D
Qp Qp
ON OFF
Figureflyback
Figure A1. General A1. General
ON andflyback
OFFON and OFF
state. state.State
(a) ON (a) ON
(b)State
OFF(b) OFF(c)
State State (c) Primary
Primary winding volt-
winding
age during both ON and OFF state.
voltage during both ON and OFF state.
During the state when the primary switch Qp is ON (Figure A1a), the primary wind-
During the state when the primary switch Qp is ON (Figure A1a), the primary winding
ing experience a voltage equivalent to the PV voltage, Qs rectifier is OFF as it is reversed
experience a voltage equivalent to the PV voltage, Qs rectifier is OFF as it is reversed
biased. The secondary winding experiences the primary winding voltage multiplied by
biased. The secondary winding experiences the primary winding voltage multiplied by the
the turn ratio.
turn ratio.
v p = v pv = (A1) (A1)
At the steady state, the primary winding volt-second product (area under the graph)
during the ON state must be equivalent to the volt-second product during the OFF state.
At steady state the primary winding volt-second product (area under the graph) during
the ON state must be equivalent to the volt-second product during the OFF state.
vo Ns D
= (A5)
v pv Np (1 − D )
the ON state must be equivalent to the volt-second product during the OFF state.
= (1 − ) / (A4)
Hence the input-to-output mathematical relationship Equation (1) is obtained by re-
arrangement of Equation (A4):
Energies 2022, 15, 5092 27 of 34
= (A5)
(1 − )
Primary Secondary
referred Primary referred
Ideal Ideal
leakage shorted leakage
Transformer Transformer
Lp Secondary Ls
Precision LCR Meter Precision LCR Meter
GW-INSTEK Lm shorted Lm GW-INSTEK
LCR-6300 LCR-6300
Magnetizing Np : Ns Magnetizing Np : Ns
inductance inductance
(d) (e)
FigureA2.
Figure A2. Leakage
Leakage model
modelofofhigh-frequency
high-frequency transformer (a) model
transformer of a transformer
(a) model (page 56
of a transformer in 56
(page
[23]) (b) primary referred leakage omitting resistance losses (c) secondary referred leakage omitting
in [23]) (b) primary referred leakage omitting resistance losses (c) secondary referred leakage omitting
resistance losses (d) measurement of primary referred leakage (short circuit test) (e) measurement
resistance losses
of secondary (d) measurement
referred of circuit
leakage (short primary referred leakage (short circuit test) (e) measurement of
test).
secondary referred leakage (short circuit test).
Appendix C. Correlation of the Problem to Series Lossless LC Resonant Circuit
Appendix C. Correlation of the Problem to Series Lossless LC Resonant Circuit
The objective of this appendix is to explain the reason the rectifier experienced volt-
ageThe objective
stress of this that
almost double appendix
of the is to explain
steady the reason
state (without the rectifier
snubber experienced
intervention). voltage
Clarifica-
stress almost
tion is madedouble
using athat of the steady
fundamental theory state
of(without
fixed valuesnubber intervention).
LC circuit. Note thatClarification
in the real is
made
world,using
the asemiconductor
fundamental junction
theory ofcapacitance
fixed valueisLC notcircuit. Note
fixed (it that in the real
is non-linear). world,
There will the
semiconductor
also be a seriesjunction capacitance
AC resistance is not fixed
R component (it is non-linear).
without a fixed valueThere will also
(winding be a series
resistance).
ACTheresistance R component
AC resistance without
is a function a fixedcomponents
of multiple value (winding resistance).
of frequencies The AC
because resistance
a non-lin-
isear
a function
capacitorofresults
multiple
in ancomponents
inconsistent of frequencies
frequency because aAC
of oscillation. non-linear
resistancecapacitor
is composedresults
in an inconsistent frequency of oscillation. AC resistance is composed of skin and proximity
effects. Their resistances are a function of frequency. In the real world, the AC resistance
will result in a decaying oscillation (as shown in Figure 2c).
However, for ease of interpretation, fixed values of inductance, capacitance, and zero
resistance (lossless) are used in the mathematical derivations. This will not result in a
perfectly accurate theory; however, the presented equations should be good enough to
assist in better comprehension of the issue. It should also be noted that power semicon-
ductor manufacturers often document a fixed capacitance value (energy-related effective
capacitance [53]) in their datasheet to facilitate analysis for power electronics engineers.
of skin and proximity effects. Their resistances are a function of frequency. In the real
of skin and proximity effects. Their resistances are a function of frequency. In the real
world, the AC resistance will result in a decaying oscillation (as shown in Figure 2c).
world, the AC resistance will result in a decaying oscillation (as shown in Figure 2c).
However,
However, forfor ease
ease of interpretation,
of interpretation, fixedfixed
valuesvalues of inductance,
of inductance, capacitance,
capacitance, and zero and zero
resistance
resistance (lossless)
(lossless) areare
usedused in the
in the mathematical
mathematical derivations.
derivations. This willThisnotwill not in
result result
a per-in a per-
Energies 2022, 15, 5092 fectly
fectly accurate
accurate theory;
theory; however,
however, the the presented
presented equations
equations should should
be good be enough
good enoughto assistto28
assist
of 34
ininbetter
better comprehension
comprehension of theof the issue.
issue. It should
It should also also be noted
be noted that power
that power semiconductor
semiconductor
manufacturers
manufacturers often
often document
document a fixed
a fixed capacitance
capacitance valuevalue (energy-related
(energy-related effective
effective capaci-capaci-
tance
tance [53])
[53]) in in their
their datasheet
datasheet to facilitate
to facilitate analysis
analysis for power
for power electronics
electronics engineers.
engineers.
Figure A3 illustrates the fundamental operation of a series LC circuit under step
Figure
FigureA3A3illustrates thethe
illustrates fundamental
fundamental operation
operationof a series LC circuit
of a series under under
LC circuit step volt-
step volt-
voltage
age with with
an an amplitude
amplitude of v of vss (Equation
(Equation (7)). The (7)).
step The step
input is input
v × u(t), ss × u(t),
is vwhere u(t) the u(t)
where
is u(t) is
age with an amplitude of vss (Equation (7)). The step input is vss × u(t), where
ss ss is the
the
unit unit
step step
input input
defineddefined
as in as in Equation (A6) (note that Equation (A6) is well known).
unit step input defined asEquation
in Equation(A6)(A6)
(note(note
that Equation
that Equation(A6) is(A6)
wellisknown).
well known).
1, 1,1, >t 0>
𝑡>0 0
( )𝑢u≔(𝑡t) ≔ (A6) (A6)
0, 0, ≤ 0𝑡 ≤ 0
0, t ≤ 0
L R
Vss u(t) L R Manufacturer define
Vss u(t) Manufacturer
GaN fixed effective define
Step input C Vc GaN infixed
capacitance their effective
Step input C Vdatasheet
c capacitance
as Cossin their
datasheet
energy related [53] as Coss
iL
iL energy related [53]
(a) Decaying
Vc (V)
Two times step (a)
oscillation with
Decaying
(V)
Step Vc
Peak voltage stress = 2Vss series resistance
amplitude Lossless LC oscillation with
response Peak voltage stress = 2Vss Two times step series resistance
ofStep Lossless LC
amplitudeLossy
response
capacitor RLC
of Mid point =
voltage Lossy
capacitor Vss RLC
voltage
Vss Mid point = Steady state line
Vss
Vss Step
Steady state line
Input =
Step
Vss u(t)
Input =
0 Vss u(t)
t
i L(A)0 Area Area = = Qm
under
quarter 𝒊 𝒑𝒆𝒂𝒌 Lossy
t
i L(A) Area
sine is the
Area = 𝝎 = Qm
RLC
Step chargeunder
in
response quarter
capacitor Lossy
of sine is the RLC
Step charge in
inductor
response
t
current capacitor Lossless
of LC
i
inductor
peak
current
t
Energy in Peak inductor Lossless
π/2 inductor current LC
ipeak π dumped to
capacitor
Energy in Peak inductor
t =0 2π (b)
π/2 inductor current
π dumped to
Figure
Figure A3.A3. Fundamental
Fundamental of series
of series LC circuit
LC circuit operation
operation (a) the(a) the series
series LC resonance
LC resonance circuitin(RLC in
circuit (RLC
dotted lines) [53]. tThe
= 0The
(b) (b) 2π responsecapacitor
step of LC (b)
dotted lines) [53]. step response ofcircuit (RLC
LC circuit in dotted
(RLC lines).lines).
in dotted
Figure
The A3.
The Fundamental
step input
step input of series
represents
represents thetheLC circuitchange
sudden
sudden operation
change (a)secondary
the series
of secondary
of LC
winding resonance
winding voltage circuit
to(RLC
duedue
voltage in
to the
dotted
the lines) [53].
switching(the (b)
(theturn The
turnON step
ON of response
of Qpp).). InIntheof LC circuit (RLC in dotted lines).
switching thecase
caseofof
thethe
secondary
secondary rectifier, a sudden
rectifier, change
a sudden change of
ofswitching
switchingstate
stateimplies
impliesthat
thatthethe secondary rectifier must now block
secondary rectifier must now block both the outputboth the output
voltage vo
The step input represents the sudden change of secondary winding voltage due to
and the secondary winding voltage (Equation (A2)). During the transient blocking voltage
the switchingof
development (the
theturn ON the
rectifier, of Qblocking
p). In the case of the secondary rectifier, a sudden change
voltage is developed through the series inductance
of
(leakage), energizing it in the process.secondary
switching state implies that the Ideally, werectifier
want tomust now
develop theblock bothvoltage
capacitor the output
only
up to the value of vss without any overshoot. This is not possible due to the series inductance.
Under the lossless condition, the charge stored in the capacitor at the midpoint (vss ) must
be equal to the current area (area under the graph) of the inductor current at its peak point
Energies 2022, 15, 5092 29 of 34
(negative). Note that Equation (A7), the quarter area of sine with amplitude ipeak is also a
well-known equation.
Rπ
Qm = i peak 02 sin ωt dt
i peak π
= [− cos ωt] 2 (A7)
ω 0
i peak
= ω
The energy stored in the capacitor, Ec , at the midpoint (vss ), which occurs at ωt = π/2,
can be written using the fundamental equation of capacitor energy as in Equation (A8).
1 2
EC = Cv (A8)
2 ss
During this time as well (ωt = π/2), the peak energy is stored in the series inductance
and the peak energy of the inductor can be written using the fundamental energy equation
of Equation (A9).
1
EL = Li2peak (A9)
2
To show that the peak stress voltage of the capacitor is double the steady state (or double
the step amplitude), it must first be mathematically proven that Ec = EL at ωt = π/2. By
substituting (A7) into (A9), the energy stored in the inductor at ωt = π/2 could be re-written as
in Equation (A10).
1
EL = L Q2m ω2 (A10)
2
Qm or charge in the capacitor at voltage vss (when ωt = π/2) could also be written
using the fundamental charge equation of Equation (A11).
Qm = Cvss (A11)
Substituting Equation (A11) into Equation (A10), the energy stored in the inductor at
ωt = π/2 could be re-written as in Equation (A12).
1 2
EL = LC vss 2 ω2 (A12)
2
The resonance frequency of an LC circuit is well-known, and is written as:
1
fc = √ (A13)
2π LC
Note that ω = 2πfc . This is also a well-known equation. Hence Equation (A13) is
re-written as:
1
ω= √ (A14)
LC
Substituting Equation (A14) into Equation (A12), it can be proven that at ωt = π/2 (at
di/dt = 0):
EC = EL (A15)
At the time of the half cycle (at ωt = π) all the energy in the inductor is transferred onto
the capacitor (energy is dumped into the capacitance until its inductor current becomes
zero). Due to symmetrical energy storing and dumping in the inductor, the area under the
graph or charge at half cycle (ωt = π) is double the charge area at quarter cycle (ωt = π/2).
It is also well known that energy E to charge Q has the mathematical relationship of
Equation (A17).
1 Q2
E= (A17)
2 C
Hence the peak energy stored in the capacitor at half cycle (ωt = π) can be written by
substituting Equation (A16) into (A17).
2
1 Q peak 2Q2m
E peak = = (A18)
2 C C
Rearranging Equation (A10) and substituting Equation (A14) into Equation (A18):
2EL
Q2m = L ω2
= 2CEL (A19)
= 2CEC
Plugging in Equation (A19) into Equation (A18), it is then obtained that the peak
energy stored in the capacitor at half cycle (ωt = π) is quadruple that of the quarter cycle
stored energy.
E peak = 4EC (A20)
Plugging Equation (A8) into Equation (A20), the peak energy of the capacitor at half
cycle (ωt = π) can be written as:
E peak = 2Cv2ss (A21)
Alternatively, energy stored in the capacitor at the peak voltage stress (ωt = π) can
also be written using the well-known energy equation of Equation (A22).
1 2
E peak = Cv (A22)
2 peak
Finally, by substituting Equation (A21) into Equation (A22), it could be mathematically
proven that regardless of the value of L (leakage) or C (rectifier junction capacitance) the
peak voltage stress across the capacitor in a series LC resonance circuit is always twice the
steady state.
v peak = 2vss (A23)
It should be noted that Equation (A23), is only true in the lossless case, as in practice,
the flyback transformer winding will incur some losses; hence, the peak stress will be
slightly lower than twice the steady state due to some AC resistance losses.
Ns diQs
− Vmpp + Ls + vQs − vo = 0 (A24)
Np dt
current drops to zero (with negative di/dt gradient) as it is being driven by the series vo
age source of the sum of vs + vo. By taking the KVL of Figure 6b,c it could be derived th
Equivalent Equivalent
circuit in circuit in
Fig. 6b Fig. 6c ≈ Δt m
Width and length can
Gradient di /dt be calculated using
Charge Qm at
Qm triangle formula
midpoint
(steady state) ≈ Δi ≈ i peak
Rectifier
can be obtained
current
from datasheet
Gradient (di/dt)
Zero crossing is calculated
≈ Δi ≈ i peak from Eq. 4
di /dt = 0
≈ Δt m
Figure A4.The
Figure A4. Theestimation
estimation of negative
of negative peakpeak current.
current.
Noting
Notingthat
thatthethe
rectifier voltage
rectifier couldcould
voltage be simplified to zero to
be simplified in zero
forward-bias condition conditi
in forward-bias
(vQs = 0), Equation (A24) could be rearranged to be similar to Equation (4). Note the di/dt
(vQs = 0), Equation (A24) could be rearranged to be similar to Equation (4). Note the di
corresponds to the gradient of the current waveform.
corresponds to the gradient of the current waveform.
diQs
1 Ns
− = 1Vmpp + vo (A25)
dt− Ls =Np + (A2
As for Equation (5), it is also derived from Equation (A24); however, the rectifier
Ascan
voltage fornoEquation
longer be (5), it is because
ignored also derived from Equation
it is non-zero (A24);
due to blocking however,
voltage the rectifier vo
development
age
(vQs can
6= 0) no longerbias.
in reverse be ignored because it is non-zero due to blocking voltage developme
(vQs ≠ 0) in reverse bias.
diQs
1 Ns
− = Vmpp − vQs + vo (A26)
dt− Ls =Np1 − + (A2
The charge Qm at the midpoint or steady state (Equation (7)) is useful for the estimation
of theThe
peakcharge Qmvoltage
negative at the (when
midpointdi/dtor steady
= 0). It canstate (Equation
be calculated (7))the
from is triangle
useful for
withthe estim
tion of∆tthe
width m and length
peak ∆i, such
negative that:
voltage (when di/dt = 0). It can be calculated from the triang
with width Δtm and length Δi, such that:∆i ∆t
m
Qm = (A27)
2 Δ Δ
= (A2
2
The gradient of the current waveform could be estimated by Equation (4). By noting
that ∆i/∆t also represents
The mgradient of the the gradient.
current Then, it iscould
waveform possible
be to write the gradient
estimated estimation
by Equation (4). By noti
of Equation (A28).
that Δi/Δtm also represents the gradient. Then, it is possible to write the gradient estim
diQs ∆i
tion of Equation (A28). ≈ (A28)
dt ∆tm
Plugging Equation (A25) into Equation (A28), itΔcould be written that (delta implies
≈ (A2
that negative sign is omitted): Δ
Plugging Equation (A25)∆iinto Equation (A28), it could be written that (delta impl
1 Ns
≈ Vmpp + vo (A29)
that negative sign is omitted): ∆tm L s Np
Δ as in
Equation (A27) can also be re-written 1 Equation (A30):
≈ + (A2
Δ
2Qm
∆tm = (A30)
Equation (A27) can also be re-written∆ias in Equation (A30):
By substituting Equation (A30) into Equation (A29),
2 it could be written that:
Δ = (A3
s Δ
2Qm Ns
∆i ≈
By substituting Equation (A30)Linto Vmpp + vo(A29), it could be written
(A31)
s NEquation
p
that:
Energies 2022, 15, 5092 32 of 34
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