15/11/2023, 17:26 The most comprehensive digital IC back-end design and implementation training tutorial in history (organi…

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The most comprehensive digital IC back-end design and implementation traini
orial in history (organized version)
IC Pioneer Modified on 2023-07-15 16:24:58 Reading volume 1.7w Collection 641 Likes 41
Article tags: rear end Digital IC backend Digital IC backend training tutorial IC backend training Digital backend training

The most comprehensive digital IC back-end design and implementation training tutorial in history (organized

The advertisement on the right side of the article is an official advertisement and has nothing to do with the Wuai IC community. Users should no
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The content of the training tutorial comes from articles pushed historically by the official account of the WuaiIC community, with a total of 87 original
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purely technical information . Coding is not easy. If it helps you, please leave a reward at the end of the article for encouragement and support (I
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Updated on 2023.07.15!
Considering that the Wuai IC community has continued to share digital IC back-end design and implementation technology experience on major pla
since February 2018, there have been more than 500 digital back-end technology training tutorials shared with more than 10 million words. In order
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Digital IC backend implements training video summary

The most comprehensive digital IC back-end training video tutorial in history (enhanced)

Synopsys' various Training Labs and Workshops are newly released!

Digital IC backend implementation Innovus training video

CMOS analog integrated circuit design video tutorial (Southeast University)

Synopsys seven workshop electronic files pdf are officially released (new links have been added)!

Digital IC design e-book sharing!

More training video tutorials will be further compiled. . .

Digital IC back-end design and implementation training tutorial

Import Design

Floorplan

[[Confidential] Floorplan will no longer be difficult to do (digital back-end design and implementation of floorplan)]

[How to evaluate the quality of floorplan in digital back-end design? ]

[Digital IC back-end design implements floorplan and powerplan planning]

[Inventory of various files used in digital back-end design and implementation]

Placement

[Detailed usage of Magnment placement in digital IC back-end design and implementation]

[If you want to thoroughly master various placement techniques, this will definitely do what you want! ]

[Do you know how to use Scan chain reordering? ] IC Pioneer focus on

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[Congestion is quite serious when implementing digital backends. Can you hold it? ]

[Advanced digital backend implementation of place process]

Clock Tree Synthesis

[What should be done before Clock Tree Synthesis? ]

[How to become a clock tree synthesis expert? It turns out you can too! ]

[Comprehensive Q&A on clock tree for digital IC back-end design and implementation]

[In-depth analysis of the difference between Create_clock and Create_generated_clock]

[Does clock jitter affect hold time? (There are benefits at the end of the article)]

[Why do we need to use clock inverter (min pulse width check) on the clock tree]

[Catch all clock trees in one comprehensive Clock Skew]

[Comprehensive Practice of Clock Tree in Digital Backend Design and Implementation]

[A reasonable clock structure can accelerate Timing convergence (Clock Tree Comprehensive Intermediate Level)]

[The problem of clock gating enabler setup violation in the flash kill digital backend implementation]

[Congestion is quite serious when implementing digital backends. Can you hold it? ]

[Basics of clock tree synthesis]

[If you encounter these pitfalls later in the project, it turns out they can be dealt with so easily! (Digital backend implements firefighting)]

Route

[Digital IC design and implementation hierarchical flow series (1)]

[Digital IC design to achieve hierarchical flow series (2)]

[Things about the route phase in digital back-end design and implementation]

[How to use tools to automatically repair digital IC back-end design to achieve physical DRC after winding?]

[Teach you how to easily play with the antenna effect (Process Antenna Effect)]

[If you encounter these pitfalls later in the project, it turns out they can be dealt with so easily! (Digital backend implements firefighting)]

ECO

[How to use Lockup latch, just read this! ]

[I heard that Latch can efficiently repair hold violations (Timing borrowing and its applications)]

[If you encounter these pitfalls later in the project, it turns out they can be dealt with so easily! (Digital backend implements firefighting)]

[Those things about ECO in digital IC design are actually not a thing! ]

[The gap between you and the digital backend master is here, come and take a look! ]

Timing

[Comprehensive collection of hold violation repairs for digital IC design implementation]

[In-depth disclosure of the principle of asynchronous reset and synchronous release]

[In-depth analysis of the difference between Create_clock and Create_generated_clock]

[Revealing why net delay is a negative value (digital backend implementation timing)]

[PBA (Path Base Analysis) It’s not easy to say that I love you (Static Timing Analysis Basics)]

[【shocked! 】You are still using the flatten method for timing signoff]
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[I heard that Latch can efficiently repair hold violations (Timing borrowing and its applications)]
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[Can CRPR compensate for crosstalk? ]

[It turns out that the maximum operating frequency of the circuit is calculated in this way (STA Basics)]

[Teach you to easily adjust the consistency of Timing and Congestion between DCT and ICC]

[Take a thorough explanation of set_multicycle_path in simple terms, and master it completely from now on]

Low Power

[Basics of low-power design]

[Summary of connection methods for secondary power pins in low-power design implementation]

[Do you really understand these low-power design implementation experiences? ]

[The problem of clock gating enabler setup violation in the flash kill digital backend implementation]

[Dynamic power consumption optimization implementation plan based on Physical Aware]

[A brief discussion on several low-power design solutions for digital IC low-power design]

Physical Verification

[Teach you how to easily play with the antenna effect (Process Antenna Effect)]

[LVS is that simple! (Digital Backend Physical Verification)]

IR Drop Analysis

[A summary of methods to prevent IR Drop in the early stage of digital IC design back-end]

[IR Drop Analysis - Redhawk Analysis Process]

Selected Questions and Answers from Knowledge Planet

[Selected Questions and Answers from Knowledge Planet (with May Day book donation event)]

[Digital IC back-end implementation Q&A (Excerpted from this week’s Q&A on Knowledge Planet)]

[Secrets of digital back-end independent proposition questions (with selected questions and answers from Knowledge Planet this week)]

[What skills do digital IC back-end implementation experts possess? (Attached is the back-end interview guide)]

Classic Digital Backend Interview Questions and Answers

[2019 Digital IC Backend School Recruitment Written Examination Questions (with Digital Backend Training Video Tutorial)]

[Digital Backend Interview Questions and Answers No.22-24 (Three Questions a Day)]

[Digital backend interview questions and answers No.19-21 (three questions a day)]

[Digital Backend Interview Questions and Answers No.16-18]

[Digital backend interview questions and answers No.13-15 (three questions a day)]

[Digital Backend Interview Questions and Answers No.10-12 (Three Questions a Day)]

[Digital backend interview questions No.7-9 (three questions a day)]

[Digital Backend Interview Questions and Answers No.4-6 (Three Questions a Day)]

[Digital Backend Interview Questions and Answers No.1-3 (Three Questions a Day)]

Industry trends & benefits

[Talk about things like work and money (Synopsys lab resource download is attached at the end of the article)]

[How did I achieve an annual salary of 600,000 in five years? ]

[Teach you a thorough understanding of the digital backend implementation report of ARM Cortex-A75 CPU]
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[Some thoughts behind Bitmain’s layoffs]

[Survey on digital IC back-end training needs]

[The salary for digital IC school recruitment in 2019 is hotly released, have you been fooled?]

[Have you given out year-end bonuses this year? Let’s talk about the market logic behind year-end bonuses]

[IC self-media interview: I love IC community]

[The latest machine learning practical video tutorial in 2018]

[[Download] Happiness Philosophy Class by Chen Guo, a famous teacher at Fudan University]

[Get started with python from scratch in 15 days - the most complete video tutorial]

[[Must-have for Masters] Download the electronic version of the most complete digital IC design classic book]

[[Welfare] Digital IC backend various Userguide downloads]

The owner of the knowledge planet star of Wuai IC Community is the owner of the public account "Wuai IC Community". He has been engaged
back-end design and implementation work for nearly 12 years, and has advanced process nodes such as 55nm, 40nm, 28nm, 22nm, 14nm, 12nm
Successful tapeout experience, successfully tapeout more than 30 chips .

This is a knowledge community in the field of highly vertical segmentation of digital IC design and implementation, gathering countless digital IC fron
design, back-end implementation, and analog layout engineers.

Here you can build more connections, communicate more, expand your network, and even organize offline activities. Here you can ask questions a
issues in the field of digital IC back-end design and implementation, you can also consult on career development planning issues, and you can also
and exchange issues that bother you. Try to answer all the questions asked. If you encounter something you don’t understand, you will consult the i
or ask experts to answer the question. Everyone is encouraged to actively post topics and ask questions, thereby promoting a virtuous cycle of the
knowledge community. Every month the editor will reward active users.

The most important thing is that here, with the help of this knowledge community, you can realize your dream of making a million yuan per year in a
Whether you believe it or not, friends who have already come in must believe it! Meeting is a kind of fate, and acquaintance is a rare friendship! The
currently 2,500 planet members. Thank you to these 2,500 children for their support! The ultimate goal is to achieve the ambitious goal of achiev
annual salary of one million for all employees of this Knowledge Planet .

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IC backend study notes-floorplan tfrofc's

Floorplan is layout planning. Planning includes defining the size of the chip, defining the size and location of various modules, hard macros (hard core. Such as RAM, RO

How to get started quickly with digital IC back-end design ? (Learning video included) coachip's
Although the threshold of the IC industry has increased in 2022 , this cannot resist the enthusiasm of students to switch to the IC industry. The development prospects an

ic backend study notes-CTS tfrofc's

CTS is clock tree synthesis. The clock tree refers to the buffer/inverter tree that grows from a certain clock root point to the sink point. Clock tree synthesis, as the name

How to get started with digital IC design ? (Attached is the entire learning process) coachip's
Seeing that many friends do not understand how to learn digital IC design , let me explain it to you in detail.

A must-read for beginners to learn the IC design back-end process.pdf

A must-read for beginners to learn the IC design back-end process.pdf

Digital integrated circuit back-end (Innovus) development and design Clear Aurora CS
For digital chips: 1. Floor planning the Design; 2. Power path design (Routing Power with Special Route); 3. Analyzing Route Feasibility with the Early Global Router Rou

innovus study notes - digital back-end IC m0_60873488's

innovus learning, introduction to digital back-end process

[ Basic understanding of digital backend ] y714078652’s

In integrated circuit design , the process of writing verification from Verilog/VHDL code (RTL level) and then converting it into a gate-level netlist (gate netlist) through syn

Digital IC design introductory book list feelinghappy's col

Author: Forever snow Link: https://zhuanlan.zhihu.com/p/23429432 Source: Zhihu copyrightfocus
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innovus block implementation

blog flow 151
download study lab Rapid Adoption
Community GitCode Kit(RAK)
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innovus block implementation flow 171 workshop lab guide Rapid Adoption Kit (RAK)

Collection of digital backend interview questions- digital chip laboratory.pdf

A collection of digital back-end written interview questions, with a total of about 150 questions, with bookmarks, covering the design process, file format, STA, etc. It is ve

Digital IC design process front-end + back- end.docx

Digital IC front-end and back-end design process. This document mainly describes the digital IC design process, including the detailed steps of front-end design and bac

An overall view of digital back-end design technology

Describes the overall technical overview of IC digital back-end design . The chip design process is introduced .

Summary of all-wireless charging ICs , solutions, and technologies in history

Foreign companies that develop wireless charging technology (including chips/solutions/transmitting and receiving devices) mainly include IDT, TI, Freescale, Qualcomm

Dry stuff! Digital IC backend introductory study notes Latest releases weixin_52955333's
Traditionally, the work before placement and routing is called the front end, and the work after placement and routing is called the back end. At the same time, the layout

Recommended books for digital IC back-end learning weixin_52955333's

Here we have compiled the classic must-read books on digital IC backends . Due to the variety of books on the market, we only recommend 6 books here. If necessary,

Digital IC backend study notes: equivalence check and ECO Chen's

However, gate-level simulation cannot provide a guarantee, and it cannot be 100% certain that the modified RTL and the modified netlist are equivalent. At ECO, the inp

Literacy of digital back-end knowledge points - layout design Idiot Big Turtle’s B
In the layout design interface, select : Launch->Layout , return to the Layout XL work interface again and you can see that the layout of the corresponding device has be

Digital ic backend design interview question bank csdn

The digital IC back-end design interview question bank is a question bank provided by CSDN for the field of digital IC back-end design . This question bank contains a se

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