Reduction in components using modified

topology for asymmetrical multilevel inverter

Kanungo Barada Mohanty, Kishor Thakre, Aditi Chatterjee,
Ashwini Kumar Nayak and Vinaya Sagar Kommukuri
Department of Electrical Engineering, National Institute of Technology, Rourkela, Odisha, India

Abstract
Purpose – This study aims to propose a modified topology for an asymmetric multilevel inverter as a basic module that generates 13-level output
voltage waveform. The basic module consists of eight switches (unidirectional and bidirectional switch) and four DC voltage sources with unequal
magnitudes. The proposed topology reduces the number of switches, isolated DC sources, cost and size of the circuit significantly as compared to
other topologies. In addition, the proposed circuit provides a modular structure for a multilevel inverter.
Design/methodology/approach – The proposed configuration is implemented through simulation and hardware development of a single-phase
13-level inverter prototype. A multicarrier-based pulse width modulation scheme is adopted for generating switching signals by using dSPACE real-
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time controller.
Findings – To demonstrate the advantages of the proposed configuration, a comparative analysis is carried out with other multilevel topologies in
terms of number of switches, gate driver circuits, on-state switches and blocking voltage on the switches. The comparison results confirmed that the
proposed configuration requires less number of components for the same number of voltage levels. Moreover, the peak inverse voltage on switches
and losses is lower in the proposed configuration.
Originality/value – In the available literature, numerous topologies are presented with main emphasis on the reduced components count. In this
study, the authors proposed a new topology for an asymmetrical source configuration. The performance of the proposed topology under steady-
state and dynamic conditions is evaluated using simulation and experimental implementation.
Keywords Multilevel inverter, Sinusoidal pulse width modulation
Paper type Research paper

1. Introduction  The flying-capacitor inverter: It requires a large number of

In the area of medium-voltage high-power applications,
multilevel inverters (MLIs) have received tremendous response
(Baker and Bannister, 1975). An MLI offers high-power-
quality waveform, low total harmonic distortion (THD), less
dv/dt stress, lower switching losses and better electromagnetic
interference (Rodriguez et al., 2002, 2007). Therefore, MLIs
play a vital role in AC motor drives, hybrid electric vehicles,
active filters, FACTS devices and integration of renewable
energy (Chavarria et al., 2013; Cheng et al., 2006; Barrena
et al., 2008; Alepuz et al., 2006; Ristow et al., 2008). However,
MLI suffers from some drawbacks such as with increase in
number of voltage levels, the number of power components
increases. The increase in component count makes the overall
system complex, bulky and costly and reduces the efficiency
and reliability of the inverter (Malinowski et al., 2010).
The classical MLI topologies are categorized as follows:
 The neutral point clamped or diode-clamped inverter: It suffers
from voltage balancing of DC-link capacitors for higher
levels. Moreover, many diodes exist (Khajehoddin et al.,
2008).
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capacitors for higher voltage levels, and the balancing of the
capacitor’s voltages is difficult (McGrath and Holmes, 2008).
 The cascaded H-bridge inverter: It requires less number of
power electronic components than other classical
topologies. This structure consists of several H-bridges,
and each H-bridge requires isolated DC voltage source
(Chavarria et al., 2013).
The cascaded H-bridge MLI is classified into symmetric and
asymmetric MLI. The magnitudes of DC sources in a
symmetric MLI are identical. However, the magnitudes of DC
sources in an asymmetric MLI are unequal. An asymmetrical
MLI possesses voltage balancing problem and complex
switching. However, it generates more number of voltage levels
compared to symmetrical MLI with same number of
components (Babaei et al., 2012).
But the common issue is that as the number of output voltage
levels increases, the number of components increases significantly.
Since past 10 years, many researchers have tried to present new
topologies with lesser number of switches. Therefore, many
researchers have proposed new topologies for MLIs with less
number of components (Babaei, 2008; Banaei and Salary, 2011;
Babaei et al., 2014; Gupta and Jain, 2014a; Ajami et al., 2014;

Received 21 January 2017

World Journal of Engineering
Revised 19 July 2018
16/1 (2019) 71–77 28 July 2018
© Emerald Publishing Limited [ISSN 1708-5284] 6 August 2018
[DOI 10.1108/WJE-01-2017-0010] Accepted 14 August 2018

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