Defect Reduction by Nitrogen Purge of Wafer

Carriers

R. van Roijen1, P. Joshi1, D. Bailey2, S. Conti1, W. Brennan1, P. Findeis1

1 2
Microelectronics Division PDF Solutions
IBM Richardson, TX 75082
Hopewell Junction, NY, USA dane.bailey@pdf.com
rvanroij@us.ibm.com

Abstract—Nitrogen purge of wafer carriers is driving defect
density reduction at critical process steps. We discuss the
mechanism of defect creation and how nitrogen purge improves
defect density. We report on experimental split data from in line
inspection and the impact at electrical test. The effect on volume
manufacturing is demonstrated.
Keywords—Semiconductor processing; Contamination
I. INTRODUCTION
The need for defect reduction at present and future
technology nodes requires that we look for fundamentally new
methods to avoid contamination. The use of mini-
environments, which achieve better defect class than the
surrounding cleanroom, is critical for modern semiconductor
manufacturing[1]. However, the mini-environment has
limitations: gases permeating the shell and other contaminants
can still come in contact with wafers[2].
Nitrogen purge of wafer carriers can mitigate some of these
disadvantages and eliminate defects caused by oxidation and
other mechanisms[3,4]. We demonstrate the improvement in
defect density and we show that certain queue time restrictions,
driven by formation of oxide over time, can be relaxed.
during processing and humidity can affect wafers. The
susceptibility to such contaminants will depend on the state of
the wafer surface at a given time.
In addition to the fact that the FOUP can not keep all types
of contaminants away from the wafer, it can also have a
detrimental impact, compared to an environment where wafers
are exposed to the larger cleanroom. As we describe below, so-
called condensation defects are prevalent on wafers processed
with mini-environments. However, such defects are generally
not observed on wafers processed without mini-environments.
III. SIGE EPITAXY
Epitaxial growth of SiGe on silicon is used for strain
engineering in CMOS logic, amongst others. Epitaxial SiGe in
the source/drain region of pFET devices increases the device
on current at given off current by as much as 20% [5,6].
Epitaxial growth will only be successful if the silicon
surface is sufficiently clean and a number of authors have
described methods to achieve this[7]. One common result of
insufficient surface cleaning is the so-called blocked growth
defect (BG), where SiGe is completely absent in certain areas.
An example of this defect is shown in cross section in fig. 1.

II. THE WAFER CARRIER

The Front Opening Unified Pod (FOUP) is widely used in

the Semiconductor industry. Its primary objective is to
effectively improve the cleanroom class for wafers inside,
compared to the level of the production floor. In our case the
wafers inside a FOUP are in a class 1 environment, while the
cleanroom outside is class 100. Thus the FOUP has made the
contamination level suitable for manufacturing at advanced
technology nodes, while keeping cost at acceptable levels.
The success of the mini-environment can be attributed to its
ability to keep dust, mainly generated by the presence of
humans, away from the wafer. However, dust is not the only
source of defects during fabrication. It is known volatile Fig. 1. A cross section of a BG defect. The two areas to each side of the
organic compounds (VOC), by products of chemicals used central gate structure (circled) are missing SiGe on the thin silicon layer. This
we call blocked growth.

978-1-4673-5007-5/13/$31.00 ©2013 IEEE 338 ASMC 2013

 One contributing cause of BG defects was found to be
condensation defects. Typically the silicon surface is cleaned
before epitaxial growth in some wet etch process, in our case
using dilute HF. When inspecting wafers after this clean step
and before they entered the furnace, we found droplet shaped
defects on the surface. We also confirmed that BG defects were
found after epitaxy in the same location where the
condensation was seen before[8]. The density of these defects
was often such that significant yield degradation occurred. By
making changes to the clean process the defect density was
greatly reduced, but we still had to operate with a queue time
restriction between clean and furnace to limit the BG defect
density.
Attempts to determine the composition of condensation
defects were not successful, but most likely they are small
droplets consisting mostly of water. A striking observation is
that such defects are not typically found where wafers are
exposed to the open cleanroom, presumably since water and
other remaining liquids quickly evaporate in the absence of a
sealed pod[9].
IV. EXPERIMENTAL
For some time nitrogen purge has been proposed as a way
to mitigate certain sources of defects, especially those that are
caused by oxygen or water [3,4,10,11]. Promising results have
also been reported using other methods to remove air and
molecular contaminants [12]. We use otherwise conventional
FOUPs with an inlet and outlet opening in the bottom and have
fitted stockers with the ability to flow nitrogen or other gases
through the openings (fig. 2).
Since there is good reason to suspect that oxygen and/or
water play a large role in the formation of the defects for SiGe
growth described above, we have applied nitrogen purge to
FOUPs for the processing steps before SiGe epitaxy. To test
the hypothesis that the nitrogen reduces the occurrence of
growth defects we could monitor a large sample of wafers
during regular processing, but a simpler way is to compare
cases where we intentionally violate the queue time restriction.
In the presence of air the queue time between preclean and
Fig. 2. Photograph of the bottom of a FOUP with inlet and outlet for gas
purge. In our case the gas is nitrogen, but other gases can also be used. The
ports are fited with filters.
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epitaxy is 8 hours or less, since it is known there is an
increased risk of defects if we exceed 8 hours.
In the experiment we split a lot and ran three different
conditions: normal processing without purge with
approximately 1 hour between clean and epitaxy; normal
processing, but with a 30 hour wait before epitaxy; and
processing with 30 hour wait before epitaxy, where the wafers
are kept in a FOUP with nitrogen purge. These conditions are
expected to generate a significant difference in the number of
defects.
Fig. 3. Defect density D for three cases: POR (regular processing), queue
time violation in a normal FOUP without purge and queue time violation with
nitrogen purge.
V. RESULTS
The result clearly confirmed the benefit of nitrogen purge
for avoiding growth defects. While the regularly processed
wafers, which saw a standard mini-environment during the 30
hour wait, had a high density of growth defects, as expected,
the wafers which had spend 30 hours in a nitrogen purge had a
defect level comparable to the wafers which did not violate the
queue time restriction. Fig. 3 shows the defect density for the
three cases: queue time violation in a nitrogen purge
environment (third bar) has a level comparable to the process
of record (POR, first bar), but the equivalent queue time
violation in the regular environment has a high defect density
(second bar).
The wafers used in the queue time experiment above
contained an array of electrical defectivity structures which
allow for the measurement of open and short failures on key
conductive layers. (eg. Active, Gate, Metal, etc). From such
electrical structures, a failure rate can be determined based on
the number of fails and the critical area of all similar structures
on a wafer[13]. The wafers in these experiments were
processed up to the first metal level and then electrically tested.
The electrical test results confirmed the in-line inspection
data. As shown in fig. 4, the most significant impact on the
results was observed for PFET active open fails. This is
expected since a BG defect in the PFET active region would
likely cause an electrical failure due to the absence of SiGe
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growth. The queue time violation in normal atmosphere,
which had a high defect density, also has a significantly higher
fail rate than POR. However, the comparable queue time
violation with nitrogen purge produced fail rates comparable to
POR.
Fig. 4. Open fail rate of p-type Active area for three cases: POR, queue time
violation in a conventional FOUP and queue time violation with nitrogen
purge.
Another process step known to be at risk for defects of
molecular origin is reactive ion etching (RIE). In this case there
is no known queue time limitation, but the process gases used
have components such as fluorine and bromine which can
linger and react to cause damage to the wafer. We have applied
nitrogen purge during lithography and etch for the definition of
gate structures. In this case we did not observe a significant
change of defect density at inline inspection, but we did find a
clear reduction of electrical open defects for gate contacts at
electrical test. The response of defect density for electrical
opens is shown in fig. 5.
Fig. 5. Normalized density of electrical open defects for POR processing and
with application of nitrogen purge FOUP for the gate etch process on a split
lot, as determined at electrical test.
340
Fig. 6. Average density of BG defects before (POR) and after (N2 purge)
application of nitrogen purge FOUP for the SiGe epitaxy process. The total
sample size is nearly 200 wafers inspected
VI. IMPACT ON PRODUCTION WAFERS
After changing the POR SiGe epitaxy process to take place
in purged FOUPs we continued to monitor defect levels using
inline inspection. Though the level of BG defects was
considered acceptable before this change, we did find the
defect density decreased significantly with nitrogen purge, as
shown in fig. 6. Since the BG defect leads to a high probability
of fail at test, this is a yield benefit. The second benefit of
purge is the relaxation of the queue time limit. It results in
increased throughput and a reduction of rework.
VII. SUMMARY
The mini-environment has been very successful at
improving the cleanroom class at recent technology nodes, but
we are increasingly experiencing defects due to exposure to
oxygen, water vapor and other molecular contaminants within
the mini-environment. We have applied nitrogen purge of
FOUPs in a production line and demonstrated that defect
density is reduced and queue time sensitivity can be eliminated
at the epitaxial growth of SiGe.
ACKNOWLEDGMENT
The authors would like to thank R. Miller, S. Kaldor and S.
Sankaran of IBM Microelectronics for their support of this
work.
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