This document defines a testbench for a servo controller. It declares constants for the clock frequency, pulse frequency, minimum and maximum pulse widths, and number of position steps. Signals are declared for the clock, reset, position, and pulse-width modulation output. The device under test entity and port map are instantiated. A process generates a reset pulse then sequentially sets the position through the step count, waiting each time for a pulse period to elapse. Upon completing the loop, it reports the simulation is done and finishes.
This document defines a testbench for a servo controller. It declares constants for the clock frequency, pulse frequency, minimum and maximum pulse widths, and number of position steps. Signals are declared for the clock, reset, position, and pulse-width modulation output. The device under test entity and port map are instantiated. A process generates a reset pulse then sequentially sets the position through the step count, waiting each time for a pulse period to elapse. Upon completing the loop, it reports the simulation is done and finishes.
This document defines a testbench for a servo controller. It declares constants for the clock frequency, pulse frequency, minimum and maximum pulse widths, and number of position steps. Signals are declared for the clock, reset, position, and pulse-width modulation output. The device under test entity and port map are instantiated. A process generates a reset pulse then sequentially sets the position through the step count, waiting each time for a pulse period to elapse. Upon completing the loop, it reports the simulation is done and finishes.