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A B C D E

EGRET Block Diagram


200-PIN DDR SODIMM
CLK GEN AMD CPU
ICS DDR 3 33/400 DDR x2
Claw Hammer K8 PCB Layer Stackup
4
ICS950405 8,9,10
3 L1: Signal 1 4

4,5,6,7 L2: GND


TV Encoder L3: Signal 2
SVIDEO/COMP
HyperTransport VIA VT1623M TVOUT 1 7 L4: Signal 3
6.4GB/S 16b/8b 14 L5: VCC
L6: Signal 4
PWR SW TI LVDS Transmitter LVDS
PCMCIA
SLOT
TPS2224AP PCI 7420 VIA VIA VT1631 LCD 18
27 2* Slot Cardbus 15
Support 1* 13 94
K8N800 Battery Charger 46
TypeII PCMCIA I/F AGTL+ CPU I/F + UMA MAX1645BEEI
27 AG P 8x Graphic CONN.
11,1 2,13 RGB CRT INPUTS OUTPUTS
AGP 8X CRT 17
1394 16 AD+ DCBATOUT
25, 26 BAT+
3
Conn 8 bit V-LINK 3
27 SYSTEM DC/DC 43
66MHZ 8x/4x/2x
MAX1999
INPUT OUTPUT

VIA DCBATOUT 5V_S5 ,


3D3V_S5
Mini-PCI PCI Bus / 33MHz VT8235CE SYSTEM DC/DC 44
ACPI 2.0 6xUSB 2.0
USB x 4
802.11a/b/g PCI 24
AC'97 CODEC TPS5110
30 VT1612A Line In 3 2 INPUT OUTPUT

AC LINK MIC In DCBATOUT 2D5V_S3


31 2D5V_S3 1D5V_S0
6- CH
1 0 0 0 Mb
PCI GIGA LAN AC97 2.2
RJ45 TXFM Line Out
Realtek MODEM RJ11 CPU V_CORE41, 42
29 29 28 OP AMP (SPDIF)
RTL8110SBL MDC Card CONN 32 ISL6559CR
29 APA2020
24 32 INPUT OUTPUT

TXFM 1 0/100Mb LAN PHY MII Int. SPKR DCBATOUT VCC_CORE_S0


2 29 VIA VT6103L 2 9 32 2
LPC Bus / 33MHz
LPC I/F SYSTEM POWER 44, 45
FDD6035AL/FDS9412-U
ATA 133 19,2 0,21 FDS9412-U/SI4892DY/LP2951ACM
APL5508-18VC/APL5308-25AC
INPUT OUTPUT

Thermal 2D5V_S5
NS SIO KBC FWH 5V_S0
P IDE

SIDE

& Fan 5V_S3 3D3V_S3


PC87392 G791 2 2 M38859 SST-49LF040 3D3V_S5 3D3V_S0
3D3V_S3 3D3V_LAN_S3
36 33 35 3D3V_S0
DVD/ DCBATOUT
1D8V_S0
HDD +5V_AUX_S5
CD-RW +5V_UP_S5
23 23
2D5V_S0

Parallel FIR Touch Int.


port TFD U6101E Pad KB
37 36 34 34

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Block Diagram
Size Document Number Rev
A3
EGRET SC
Date: Friday, July 23, 2004 Sheet 1 of 50
A B C D E
EGRET REVISION HISTORY PCI RESOURCE TABLE
DEVICE IDSEL PCI IRQ REQ# / GNT#

VGA & AGP P_INTA#

AD22 P_INTB# P_REQ#1/P_GNT#1


PCI7420-CardBus A

PCI7420-CardBus B AD22 P_INTC# P_REQ#1/P_GNT#1

PCI7420-IEEE1394A AD22 P_INTD# P_REQ#1/P_GNT#1

Mini-PCI AD21 P_INTF# P_REQ#0/P_GNT#0

Giga LAN AD23 P_INTG# P_REQ#2/P_GNT#2


RTL8110SBL

5,8 VREF_DDR_MEM VREF_DDR_MEM

4,11,13,39,45 1D2V_HT0A_S0 1D2V_HT0A_S0

4,6 1D2V_HT0B_S0 1D2V_HT0B_S0

5,6,7,9,10,39,45 1D25V_S3 1D25V_S3

12,13,14,15,16,44,50 1D5V_S0 1D5V_S0

6,12,14,15,16,19,20,21,38,39,50 2D5V_S0 2D5V_S0

5,6,7,8,10,38,39,44,45,50 2D5V_S3 2D5V_S3

20,21,39 2D5V_S5 2D5V_S5

3,6,8,11,12,13,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,35,36,38,41,47,49,50 3D3V_S0 3D3V_S0

18,33,34,38,50 3D3V_S3 3D3V_S3

13,18,19,20,21,22,24,28,29,33,38,43,49,50 3D3V_S5 3D3V_S5

16,17,18,19,20,21,22,23,24,27,30,31,32,33,34,37,38,39,41,42,47,48,49,50 5V_S0 5V_S0

21,38,39,43,44,45,46,48,49 5V_S5 5V_S5

19,21,22,34,38,39,45,46,49 +5V_AUX_S5 +5V_AUX_S5

18,48,50 +5V_UP_S5 +5V_UP_S5

16,18,38,41,43,44,45,46,47,50 DCBATOUT DCBATOUT

7,41,42 VCC_CORE_S0 VCC_CORE_S0

46,47 AD+ AD+

46,47 BT+ BT+

41,42 DCBATOUT_ISL DCBATOUT_ISL

24,28,29 3D3V_LAN_S5 3D3V_LAN_S5

25,27 VCC_ASKT_S0 VCC_ASKT_S0

27 VPP_ASKT_S0 VPP_ASKT_S0

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
REVISION HISTORY
Size Document Number Rev
A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 2 of 50
A B C D E

6,8,11,12,13,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,35,36,38,41,47,49,50 3D3V_S0 3D3V_S0


3D3V_S0 3D3V_CLK_S0
L9 BLM21A121S
1 2 3D3V_CLK_S0

1
SC10U10V6ZY-U
C156 C593 C592 C594 C645 C646

SCD1U SCD1U SCD1U SCD1U SCD1U FS0~FS2 Have internal Pull-up resistor

2
FS3 Have internal Pull-down resistor
4 4

1
C599 C595 C596 C597 C598
U15
SCD1U SCD1U SCD1U SCD1U SCD1U SB

2
2 13 PCICLK0 R105 1 2 22R3
VDD PCI33_0 CLK33_CARDBUS 25
9 14 PCICLK1 R107 1 2 22R3
VDD PCI33_1 CLK33_LAN 28
16 17 PCICLK2 R126 1 2 63.22034.151 CLK33_MINI 30
VDD PCI33_2 22R3
19 VDD PCI33_3 18
PCICLK4 RN13
CLK33_LAN Damping only
29 VDD PCI33_4 21 4 5 CLK33_KBC 33
35 22 PCICLK5 3 6 Stuff for RTL8110SB
SC 38
VDD PCI33_5
23 PCICLK6 SRN22-1 2 7
CLK33_SIO 36
VDD PCI33_6 CLK33_LPCROM 35
46 24 PCICLK7 1 8
VDD PCI33_7 CLK33_SB 21
C154
XI_CLK CLK33_HT66SEL#0
By KDS suggested change 1 2 43 VDDA HT66_0/PCIHT66SEL0# 6
CLK33_HT66SEL#1 R101 1 2 22R3
Library Issue PCI33_8_HT66_1/PCIHT66SEL1# 7 CLK66_NB 12

1
From 78.33034.1B1 SC12P CLK_PD# 32 8 PCI33_HT66_2 R106 1 2 22R3
VDDF PCI33_9_HT66_2 CLK66_VGA 16
X3 Pin32: PD# 11 PCI33_HT66_3 R102 1 2 22R3
PCI33_11_HT66_3 CLK66_VCLK 21
To 78.12034.1B1 XTAL-14D318M-2 PCI33_10 12
C155 3

2
XO_CLK XIN
1 2 4 XOUT CLK66_VGA Damping only
SRESET#/PD# 44
SC12P R108 15R3F Stuff for K8N800 Discrete
1 2 CPUCLK_CY 41 28 CLK_24_48SEL# R127 1 2 22R3
6 CPUCLK CPUT0 24_48MHZ/SEL# CLK48_CARDBUS 25
37 CPUT1

1
R112 15R3F 33 R128
CPUCLK#_CY 40 VSSF 10KR3
6 CPUCLK# 1 2 CPUC0
3 3
GUICLK Damping only 36 CPUC1 VSSA 42

2
Stuff for K8N800 UMA 12 GUICLK
R86 1 2 DY-22R3 5
ZZ.22034.151 FS0 VSS
1 FS0/REF0 VSS 10
R88 1 2 22R3 FS1 48 15
21 APICCLKSB FS1/REF1 VSS
R109 1 2 22R3 FS2 45 20
20 SIO_OSC FS2/REF2 VSS
R110 1 2 22R3 FS3 31 27
36 CLK14_SIO USB/FS3 VSS
VSS 30
8,21 SMBC_SB 25 SCLK VSS 34
VSS 39
8,21 SMBD_SB 26 SDATA VSS 47

ICS950405

3D3V_CLK_S0
R85 10KR3
1 2 FS0
R111 1 2 22R3 FS3
19 CLK48_USB
R87 10KR3
1 2 FS1

R114 10KR3
1 2 FS2

Input Configuration Clock Generator Output


24_48 SEL# 24_48MHz
2 FS3 FS2 FS1 FS0 CPU (MHz) PCI33_HT66 (MHz) PCI33 (MHz) 3D3V_CLK_S0 2
* 0 48MHz
0 0 0 0 100.90 67.27 33.63 All output Tri-state R113 10KR3
1 24MHz CLK_PD#
0 0 0 1 133.90 66.95 33.48 1 2

0 0 1 0 168.00 67.20 33.60 CLK33_HT66SEL#1 1 2


R103 10KR3
0 0 1 1 202.00 67.33 33.67 CLK33_HT66SEL#0 1 2
R104 10KR3
0 1 0 0 100.20 66.80 33.40
0 1 0 1 133.50 66.75 33.38
0 1 1 0 166.70 66.68 33.34 PCIHT66 SEL[1:0]# PCI33_HT66[3:0]
* 0 1 1 1 200.40 66.80 33.40 Normal Hammer operation
SEL0 SEL1 PIN7 PIN8 PIN11
1 0 0 0 150.00 60.00 30.00
0 0 HT66 HT66 PCI33
1 0 0 1 180.00 60.00 30.00
* 0 1 HT66 HT66 HT66
1 0 1 0 210.00 70.00 35.00
1 0 PCI33 PCI33 PCI33
1 0 1 1 240.00 60.00 30.00
1 1 HT66 PCI33 PCI33
1 1 0 0 270.00 67.50 33.75
1 1 0 1 233.33 66.67 33.33
1 1
1 1 1 0 266.67 66.67 33.33
1 1 1 1 300.00 75.00 37.50 Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CLKGEN_ICS950405
Size Document Number Rev
A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 3 of 50
A B C D E
A B C D E

11,13,39,45 1D2V_HT0A_S0 1D2V_HT0A_S0


1D2V_HT0A_S0

6 1D2V_HT0B_S0 1D2V_HT0B_S0

1
C105 C107 C106 C109
SCD22U16V3ZY SCD22U16V3ZY SCD22U16V3ZY SCD22U16V3ZY

2
4 4

HTT for CPU sideA HTT for CPU sideB


Transmit power Receive power
and NB sideA Receive and NB sideA
power Transmit power

1D2V_HT0A_S0 U11A 1D2V_HT0B_S0

D29 VLDT0_A VLDT0_B AH29 LAYOUT: Place bypass cap on topside of board near
D27 AH27
D25
VLDT0_A VLDT0_B
AG28 HTT power pins that are not connected directly to
3 VLDT0_A VLDT0_B C469 3
C28 VLDT0_A VLDT0_B AG26 downstream HTT device, but connected internally to
C26 AF29 SC4D7U10V5ZY
B29
VLDT0_A VLDT0_B
AE28
other HTT power pins.
VLDT0_A VLDT0_B
B27 VLDT0_A VLDT0_B AF25
NB0CADOUT15 T25 N26 CPUCADOUT15
11 NB0CADOUT[15..0] L0_CADIN_H15 L0_CADOUT_H15 CPUCADOUT[15..0] 11
NB0CADOUTJ15 R25 N27 CPUCADOUTJ15
11 NB0CADOUTJ[15..0] L0_CADIN_L15 L0_CADOUT_L15 CPUCADOUTJ[15..0] 11
NB0CADOUT14 U27 L25 CPUCADOUT14
NB0CADOUTJ14 L0_CADIN_H14 L0_CADOUT_H14 CPUCADOUTJ14
U26 L0_CADIN_L14 L0_CADOUT_L14 M25
Used SideB Power Plane NB0CADOUT13 V25 L26 CPUCADOUT13 Used SideA Power Plane
NB0CADOUTJ13 L0_CADIN_H13 L0_CADOUT_H13 CPUCADOUTJ13
U25 L0_CADIN_L13 L0_CADOUT_L13 L27
NB0CADOUT12 W27 J25 CPUCADOUT12
NB0CADOUTJ12 L0_CADIN_H12 L0_CADOUT_H12 CPUCADOUTJ12
W26 L0_CADIN_L12 L0_CADOUT_L12 K25
NB0CADOUT11 AA27 G25 CPUCADOUT11
NB0CADOUTJ11 L0_CADIN_H11 L0_CADOUT_H11 CPUCADOUTJ11
AA26 L0_CADIN_L11 L0_CADOUT_L11 H25
NB0CADOUT10 AB25 G26 CPUCADOUT10
NB0CADOUTJ10 L0_CADIN_H10 L0_CADOUT_H10 CPUCADOUTJ10
AA25 L0_CADIN_L10 L0_CADOUT_L10 G27
NB0CADOUT9 AC27 E25 CPUCADOUT9
NB0CADOUTJ9 L0_CADIN_H9 L0_CADOUT_H9 CPUCADOUTJ9
AC26 L0_CADIN_L9 L0_CADOUT_L9 F25
NB0CADOUT8 AD25 E26 CPUCADOUT8
NB0CADOUTJ8 L0_CADIN_H8 L0_CADOUT_H8 CPUCADOUTJ8
AC25 L0_CADIN_L8 L0_CADOUT_L8 E27
NB0CADOUT7 T27 N29 CPUCADOUT7
NB0CADOUTJ7 L0_CADIN_H7 L0_CADOUT_H7 CPUCADOUTJ7
T28 L0_CADIN_L7 L0_CADOUT_L7 P29
NB0CADOUT6 V29 M28 CPUCADOUT6
NB0CADOUTJ6 L0_CADIN_H6 L0_CADOUT_H6 CPUCADOUTJ6
U29 L0_CADIN_L6 L0_CADOUT_L6 M27
NB0CADOUT5 V27 L29 CPUCADOUT5
NB0CADOUTJ5 L0_CADIN_H5 L0_CADOUT_H5 CPUCADOUTJ5
V28 L0_CADIN_L5 L0_CADOUT_L5 M29
NB0CADOUT4 Y29 K28 CPUCADOUT4
NB0CADOUTJ4 L0_CADIN_H4 L0_CADOUT_H4 CPUCADOUTJ4
W29 L0_CADIN_L4 L0_CADOUT_L4 K27
2 NB0CADOUT3 CPUCADOUT3 2
AB29 L0_CADIN_H3 L0_CADOUT_H3 H28
NB0CADOUTJ3 AA29 H27 CPUCADOUTJ3
NB0CADOUT2 L0_CADIN_L3 L0_CADOUT_L3 CPUCADOUT2
AB27 L0_CADIN_H2 L0_CADOUT_H2 G29
NB0CADOUTJ2 AB28 H29 CPUCADOUTJ2
NB0CADOUT1 L0_CADIN_L2 L0_CADOUT_L2 CPUCADOUT1
AD29 L0_CADIN_H1 L0_CADOUT_H1 F28
NB0CADOUTJ1 AC29 F27 CPUCADOUTJ1
NB0CADOUT0 L0_CADIN_L1 L0_CADOUT_L1 CPUCADOUT0
AD27 L0_CADIN_H0 L0_CADOUT_H0 E29
NB0CADOUTJ0 AD28 F29 CPUCADOUTJ0
L0_CADIN_L0 L0_CADOUT_L0
NB0HTTCLKOUT1 Y25 J26 CPUHTTCLKOUT1
11 NB0HTTCLKOUT1 L0_CLKIN_H1 L0_CLKOUT_H1 CPUHTTCLKOUT1 11
NB0HTTCLKOUTJ1 W25 J27 CPUHTTCLKOUTJ1
11 NB0HTTCLKOUTJ1 L0_CLKIN_L1 L0_CLKOUT_L1 CPUHTTCLKOUTJ1 11
NB0HTTCLKOUT0 Y27 J29 CPUHTTCLKOUT0
1D2V_HT0B_S0 11 NB0HTTCLKOUT0 L0_CLKIN_H0 L0_CLKOUT_H0 CPUHTTCLKOUT0 11
NB0HTTCLKOUTJ0 Y28 K29 CPUHTTCLKOUTJ0
11 NB0HTTCLKOUTJ0 L0_CLKIN_L0 L0_CLKOUT_L0 CPUHTTCLKOUTJ0 11
R289 1 2 49D9R3F CPUHTTCTLIN1 R27 N25
R290 L0_CTLIN_H1 L0_CTLOUT_H1
1 2 49D9R3F CPUHTTCTLINJ1 R26 L0_CTLIN_L1 L0_CTLOUT_L1 P25
NB0HTTCTLOUT T29 P28 CPUHTTCTLOUT0
11 NB0HTTCTLOUT L0_CTLIN_H0 L0_CTLOUT_H0 CPUHTTCTLOUT0 11
NB0HTTCTLOUTJ R29 P27 CPUHTTCTLOUTJ0
11 NB0HTTCTLOUTJ L0_CTLIN_L0 L0_CTLOUT_L0 CPUHTTCTLOUTJ0 11

BGA754-SKT-U
62.10030.041

By ME requset U11 P/N:


Main 62.10030.041
1 1
Second 62.10053.191
Third 62.10053.201
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU(1/4)_HyperTransport I/F
Size Document Number Rev
A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 4 of 50
A B C D E
A B C D E

8 VREF_DDR_MEM VREF_DDR_MEM

6,7,8,10,38,39,44,45,50 2D5V_S3 2D5V_S3

U11B 1D25V_S3
6,7,9,10,39,45 1D25V_S3 1D25V_S3
TP42
DDRVTT_SENSE AE13 D17
VTT_SENSE VTT_A
4
VTT_A A18 4

1
B17 C578 C177
2D5V_S3 VTT_A
VREF_DDR_CLAW AG12 MEMVREF1 VTT_A C17
AF16 SCD1U SC1000P50V3KX

2
R319 1 VTT_B
2 34D8R3F-1 MEMZN D14 MEMZN VTT_B AG16 78.10224.2B1
R318 1 2 34D8R3F-1 MEMZP C14 AH16
MEMZP VTT_B
VTT_B AJ17
AMD suggested change For REGISTED DIMM Only
VREF_DDR_MEM to 34.8 ohm

9 M_DATA[63..0]
MEMRESET_L

MEMCKEA
MEMCKEB
AG10

AE8
AE7
MEMRESET#

M_CKE#0
M_CKE#1
UNBUFFER DIMM NC
M_CKE#0 8,9
M_CKE#1 8,9
M_DATA63 A16
M_DATA62 MEMDATA63 M_CLK7
NOTE: Test with passive probes only. M_DATA61
B15 MEMDATA62 MEMCLK_H7 D10
M_CLK#7
M_CLK7 8,9
A12 MEMDATA61 MEMCLK_L7 C10 M_CLK#7 8,9
NOTE: Install to bypass op-amp M_DATA60 B11 E12 M_CLK6
M_DATA59 MEMDATA60 MEMCLK_H6 M_CLK6 8,9
2D5V_S3 A17 E11 M_CLK#6
MEMDATA59 MEMCLK_L6 M_CLK#6 8,9
M_DATA58 A15 AF8 M_CLK5
MEMDATA58 MEMCLK_H5 M_CLK#5 M_CLK5 8,9
M_DATA57 C13 AG8
MEMDATA57 MEMCLK_L5 M_CLK#5 8,9
M_DATA56 A11 AF10 M_CLK4 2D5V_S3
MEMDATA56 MEMCLK_H4 M_CLK4 8,9
M_DATA55 A10 AE10 M_CLK#4
MEMDATA55 MEMCLK_L4 M_CLK#4 8,9
1

C302 M_DATA54 B9 V3
R207 M_DATA53 MEMDATA54 MEMCLK_H3 M_CLK#1
C7 MEMDATA53 MEMCLK_L3 V4 8 1
100R3 SCD1U M_DATA52 A6 K5 M_CLK#0 7 2
2

VREF_DDR_MEM M_DATA51 MEMDATA52 MEMCLK_H2 M_CLK1


C11 MEMDATA51 MEMCLK_L2 K4 6 3
M_DATA50 A9 R5 M_CLK1 M_CLK0 5 4
2

M_DATA49 MEMDATA50 MEMCLK_H1 M_CLK#1


A5 MEMDATA49 MEMCLK_L1 P5
M_DATA48 B5 P3 M_CLK0 RN95
M_DATA47 MEMDATA48 MEMCLK_H0 M_CLK#0 SRN10K-2
C5 MEMDATA47 MEMCLK_L0 P4
1

3 C300 C332 M_DATA46 A4 3


MEMDATA46
1

M_DATA45 E2 D8 M_CS#7
R206 SCD1U SC1000P50V3KX M_DATA44 MEMDATA45 MEMCS_L7 M_CS#6
E1 C8
2

100R3 78.10224.2B1 M_DATA43 MEMDATA44 MEMCS_L6 M_CS#5


A3 MEMDATA43 MEMCS_L5 E8
M_DATA42 B3 E7 M_CS#4
M_DATA41 MEMDATA42 MEMCS_L4 M_CS#3
E3 D6
2

M_DATA40 MEMDATA41 MEMCS_L3 M_CS#2


F1 MEMDATA40 MEMCS_L2 E6 M_CS#[3..0] 8,9
LAYOUT: Locate close to DIMMs.
M_DATA39 G2 C4 M_CS#1
M_DATA38 MEMDATA39 MEMCS_L1 M_CS#0
G1 MEMDATA38 MEMCS_L0 E5
M_DATA37 L3
M_DATA36 MEMDATA37 M_ARAS#
L1 MEMDATA36 MEMRASA_L H5 M_ARAS# 8,9
M_DATA35 G3 D4 M_ACAS#
MEMDATA35 MEMCASA_L M_ACAS# 8,9
M_DATA34 J2 G5 M_AWE#
MEMDATA34 MEMWEA_L M_AWE# 8,9
M_DATA33 L2
M_DATA32 MEMDATA33 M_ABS#1
M1 MEMDATA32 MEMBANKA1 K3 M_ABS#1 8,9
M_DATA31 W1 H3 M_ABS#0
MEMDATA31 MEMBANKA0 M_ABS#0 8,9
M_DATA30 W3
M_DATA29 MEMDATA30 RSVD_M_AA15
AC1 E13
NOTE: Remove to bypass op-amp M_DATA28
M_DATA27
AC3
W2
MEMDATA29
MEMDATA28
MEMDATA27
NC_E13
NC_C12
MEMADDA13
C12
E10
RSVD_M_AA14
M_AA13
M_AA[13..0] 8,9
M_DATA26 Y1 AE6 M_AA12
M_DATA25 MEMDATA26 MEMADDA12 M_AA11
AC2 MEMDATA25 MEMADDA11 AF3 AMD suggested M_AA13
M_DATA24 AD1 M5 M_AA10
M_DATA23 AE1
MEMDATA24 MEMADDA10
AE5 M_AA9 connect to DIMM pin123
M_DATA22 MEMDATA23 MEMADDA9 M_AA8
AE3 MEMDATA22 MEMADDA8 AB5
M_DATA21 AG3 AD3 M_AA7 MEMZN TP35
M_DATA20 MEMDATA21 MEMADDA7 M_AA6 MEMZP TP34
AJ4 MEMDATA20 MEMADDA6 Y5
M_DATA19 AE2 AB4 M_AA5 M_DQS8 TP9
M_DATA18 MEMDATA19 MEMADDA5 M_AA4 M_ADM8 TP7
AF1 MEMDATA18 MEMADDA4 Y3
2 M_DATA17 M_AA3 2
AH3 V5

VREF_DDR_CLAW M_DATA16 MEMDATA17 MEMADDA3 M_AA2


AJ3 MEMDATA16 MEMADDA2 T5
M_DATA15 AJ5 T3 M_AA1
M_DATA14 MEMDATA15 MEMADDA1 M_AA0
AJ6 MEMDATA14 MEMADDA0 N5
M_DATA13 AJ7
M_DATA12 MEMDATA13 M_BRAS#
AH9 MEMDATA12 MEMRASB_L H4 M_BRAS# 8,9
2D5V_S3 M_DATA11 AG5 F5 M_BCAS# MEMRESET# TP51
MEMDATA11 MEMCASB_L M_BWE# M_BCAS# 8,9
M_DATA10 AH5 F4 M_CS#7 TP48
MEMDATA10 MEMWEB_L M_BWE# 8,9
M_DATA9 AJ9 M_CS#6 TP47
M_DATA8 MEMDATA9 M_BBS#1 M_CS#5 TP50
AJ10 MEMDATA8 MEMBANKB1 L5 M_BBS#1 8,9
M_DATA7 AH11 J5 M_BBS#0 M_CS#4 TP49
MEMDATA7 MEMBANKB0 M_BBS#0 8,9
1

C577 M_DATA6 AJ11 RSVD_M_AA15 TP40


R328 M_DATA5 MEMDATA6 RSVD_M_BA15 RSVD_M_AA14 TP37
AH15 MEMDATA5 NC_E14 E14
100R3 SCD1U VREF_DDR_CLAW M_DATA4 AJ15 D12 RSVD_M_BA14 RSVD_M_BA15 TP39
M_BA[13..0] 8,9
2

M_DATA3 MEMDATA4 NC_D12 M_BA13 RSVD_M_BA14 TP38


AG11 MEMDATA3 MEMADDB13 E9
M_DATA2 AJ12 AF6 M_BA12
2

M_DATA1 MEMDATA2 MEMADDB12 M_BA11


AJ14 MEMDATA1 MEMADDB11 AF4 AMD suggested M_BA13
M_DATA0 AJ16 M4 M_BA10
MEMDATA0 MEMADDB10 connect to DIMM pin123
1

C579 C580 AD5 M_BA9


M_ADM8 MEMADDB9 M_BA8
9 M_ADM[7..0] R1 MEMDQS17 MEMADDB8 AC5
1

SCD1U SC1000P50V3KX M_ADM7 A13 AD4 M_BA7


2

R329 78.10224.2B1 M_ADM6 MEMDQS16 MEMADDB7 M_BA6


A7 MEMDQS15 MEMADDB6 AA5
100R3 M_ADM5 C2 AB3 M_BA5
M_ADM4 MEMDQS14 MEMADDB5 M_BA4
H1 Y4
LAYOUT: Locate close to CPU.
M_ADM3 AA1
MEMDQS13 MEMADDB4
W5 M_BA3 NOT SUPPORT ECC CHECK
2

M_ADM2 MEMDQS12 MEMADDB3 M_BA2


AG1 MEMDQS11 MEMADDB2 U5
M_ADM1
M_ADM0
AH7
AH13
MEMDQS10 MEMADDB1 T4
M3
M_BA1
M_BA0
AMD suggested remove
M_DQS8 MEMDQS9 MEMADDB0
1 9 M_DQS[7..0] M_DQS7
T1
A14
MEMDQS8
MEMDQS7 MEMCHECK7 N3 CB7 TP53 PULL-HI resistor. 1

M_DQS6 A8 N1 CB6 TP5


M_DQS5 MEMDQS6 MEMCHECK6 CB5 TP54
M_DQS4
D1
J1
MEMDQS5
MEMDQS4
MEMCHECK5
MEMCHECK4
U3
V1 CB4 TP11 Wistron Corporation
M_DQS3 AB1 N2 CB3 TP6 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
M_DQS2 MEMDQS3 MEMCHECK3 CB2 TP8 Taipei Hsien 221, Taiwan, R.O.C.
AJ2 MEMDQS2 MEMCHECK2 P1
M_DQS1 AJ8 U1 CB1 TP10
M_DQS0 MEMDQS1 MEMCHECK1 CB0 TP12 Title
AJ13 MEMDQS0 MEMCHECK0 U2
CPU(2/4)_DDR
BGA754-SKT-U Size Document Number Rev
A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 5 of 50
A B C D E
A B C D E

2D5V_CPUA_S0

5,7,9,10,39,45 1D25V_S3 1D25V_S3

2D5V_VDDA_S0

1
1
3D3V_S0 C441 R278 R1
Iomax=120mA DY-SC22P DY-20KR3F
12,14,15,16,19,20,21,38,39,50 2D5V_S0 2D5V_S0
U42

2
1 5 2D5V_VDDA_VREF Vout = 1.25*(1+ R1/R2)
SHDN# SET
2 GND 5,7,8,10,38,39,44,45,50 2D5V_S3 2D5V_S3

1
2D5V_S0 Need to check which should be used 3 4
SC IN OUT R279
4 DY-20KR3F R2 4

1
R499 DY-G913C-U 4 1D2V_HT0B_S0 1D2V_HT0B_S0
1 2 2D5V_CPUR_S0 C442 C440

2
DY-SC1U10V3ZY DY-SC1U10V3ZY

2
1

GAP-CLOSE-PWR
C472
SC10U10V6ZY-U
2

2D5V_VDDA_S0 LAYOUT: Route trace 50 mils wide and LAYOUT: Route VDDA trace approx.
Change 500 to 750 mils long between these 50 mils wide (use 2x25 mil traces to
2D5V_CPUA_S0 L270H U11C
R500 L23 0R5J
caps. exit ball field) and 500 mils long.
1 2 1 2 AH25 A20 THERMTRIP#
VDDA1 THERMTRIP_L
AJ25 VDDA2
1

1
DY-0R3-U C470 A26
THERMDA THERMDP 22
ZZ.R0004.151 TC6 SC4D7U10V5ZY C471 C499 AF20 A27
19 RST_CPU# RESET_L THERMDC THERMDN 22
ST100U4VBM-1 78.47593.411 SC3300P50V3KX SCD22U16V3ZY ALL_PWROK AE18
12,19,21,39 ALL_PWROK VID[4..0] 41
2

2
80.10716.321 1D2V_HT0B_S0 PWROK VID4
21 HTT_CPU_STOP# AJ27 LDTSTOP_L VID4 AG13
AF14 VID3
R292 1 VID3
2 44D2R3F L0_REF1 AF27 L0_REF1 VID2 AG14 VID2
R291 1 2 44D2R3F L0_REF0 AE26 AF15 VID1
SC 64.44R25.551 L0_REF0 VID1
AE15 VID0
VID0

1
C468 C467 COREFB A23
SB 41 COREFB
COREFB# A24
COREFB_H
AG18 NC_AG18 TP45
41 COREFB# COREFB_L NC_AG18
KEMET,NT:5.7, B2 size SC1000P50V3KX SC1000P50V3KX CORE_SENSE B23 AH18 NC_AH18 TP46

2
78.10224.2B1 78.10224.2B1 CORE_SENSE NC_AH18 NC_AG17
AG17
ST100U4VBM-1 (80.10716.321) VDDIOFB AE12
NC_AG17
AJ18 NC_AJ18
VDDIOFBJ VDDIOFB_H NC_AJ18
Iripple=1.1A,ESR=70mohm AF12 VDDIOFB_L
VDDIOSENSE
3
AMD suggest voltege 44 VDDIOSENSE AE11 VDDIO_SENSE LAYOUT: Route FBCLKOUT_H/L 3
SANYO, NT$:6.1 from 2D5V_S0 to 2D5V_S3 CLKIN
Iripple=1.1A,ESR=70mohm 3 CPUCLK 1 2 AJ21 CLKIN_H differentially impedance 80

1
C500 SC3900P50V3KX FBCLKOUT
3.5/2.8/2.0
differentially impedance 100 R307
AH21 CLKIN_L

1
169R3F
77.21071.031 2D5V_S3 C501 SC3900P50V3KX AJ23 AH19 R323
R310 820R3 CLKIN# NC_AJ23 FBCLKOUT_H 80D6R3F-U
3 CPUCLK# 1 2 AH23 AJ19

2
NC_AJ23 NC_AH23 FBCLKOUT_L
1 2
1 2 NC_AH23

2
NC_AE24 AE24 FBCLKOUTJ
R311 820R3 1D25V_S3 NC_AF24 NC_AE24
AF24 NC_AF24
C16 VTT_A
2D5V_S0 AG15 R322 DUMMY-R3
VTT_B DBREQJ
DBREQ_L AE19 1 2
RST_CPU# R308 1 2 680R3 D BRDY AH17
ALL_PWROK R309 1 DBRDY
2 680R3 NC_D20 D20 NC_D20
NC_C15 C15 C21 NC_C21
NC_C15 NC_C21 NC_D18
NC_D18 D18
TMS E20 C19 NC_C19
TCK TMS NC_C19 NC_B19
E17 B19

HDT Connectors TRST_L TCK NC_B19


B21 TRST_L
2D5V_S0 TDI TDO
Add HDT connector A21 TDI TDO A22
for AMD suggested R80 1 2 680R3 NC_C18 C18
2D5V_S0 2D5V_S0 NC_C18
R79 1 2 680R3 NC_A19 A19 AF18
SB NC_A19 NC_AF18 2D5V_S3
1

C438 A28 Connect to VDDIO for AMD suggest.


KEY1
8
7
6
5

2 DY-SCD1U 2
AJ28 KEY0
1

RN76 CN5 D22


SB
2

C437 R276 R275 NC_AE23 NC_D22


SRN680-U 1 2 AE23 NC_AE23 NC_C22 C22
SCD1U 680R3 680R3 NC_AF23 AF23
2

NC_AF22 NC_AF23 2D5V_S0


3 4 AF22 NC_AF22
5 6 NC_AF21 AF21
1
2
3
4

DBREQJ NC_AF21
7 8

8
7
6
5

1
D BRDY 9 10
TCK 11 12 RN80 C1 R193
TMS NC_C1 680R3
13 14 SRN680-U J3 NC_J3 NC_B13 B13
TDI 15 16 R3 B7
TRST_L NC_R3 NC_B7
17 18 AA2 C3

2
TDO NC_AA2 NC_C3 THERMTRIP#
19 20 D3 K1 2 3 CPU_THERMTRIP# 38
1
2
3
4 NC_D3 NC_K1
21 22 AG2 NC_AG2 NC_R2 R2
R277 1 2 680R3 23 24 B18 AA3 Q20
2D5V_S3 NC_B18 NC_AA3
26 AH1 F3 MMBT3904-U1
SB

1
NC_AH1 NC_F3 2D5V_S0
AE21 NC_AE21 NC_C23 C23
DY-SMC-CONN26A-FP C20 AG7 R194 1KR3
NC_C20 NC_AG7 NS3 1
CHANGE FROM 1KR3 TO 680R2 FOR AMD ZZ.F0357.025 AG4 NC_AG4 NC_AE22 AE22 2
C6 C24
CHECK LIST AG6
NC_C6 NC_C24
A25
RN88 SRN680-U NC_AG6 NC_A25
AE9 NC_AE9 NC_C9 C9
1 8 AG9 NC_AG9
NC_AG17 2 7 THERMTRIPJ Level shift to VT8235
NC_AJ18 3 6 EM_OFF PIN near VT8235

1
NC_D18

NC_B19
4

1
RN9
5

8
SRN680-U Validation Test Points LAYOUT: Place close to the CPU.
BGA754-SKT-U

1
NC_C19 2 7
NC_D20 3 6 RST_CPU# TP30
NC_C21 CLKIN TP32
4 5
CLKIN# TP33 Wistron Corporation
CORE_SENSE TP28 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
NC_C15 TP36 VDDIOFB TP43 Taipei Hsien 221, Taiwan, R.O.C.
NC_AE23 TP24 VDDIOFBJ TP44
NC_AF23 TP25 VDDIOSENSE TP41 Title
NC_AF22 TP26 NC_AE24 TP29
NC_AF21 TP27 NC_AF24 TP31 CPU(3/4)_Control & Debug
Size Document Number Rev
A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 6 of 50
A B C D E
A B C D E
U11E
N20 VCC_CORE_S0 2D5V_S3
VSS U11D
Y17 VSS VSS L20
K17 VSS VSS J20
H17 VSS VSS AF19 L7 VDD VDDIO E4 5,6,9,10,39,45 1D25V_S3 1D25V_S3
F17 VSS VSS AD19 AC15 VDD VDDIO G4
E18 VSS VSS AB19 H18 VDD VDDIO J4
AJ26 VSS VSS Y19 B20 VDD VDDIO L4
AE29 VSS VSS K19 E21 VDD VDDIO N4 5,6,8,10,38,39,44,45,50 2D5V_S3 2D5V_S3
AC16 VSS VSS H19 H22 VDD VDDIO U4
AA16 VSS VSS F19 J23 VDD VDDIO W4
J16 VSS VSS D19 H24 VDD VDDIO AA4
G16 VSS VSS AC18 F26 VDD VDDIO AC4 41,42 VCC_CORE_S0 VCC_CORE_S0
E16 VSS VSS AA18 N7 VDD VDDIO AE4
4 AH14 VSS VSS G18 L9 VDD VDDIO D5 LAYOUT: Place in uPGA socket cavity. 4
AD15 B16 V10 AF5 VCC_CORE_S0
VSS VSS VDD VDDIO
AB15 VSS VSS AD17 G13 VDD VDDIO F6 0.22u x 6 10u x 4
K15 VSS VSS AB17 K14 VDD VDDIO H6

SCD22U16V3ZY

SCD22U16V3ZY

SCD22U16V3ZY

SCD22U16V3ZY

SCD22U16V3ZY

SCD22U16V3ZY

SC10U10V5ZY

SC10U10V5ZY

SC10U10V5ZY

SC10U10V5ZY
E15 VSS VSS H15 Y14 VDD VDDIO K6

1
D16 VSS VSS F15 AB14 VDD VDDIO M6

C133

C136

C134

C135
AE14 VSS VSS G28 G15 VDD VDDIO P6
AC14 D28 J15 T6

2
VSS VSS VDD VDDIO

C130

C132

C138

C137

C131

C139
AA14 VSS VSS B28 AA15 VDD VDDIO V6
J14 VSS VSS C27 H16 VDD VDDIO Y6
G14 VSS VSS AH26 K16 VDD VDDIO AB6
AF17 VSS VSS AF26 Y16 VDD VDDIO AD6
AD13 VSS VSS AD26 AB16 VDD VDDIO D7
AB13 VSS VSS Y26 G17 VDD VDDIO G7
Y13 VSS VSS T26 J17 VDD VDDIO J7 LAYOUT: Place on backside of processor.
K13 VSS VSS M26 AA17 VDD VDDIO AA7
H13 H26 AC17 AC7 VCC_CORE_S0
VSS VSS VDD VDDIO

DY-SCD22U16V3ZY

DY-SCD22U16V3ZY

DY-SCD22U16V3ZY

DY-SCD22U16V3ZY
F13 VSS VSS D26 AE17 VDD VDDIO AF7
AH12 VSS VSS B26 F18 VDD VDDIO F8

SC10U10V5ZY

SC10U10V5ZY
AC12 VSS VSS C25 K18 VDD VDDIO H8

1
AA12 VSS VSS B25 Y18 VDD VDDIO AB8

C530

C531
G12 VSS VSS AJ24 AB18 VDD VDDIO AD8
B12 AG24 AD18 D9

2
VSS VSS VDD VDDIO

C528

C527

C533

C532
AD11 VSS VSS AC24 AG19 VDD VDDIO G9
AB11 VSS VSS AA24 E19 VDD VDDIO AC9
Y11 VSS VSS W24 G19 VDD VDDIO AF9
K11 VSS VSS U24 AC19 VDD VDDIO F10
H11 VSS VSS R24 AA19 VDD VDDIO AD10
3
F11 VSS VSS N24 J19 VDD VDDIO D11 0.22u x 4 10u x 2 3
AH10 VSS VSS J24 F20 VDD VDDIO AF11
AC10 VSS VSS G24 H20 VDD VDDIO F12
W10 VSS VSS E24 K20 VDD VDDIO AD12
U10 AG23 M20 D13 2D5V_S3
VSS VSS VDD VDDIO 2D5V_S3
R10 VSS VSS AD23 P20 VDD VDDIO AF13
N10 VSS VSS AB23 T20 VDD VDDIO F14

SCD22U16V3ZY

SCD22U16V3ZY

SCD22U16V3ZY

SCD22U16V3ZY

SCD22U16V3ZY

SCD22U16V3ZY
L10 VSS VSS Y23 V20 VDD VDDIO AD14

SC10U10V5ZY

SC4D7U10V5ZY

SC4D7U10V5ZY

SC4D7U10V5ZY

SC4D7U10V5ZY

SC4D7U10V5ZY

SC4D7U10V5ZY
78.47593.411
J10 VSS VSS V23 Y20 VDD VDDIO F16

1
G10 VSS VSS T23 AB20 VDD VDDIO AD16

C178
B10 P23 AD20 D15

2
VSS VSS VDD VDDIO

C194

C200

C198

C196

C195

C626

C625

C526

C257

C254

C250

C253
AD9 K23 G21 R4 VCC_CORE_S0

2
VSS VSS VDD VDDIO
Y9 VSS VSS H23 J21 VDD
V9 VSS VSS F23 L21 VDD VDD N28
T9 VSS VSS D23 N21 VDD VDD U28
P9 VSS VSS AJ22 R21 VDD VDD AA28
M9 VSS VSS AH22 U21 VDD VDD AE27 10u x 1 4.7u x 6
K9 VSS VSS AG22 W21 VDD VDD R7
H9 VSS VSS AC22 AA21 VDD VDD U7
F9 AA22 AC21 W7 1D25V_S3 1D25V_S3
VSS VSS VDD VDD
AH8 VSS VSS AG29 F22 VDD VDD K8
AC8 VSS VSS U22 K22 VDD VDD M8

SCD22U16V3ZY

SCD22U16V3ZY

SC4D7U10V5ZY

SC4D7U10V5ZY
W8 VSS VSS R22 M22 VDD VDD P8

1
U8 VSS VSS N22 P22 VDD VDD T8
R8 VSS VSS L22 T22 VDD VDD V8

C128

C534
N8 J22 V22 Y8
2

2
VSS VSS VDD VDD
C535

C129
L8 VSS VSS G22 Y22 VDD VDD J9
J8 VSS VSS E22 AB22 VDD VDD N9
G8 VSS VSS B22 AD22 VDD VDD R9
B8 VSS VSS AG21 E23 VDD VDD U9
2 2
AD7 VSS VSS AD21 G23 VDD VDD W9
AB7 VSS VSS Y21 L23 VDD VDD AA9 0.22u x 2 4.7u x 2
V7 VSS VSS V21 N23 VDD VDD H10
T7 VSS VSS T21 R23 VDD VDD K10
P7 VSS VSS P21 U23 VDD VDD M10
M7 VSS VSS M21 W23 VDD VDD P10
K7 VSS VSS K21 AA23 VDD VDD T10
H7 VSS VSS H21 AC23 VDD VDD Y10
F7 VSS VSS F21 B24 VDD VDD AB10
AH6 VSS VSS D21 D24 VDD VDD G11
AC6 VSS VSS AJ20 F24 VDD VDD J11
AA6 VSS VSS AG20 K24 VDD VDD AA11
U6 AE20 M24 AC11

EMI
VSS VSS VDD VDD
R6 VSS VSS AC20 P24 VDD VDD H12
N6 VSS VSS AA20 T24 VDD VDD K12
L6 VSS VSS W20 V24 VDD VDD Y12
J6 VSS VSS U20 Y24 VDD VDD AB12
G6 VSS VSS R20 AB24 VDD VDD J13
B6 VSS VSS G20 AD24 VDD VDD AA13
AH4 J18 AH24 AC13 VCC_CORE_S0
VSS VSS VDD VDD VCC_CORE_S0
B4 VSS VSS AE16 AE25 VDD VDD H14
AH2 VSS VSS Y15 K26 VDD VDD AB26 1000p x 3
AD2 VSS VSS B14 P26 VDD VDD E28
DY-SC6D8P50V2DC

DY-SC6D8P50V2DC

DY-SC1000P50V3KX

DY-SC1000P50V3KX

AB2 J12 V26 J28 DY-SC1000P50V3KX


VSS VSS VDD VDD
1

Y2 VSS VSS AA10


V2 VSS VSS AB9
C525

C672

T2 AA8 BGA754-SKT-U
2

VSS VSS
C108

C682

C660

P2 VSS VSS Y7
1 M2 VSS VSS W6 1
K2 VSS VSS AF2
H2 VSS VSS D2
F2
C29
VSS
VSS
VSS
VSS
AG27
AG25 0402 Wistron Corporation
AH28 L24 LAYOUT: Place 1000pF capacitors 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
VSS VSS Taipei Hsien 221, Taiwan, R.O.C.
AF28 M23
AC28
VSS VSS
W22 between VRM & CPU.
VSS VSS Title
W28 VSS VSS AB21
R28
L28
VSS VSS AH20
B2
CPU(4/4)_Power
VSS VSS Size Document Number Rev
A3 SC
BGA754-SKT-U EGRET
Date: Friday, July 23, 2004 Sheet 7 of 50
A B C D E
A B C D E
DM1 DM2

M_AA0 112 121 M_BA0 112 121


A0 /CS0 M_CS#0 5,9 M_BA1 A0 /CS0 M_CS#2 5,9
M_AA1 111 122 111 122
A1 /CS1 M_CS#1 5,9 M_BA2 A1 /CS1 M_CS#3 5,9
M_AA2 110 110
M_AA3 A2 M_CKE#0 M_BA3 A2 M_CKE#1
109 A3 CKE0 96 M_CKE#0 5,9 109 A3 CKE0 96 M_CKE#1 5,9
M_AA4 108 95 M_BA4 108 95
A4 CKE1 M_BA6 A4 CKE1 5 VREF_DDR_MEM VREF_DDR_MEM
M_AA6 107 107
M_AA5 A5 M_DQS_R0 M_BA5 A5 M_DQS_R0
106 A6 DQS0 11 106 A6 DQS0 11 3,6,11,12,13,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,35,36,38,41,47,49,50 3D3V_S0 3D3V_S0
M_AA7 105 25 M_DQS_R1 M_BA7 105 25 M_DQS_R1
M_AA8 A7 DQS1 M_DQS_R2 M_BA8 A7 DQS1 M_DQS_R2
102 A8 DQS2 47 102 A8 DQS2 47 5,6,7,10,38,39,44,45,50 2D5V_S3 2D5V_S3
M_AA9 101 61 M_DQS_R3 M_BA9 101 61 M_DQS_R3
M_AA10 A9 DQS3 M_DQS_R4 M_BA10 A9 DQS3 M_DQS_R4
115 A10 / AP DQS4 133 115 A10 / AP DQS4 133
M_AA11 100 147 M_DQS_R5 M_BA11 100 147 M_DQS_R5
M_AA12 A11 DQS5 M_DQS_R6 M_BA12 A11 DQS5 M_DQS_R6
4 99 A12 DQS6 169 99 A12 DQS6 169 4
183 M_DQS_R7 183 M_DQS_R7
DQS7 DQS7 M_ADM_R[7..0] 9
M_ABS#0 117 77 M_BBS#0 117 77
M_ABS#1 BA0 DQS8 M_BBS#1 BA0 DQS8
116 BA1 116 BA1 M_DATA_R_[63..0] 9
12 M_ADM_R0 M_ADM#0 12 M_ADM_R0 M_ADM#0
M_DATA_R_0 DM0 M_ADM_R1 M_DATA_R_0 DM0 M_ADM_R1
5 DQ0 DM1 26 M_ADM#1 5 DQ0 DM1 26 M_ADM#1 M_DQS_R[7..0] 9
M_DATA_R_1 7 48 M_ADM_R2 M_ADM#2 M_DATA_R_1 7 48 M_ADM_R2 M_ADM#2
M_DATA_R_2 DQ1 DM2 M_ADM_R3 M_DATA_R_2 DQ1 DM2 M_ADM_R3
13 DQ2 DM3 62 M_ADM#3 13 DQ2 DM3 62 M_ADM#3 M_AA[13..0] 5,9
M_DATA_R_3 17 134 M_ADM_R4 M_ADM#4 M_DATA_R_3 17 134 M_ADM_R4 M_ADM#4
M_DATA_R_4 DQ3 DM4 M_ADM_R5 M_DATA_R_4 DQ3 DM4 M_ADM_R5
6 DQ4 DM5 148 M_ADM#5 6 DQ4 DM5 148 M_ADM#5 M_ABS#[1..0] 5,9
M_DATA_R_5 8 170 M_ADM_R6 M_ADM#6 M_DATA_R_5 8 170 M_ADM_R6 M_ADM#6
M_DATA_R_6 DQ5 DM6 M_ADM_R7 M_DATA_R_6 DQ5 DM6 M_ADM_R7
14 DQ6 DM7 184 M_ADM#7 14 DQ6 DM7 184 M_ADM#7 M_BA[13..0] 5,9
M_DATA_R_7 18 78 M_DATA_R_7 18 78
M_DATA_R_8 DQ7 DM8 M_DATA_R_8 DQ7 DM8
19 DQ8 19 DQ8 M_BBS#[1..0] 5,9
M_DATA_R_9 23 35 M_DATA_R_9 23 35
DQ9 CK0 M_CLK5 5,9 DQ9 CK0 M_CLK4 5,9
M_DATA_R_10 29 37 M_DATA_R_10 29 37
DQ10 /CK0 M_CLK#5 5,9 DQ10 /CK0 M_CLK#4 5,9
M_DATA_R_11 31 160 M_DATA_R_11 31 160
DQ11 CK1 M_CLK7 5,9 DQ11 CK1 M_CLK6 5,9
M_DATA_R_12 20 158 M_DATA_R_12 20 158
DQ12 /CK1 DDR_CLK0 M_CLK#7 5,9 DQ12 /CK1 M_CLK#6 5,9
M_DATA_R_13 24 89 M_DATA_R_13 24 89 DDR_CLK1
M_DATA_R_14 DQ13 CK2 DDR_CLK#0 M_DATA_R_14 DQ13 CK2 DDR_CLK#1
30 DQ14 /CK2 91 30 DQ14 /CK2 91
M_DATA_R_15 32 M_DATA_R_15 32
DQ15 DQ15

NORMAL TYPE
M_DATA_R_16 41 195 SMBC_SB M_DATA_R_16 41 195
DQ16 SCL DQ16 SCL SMBC_SB 3,21

REVERSE TYPE
M_DATA_R_17 43 193 SMBD_SB M_DATA_R_17 43 193
DQ17 SDA DQ17 SDA SMBD_SB 3,21
M_DATA_R_18 49 M_DATA_R_18 49
M_DATA_R_19 DQ18 M_DATA_R_19 DQ18 DM2_SA0
53 DQ19 SA0 194 53 DQ19 SA0 194 1 2 3D3V_S0
M_DATA_R_20 42 196 M_DATA_R_20 42 196
M_DATA_R_21 DQ20 SA1 M_DATA_R_21 DQ20 SA1 R204 4K7R3
44 DQ21 SA2 198 44 DQ21 SA2 198
M_DATA_R_22 50 M_DATA_R_22 50 2D5V_S3
M_DATA_R_23 DQ22 M_DATA_R_23 DQ22
54 DQ23 VDD 9 54 DQ23 VDD 9
3 M_DATA_R_24 55 10 M_DATA_R_24 55 10 3
M_DATA_R_25 DQ24 VDD M_DATA_R_25 DQ24 VDD DDR_CLK#1
59 DQ25 VDD 21 59 DQ25 VDD 21 8 1
M_DATA_R_26 65 22 M_DATA_R_26 65 22 DDR_CLK#0 7 2
M_DATA_R_27 DQ26 VDD M_DATA_R_27 DQ26 VDD DDR_CLK1
67 DQ27 VDD 33 67 DQ27 VDD 33 6 3
M_DATA_R_28 56 34 M_DATA_R_28 56 34 DDR_CLK0 5 4
M_DATA_R_29 DQ28 VDD M_DATA_R_29 DQ28 VDD
60 DQ29 VDD 36 60 DQ29 VDD 36
M_DATA_R_30 66 45 M_DATA_R_30 66 45 RN39
M_DATA_R_31 DQ30 VDD M_DATA_R_31 DQ30 VDD SRN10K-2
68 DQ31 VDD 46 68 DQ31 VDD 46
M_DATA_R_32 127 57 M_DATA_R_32 127 57
M_DATA_R_33 DQ32 VDD M_DATA_R_33 DQ32 VDD
129 DQ33 VDD 58 129 DQ33 VDD 58
M_DATA_R_34 135 69 M_DATA_R_34 135 69
M_DATA_R_35 DQ34 VDD M_DATA_R_35 DQ34 VDD
139 DQ35 VDD 70 139 DQ35 VDD 70
M_DATA_R_36 128 81 M_DATA_R_36 128 81
M_DATA_R_37 DQ36 VDD M_DATA_R_37 DQ36 VDD
130 DQ37 VDD 82 130 DQ37 VDD 82
M_DATA_R_38 136 92 M_DATA_R_38 136 92
M_DATA_R_39 DQ38 VDD M_DATA_R_39 DQ38 VDD
140 93 140 93
M_DATA_R_40
M_DATA_R_41
M_DATA_R_42
141
145
DQ39
DQ40
DQ41
VDD
VDD
VDD
94
113
M_DATA_R_40
M_DATA_R_41
M_DATA_R_42
141
145
DQ39
DQ40
DQ41
VDD
VDD
VDD
94
113
AMD K8
151 DQ42 VDD 114 151 DQ42 VDD 114
M_DATA_R_43
M_DATA_R_44
M_DATA_R_45
153
142
146
DQ43
DQ44
VDD
VDD
131
132
143
M_DATA_R_43
M_DATA_R_44
M_DATA_R_45
153
142
146
DQ43
DQ44
VDD
VDD
131
132
143
ClawHummar
M_DATA_R_46 DQ45 VDD M_DATA_R_46 DQ45 VDD
152 DQ46 VDD 144 152 DQ46 VDD 144
M_DATA_R_47 154 155 M_DATA_R_47 154 155
M_DATA_R_48 DQ47 VDD M_DATA_R_48 DQ47 VDD
163 DQ48 VDD 156 163 DQ48 VDD 156
M_DATA_R_49 165 157 M_DATA_R_49 165 157
M_DATA_R_50 DQ49 VDD M_DATA_R_50 DQ49 VDD
171 DQ50 VDD 167 171 DQ50 VDD 167
M_DATA_R_51 175 168 M_DATA_R_51 175 168
M_DATA_R_52 DQ51 VDD M_DATA_R_52 DQ51 VDD
164 DQ52 VDD 179 164 DQ52 VDD 179
2 M_DATA_R_53 M_DATA_R_53 2
166 DQ53 VDD 180 166 DQ53 VDD 180 MD63 SMA10
M_DATA_R_54 172 191 M_DATA_R_54 172 191 SMA11 SMA0 SMA14
M_DATA_R_55 DQ54 VDD M_DATA_R_55 DQ54 VDD
176 DQ55 VDD 192 2D5V_S3 176 DQ55 VDD 192 2D5V_S3
SMA12 MD0
M_DATA_R_56 177 M_DATA_R_56 177
M_DATA_R_57 DQ56 M_DATA_R_57 DQ56
181 DQ57 VSS 3 NOT SUPPORT ECC CHECK 181 DQ57 VSS 3
M_DATA_R_58 187 4 M_DATA_R_58 187 4
M_DATA_R_59
M_DATA_R_60
189
178
DQ58
DQ59
VSS
VSS 15
16
ALi suggested pull-low M_DATA_R_59
M_DATA_R_60
189
178
DQ58
DQ59
VSS
VSS 15
16
DDR SOCKET PLACEMENT
M_DATA_R_61 DQ60 VSS M_DATA_R_61 DQ60 VSS
182 27 182 27
M_DATA_R_62 188
DQ61
DQ62
VSS
VSS 28 M_DATA_R_62 188
DQ61
DQ62
VSS
VSS 28 TOP VIEW PERSPECTIVE DRAWING
M_DATA_R_63 190 38 M_DATA_R_63 190 38
DQ63 VSS DQ63 VSS

Pin 200
71
VSS 39
40 71
VSS 39
40
By ME requset DM1 P/N:

Pin 2
CB0 VSS CB0 VSS
73 CB1 VSS 51 73 CB1 VSS 51 Main 62.10017.191
79 CB2 VSS 52 79 CB2 VSS 52
83 CB3 VSS 63 83 CB3 VSS 63 Second 62.10017.381
72 64 72 64
74
CB4
CB5
VSS
VSS 75 74
CB4
CB5
VSS
VSS 75 DM1
80 CB6 VSS 76 80 CB6 VSS 76 Pin 199 Pin 1
84 CB7 VSS 87 84 CB7 VSS 87
VSS 88 VSS 88 Pin 200 Pin 2
85 NC VSS 90 85 NC VSS 90
DM1_RESET# 86 103 DM2_RESET# 86 103
TP65 DM1_A13 NC/(RESET#) VSS TP23 DM2_A13 NC/(RESET#) VSS
DM2(Reverse)

Pin 199
97 104 97 104

Pin 1
TP15 DM1_BA2 NC/A13 VSS TP69 DM2_BA2 NC/A13 VSS
98 NC/BA2 VSS 125 98 NC/BA2 VSS 125
TP64 M_AA13 TP22 M_BA13
123
124
NC VSS 126
137
123
124
NC VSS 126
137
By ME requset DM2 P/N:
NC VSS NC VSS
200 NC VSS 138 200 NC VSS 138 Main 62.10017.201
1 VSS 149 VSS 149 1
5,9 M_ARAS# 118 /RAS VSS 150 5,9 M_BRAS#
M_BRAS# 118 /RAS VSS 150 Second 62.10017.371
120 159 M_BCAS# 120 159
5,9 M_ACAS# /CAS VSS 5,9 M_BCAS# /CAS VSS Third 62.10017.701
119 161 M_BWE# 119 161
5,9 M_AWE# /WE VSS
VSS 162
5,9 M_BWE# /WE VSS
VSS 162 Wistron Corporation
VREF_DDR_MEM 1 173 VREF_DDR_MEM 1 173 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
VREF VSS VREF VSS Taipei Hsien 221, Taiwan, R.O.C.
2 VREF VSS 174 2 VREF VSS 174
Layout trace 20 mil 3D3V_S0 197 VDDSPD VSS 185 Layout trace 20 mil 3D3V_S0 197 VDDSPD VSS 185
1

199 186 199 186 Title


C276 VDDID VSS C299 VDDID VSS
SCD1U 201 202 SCD1U 202 201
DDR SO-DIMM SKT
2

GND GND GND GND Size Document Number Rev


A3 SC
DDR-SODIMM-R-U2 EGRET
DDR-SODIMM-N-U1 62.10017.191 62.10017.201 Date: Friday, July 23, 2004 Sheet 8 of 50
A B C D E
A B C D E

SERIES DAMPING PARALLEL TERMINATION


PLACE RNs CLOSE TO FIRST DM ( DM1 ), < 0.75" PULL HIGH STUBS < 0.8", PLACE RPs CLOSE TO SECOND DM ( DM2 ) 5,6,7,10,39,45 1D25V_S3 1D25V_S3
STRICT EQUAL LENGTH LIMITATION WITH DQS, NO EQUAL LENGTH LIMITATION
CB PINS 1D25V_S3 1D25V_S3
RN23 RN20 RN45 RN33
M_DATA4 1 16 M_DATA_R_4 M_DATA34 1 16 M_DATA_R_34 M_ADM_R1 1 16 1 16 M_DATA_R_36
M_ADM_R[7..0] 8
M_DATA5 2 15 M_DATA_R_5 M_DATA32 2 15 M_DATA_R_32 M_DATA_R_13 2 15 2 15 M_DATA_R_32 RN63
M_ADM0 3 14 M_ADM_R0 M_DQS4 3 14 M_DQS_R4 M_DATA_R_12 3 14 3 14 M_DATA_R_37 M_CKE#1 2 3 M_ADM[7..0] 5
M_DATA6 4 13 M_DATA_R_6 M_DATA33 4 13 M_DATA_R_33 M_DATA_R_6 4 13 4 13 M_DATA_R_33 M_BA12 1 4
M_DATA7 5 12 M_DATA_R_7 M_DATA36 5 12 M_DATA_R_36 M_DATA_R_7 5 12 5 12 M_ADM_R4
M_DATA[63..0] 5
M_DATA13 6 11 M_DATA_R_13 M_DATA37 6 11 M_DATA_R_37 M_ADM_R0 6 11 6 11 M_DQS_R4 SRN47J
4 M_DATA12 7 10 M_DATA_R_12 M_ADM4 7 10 M_ADM_R4 M_DATA_R_5 7 10 7 10 M_DATA_R_38 RN40 4
M_DATA_R_[63..0] 8
M_ADM1 8 9 M_ADM_R1 M_DATA39 8 9 M_DATA_R_39 M_DATA_R_4 8 9 8 9 M_DATA_R_39 M_CKE#0 2 3
M_AA12 1 4 M_DQS[7..0] 5
SRN10J-3 SRN10J-3 SRN68J-1 SRN68J-1
RN65 RN61 SRN47J
M_DQS_R[7..0] 8
RN44 RN32 M_DATA_R_1 1 16 1 16 M_DATA_R_48
M_DATA1 1 16 M_DATA_R_1 M_DATA35 1 16 M_DATA_R_35 M_DATA_R_0 2 15 2 15 M_DATA_R_49 RN37 M_AA[13..0] 5,8
M_DATA0 2 15 M_DATA_R_0 M_DATA41 2 15 M_DATA_R_41 M_DQS_R0 3 14 3 14 M_DATA_R_43 M_AA11 1 16
M_DQS0 3 14 M_DQS_R0 M_DATA40 3 14 M_DATA_R_40 M_DATA_R_2 4 13 4 13 M_DATA_R_42 M_AA9 2 15
M_DQS_R5 M_ABS#[1..0] 5,8
M_DATA2 4 13 M_DATA_R_2 M_DQS5 4 13 M_DATA_R_3 5 12 5 12 M_DQS_R5 M_AA7 3 14
M_DATA3 5 12 M_DATA_R_3 M_DATA42 5 12 M_DATA_R_42 M_DATA_R_8 6 11 6 11 M_DATA_R_41 M_AA5 4 13 M_BA[13..0] 5,8
M_DATA8 6 11 M_DATA_R_8 M_DATA43 6 11 M_DATA_R_43 M_DATA_R_9 7 10 7 10 M_DATA_R_40 M_AA4 5 12
M_DATA9 7 10 M_DATA_R_9 M_DATA49 7 10 M_DATA_R_49 M_DQS_R1 8 9 8 9 M_DATA_R_34 M_AA8 6 11 M_BBS#[1..0] 5,8
M_DQS1 8 9 M_DQS_R1 M_DATA48 8 9 M_DATA_R_48 M_AA6 7 10
SRN68J-1 SRN68J-1 M_AA3 8 9
SRN10J-3 SRN10J-3 RN43 RN31
M_AWE# 5,8
M_DATA_R_25 1 16 1 16 M_DATA_R_35 SRN47J-1-U M_ACAS# 5,8
RN22 RN19 M_DATA_R_22 2 15 2 15 M_DATA_R_46 RN36
M_DATA_R_14 M_ARAS# 5,8
M_DATA14 1 16 M_DATA38 1 16 M_DATA_R_38 M_DATA_R_23 3 14 3 14 M_DATA_R_47 M_CS#3 1 16
M_DATA15 2 15 M_DATA_R_15 M_DATA45 2 15 M_DATA_R_45 M_ADM_R2 4 13 4 13 M_ADM_R5 M_BA13 2 15
M_DATA21 M_BWE# 5,8
3 14 M_DATA_R_21 M_DATA44 3 14 M_DATA_R_44 M_DATA_R_20 5 12 5 12 M_DATA_R_44 M_CS#2 3 14
M_DATA20 M_BCAS# 5,8
4 13 M_DATA_R_20 M_ADM5 4 13 M_ADM_R5 M_DATA_R_21 6 11 6 11 M_DATA_R_45 M_BRAS# 4 13 M_BRAS# 5,8
M_ADM2 5 12 M_ADM_R2 M_DATA47 5 12 M_DATA_R_47 M_DATA_R_14 7 10 7 10 M_DATA_R_53 M_BBS#1 5 12
M_DATA23 6 11 M_DATA_R_23 M_DATA46 6 11 M_DATA_R_46 M_DATA_R_15 8 9 8 9 M_DATA_R_52 M_BCAS# 6 11
M_DATA22 7 10 M_DATA_R_22 M_DATA53 7 10 M_DATA_R_53 M_BA0 7 10 M_CS#0 5,8
M_DATA25 8 9 M_DATA_R_25 M_DATA52 8 9 M_DATA_R_52 SRN68J-1 SRN68J-1 M_BA2 8 9 M_CS#1 5,8
RN64 RN60
M_CS#2 5,8
SRN10J-3 SRN10J-3 M_DATA_R_11 1 16 1 16 M_DATA_R_59 SRN47J-1-U M_CS#3 5,8
M_DATA_R_10 2 15 2 15 M_DATA_R_58 RN35
3 RN42 RN29 M_DATA_R_16 3 14 3 14 M_DQS_R7 M_AA1 1 16 3
M_DATA11 1 16 M_DATA_R_11 M_DQS6 1 16 M_DQS_R6 M_DATA_R_17 4 13 4 13 M_DATA_R_57 M_AA10 2 15
M_DATA10 2 15 M_DATA_R_10 M_DATA50 2 15 M_DATA_R_50 M_DQS_R2 5 12 5 12 M_DATA_R_56 M_AA2 3 14
M_DATA17 3 14 M_DATA_R_17 M_DATA51 3 14 M_DATA_R_51 M_DATA_R_19 6 11 6 11 M_DATA_R_51 M_AA0 4 13
M_DATA16 4 13 M_DATA_R_16 M_DATA56 4 13 M_DATA_R_56 M_DATA_R_18 7 10 7 10 M_DATA_R_50 M_ABS#1 5 12
M_DQS2 5 12 M_DQS_R2 M_DATA57 5 12 M_DATA_R_57 M_DATA_R_24 8 9 8 9 M_DQS_R6 M_ARAS# 6 11
M_DATA19 6 11 M_DATA_R_19 M_DQS7 6 11 M_DQS_R7 M_AWE# 7 10
M_DATA18 7 10 M_DATA_R_18 M_DATA58 7 10 M_DATA_R_58 SRN68J-1 SRN68J-1 M_ABS#0 8 9
M_DATA24 8 9 M_DATA_R_24 M_DATA59 8 9 M_DATA_R_59 RN41 RN30
M_DATA_R_30 1 16 1 16 M_DATA_R_55 SRN47J-1-U
SRN10J-3 SRN10J-3 M_DATA_R_31 2 15 2 15 M_DATA_R_54 RN62
M_DATA_R_26 3 14 3 14 M_ADM_R6 M_BA7 1 16
RN21 RN18 M_DATA_R_27 4 13 4 13 M_DATA_R_60 M_BA3 2 15
M_DATA29 1 16 M_DATA_R_29 M_ADM6 1 16 M_ADM_R6 M_ADM_R3 5 12 5 12 M_DATA_R_61 M_BA6 3 14
M_DATA28 2 15 M_DATA_R_28 M_DATA54 2 15 M_DATA_R_54 M_DQS_R3 6 11 6 11 M_ADM_R7 M_BA9 4 13
M_DQS3 3 14 M_DQS_R3 M_DATA55 3 14 M_DATA_R_55 M_DATA_R_29 7 10 7 10 M_DATA_R_63 M_BA10 5 12
M_ADM3 4 13 M_ADM_R3 M_DATA61 4 13 M_DATA_R_61 M_DATA_R_28 8 9 8 9 M_DATA_R_62 M_BA1 6 11
M_DATA26 5 12 M_DATA_R_26 M_DATA60 5 12 M_DATA_R_60 M_BBS#0 7 10
M_DATA27 6 11 M_DATA_R_27 M_ADM7 6 11 M_ADM_R7 SRN68J-1 SRN68J-1 M_BWE# 8 9
M_DATA30 7 10 M_DATA_R_30 M_DATA62 7 10 M_DATA_R_62
M_DATA31 8 9 M_DATA_R_31 M_DATA63 8 9 M_DATA_R_63 SRN47J-1-U
RN38
SRN10J-3 SRN10J-3 M_BA5 1 8
M_BA8 2 7
M_BA11 3 6
M_BA4 4 5

SRN47-1
2 2

RN34
M_AA13 1 8
M_CS#0 2 7
M_CS#1 3 6
M_ACAS# 4 5

SRN47-1

PLACE BETWEEN DM1, DM2


M_CKE#0
CLOSE TO FIRST DM ( DM 2 ) < 0.2", TO SECOND DM ( DM1 ) < 1.1"
5,8 M_CKE#0 EQUAL LENGTH LIMITATION WITH SCK/SCK#
M_CKE#1
5,8 M_CKE#1
R171 121R3F
1 2 M_CLK7
M_CLK7 5,8
05/10 M_CLK#7
M_CLK#7 5,8
Remove the damping resistor for AMD suggest.
R239 121R3F
1 2 M_CLK6
M_CLK6 5,8
M_CLK#6
M_CLK#6 5,8

R205 121R3F
1 2 M_CLK5
M_CLK5 5,8
M_CLK#5
1 M_CLK#5 5,8 1

R240 121R3F
M_CLK4
1 2
M_CLK#4
M_CLK4 5,8
M_CLK#4 5,8
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
DDR DAMPING & TERMINATION
Size Document Number Rev
A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 9 of 50
A B C D E
A B C D E

5,6,7,8,38,39,44,45,50 2D5V_S3 2D5V_S3

5,6,7,9,39,45 1D25V_S3 1D25V_S3

4 4
LAYOUT:Place altemating caps to GND and 2D5_S3
2D5V_S3

LAYOUT:Locate close to CPU socket.


1D25V_S3
1

1
C269 C347 C349 C351 C319 C353 C355 C296 C357 C322 C359 C361 C324 C293 C292 C363 C365

SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U 2D5V_S3 1D25V_S3
DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U
2

2
TC16
1 2
1

1
C249 C346 C348 C350 C318 C352 C354 C297 C356 C358 C323 C360 C325 C291 C294 C362 C364 DY-SE220U2VDM-6
C659
SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U 1 2
DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U
2

2
SC22U10V6ZY-U

3 3

2D5V_S3 SB
1D25V_S3
1D25V_S3
1

1
C367 C328 C369 C330 C301 C258 C214 C197 C316 C288 C268 C227 C333 C252 C256 C371 C213

1
SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U C804 C805 C806 C807 C808 C809 C810
DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U
2

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U
2

2
1

1
C366 C327 C368 C329 C370 C303 C259 C230 C199 C315 C287 C267 C226 C229 C334 C251 C193

SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U
DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U
2

2
2 2

LAYOUT:Place close to Power Pin of DDR socket.

LAYOUT:Place at end of the DIMMs 2D5V_S3 2D5V_S3

1D25V_S3 C271 C273


SC 1 2 SCD22U16V3ZY 1 2 SCD22U16V3ZY

C289 C274
1

TC23 TC24 C786 C787 C795 C796 1 2 DY-SCD22U16V3ZY 1 2 DY-SCD22U16V3ZY


DY-ST100U4VBM ST100U4VBM-1 SC22U10V6ZY-U SC22U10V6ZY-U SC22U10V6ZY-U SC22U10V6ZY-U C298 C295
2

80.10716.321 1 2 DY-SCD22U16V3ZY 1 2 DY-SCD22U16V3ZY

C290 C320
1 2 SCD22U16V3ZY 1 2 SCD22U16V3ZY

KEMET,NT:5.7, B2 size C321 C326


1 2 SCD22U16V3ZY 1 2 SCD22U16V3ZY
ST100U4VBM-1 (80.10716.321)
Iripple=1.1A,ESR=70mohm
0.22u x 10
SANYO, NT$:6.1
Iripple=1.1A,ESR=70mohm
3.5/2.8/2.0
1 77.21071.031 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
DDR DECOUPLING
Size Document Number Rev
A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 10 of 50
A B C D E
A B C D E

3,6,8,12,13,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,35,36,38,41,47,49,50 3D3V_S0 3D3V_S0

4,13,39,45 1D2V_HT0A_S0 1D2V_HT0A_S0

6,12,14,15,16,19,20,21,38,39,50 2D5V_S0 2D5V_S0

4 4

3D3VA_HT_S0 3D3VA_HCK_S0 1D2V_HT0A_S0 SC


AGND2 3D3V_S0 3D3VA_HT_S0
L8
1 2

CLAW HAMMER TO NB NB TO CLAW HAMMER

G21
G22
C22

C10
C11
C23
C24
C25

D10
D11
D22
D23
D24

H21
A10
A24
A25
A26

B10
B23
B24
B25
B26

E10
E11
E21
E22
E23
E24

K18
K21
F10
F11
F15
F16
F19
F20
F21
F22
F23

L18

1
J10
J11
J12
J13
J14
J15
J16
J17
C9

D9
GAP-CLOSE-PWR C125 C126

A9

B9

E9
U16A
SC1000P50V3KX SC1U10V3ZY

VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
AVDD2

2
78.10224.2B1

4 CPUCADOUT[15..0] NB0CADOUT[15..0] 4
CPUCADOUT0 T26 B12 NB0CADOUT0
CPUCADOUT1 RCADP0 TCADP0 NB0CADOUT1
P24 RCADP1 TCADP1 A13
CPUCADOUT2 P26 B14 NB0CADOUT2
CPUCADOUT3 RCADP2 TCADP2 NB0CADOUT3
M24 RCADP3 TCADP3 A15
CPUCADOUT4 K24 A17 NB0CADOUT4
CPUCADOUT5 RCADP4 TCADP4 NB0CADOUT5
K26 RCADP5 TCADP5 B18
CPUCADOUT6 H24 A19 NB0CADOUT6
CPUCADOUT7 RCADP6 TCADP6 NB0CADOUT7
H26 RCADP7 TCADP7 B20
CPUCADOUT8 R24 E12 NB0CADOUT8 3D3V_S0 3D3VA_HCK_S0
CPUCADOUT9 RCADP8 TCADP8 NB0CADOUT9
R22 RCADP9 TCADP9 D13 L25
CPUCADOUT10 N24 E14 NB0CADOUT10 1 2
CPUCADOUT11 RCADP10 TCADP10 NB0CADOUT11
N22 RCADP11 TCADP11 D15

1
CPUCADOUT12 L22 D17 NB0CADOUT12 DY-SBK201209T-1 C521 C520
CPUCADOUT13 RCADP12 TCADP12 NB0CADOUT13
J24 RCADP13 TCADP13 E18
CPUCADOUT14 J22 D19 NB0CADOUT14 R317 DY-SC1U10V3ZY

2
CPUCADOUT15 RCADP14 TCADP14 NB0CADOUT15
G24 RCADP15 TCADP15 E20 1 2
3 DY-SC1000P50V3KX 3
CPUHTTCLKOUT0 M26 B16 NB0HTTCLKOUT0 DY-0R3-U AGND2
4 CPUHTTCLKOUT0 RCLKP0 TCLKP0 NB0HTTCLKOUT0 4
CPUHTTCLKOUT1 L24 E16 NB0HTTCLKOUT1 Only for K8T800PRO.
4 CPUHTTCLKOUT1 RCLKP1 TCLKP1 NB0HTTCLKOUT1 4
CPUHTTCTLOUT0 F24 A21 NB0HTTCTLOUT When use K8N800,
4 CPUHTTCTLOUT0 RCTLP TCTLP NB0HTTCTLOUT 4
4 CPUCADOUTJ[15..0] NB0CADOUTJ[15..0] 4
Please remove them.
CPUCADOUTJ0 R26 C12 NB0CADOUTJ0
CPUCADOUTJ1 RCADN0 TCADN0 NB0CADOUTJ1
P25 RCADN1 TCADN1 A14
CPUCADOUTJ2 N26 C14 NB0CADOUTJ2
CPUCADOUTJ3 RCADN2 TCADN2 NB0CADOUTJ3
M25 RCADN3 TCADN3 A16
CPUCADOUTJ4 K25 A18 NB0CADOUTJ4
CPUCADOUTJ5 RCADN4 TCADN4 NB0CADOUTJ5
J26 RCADN5 TCADN5 C18
CPUCADOUTJ6 H25 A20 NB0CADOUTJ6 1D2V_HT0A_S0
CPUCADOUTJ7 RCADN6 TCADN6 NB0CADOUTJ7
G26 RCADN7 TCADN7 C20
CPUCADOUTJ8 R23 E13 NB0CADOUTJ8
CPUCADOUTJ9 RCADN8 TCADN8 NB0CADOUTJ9
P22 RCADN9 TCADN9 C13
CPUCADOUTJ10 N23 E15 NB0CADOUTJ10
RCADN10 TCADN10

1
CPUCADOUTJ11 M22 C15 NB0CADOUTJ11 C175 C618
CPUCADOUTJ12 RCADN11 TCADN11 NB0CADOUTJ12
K22 RCADN12 TCADN12 C17
CPUCADOUTJ13 J23 E19 NB0CADOUTJ13 SCD1U SCD1U

2
CPUCADOUTJ14 RCADN13 TCADN13 NB0CADOUTJ14
H22 RCADN14 TCADN14 C19
CPUCADOUTJ15 G23 D21 NB0CADOUTJ15
RCADN15 TCADN15
CPUHTTCLKOUTJ0 L26 C16 NB0HTTCLKOUTJ0
4 CPUHTTCLKOUTJ0 RCLKN0 TCLKN0 NB0HTTCLKOUTJ0 4
CPUHTTCLKOUTJ1 L23 E17 NB0HTTCLKOUTJ1
4 CPUHTTCLKOUTJ1 RCLKN1 TCLKN1 NB0HTTCLKOUTJ1 4 AROUND NB
CPUHTTCTLOUTJ0 F25 A22 NB0HTTCTLOUTJ
4 CPUHTTCTLOUTJ0 RCTLN TCTLN NB0HTTCTLOUTJ 4
LDTRST# B11 1D2V_HT0A_S0
2 21 LDTRST# LDTRST 2
LDTSTP# A12
21 LDTSTP# LDTSTP 1D2V_HT0A_S0
VLDT L21
RPCOMP D25 M18
RNCOMP RPCOMP VLDT
D26 RNCOMP VLDT N18
RTCOMP C26 N21 R91 49D9R3F
RTCOMP VLDT RNCOMP
VLDT P18 1 2
1D2V_HT0A_S0 P21
VLDT R90 100R3
VLDT R18
U24 T18 RTCOMP 1 2
VLDT VLDT
U25 VLDT VLDT T21
U26 T22 R89 49D9R3F
VLDT VLDT RPCOMP
V21 VLDT VLDT T23 1 2
V22 VLDT VLDT T24
V23 VLDT VLDT T25
V24 VLDT VLDT U18
V25 VLDT VLDT U21
V26 VLDT VLDT U22
VLDT U23
AGND2

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

K8N800
C21

A23
A8
B8
B13
B15
B17
B19
B21
B22
C8
D6
D8
D12
D14
D16
D18
D20
E5
E6
E8
F7
F8
F12
F13
F14
F17
F18
F26
G1
G25
H1
H2
H23
J18
J2
J3
J21
J25
K4
K10
K11
K12
K13
K14
K15
K16
K17
K23
L10
L11
L12
L13
L14
L15

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
NB-K8N800(1/3)_HT
Size Document Number Rev
A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 11 of 50
A B C D E
A B C D E

3D3VA_GCK_S0 3D3V_S0 1D5V_S0 3D3V_S0


3,6,8,11,13,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,35,36,38,41,47,49,50 3D3V_S0 3D3V_S0
C561
1 2
6,14,15,16,19,20,21,38,39,50 2D5V_S0 2D5V_S0
SC1U10V3ZY

M5
M9
G2
G3
G4
G5
D1

H3
H4
H5

N5
N9

R9

U1
E1
E2
E3
E4

K5
K8
K9

P9
F1
F2
F3
F4
F5
F6

L5
L8
L9
J4
J5
J9
13,14,15,16,44,50 1D5V_S0 1D5V_S0
U16B
2D5V_S0

VCCQQ
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
AGP_AD[31..0] 14,15,16
AF18 AGP_AD0 R133 4K7R3
21 VLAD[7..0] VLAD0 GD0/FPD10
AD20 AD18 AGP_AD1 TESTIN 1 2 Use this function for K8N800
VLAD1 VD0 GD1/FPD11 AGP_AD2
4 AD21 VD1 GD2/FPDVICLK AE18 4
VLAD2 AF24 AF17 AGP_AD3 1D5V_S0
VLAD3 VD2 GD3/FPD09 AGP_AD4 R132 60D4R3F
AE24 VD3 GD4/FPD08 AD17 GFX power up strapping setting:
VLAD4 AE19 AD16 AGP_AD5 AGP_NCOMP 1 2
VLAD5 VD4 GD5/FPD07 AGP_AD6 TVD/DVP0D[3:0] => Panel type selection
AF20 VD5 GD6/FPD06 AE16
VLAD6 AD24 AF16 AGP_AD7
VLAD7 VD6 GD7/FPD05 AGP_AD8 R130 60D4R3F TVD4/DVP0D4 => FP-port multiplexed on AGP
AF25 VD7 GD8/FPDVIDET AF14
AD14 AGP_AD9 AGP_PCOMP 1 2 interface selection
VBE# GD9/FPDVIHS AGP_AD10 0: Two 12-bit DVI interface
21 VBE# AE21 VBE GD10/FPD01 AD13
LPAR AF19 AE13 AGP_AD11 R144 360R3F 1: One 24-bit panel interface
21 LPAR VPAR GD11/FPD23 AGP_AD12 VL_PCOMP
AF13 1 2
UPSTB AE23
GD12/FPD00
AD12 AGP_AD13 SB TVD5/DVP0D5 => Dedicated DVI port configuration
21 UPSTB UPSTB GD13/FPD22 AGP_AD14 0: TMDS
UPSTB# AF23 AF12 R326 82R3F
21 UPSTB# UPSTB GD14/FPD21 1: TV Encoder
AE12 AGP_AD15 CRT_RSET 1 64.82R05.551
2
DNSTB GD15/FPD20 AGP_AD16
21 DNSTB AF22 DNSTB GD16/FPD18 AD10
DNSTB# AD22 AE10 AGP_AD17 R143 10KR3 TVD6/DVP0D6 => Dedicated DVI port selection
21 DNSTB# DNSTB GD17/FPD17 AGP_AD18 0: Disable
AF10 DEBUG 1 2
UPCMD GD18/FPD16 AGP_AD19 1: Enable
AF26 AD9
21 UPCMD
21 DNCMD
D NCMD AD23
UPCMD
DNCMD
V_LINK GD19/FPDE
GD20/FPD14 AF9 AGP_AD20
AGP_AD21 BISTIN
R327 1KR3
GD21/FPCLK AF8 1 2
VL_VREF AF21 AE9 AGP_AD22 3D3V_S0
LVREF GD22/FPD13 AGP_AD23
AD8 RN11
VL_PCOMP GD23/FPD15 AGP_AD24 R78 DY-33R3 DP0_D6
AD19 LCOMPP GD24/DVP1D09 AF6 1 8
AD7 AGP_AD25 AGP_SBA6 1 2 DP0_D8 2 7
GD25 AGP_AD26 1623_XCLK 14
AE26 AE6 DP0_D4 3 6
6,19,21,39 ALL_PWROK PWRGD GD26/DVP1D10 AGP_AD27
AD5 DP0_D5 4 5
GD27 AGP_AD28
19 RST_NB# AD25 PCIRST GD28/DVP1D07 AF5 For K8T800PRO remove.
AF4 AGP_AD29 For K8N800 install. SRN4K7-1-U
TESTIN GD29/DVP1D06 AGP_AD30
AC26 TESTIN GD30/DVP1D08 AE4 For K8T800PRO remove.
3 AD4 AGP_AD31 For K8N800 install. 3
GD31/DVP1DET
16,20,33 PM_SUS_STAT# AD26 SUSTAT AGP_CBE#[3..0] 14,15,16
AD15 AGP_CBE#0
DEBUG GCBE0/FPD03 AGP_CBE#1 R115 4K7R3
AC17 DEBUG GCBE1/SB_DA AF11
AD11 AGP_CBE#2 DP0_D10 1 2
GCBE2/FPD19 AGP_CBE#3
GCBE3/DVP1D11 AC7
R116 4K7R3
NB_CRT_R B3 AF15 AGP_ADSTB0# DP0_D7 1 2
AR/NC ADSTB0S/FPD02 AGP_ADSTB0# 15,16
NB_CRT_G A3 AE15 AGP_ADSTB0
NB_CRT_B A2
AG/NC
AB/NC CRT AGP 8X ADSTB0F/FPD04
AGP_ADSTB1#
AGP_ADSTB0 15,16

ADSTB1S/FPDET AF7 AGP_ADSTB1# 14,16 Note: All of these power up strapping


CRT_RSET C4 AE7 AGP_ADSTB1 pin have internal pull down. Put an
CRT_HSYNC RSET/NC ADSTB1F/FPD12 AGP_ADSTB1 15,16
A1 HSYNC/NC external pull up resister if want to
CRT_VSYNC B1 AC9 AGP_FRAME#
VSYNC/NC GFRAME/FPHS AGP_FRAME# 15,16 set the default value to 1.
AC10 AGP_IRDY#
GUICLK GIRDY/SB_CK AGP_IRDY# 14,16
C6 AC14 AGP_TRDY#
3 GUICLK XIN/NC GTRDY AGP_TRDY# 16
AC11 AGP_DEVSEL#
GDEVSEL/FPVS AGP_DEVSEL# 15,16
E7 AC12 AGP_STOP#
16,19 INT_PIRQA# INTA/NC GSTOP/FPDVICLK_N AGP_STOP# 16 3D3V_S0 3D3VA_GCK_S0
BISTIN D3 AC16 AGP_PAR
BISTIN/NC GPAR/FPDVIVS AGP_PAR 16
AD6 AGP_RBF# L10
RBF AGP_RBF# 16
P2 AC1 AGP_WBF# 1 2
SMBC2 C2
SPCLK1/NC
SPCLK2/NC
SM Bus WBF/FPCLK_N
GREQ/DVI_DDCCK Y1 AGP_REQ#
AGP_WBF# 15,16
AGP_REQ# 16

1
P1 AA3 AGP_GNT# DY-0R5J C158 C157
SPD1/NC GGNT/DVI_DDCDA AGP_GNT# 16
SMBD2 C1 AC15 AGP_SERR#
SPD2/NC GSERR/FPDVIDE TP55 DY-SC1U10V3ZY

2
05/10
J1 A11 CLK66_NB DY-SC1000P50V3KX
TVD00/DVP0D00/NC GCLK CLK66_NB 3 For VIA suggest.
K2 AGP_SBA[7..0] 14,16
K3
TVD01/DVP0D01/NC
AC2 AGP_SBA0 UMA AGPVREF 0.75V, Use 100 ohm Only for K8T800PRO.
2 TVD02/DVP0D02/NC SBA0/DVP1VS AGP_SBA1 64.10005.651 2
L4 TVD03/DVP0D03/NC SBA1/DVP1DE AC3 When use K8N800,
DP0_D4 K1 AD1 AGP_SBA2 Discrete 8X AGPVREF 0.35V, Use 324 ohm
DP0_D5 TVD04/DVP0D04/NC SBA2/DVP1D00 AGP_SBA3 Please remove them.
L2 TVD05/DVP0D05/NC SBA3/DVP1HS AD2 64.32405.651
DP0_D6 L3 AF2 AGP_SBA4
DP0_D7 TVD06/DVP0D06/NC SBA4/DVP1D05 AGP_SBA5
M4 TVD07/DVP0D07/NC SBA5/DVP1D03 AD3
DP0_D8 L1 AE3 AGP_SBA6 2D5V_S0
M2
TVD08/DVP0D08/NC
TVD09/DVP0D09/NC
TV Encoder/ SBA6/DVP1CLK
SBA7/DVP1CLK_N AF3 AGP_SBA7 1D5V_S0
SC
1D5V_S0
DP0_D10 M3 C607 SC1U10V3ZY
M1
TVD10/DVP0D10/NC
TVD11/DVP0D11/NC
Digital SB_STBS/DVP1D02 AE1 AGP_SB_STB#
AGP_SB_STB# 14,16 1 2

1
AF1 AGP_SB_STB
AGP_SB_STB 14,16
Display SB_STBF/DVP1D01

1
P4 R358 R146 C210 C651 SC1U10V3ZY
TVCLKIN/DVP0DET/NC AGP_ST[2..0] 15,16
N1 AA2 AGP_ST0 324R3F 3K6R3D 1 2
TVDE/DVP0DE/NC ST0 AGP_ST1 SCD1U
N4 AA1

2
TVHS/DVP0HS/NC ST1/DVP1D04 AGP_ST2
N3 AB1

2
TVVS/DVP0VS/NC ST2 AGP_VREF_GC VL_VREF 1 2
P3 V1 AGP_PCOMP C171
TVCLK/DVP0DCLK/NC AGPPCOMP

1
W1 AGP_NCOMP SC22U10V6ZY-U
AGPNCOMP

1
R359 C650 R145 C211 1 2

SC1U10V3ZY
N2 AC13 AGP_VREF_GC 100R3F C648 1K13R3F C192
GPO0/NC AGPVREF0 SCD1U SCD1U SC22U10V6ZY-U
D2 AC6

2
GPOUT/NC AGPVREF1
For K8T800PRO remove. 1 2

2
A7 Y2 AGP_MBDET# C172
For K8N800 install. D7
DISPCLKO/NC AGP8XDET AGP_MBDET# 16
SC22U10V6ZY-U
DISPCLKI/NC
VSSQQ

Close to the AGP connector DBIL AC4 AGP_DBIL 16 Layout trace 20 mil
AC5 AGP_DBIH 16
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

RN83 DBIH
Layout trace 20 mil The voltage level of Decoupling capacitors
16,17 AGP_CRT_G 1 8 NB_CRT_G VL_VREF is 0.625V
16,17 AGP_CRT_B 2 7 NB_CRT_B K8N800
L16
L17
L25
M10
M11
M12
M13
M14
M15
M16
M17
M21
M23
N10
N11
N12
N13
N14
N15
N16
N17
N25
P5
P10
P11
P12
P13
P14
P15
P16
P17
P23
R1
R2
R3
R4
R5
R10
R11
R12
R13
R14
R15

T1

1 16,17 AGP_CRT_R 3 6 NB_CRT_R R129 DY-10KR3 Cross NB as short as possible 1


4 5 AGP_MBDET# 1 2 2D5V_S0
R131 2K2R3
DY-SRN0-1-U 1 2
RN78 Wistron Corporation
16,17 AGP_JVGA_HS 1 8 CRT_HSYNC 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
16,17 AGP_JVGA_VS 2 7 CRT_VSYNC Taipei Hsien 221, Taiwan, R.O.C.
16 AGP_CLK_DDC_3 3 6 SMBC2 05/10
16 AGP_DAT_DDC_3 4 5 SMBD2 For VIA suggest. Title

DY-SRN0-1-U K8N800 UMA Need to Pull-UP, NB-K8N800(2/3)_AGP_VLINK


K8T800Pro Discrete should be Pull-down. Size Document Number Rev
A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 12 of 50
A B C D E
A B C D E

Layout trace 20 mil 1D5V_S0


1D5V_NB_S5
U16C
3,6,8,11,12,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,35,36,38,41,47,49,50 3D3V_S0 3D3V_S0
AC25 VSUS15/VSUS25 VCC1 AA4
3D3VA_S0 For Suspend VCC1 AA5 Layout trace 20 mil 12,14,15,16,44,50 1D5V_S0 1D5V_S0
AB11
VCC1
AB12
SC SC
E25
VCC1
AB13
SC 4,11,39,45 1D2V_HT0A_S0 1D2V_HT0A_S0
AVDD1 VCC1 1D5V_S0 1D5V_PLL1_S0 1D5V_S0 1D5V_PLL2_S0 3D3V_S0 3D3VA_S0
E26 AGND1 VCC1 AB14 18,19,20,21,22,24,28,29,33,38,43,49,50 3D3V_S5 3D3V_S5
AB7 L4 L5 L26
For HT Receive VCC1
VCC1 AB8 1 2 1 2 1 2
4
VCC1 M8 4

1
1D5V_PLL1_S0 N8 GAP-CLOSE-PWR C121 C122 GAP-CLOSE-PWR C123 C124 GAP-CLOSE-PWR C575 C576
VCC1
VCC1 T2
D5 T3 SC1000P50V3KX SC1U10V3ZY SC1000P50V3KX SC1U10V3ZY SC1000P50V3KX SC1U10V3ZY

2
VCCPLL1/NC#D5 VCC1 78.10224.2B1 78.10224.2B1 78.10224.2B1
A5 VCCPLL2/NC#A5 VCC1 T4
C5 GNDPLL1/NC#C5 VCC1 T5
B5 GNDPLL2/NC#B5 VCC1 T8
VCC1 T9
For Graphics U2
Controller PLL VCC1
U3
SC
1D5V_PLL2_S0 1&2 VCC1
VCC1 U4
U5 3D3V_S0 3D3V_DAC_S0
VCC1 L24
A6 VCCPLL3/NC#A6 VCC1 U8
B6 GNDPLL3/NC#B6 VCC1 U9 1 2
VCC1 V10

1
For Graphics V11 GAP-CLOSE-PWR C518 C517
Controller VCC1
VCC1 V12
3D3V_DAC_S0 PLL3 V13 SC1000P50V3KX SC1U10V3ZY Note: When use K8T800PRO, these 1D5V_NB_S5 3D3V_S5

2
VCC1 78.10224.2B1
VCC1 V2 power circuit for GFX analog
A4 DACAVDD1/NC#A4 VCC1 V3 2 VOUT
B2 DACAVDD2/NC#B2 VCC1 V4 power should be NOT STUFF. VIN 3

1
B4 DACAGND1/NC#B4 VCC1 V8 1 GND

1
C3 V9 C190
DACAGND2/NC#C3 VCC1 SC1U10V3ZY C669
D4 W2

2
DACAGND3/NC#D4 VCC1 U66 SC1U10V3ZY
W3

2
For DAC VCC1 APL5308-15AC-TR
VCC1 W4
VCC1 W9
1D5V_S0 Y3
VCC1
VCC1 Y4
3 AB17 Y5 3
VCC2 VCC1
AB18 VCC2
AB19 1D5V_S0 1D5V_S0
VCC2
AB20 VCC2
AC18 AA21 1D2V_HT0A_S0
VCC2 VDD C617 SCD1U C621 SCD22U16V3ZY
AC19 VCC2 VDD AA22
AC20 AA23 1 2 1 2
AC21
VCC2
VCC2
VDD
VDD AA24
C612 SCD01U50V3KX
NEAR N/B ON BOT SIDE C569 SC2200P50V3JX
V14 VCC2 VDD AA25
V15 VCC2 VDD AA26 1 2 1 2
V16 VCC2 VDD AB21
V17 AB22 C564 SCD1U
VCC2 VDD
W15 VCC2 VDD AB23 1 2
W16 VCC2 VDD AB24
W17 AB25 C568 SCD01U50V3KX
VCC2 VDD
W18 VCC2 VDD AB26 1 2
VDD F9
H10 C571 SCD1U 1D5V_S0 1D2V_HT0A_S0 1D5V_S0
VDD C609 SCD01U50V3KX C127 SC4D7U10V5ZY C649 SC1U10V3ZY
B7 VSS/NC#B7 VDD H11 1 2
C7 VSS/NC#C7 VDD H12 1 2 1 2
R16 H15 C613 SCD01U50V3KX
VSS VDD C614 SCD01U50V3KX C523 SC1000P50V3KX C653 SC1U10V3ZY
R17 VSS VDD H16 1 2
R21 VSS VDD H8 1 2 1 2 1 2
R25 H9 C610 SCD1U 78.10224.2B1
VSS VDD C615 SCD01U50V3KX C574 SC1000P50V3KX C655 SC1U10V3ZY
T10 VSS VDD J8 1 2
T11 VSS VDD K19 1 2 1 2 1 2
T12 L19 78.10224.2B1
VSS VDD C606 SCD01U50V3KX C563 SCD1U C654 SC1U10V3ZY
T13 VSS VDD M19
T14 P8 3D3V_S0 1 2 1 2 1 2
2 VSS VDD 2
T15 VSS VDD R19
T16 R8 C601 SCD1U C519 SCD1U C657 SC1U10V3ZY
VSS VDD C611 SCD1U
T17 VSS VDD T19 1 2 1 2 1 2
U10 VSS VDD U19 1 2
U11 V18 C600 SCD1U C567 SCD1U C604 SCD01U50V3KX
VSS VDD C560 SCD1U
U12 VSS VDD V19 1 2 1 2 1 2
U13 VSS VDD W10 1 2
U14 W11 C191 SCD1U C616 SCD1U C605 SCD01U50V3KX
VSS VDD C557 SC1U10V3ZY
U15 VSS VDD W12 1 2 1 2 1 2
U16 VSS VDD W13 1 2
U17 W14 C174 SCD1U C570 SCD1U C647 SCD01U50V3KX
VSS VDD C558 SCD1U
V5 VSS VDD W19 1 2 1 2 1 2
W5 VSS VDD Y20 1 2
W21 Y21 C572 SCD01U50V3KX C652 SCD01U50V3KX
VSS VDD C559 SCD1U
W22 VSS VDD Y22 1 2 1 2
W23 VSS VDD Y23 1 2
W24 Y24 C573 SCD01U50V3KX C602 SCD01U50V3KX
VSS VDD C565 SCD1U
W25 VSS VDD Y25 1 2 1 2
W26 VSS VDD Y26 1 2
AB2 C619 SCD01U50V3KX C176 SCD01U50V3KX
VSS C608 SC1U10V3ZY
AB3 VSS 1 2 1 2
AB4 VSS VSS AC24 1 2
AB5 AE2 C622 SCD01U50V3KX C566 SCD01U50V3KX
VSS VSS C556 SC1U10V3ZY
AB6 VSS VSS AE5 1 2 1 2
AB9 VSS VSS AE8 1 2
AB10 AE11 C522 SCD01U50V3KX C603 SCD01U50V3KX
VSS VSS
AB15 VSS VSS AE14 1 2 1 2
AB16 VSS VSS AE17
1 AC8 AE20 C173 SCD01U50V3KX 1
VSS VSS
AC22 VSS VSS AE22 1 2
AC23 VSS VSS AE25
C620 SCD01U50V3KX
K8N800 1 2 Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
NB-K8N800(3/3)_POWER
Size Document Number Rev
A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 13 of 50
A B C D E
A B C D E

SC SC 6,12,15,16,19,20,21,38,39,50 2D5V_S0 2D5V_S0

2D5V_S0 2D5V_S0 VDDA2 2D5V_S0 VDDA1 1D5V_S0 3D3V_S0


3,6,8,11,12,13,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,35,36,38,41,47,49,50 3D3V_S0 3D3V_S0
R81 R346
1 2 1 2
12,13,15,16,44,50 1D5V_S0 1D5V_S0

1
C166 C164 C187 GAP-CLOSE-PWR C150 C147 C148 GAP-CLOSE-PWR C152 C555 C165 C186 C587

DY-SCD1U DY-SCD1U DY-SCD1U DY-SCD1U DY-SCD1U DY-SCD1U DY-SCD1U DY-SCD1U DY-SCD1U DY-SCD1U DY-SCD1U

2
4 4

3D3V_S0 3D3V_S0
1D5V_S0

1
R96 R99 1D5V_S0

1
DY-10KR3 DY-10KR3 RN10

G
AGP_IRDY# 2 3
AGP_IRDY# 2 3 SMBC_NB AGP_CBE#1 1 4
12,16 AGP_IRDY#

2
ADDR CONF_XLT

D
S
DY-SRN4D7KJ

1
ZZ.47236.040
R125 R100 Q9 3D3V_S0

1
DY-10KR3 DY-10KR3 RN12

G
DY-FDN337N-U SMBC_NB 2 3
AGP_CBE#1 2 3 SMBD_NB SMBD_NB 1 4
12,16 AGP_CBE#1

D
S
DY-SRN4D7KJ
05/10 ZZ.47236.040
Config as pullup or pulldown Q11 For VIA suggest.
RN8
1 8 TVD0 DY-FDN337N-U Change from 2N7002 to FDN337 SB
12,16 AGP_SBA2
2 7 1623_HSYNC
12,16 AGP_SBA3
3 6 TVD6
12,16 AGP_AD29
4 5 TVD4 LAYOUT: Locate close the AGP connector
12,16 AGP_AD27
3 DY-SRN0-1-U U14 3
51 22 1623_VSYNC
PD15 VSYNC 1623_HSYNC
RN7 50 23
TVD1 PD14 HSYNC
12,16 AGP_SB_STB 1 8 47 PD13
2 7 TVD2 46
12,16 AGP_SB_STB# PD12
3 6 1623_DS TVD11 45 2 X1
12,16 AGP_SBA1 PD11 XI
4 5 1623_VSYNC TVD10 44 3 X0
12,16 AGP_SBA0 PD10 XO
TVD9 43
TVD8 PD9 BCO
DY-SRN0-1-U 42 61 1 2
TVD7 PD8 BCO
41 PD7
TVD6 38 57 CSO X2
TVD5 37
PD6 CSO_HSO
60 VSO VDDA1 DY-XTAL-14D318M-2 SC
PD5 VSO

1
TVD4 36
R84 DY-0R3-U TVD3 PD4 C151 C153
35 PD3 VDDA1 64
1 2 TVD11 TVD2 34 1 DY-SC12P DY-SC12P
12,16 AGP_CBE#3

2
TVD1 PD2 VDDA2 VDDA2 ZZ.12034.1B1 ZZ.12034.1B1
31 PD1 VDDA3 5
RN6 TVD0 30 9
TVD9 PD0 VDDA4
12,16 AGP_AD24 1 8 VDDA4 13
2 7 TVD10 1623_XCLK 25
12,16 AGP_AD26 12 1623_XCLK XCLK 3D3V_S0
1623_PCLK
3
4
6
5
12,16 AGP_ADSTB1# 1
R83
2
DY-33R3
28 P_OUT VCC 26
40
By KDS suggested change
VCC
DY-SRN0-1-U
SMBC_NB
SMBD_NB
20 SBC VCC 56 From 78.39034.1B1
21 SBD
VCC25 18 2D5V_S0 To 78.12034.1B1
RN5 1623M_TV_COMP 10 32
TVD7 1623M_TV_CRMA DACA VCC25
12,16 AGP_AD28 1 8 12 DACB VCC25 48
2 7 TVD8 1623M_TV_LUMA 14 59
12,16 AGP_AD30 DACC VCC25
3 6 TVD3 16
12,16 AGP_SBA5 DACD
4 5 TVD5 63 VSO
2 12,16 AGP_SBA4 GNDA1 2
4 CSO
ADDR GNDA2 BCO
DY-SRN0-1-U 52 8
ADDR GNDA3
11
LAYOUT: Locate close the AGP connector GNDA4

1
1 2 1623_RSET 7 15
R82 DY-4K64R3F RSET GNDA4 C167 C169 C168
19 DY-SC10P DY-SC10P DY-SC10P
16,19,33,35,36 PCIRST_BUF#

2
RESET
VSS 24
R347 1 2 DY-10KR3 1623_TE 53 39
1623_DS TE VSS
29 DS VSS 55
1D5V_S0 05/10 For VIA suggest.
CONF_XLT 54 17
CONF_XLT GND
1

GND 33
R98 C149 2 1 DY-SCD1U1623_COMP 6 49
VDDA2 COMP GND
DY-1KR3F 62
GND
1D5V_S0 27 VDDQ
2

1623_VREF 1623_VREF 58 VREF


1

R97 DY-VT1623M-U
DY-1KR3F C588
DY-SCD1U
2
2

Note: Only for K8N800.


When use K8T800PRO,
1
Please remove them. 1

Wistron Corporation
RN79 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1 8 1623M_TV_CRMA Taipei Hsien 221, Taiwan, R.O.C.
16,17 AGP_TV_CRMA
2 7 1623M_TV_LUMA
16,17 AGP_TV_LUMA
3 6 1623M_TV_COMP Title
16,17 AGP_TV_COMP
4 5
VT1623M-TV Encoder
Close to APG Slot DY-SRN0-1-U Size Document Number Rev
A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 14 of 50
A B C D E
A B C D E

12,13,14,16,44,50 1D5V_S0 1D5V_S0


2D5V_S0

6,12,14,16,19,20,21,38,39,50 2D5V_S0 2D5V_S0

1
C57 C58 C92 C91 C93
RN89
1 8 DY-SCD1U DY-SCD1U DY-SCD1U DY-SCD1U DY-SCD1U
3,6,8,11,12,13,14,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,35,36,38,41,47,49,50 3D3V_S0 3D3V_S0

2
2 7
3 6 1631_DE
12,16 AGP_AD19
4 5 1631_CLK
12,16 AGP_AD21
4 4
DY-SRN22-1
RN75
1 8
2 7 1631_VSYNC
12,16 AGP_DEVSEL#
3 6 1631_HSYNC
12,16 AGP_FRAME# 1631_CLK#
12,16 AGP_WBF# 4 5
2D5V_S0
DY-SRN22-1
RN90 U6
1 8 LD0 12 1631_PRE R38 1 2 DY-4K7R3
12,16 AGP_AD12 PRE
2 7 LD1 1631_DE 76 13
12,16 AGP_AD10 DE RESV1
3 6 LD2 1631_CLK 87 19
12,16 AGP_ADSTB0# 1631_CLK# CLKINP RESV2
4 5 LD3 88 20
12,16 AGP_CBE#0 CLKINM NC
1631_HSYNC 75 24
HSYNC NC

1
DY-SRN22-1 C95 C96 1631_VSYNC 74 54
RN93 VSYNC NC
1 8 LD4 DY-SC10P DY-SC10P LD0 94 58
12,16 AGP_ADSTB0

2
LD5 LD1 D0 GPIO1-1
12,16 AGP_AD7 2 7 93 D1 GPIO2-1 56
3 6 LD6 LD2 92 57
12,16 AGP_AD6 D2 GPIO1-2
4 5 LD7 LD3 91 55
12,16 AGP_AD5 D3 GPIO2-2
LD4 90 62
DY-SRN22-1 D4 RESV3
A0 63
RN94 LD5 89 64
LD8 LD6 D5 A1
12,16 AGP_AD4 1 8 86 D6 A2 65
2 7 LD9 LD7 85 66
12,16 AGP_AD3 D7 RESV4
3 6 LD10 LD8 84
12,16 AGP_AD0 D8 1631_I2CSEL
4 5 LD11 LD9 83 61 R76 1 2 DY-4K7R3
12,16 AGP_AD1 D9 I2CSEL
I2CCLK 59
3 DY-SRN22-1 LD10 82 60 1631_I2CDAT R77 1 2 DY-4K7R3 3
RN85 LD11 D10 DSEL/I2CDAT
81 D11 1 2 DY-4K7R3
1 8 LD12 LD12 8 72 R75
12,16 AGP_ADSTB1 D12 TST1
2 7 LD13 LD13 7 73
12,16 AGP_AD22 D13 TST2
3 6 LD14 LD14 6 18 1631_EDGE R37 1 2 DY-4K7R3
12,16 AGP_AD20
4 5 LD15 D14 R_FB
22 1631_PDB R35 1 2 DY-1KR3 SC
12,16 AGP_AD23 PDB
LD15 5 23 1631_DUAL R33 1 2 DY-4K7R3 R35 Change from 4K7R3 to 1KR3
DY-SRN22-1 LD16 D15 DUAL 1631_MSEN R36 DY-4K7R3
4 D16 MSEN 21 1 2
RN92 LD17 3 R34 1 2 DY-4K7R3
LD16 1D5V_S0 LD18 D17 1631_TXACLK+
12,16 AGP_AD18 1 8 2 D18 CLK1P 41
2 7 LD17 LD19 1 42 1631_TXACLK-
12,16 AGP_AD17 D19 CLK1M
3 6 LD18 26 1631_TXBCLK+
12,16 AGP_AD16 CLK2P
1

4 5 LD19 LD20 100 27 1631_TXBCLK-


12,16 AGP_CBE#2 D20 CLK2M
R64 LD21 99
DY-SRN22-1 DY-10KR3F LD22 D21 A7P_TEST TP2
98 D22 A7P 28
RN91 LD23 97 29 A7M_TEST TP1
LD20 D23 A7M 1631_TXBCLK+ 8
12,16 AGP_AD15 1 8 1 AGP_TXBCLK+ 16,18
2

2 7 LD21 1631_VREF 78 31 1631_TXBOUT2+ 1631_TXBCLK- 7 2


12,16 AGP_AD14 VREF A6P 1631_TXBOUT2- AGP_TXBCLK- 16,18
3 6 LD22 32 1631_TXACLK+ 6 3
12,16 AGP_AD13 A6M AGP_TXACLK+ 16,18
1

4 5 LD23 9 1631_TXACLK- 5 4
12,16 AGP_AD11 GND AGP_TXACLK- 16,18
1

R63 C94 11 33 1631_TXBOUT1+


DY-SRN22-1 DY-10KR3F GND A5P 1631_TXBOUT1- RN81
52 GND A5M 34
DY-SCD1U 77 DY-SRN0-1-U
LAYOUT: Locate close the AGP connector
2

GND 1631_TXBOUT0+
36
2

A4P 1631_TXBOUT0-
14 PLLGND A4M 37
15 1631_TXBOUT2+ 8 1
PLLGND 1631_TXBOUT2- AGP_TXBOUT2+ 16,18
17 38 A3P_TEST TP4 7 2
PLLGND A3P 1631_TXAOUT2+ AGP_TXBOUT2- 16,18
39 A3M_TEST TP3 6 3
SC 2D5V_S0 71
A3M 1631_TXAOUT2- 5 4
AGP_TXAOUT2+ 16,18
2 DGND 1631_TXAOUT2+ AGP_TXAOUT2- 16,18 2
80 DGND A2P 44
69 45 1631_TXAOUT2- RN82
DGND A2M
1

96 DY-SRN0-1-U
R527 U98 DGND 1631_TXAOUT1+
A1P 46
DY-2K2R3 25 47 1631_TXAOUT1- 1631_TXBOUT1+ 8 1
LVDSGND A1M AGP_TXBOUT1+ 16,18
1 6 1631_PDB 35 1631_TXBOUT1- 7 2
LVDSGND AGP_TXBOUT1- 16,18
43 49 1631_TXAOUT0+ 1631_TXAOUT1+ 6 3 AGP_TXAOUT1+ 16,18
2

PWROK# LVDSGND A0P 1631_TXAOUT0- 1631_TXAOUT1-


2 5 PWROK# 18 51 LVDSGND A0M 50 5 4 AGP_TXAOUT1- 16,18
3

R287 DY-1KR3 1631_PDB 3 4 70 68 1631_I2CVCC RN87


2D5V_S0 DVDD I2CVCC
1 2 1 Q48 79 10 DY-SRN0-1-U
12,16 AGP_ST0 DVDD PLLVCC 2D5V_S0
DY-MMBT3904-U1 95 DVDD PLLVCC 16

1
DY-2N7002DW C120 1631_TXBOUT0+ 8 1 AGP_TXBOUT0+ 16,18
2

30 53 1631_TXBOUT0- 7 2
LVDSVCC VCC AGP_TXBOUT0- 16,18
40 DY-SCD1U 1631_TXAOUT0+ 6 3 AGP_TXAOUT0+ 16,18

2
LVDSVCC 1631_TXAOUT0-
48 LVDSVCC 5 4 AGP_TXAOUT0- 16,18
MODSEL 67
RN86
SC 1D5V_S0 DY-VT1631 Close to APG Slot DY-SRN0-1-U
1
G

AGP_ST2 2 3 BL_ON Note: Only for K8N800.


12,16 AGP_ST2 BL_ON 16,18
When use K8T800PRO, 1D5V_S0
D
S

Please remove them. RN77


1
Q8 AGP_ST2 2 3 1
1

AGP_ST1
G

DY-FDN337N-U 1 4

AGP_ST1 LCDVDD_ON DY-SRN10KJ


12,16 AGP_ST1 2 3 LCDVDD_ON 16,18
3D3V_S0
Wistron Corporation
D

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


S

05/10 RN2 Taipei Hsien 221, Taiwan, R.O.C.


Q7 For VIA suggest. BL_ON 2 3
LCDVDD_ON 1 4 Title
DY-FDN337N-U Change from 2N7002 to FDN337
DY-SRN10KJ VT1631-LVDS Transmitter
Size Document Number Rev
LAYOUT: Locate close the AGP connector A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 15 of 50
A B C D E
A B C D E

CN7
AGP_AD[31..0] 12,14,15
MH2 AGP_CBE#[3..0] 12,14,15
1D5V_S0 180 179 1D25V_S0 18,38,41,43,44,45,46,47,50 DCBATOUT DCBATOUT
178 177
176 175 GND
GND GND AGP_ST[2..0] 12,15
174 173
AGP_BUSY# 172 171 GND
AGP_STP# AGP_SBA[7..0] 12,14 12,13,14,15,44,50 1D5V_S0 1D5V_S0
170 169
AGP_PAR 168 167
12 AGP_PAR
AGP_STOP# 166 165 AGP_DEVSEL#
12 AGP_STOP# GND AGP_DEVSEL# 12,15
AGP_TRDY# 164 163
12 AGP_TRDY# 17,18,19,20,21,22,23,24,27,30,31,32,33,34,37,38,39,41,42,47,48,49,50 5V_S0 5V_S0
AGP_FRAME# 162 161 PM_SUS_STAT#
12,15 AGP_FRAME# GND PM_SUS_STAT# 12,20,33
4 160 159 AGP_RBF# 4
AGP_RBF# 12
AGP_WBF# 158 157 AGP_IRDY#
12,15 AGP_WBF# AGP_IRDY# 12,14
AGP_ST1 156 155 AGP_REQ# R39
A_RST#_AGP AGP_REQ# 12 3,6,8,11,12,13,14,15,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,35,36,38,41,47,49,50 3D3V_S0 3D3V_S0
INT_PIRQA# 154 153 1 2
12,19 INT_PIRQA# PCIRST_BUF# 14,19,33,35,36
AGP_GNT# 152 151 AGP_MBDET#
12 AGP_GNT# AGP_MBDET# 12
AGP_ST0 150 149 GND 33R3
AGP_ST2 148 147 AGP_JVGA_VS
AGP_JVGA_HS AGP_JVGA_VS 12,17 6,12,14,15,19,20,21,38,39,50 2D5V_S0 2D5V_S0
BL_ON 146 145
15,18 BL_ON AGP_JVGA_HS 12,17
LCDVDD_ON 144 143 GND
15,18 LCDVDD_ON GND AGP_TV_CRMA
142 141 AGP_TV_CRMA 14,17
AGP_CRT_R 140 139 AGP_TV_LUMA
12,17 AGP_CRT_R AGP_TV_COMP AGP_TV_LUMA 14,17 DCBATOUT 3D3V_S0 5V_S0 1D5V_S0
AGP_CRT_B 138 137
12,17 AGP_CRT_B GND AGP_TV_COMP 14,17
AGP_CRT_G 136 135
12,17 AGP_CRT_G GND 134 133 AGP_DAT_DDC_3

1
GND 132 131 AGP_CLK_DDC_3 C644 C189 C591 C590 C170 C424
GND 130 129 GND
AGP_TXBOUT3+ 128 127 GND SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U

2
AGP_TXBOUT3- 126 125 GND
GND 124 123 AGP_TXAOUT3+
AGP_TXBCLK+ 122 121 AGP_TXAOUT3-
15,18 AGP_TXBCLK+ GND
AGP_TXBCLK- 120 119
15,18 AGP_TXBCLK-
118 117 AGP_TXACLK+
AGP_TXACLK+ 15,18
AGP_TXBOUT2+ 116 115 AGP_TXACLK-
15,18 AGP_TXBOUT2+ AGP_TXACLK- 15,18
AGP_TXBOUT2- 114 113
15,18 AGP_TXBOUT2-
112 111 AGP_TXAOUT2+ DDC_CLK & DATA level shift
AGP_TXAOUT2+ 15,18
AGP_TXBOUT1+ 110 109 AGP_TXAOUT2-
15,18 AGP_TXBOUT1+ AGP_TXAOUT2- 15,18
AGP_TXBOUT1- 108 107
15,18 AGP_TXBOUT1- 3D3V_S0
106 105 AGP_TXAOUT0+
AGP_TXAOUT0+ 15,18
AGP_TXBOUT0- 104 103 AGP_TXAOUT0- RN4
15,18 AGP_TXBOUT0- AGP_TXAOUT0- 15,18 AGP_DAT_DDC_3
3 AGP_TXBOUT0+ 102 101 1 4 3
15,18 AGP_TXBOUT0+
100 99 AGP_TXAOUT1+ AGP_CLK_DDC_3 2 3
AGP_TXAOUT1+ 15,18
98 97 AGP_TXAOUT1-
AGP_TXAOUT1- 15,18
AGP_SBA6 96 95 SRN10KJ
AGP_SBA7 94 93
AGP_SBA4 92 91 AGP_SB_STB 3D3V_S0
AGP_SBA5 AGP_SB_STB# AGP_SB_STB 12,14
90 89 AGP_SB_STB# 12,14
88 87 AGP_SBA1
AGP_DBIH 86 85 AGP_SBA0
12 AGP_DBIH
AGP_DBIL 84 83 AGP_SBA2 U48
12 AGP_DBIL
AGP_AD30 82 81 AGP_SBA3
AGP_AD28 80 79 GND AGP_DAT_DDC_3 1 6 VGA_DAT_DDC_3
12 AGP_DAT_DDC_3 VGA_DAT_DDC_3 17
AGP_AD26 78 77 AGP_AD31
AGP_AD24 76 75 AGP_AD29 2 5
AGP_ADSTB1# 74 73 AGP_AD27
12,14 AGP_ADSTB1# AGP_CLK_DDC_3
AGP_ADSTB1 72 71 AGP_AD25 VGA_CLK_DDC_3 3 4
12,15 AGP_ADSTB1 17 VGA_CLK_DDC_3 AGP_CLK_DDC_3 12
GND 70 69 GND
AGP_CBE#3 68 67 AGP_AD23
AGP_AD22 66 65 AGP_AD21 2N7002DW
AGP_AD20 64 63 AGP_AD19
AGP_AD18 62 61 AGP_AD17 5V @ ext. CRT side
GND 60 59 AGP_CBE#2
AGP_AD16 58 57 GND
GND 56 55 AGP_AD15
GND 54 53 AGP_CBE#1 SB
AGP_AD13 52 51 AGP_AD14
AGP_AD11 50 49 AGP_AD12
AGP_AD9 48 47 AGP_AD10
2
AGP_CBE#0 46 45 AGP_AD8 1D25V_S0 2
GND 44 43 GND 3D3V_S0
AGP_ADSTB0 42 41 AGP_AD6
12,15 AGP_ADSTB0
12,15 AGP_ADSTB0#
AGP_ADSTB0# 40 39 AGP_AD7 Iomax=1.5A
AGP_AD2 38 37 AGP_AD4

1
AGP_AD0 36 35 AGP_AD5 3D3V_S0
VGA_CARD_IN# 34 33 AGP_AD3 C426
36 VGA_CARD_IN# SC10U10V5ZY
VGA_ID1 32 31 AGP_AD1
36 VGA_ID1
2
VGA_ID0 30 29 GND 78.10693.411
36 VGA_ID0

1
PM_SLP_S3# 28 27 CLK66_VGA
19,33,38,39,43,44 PM_SLP_S3# CLK66_VGA 3 3D3V_S0
26 25 C460
24 23 SCD1U
5V_S0 3D3V_S0

2
2D5V_S0 22 21 GND

1
2D5V_S0 20 19 GND
2D5V_S0 18 17 GND R270 1D25V_S0
2D5V_S0 GND 1K62R3F U45
16 15 KEMET,NT:5.7, B2 size
2D5V_S0 14 13 GND 64.16215.651
2D5V_S0 12 11 GND 1 4
SC ST100U4VBM-1 (80.10716.321)
2

2D5V_S0 GND AGP_1D25V_VREF VIN VOUT


10 9 3 VREF Iripple=1.1A,ESR=70mohm
2D5V_S0 8 7 GND 6 8
2D5V_S0 VCNTL NC
1

1
6 5 NC 7 SANYO, NT$:6.1
4 3 R271 1 C427 2 5 TC7
GND NC ST100U4VBM-1 Iripple=1.1A,ESR=70mohm
By ME requset for 9

2
1KR3F SCD1U GND
DCBATOUT 2 1 3.5/2.8/2.0
2

MH1 Discrete CN7 P/N: 64.10015.651 78.10492.4B1


77.21071.031
2

SMC-CONN180A-U Main 20.F0575.180 APL5331KAC-TR


20.F0575.180
Second 20.F0498.180 SC SO-8-P
1 SC 1

21 SB_GPI6 1 2 AGP_BUSY# Wistron Corporation


R24 DY-0R3-U 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

20 SB_GPO5 1 2 AGP_STP# Title


R23 DY-0R3-U
Graphic Conn.
Size Document Number Rev
Debug only do not stuff A3
EGRET SC
Date: Friday, July 23, 2004 Sheet 16 of 50
A B C D E
A B C D E

16,18,19,20,21,22,23,24,27,30,31,32,33,34,37,38,39,41,42,47,48,49,50 5V_S0 5V_S0

3,6,8,11,12,13,14,15,16,18,19,20,21,24,25,26,27,28,30,31,32,33,34,35,36,38,41,47,49,50 3D3V_S0 3D3V_S0

R259 CRT CRT CONN


200mA Rating/Spec 500mA
1 2
DUMMY-R3
5V_S0
5V_S0
Signal level need check. D17 5V_S0
4 2 CRT_VCC 4
D1 F1
CRT_R 3 1 2 5V_CRT_S0 1 2

14
SC

1
1 RB751V-40-U FUSE-1A6V C7
L18 R257 33R3
2 3 H SYNC_5 1 2 JVGA_HS_1 1 2 JVGA_HS BAV99-2 SCD01U50V3KX
12,16 AGP_JVGA_HS

2
D18
U34A GAP-CLOSE 2
TSAHCT125
14

7
4
CRT_G 3
L19 R258 33R3
5 6 VSYNC_5 1 2 JVGA_VS_1 1 2 JVGA_VS 1
12,16 AGP_JVGA_VS
CRT1

1
U34B GAP-CLOSE BAV99-2
TSAHCT125 C399 C397 D19 R14 R13 16
7

DY-SC3P50V3CN DY-SC3P50V3CN 2 2K2R3 2K2R3

2
C400 C398 ZZ.3R074.1B1 ZZ.3R074.1B1
DY-SC47P DY-SC47P CRT_B 3

2
R260 ZZ.47034.1B1 ZZ.47034.1B1 6
1 2
SB 1 11
CRT_R 1
DUMMY-R3 BAV99-2 7
16 VGA_DAT_DDC_3 12
CRT_G 2
8
JVGA_HS 13
CRT_B 3
L15 BLM18BB470SN1 68.00084.271 9
3 1 2 CRT_R JVGA_VS 14 3
12,16 AGP_CRT_R
4
L16 BLM18BB470SN1 68.00084.271 10
1 2 CRT_G 15
12,16 AGP_CRT_G 16 VGA_CLK_DDC_3
5
L17 BLM18BB470SN1 68.00084.271

1
1 2 CRT_B C9 C5 C6 C8
12,16 AGP_CRT_B
1

SC100P

SC100P

SC10P

SC10P
17

2
1

1
R254 R255 R256 C396

1
75R3F 75R3F 75R3F C390 C393 C395 SC1P50V3CN

2
DY-SC47P DY-SC47P DY-SC47P 78.1R074.1B1
2

2
ZZ.47034.1B1 ZZ.47034.1B1 ZZ.47034.1B1 C392 C394 78.10034.1B1 78.10034.1B1 FOX-CONN15-1-U
2

2
SC2P50V3JN SC2P50V3JN 20.B0026.A15
78.2R034.1B1 78.2R034.1B1
SB
SB SC SC
By ME requset CRT1 P/N:
Main 20.B0026.A15
Second 20.B0034.015

2 2

C405 1 2DY-SC47P D21

TV CONN

1
2 3D3V_S0 C432
L21 EMI
1 2 TV_LUMA 3 DY-SCD1U
14,16 AGP_TV_LUMA

2
IND-1D2UH
1

1
R273 C431 C404
75R3F SC100P SC270P50V3JN DY-BAV99-2 EMI
2

1
TV1 C435
8
2

3 DY-SCD1U

2
1 By ME requset TV1 P/N: D22

L22
5 Main 22.10021.A91 2 3D3V_S0
7
IND-1D2UH MH1 Second 22.10021.B01 COMP_B 3
1 2 COMP_B 6
14,16 AGP_TV_COMP
2 1
1

4
R274 C433 C406 9 EMI DY-BAV99-2
1

75R3F SC100P SC270P50V3JN C430


2

MINDIN7-7
1
22.10021.A91 DY-SCD1U 1
2

C403 1 2DY-SC47P D20

L20
SC 2 3D3V_S0 Wistron Corporation
1 2 TV_CRMA 3 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
14,16 AGP_TV_CRMA Taipei Hsien 221, Taiwan, R.O.C.
IND-1D2UH
1

1
R272 C402 C401 Title
75R3F SC100P SC270P50V3JN DY-BAV99-2
CRT / TV
2

Size Document Number Rev


2

A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 17 of 50
A B C D E
A B C D E

3,6,8,11,12,13,14,15,16,17,19,20,21,24,25,26,27,28,30,31,32,33,34,35,36,38,41,47,49,50 3D3V_S0 3D3V_S0


Stuff For Discrete Only 3D3V_S0
C416 SCD1U 3D3V_S0
R525 1 2 16,17,19,20,21,22,23,24,27,30,31,32,33,34,37,38,39,41,42,47,48,49,50 5V_S0 5V_S0
10KR3
U39A SC INVERTER/LED

14
1 2
U39B

14
SB 1 R531 1KR3
13,19,20,21,22,24,28,29,33,38,43,49,50 3D3V_S5 3D3V_S5
15,16 BL_ON
3 LCD_ON 1 2 LCD_ON1 4
2 6 FPBACK
36 BACKLT_OFF# 33,34,38,50 3D3V_S3 3D3V_S3
5
TSLCX08-U

7
TSLCX08-U
16,38,41,43,44,45,46,47,50 DCBATOUT DCBATOUT

7
4 Layout trace 20 mil 4
33,34 LID#
DCBATOUT
48,50 +5V_UP_S5 +5V_UP_S5

DY-SC1U50V5ZY
3D3V_S5

1
+5V_UP_S5 C386 C391
BLINK_LED#
BLINK_LED# 20
D39 INV1 SC10U35V0ZY-U

14

2
1
S1N4148-U 31

1
U44A C409 5V_S0
2 3 STDBY_LED#_INV 1 2 2 1
33 STDBY_LED# STDBY_LED#_INV 34 36 CHRG_LED#_SIO
SCD1U

1
TSLCX125 4 3 C384
SB 6 5
3D3V_S3
SC1U10V3ZY
7

1
8 7 C385
48 CHARGE_LED#

2
MEDIA_LED# 10 9
12 11 SCD1U
33 NUM_LED#

2
3D3V_S5 14 13
33 CAP_LED#
16 15 80211_LED#
BLINK_LED# FPBACK 1 2 FPBACK_2 18 17
R266 10KR3 PWRLED#
14

20 19
4

22 21 STDBY_LED#_INV
U44B 24 23
33 BRIGHTNESS (LED USE) 3D3V_S0
5 6 MAIL_LED# 26 25
33 EMAIL_LED# MAIL_LED# 34

1
C415 C410 C414 C413 C412 C411 28 27 C387 C388

1
TSLCX125 30 29 C389

SC100P

SC100P

SC100P

SC100P

SC100P

SC100P
SCD1U SC100P
7

2
32 SCD1U

2
3 3
ETY-CONN30D-U
20.F0322.030
SC Q46

3
PDTC144EU
3D3V_S5 1 3D3V_S0
1
TOP VIEW 29

2
1

3D3V_S0
R532 SB INV CONN
U99 2 D23 30
1KR3
By ME requset INV1 P/N:

1
1 6 LCD_ON1 2
23 HDD_LED#_5
2

PWROK# PWROK#
R12
10KR3
Main 20.F0322.030 3 MEDIA_LED#
2 5 PWROK# 15 Q2
LCDVDD_ON_1
Second 20.D0144.215 23 CDROM_LED#_5 1
3 4 80211_LED# 3
34 80211_LED#

2
3

R1 1
1 Q49 2 BAW56
6,12,19,21,39 ALL_PWROK PDTC144EU R2 Q1
2N7002DW

3
D 2N7002
2

PDTC124EU 1 RF_LED# 36
G
S

2
2 2

2
TOP VIEW 40 LCD POWER
LCD CONN LCDPOWER_S0 LCD CONN
3D3V_S0 LCDPOWER_S0 LCDPOWER_S0 SC 3D3V_S0
1 39 C420
SI3865_R1C1 1 2
1

LCD1 C417 C418 C419 DY-SC6800P50V3KX


R268 U40 U41
42
DY-SC10U10V5ZY DY-SCD1U DY-SCD1U DY-100KR3
Layout 40 mil
2

1 2 1 2 6 1 SI3865_R2 1 6
LCDVDD_ON_1 5 R1/C1 R2
2 2
OUT IN
5
ON/OFF D2 LCDVDD_ON_1 GND GND
36 PANEL_ID0 3 4 4 S2 D2 3 3 ON/OFF# IN 4
36 PANEL_ID1 5 6
1

1
36 PANEL_ID2 7 8

1
9 10 C422 C421 DY-SI3865DV R267 C423 AAT4280IGU-3-T1
36 PANEL_ID3 AGP_TXBCLK+ 15,16
11 12 SC1U10V3ZY SCD1U ZZ.03865.03D DY-10KR3 SC1U10V3ZY 74.04280.B9P
AGP_TXBCLK- 15,16
2

13 14 AGP_TXBOUT2+ 15,16

2
15 16 AGP_TXBOUT2- 15,16 SC

2
17 18 AGP_TXBOUT1+ 15,16 EVEN CHANNEL
19 20 AGP_TXBOUT1- 15,16
21 22 AGP_TXBOUT0+ 15,16
23 24 AGP_TXBOUT0- 15,16
25 26 R269 1KR3
AGP_TXACLK+ 15,16
1 27 28 AGP_TXACLK- 15,16 15,16 LCDVDD_ON 1 2 1
29 30 AGP_TXAOUT2+ 15,16
31 32 AGP_TXAOUT2- 15,16
ODD CHANNEL
33
35
34
36
AGP_TXAOUT1+ 15,16
AGP_TXAOUT1- 15,16
Wistron Corporation
37 38 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
AGP_TXAOUT0+ 15,16 Taipei Hsien 221, Taiwan, R.O.C.
39 40 AGP_TXAOUT0- 15,16
41 Title

SYN-CONN40A-U INV / LCD


20.F0312.040 Size Document Number Rev
A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 18 of 50
A B C D E
A B C D E

3D3V_S0
3,6,8,11,12,13,14,15,16,17,18,20,21,24,25,26,27,28,30,31,32,33,34,35,36,38,41,47,49,50 3D3V_S0 3D3V_S0
3D3V_S0
1 6,12,14,15,16,20,21,38,39,50 2D5V_S0 2D5V_S0

1
13,18,20,21,22,24,28,29,33,38,43,49,50 3D3V_S5 3D3V_S5
C747(BOT) C748(BOT) C742 C743 C715 C264
SCD1U DY-SCD1U SCD1U SCD1U SCD1U DY-SC4D7U10V5ZY
20,21,39 2D5V_S5 2D5V_S5
2

2
SC

W10
W11
W17
W18
W19
W21
H10
H11
H12

R19

U19

V19
V21

Y21
T19

W9

W8
M8
H9

N8

R8

U8
K8

P8

V8
T8
L8
J8
U28A 3D3V_S0
25,28,30 PCI_AD[31..0]
PCI_AD0 G2 L13

VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
PCI_AD1 AD0 USBVDD
J4 AD1 USBVDD A22 1 2
4 PCI_AD2 J3 B22 4
PCI_AD3 AD2 USBVDD GAP-CLOSE-PWR
H3 AD3 USBVDD C22

1
PCI_AD4 F1 D22
PCI_AD5 AD4 USBVDD C242 C241 C224
G1 AD5 USBVDD E22
RP6 PCI_AD6 H4 F22 DY-SCD1U SC4D7U10V5ZY SCD1U

2
INT_PIRQA# 1 PCI_AD7 AD6 USBVDD
10 3D3V_S0 F2 AD7 USBVDD J13
INT_PIRQB# 2 9 INT_PIRQE# PCI_AD8 E1 J14
INT_PIRQC# 3 INT_PIRQF# PCI_AD9 AD8 USBVDD
8 G3 AD9 USBVDD J15
INT_PIRQD# 4 7 INT_PIRQG# PCI_AD10 E3 J16
INT_PIRQH# PCI_AD11 AD10 USBVDD
3D3V_S0 5 6 D1 AD11 USBVDD J17
PCI_AD12 G4 J18
PCI_AD13 AD12 USBVDD 2D5V_S0
SRP4K7 D2
PCI_AD14 AD13
D3
RP7 PCI_AD15 F3
AD14 SC
PCI_REQ#0 PCI_AD16 AD15 C691 SCD01U50V3KX 2D5V_S0
1 10 3D3V_S0 K3 AD16
PCI_REQ#1 2 9 PCI_REQ#4 3D3V_S0 PCI_AD17 L3 C24 1 2
PCI_REQ#2 PCI_REQ#5 PCI_AD18 AD17 USBSUS25
3 8 K2 L14
PCI_REQ#3 PCI_GNT#0 PCI_AD19 AD18 USBVCCA
4 7 RN110 K1 1 2
PCI_GNT#1 PCI_AD20 AD19
3D3V_S0 5 6 1 8 M4 AD20 PLLVDDA A23

1
PCI_GNT#3 2 7 PCI_AD21 L2 B23 GAP-CLOSE-PWR
SRP4K7 PCI_GNT#4 3
PCI_GNT#5 4
6
5
PCI_AD22
PCI_AD23
N4
L1
AD21
AD22
PCI USB PLLVDDA
D23
C243
DY-SCD1U
C244
SC4D7U10V5ZY

2
PCI_AD24 AD23 PLLGNDA
RP9 M2 C23
PCI_GNT#2 1 PCI_AD25 AD24 PLLGNDA
10 3D3V_S0 DY-SRN4K7-1-U M1
P CI_IRDY# 2 PCI_STOP# PCI_AD26 AD25 USB_PP0 3D3V_S0
9 ZZ.47235.08A P4 E20
PCI_TRDY# 3 8 PCI_FRAME# SB PCI_AD27 N3
AD26 USBP0+
D20 USB_PN0
USB_PP0 24
RP8
PCI_SERR# AD27 USBP0- USB_PN0 24
PCI_DEVSEL#4 7 PCI_AD28 N2 A20 USB_PP1 USB_OC#0 1 10
PCI_PERR# AD28 USBP1+ USB_PP1 24 USB_OC#6
5 6 PCI_AD29 N1 B20 USB_PN1 USB_OC#1 2 9
3D3V_S0 AD29 USBP1- USB_PN1 24
PCI_AD30 P1 E18 USB_PP2 USB_OC#2 3 8 USB_OC#7
AD30 USBP2+ USB_PP2 24
3 SRP4K7 PCI_AD31 P2 D18 USB_PN2 USB_OC#3 4 7 USB_OC#4 3
AD31 USBP2- USB_PN2 24
A18 USB_PP3 5 6 USB_OC#5
25,28,30 PCI_CBE#[3..0] USBP3+ USB_PP3 24
PCI_CBE#0 E2 B18 USB_PN3
CBE0 USBP3- USB_PN3 24
3D3V_S0 PCI_CBE#1 C1 D16 USB_PP4 SRP4K7
CBE1 USBP4+ USB_PP4 24
PCI_CBE#2 L4 E16 USB_PN4 3D3V_S0
CBE2 USBP4- USB_PN4 24 3D3V_S5
ALL_PWROK 1 5 PCI_CBE#3 M3 A16 USB_PP5
6,12,21,39 ALL_PWROK A VCC CBE3 USBP5+
B16 USB_PN5
SB_PCIRST# USBP5-
1 2 SB_PCIRST#2 2 B 25,28,30 PCI_FRAME#
PCI_FRAME# J1
FRAME NC D14 RN26
PCI_DEVSEL#H2 E14 SB_KA20GATE 1 8
25,28,30 PCI_DEVSEL# DEVSEL NC
R404 33R3 3 4 P CI_IRDY# J2 A14 MSCK 2 7
GND Y 25,28,30 PCI_IRDY# IRDY NC
PCI_TRDY# H1 B14 MSDATA 3 6
U25
25,28,30 PCI_TRDY#
PCI_STOP# K4 TRDY NC SB SB_KBRCIN# 4 5
SB
25,28,30 PCI_STOP# STOP
NC7SZ08-U PCI_SERR# C2
25,28,30 PCI_SERR# SERR
R167 PCI_PAR F4 C26 USB_OC#0 SRN4K7-1-U
25,28,30 PCI_PAR PCI_PERR# C3 PAR USBOC0
10KR3 D24 USB_OC#1
25,28,30 PCI_PERR# PERR USBOC1
1 2 For S3~ S5, when system power off SB_PCIRST# R1 B26 USB_OC#2
PCIRST USBOC2 USB_OC#3
C25 RN16
INT_PIRQA# USBOC3 USB_OC#4 USB_PN4
12,16 INT_PIRQA# A4 INTA INT_PIRQA# AGP USBOC4 B24 1 8
INT_PIRQB# B4 A24 USB_OC#5 USB_PP4 2 7
R405
25 INT_PIRQB# INT_PIRQC# INTB INT_PIRQB# CARBUS 1 USBOC5 USB_OC#6 USB_PP5
25 INT_PIRQC# B5 A26 3 6
33R3 INT_PIRQD# C4
INTC INT_PIRQC# CARBUS 2 NC
A25 USB_OC#7 USB_PN5 4 5
25 INT_PIRQD# INTD NC
PCIRST#_2 1 2 PCIRST#_1 INT_PIRQE# D4 INT_PIRQD# 1394
INT_PIRQF# INTE
30 INT_PIRQF# E4 INT_PIRQF# MINI PCI E23 CLK48_USB 3 SRN15K-1
3D3V_S5 R533 4K7R3 INT_PIRQG# INTF USBCLK
28 INT_PIRQG# A3 INTG INT_PIRQG# GIGA LAN
1 2 INT_PIRQH# B3 B25 1 2
5V_S0 RSTDRV#_5 23 INTH USB REXT R177 6K04R3F SB
14

PCI_REQ#0 A5 D26
30 PCI_REQ#0 REQ0 NC
3

PCI_REQ#1 B6 D25
25 PCI_REQ#1 PCI_REQ#2 REQ1 NC
5 6 PCIRST_1 1 Q50 C5
2 PDTC144EU 28 PCI_REQ#2 REQ2 2
PCI_REQ#3 D5
PCI_REQ#4 REQ3 SB_KA20GATE
P3 W3
SC
2

U23C PCI_REQ#5 REQ4 KBCK/KA20G SB_KBRCIN#


R3 V1
7

TSLCX14-U REQ5 KBDT/KBRC MSCK


W1

3D3V_S5
30 PCI_GNT#0
25 PCI_GNT#1
28 PCI_GNT#2
PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
A6
D6
C6
GNT0
GNT1
GNT2
KBC MSCK/IRQ1
MSDT/IRQ12 W2 MSDATA

U97
PCI_GNT#3 E5
PCI_GNT#4 GNT3 KA20GATE SB_KA20GATE
U23D
14

R4 1 6
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
GNT4 33 KA20GATE
PCI_GNT#5 R2
SB GNT5
2 5
GND
GND
GND
GND
GND
GND
GND
GND
GND

5V_S0 5V_S0
9 8 PRST_BUF# 1 2 PCIRST_BUF# 14,16,33,35,36 SB_KBRCIN# 3 4 KBRCIN#
KBRCIN# 33
R155 VT8235-CE
A1
A2
B1
B2
E8
F25
H23
J21
J25

A13
A15
A17
A19
A21
B13
B15
B17
B19
B21
C13
C14
C15
C16
C17
C18
C19
C20
C21
D13
D15
D17
D19
D21
E13
E15
E17
E19
E21
H13
H14
H15
H16
H17
H18
TSLCX14-U 10R3
7

63.10034.151 2N7002DW
SB SB
3D3V_S5
3D3V_S5
14

U89
11 10 PRST_BUF#1 1 2 1 5
PCIRST_BUF#1 25,27,28,30 2D5V_S0 16,33,38,39,43,44 PM_SLP_S3# OE VCC
2 R479 10R3
20 PM_SUSCLK A
R157 3 4 G791_32K_R 1 2
GND Y G791_32K 22
U23E 33R3 R480 240KR3
7

TSLCX14-U NC7SZ126-U 1 2
1
R92 1
4K7R3
3D3V_S5

Wistron Corporation
2

RST_CPU#
14

RST_CPU# 6
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
3

R501 1KR3 Taipei Hsien 221, Taiwan, R.O.C.


13 12 PRST_NB# 1 2 PCIRST_1 1 2 PCIRST_2 1 Q10
RST_NB# 12
Title
R156 MMBT3904-U1
SB-VT8235CE(1/3)_PCI_USB
2

U23F 33R3
SB
7

TSLCX14-U Size Document Number Rev


Close to CPU A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 19 of 50
A B C D E
A B C D E

23 PIDE_D[15..0] 3D3V_S0
RN28
PIDE_D14 1 8 PD14 3D3V_S5
2 7 PDACK#
23 PIDE_DACK# 2D5V_S0 3D3V_S5
3 6 PIOR# 2D5V_S5 3D3V_S5 RN52
23 PIDE_IOR#
4 5 PDA_1 P_SERIRQ 1 8 PWROK_NB# 1 R223 2 10KR3
23 PIDE_A1
SRN33-1 6509_T8 R481 1 2 100KR3 TEST_OUTPUT 2 7 RN24
RN27 SPKR_SB 3 6 SB_BATLOW# 1 8
PIDE_D4 1 8 PD4 SOE# 4 5 PME#_SB 2 7
PIDE_D3 2 7 PD3 PM_SUS_STAT#3 6

M18

AA4
AB4
AB5
AB6
N18

R18

U18
P18

V10
V11
V12
V13
V14
V15
V16
V17
V18
T18
L18
J10
J11
J12

M9

N9

R9

U9

U4
PIDE_D2 PD2 BLINK_LED# 4

K9

P9

V9
T9

T4
SRN4K7-1-U

L9
J9
3 6 5
4 5 PIOW# U28B PDCS1# 1 R451 2 4K7R3
23 PIDE_IOW#
SRN33-1 PD0 AA22 SRN10K-2

VSUS33
VSUS33
VSUS33
VSUS33

VSUS25
VSUS25
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
PD1 PDD0 PDACK#
RN57 Y24 PDD1 1 R201 2 4K7R3 PM_SUSCLK 1 R482 2 10KR3
4 PIDE_D7 1 8 PD7 PD2 AA26 4
PIDE_D8 PD8 PD3 PDD2 SXI
2 7 AA25 PDD3 1 R224 2 4K7R3 SMBALT# 1 R222 2 10KR3
PIDE_D10 3 6 PD10 PD4 AB26 T1
PDD4 ACBITCLK AC97_BITCLK_SB 31 RI#_SB
PIDE_D5 4 5 PD5 PD5 AC26 U3 AC97_DIN0 1 R195 2 4K7R3
PDD5 ACSDIN0 AC97_DIN0 31
SRN33-1 PD6 AC23 V2 AC97_DIN1
PDD6 ACSDIN1 AC97_DIN1 24
RN108 PD7 AD25 U1 AC97_DIN2 SDCS1# 1 R495 2 4K7R3
PIDE_D12 PD12 PD8 PDD7 ACSDIN2
1 8 AD26 V3 RN25
PIDE_D9 2 7 PD9 PD9 AC24
PDD8 AC97 ACSDIN3/SLP_BTN
T2 A C_SYNC 1 8 1 R496 2 DY-4K7R3 PM_THRM# 1 R449 2 4K7R3
PDD9 ACSYNC AC97_SYNC 24,31
PIDE_D6 3 6 PD6 PD10 AC25 U2 AC_SDOUT 2 7
PDD10 ACSDO AC97_DOUT 24,31
4 5 IRQ14R PD11 AB24 T3 AC_RESET# 3 6
23 PIDE_IRQ14 PDD11 ACRST AC97_RST# 24,31
SRN33-1 PD12 AB23 4 5 RN49
PD13 PDD12 GPO1
RN103 AA24 1 8
1 8 P DRDY PD14 Y26
PDD13
W4 PME#_SB SRN33-1 SC GPI1 2 7
23 PIDE_IORDY PDD14 PME SB_BATLOW# PME#_SB 25,28,30
2 7 PDA_2 PD15 AA23 V4 SMBCK2 3 6
23 PIDE_A2 PDD15 BATLOW
3 6 PDREQ Y1 CPUMISS SMBDT2 4 5
23 PIDE_DREQ CPUMISS RI#_SB
PIDE_D1 4 5 PD1 PDREQ Y23 Y2
SRN33-1 PDACK# V24 PDDREQ RING PM_SUS_STAT#
Y3 PM_SUS_STAT# 12,16,33 SRN4K7-1-U
PIOR# PDDACK SUSST1 PM_THRM#
RN109 W26 Y4 PM_THRM# 22
PIDE_D15 PD15 PIOW# PDIOR AOLGP/THRM ECSMI#
1 8 Y25 AA1 ECSMI# 33 RN48
PIDE_D13 PD13 P DRDY Y22 PDIOW EXTSMI SMBALT# ECSWI#
2 7 PDRDY SMBALRT AB1 1 8
PIDE_D0 3 6 PD0 PDCS1# V22 AC1 ECSCI# ECSCI# 2 7
PDCS1 LID PM_PWRBTN# ECSCI# 33 ECSMI#
PIDE_D11 4 5 PD11 PDCS3# V23 AD2 3 6
SRN33-1 PDA_0 W23 PDCS3 IDE PWRBTN
AF1 PWROK_NB#
PM_PWRBTN# 38 CPUMISS 4 5
PDA_1 PDA0 PWROK PM_CLKRUN#
RN102 V25 AB7
1 8 PDCS1# PDA_2 W24 PDA1 PMU CLKRUN
AC7 SB_GPO5 PM_CLKRUN# 25,28,30,36
SRN4K7-1-U
23 PIDE_CS#0 PDA2 CPUSTP SB_GPO5 16
2 7 PDA_0 IRQ14R AD24 AD6
23 PIDE_A0 IRQ14 PCISTP
3 6 PDCS3# RN51
23 PIDE_CS#1 6509_T8 AC97_DIN1
4 5 SD0 AC20 AE1 1 8
SDD0/TBC1 INTRUDER 6509_T8 22 AC97_DIN2
SRN33-1 SD1 AB20 2 7
3 SD2 SDD1/VALID PM_SUSCLK PM_CLKRUN# 3
AC21 SDD2 SUSCLK AB3 PM_SUSCLK 19 3 6
SD3 AE18 TEST_VT8235 4 5
23 SIDE_D[15..0] SDD3/RXD2
RN104 SD4 AF18 AC4 SMBCK
SDD4/RXD3 SMBCK1 SMBCK 21
SIDE_D6 1 8 SD6 SD5 AD18 AB2 SMBDT SRN4K7-1-U
SDD5/RXD4 SMBDT1 SMBDT 21
SIDE_D1 2 7 SD1 SD6 AD19
SIDE_D5 SD5 SD7 SDD6/RBC0 SMBCK2
3 6 AF19 SDD7/RBC1 SMBCK2 AC3
23 SIDE_DREQ 4 5 SDDREQ SD8 AE20 SDD8/RXD5 SMBDT2 AD1 SMBDT2
SRN33-1 SD9 AF20
SD10 SDD9/RXD6
RN53 AD20 AA2
S DRDY SD11 SDD10/RXD7 SUSA SUSB#
23 SIDE_IORDY 1 8 AE21 SDD11/RXD8 SUSB AD3 SUSB# 39
SIDE_D3 2 7 SD3 SD12 AF21 AF2 SUSC#
SDD12/RXD9 SUSC SUSC# 39 21,39 2D5V_S5 2D5V_S5
SIDE_D4 3 6 SD4 SD13 AD21
SIDE_D7 SD7 SD14 SDD13/TXD0 ECSWI#
4 5 AD22 SDD14/TXD1 GPI0 AE2 ECSWI# 33 6,12,14,15,16,19,21,38,39,50 2D5V_S0 2D5V_S0
SRN33-1 SD15 AF22 AC2 GPI1
SDD15/TXD2 GPI1
RN54 AA3 BLINK_LED# 18 13,18,19,21,22,24,28,29,33,38,43,49,50 3D3V_S5 3D3V_S5
SIDE_D8 SD8 SDDREQAD17 GPO0 GPO1
1 8 SDDRQ/RXD1 NC AE3
SIDE_D9 2 7 SD9 SDACK# AD23 AE5 GPIOA
SDDACK/TBC0 SA17 16,17,18,19,21,22,23,24,27,30,31,32,33,34,37,38,39,41,42,47,48,49,50 5V_S0 5V_S0
SIDE_D11 3 6 SD11 SIOR# AF23 AD5 GPIOB
SIDE_D12 SD12 SIOW# AE23 SDIOR/TXD4 SA18 GPIOC
4 5 SDIOW/TXD3 SA16 AF5 3,6,8,11,12,13,14,15,16,17,18,19,21,24,25,26,27,28,30,31,32,33,34,35,36,38,41,47,49,50 3D3V_S0 3D3V_S0
SRN33-1 S DRDY AF17 AC6 GPIOD
SDCS1# AF25 SDRDY/RXD0 SA19
RN55
SIDE_D15 1 8 SD15 SDCS3# AF26 SDCS1/TXD8
SDCS3/TXD9 SERIRQ AD9 P_SERIRQ
P_SERIRQ 25,33,36
Power Up Strappings
2 7 SIOW# SDA_0 AF24 AF8 SPKR_SB
23 SIDE_IOW# SIOR# SDA0/TXD6 SPKR SPKR_SB 31
3 6 SDA_1 AC22 AB8 SIO_OSC GPIO[A,C]==>LDT Frequency
23 SIDE_IOR#
4 5 SDA_2 SDA_2 AE24 SDA1/TXD5 Hardware Trap OSC SIO_OSC 3
00--> 200MHz (Default)
23 SIDE_A2 SDA2/TXD7 TEST_OUTPUT
SRN33-1 IRQ15R AE26 AF9
IRQ15 TPO TEST_VT8235
RN105
TEST AE9 GPIOB==>LDT Width
SIDE_D13 1 8 SD13 AC19 0--> 8 Bit (Default)
SIDE_D2 SD2 NC
2 7 NC AC10
2 SIDE_D10 SD10 2
3 6 AB21 NC
SDA2==>ROMSIP Select
SIDE_D0 4 5 SD0 AB10 PDA2==>ROMSIP Select [for VT8237]
SRN33-1 NC
AB13 NC 0--> Disable (default)
RN56 AC13 AD11
SDCS1# NC NC
23 SIDE_CS#0 1 8
2 7 SDCS3# AF13 AE10 SOE# SDCS3#==> Test Mode Select
23 SIDE_CS#1 SDACK# NC SOE
23 SIDE_DACK# 3 6 AE13 RN50 PDCS3#==> Test Mode Select
IRQ15R NC SXI GPIOA
23 SIDE_IRQ15 4 5 ROMCS AF10 1 8 0--> Disable (Default)
SRN33-1 AB15 GPIOC 2 7
NC GPIOB
RN106 AC15 AE11 3 6
SDA_0 NC NC GPIOD
23 SIDE_A0 1 8 4 5 SDCS1#==>Internal EEPROM Strapping
2 7 SDA_1 AF15 AF11 1--> Enable External EEPROM (Default)
23 SIDE_A1 NC NC
SIDE_D14 3 6 SD14 AE15 SRN4K7-1-U
NC
4 5 GND W5 SXI==>Int. Keyboard controller
SRN33-1 W12 V5 RN107 1--> Enable (Default)
5V_S0 NC GND SDCS3#
W13 NC GND M16 1 8
W14 NC GND N11 2 7 GPIOD==>Transmit PLL Skew Control 1 [0]
PIDE_IRQ14 R488 1 2 4K7R3 W15 N12 SDA_0 3 6
NC GND SDA0==>Transmit PLL Skew Control 2 [0]
W16 N13 SDA_1 4 5
SIDE_IRQ15 R226 1 NC GND PDA0==>Transmit PLL Skew Control 2 [0]
2 4K7R3 GND N14
AC17 N15 SRN4K7-1-U
PD7 R227 1 NC GND
2 10KR3 AC11 NC GND N16 SDA1==>External loop test mode [0]
AB17 NC PDA1==>External loop test mode [for VT8237]
SD7 R225 1 2 10KR3 AB11
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

NC 3D3V_S0 0--> Disable (default)


NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

NC
NC
NC
NC

PIDE_DREQ R450 1 2 5K6R3 R502


DY-4K7R3 SOE#==>Auto Reboot
AB14
AC14
AD12
AD13
AD14
AD15
AD16
AE12
AE14
AE16
AF12
AF14
AF16

AC16
AC12
AB16
AB12

F6
F7
J5
K5
P5
R5
L11
L12
L13
L14
L15
L16
M11
M12
M13
M14
M15
K18

SIDE_DREQ R487 1 2 5K6R3 1 2 1--> Disable (Default)


1 1
SDA_2 1 2
3D3V_S5
VT8235-CE R503
2D5V_S0 4K7R3 Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1

Taipei Hsien 221, Taiwan, R.O.C.


C741 C740
1

SC1U10V3ZY SCD1U Title


SB
2

C717 C744
SC1U10V3ZY DY-SCD1U VT8235-IDE_AC97_PMU
2

Size Document Number Rev


A3 SC
Modify-0602 EGRET
Date: Friday, July 23, 2004 Sheet 20 of 50
A B C D E
A B C D E

2D5V_S0 3D3V_S5
38,39,43,44,45,46,48,49 5V_S5 5V_S5

16,17,18,19,20,22,23,24,27,30,31,32,33,34,37,38,39,41,42,47,48,49,50 5V_S0 5V_S0


2D5V_S0 2D5V_S5 3D3V_S5
1

1
C745 C718
20,39 2D5V_S5 2D5V_S5
C713 C749 C720 C721 C716 C714
SC1U10V3ZY SC1U10V3ZY SCD1U SCD1U SCD01U50V3KX SCD01U50V3KX SCD1U SCD1U
6,12,14,15,16,19,20,38,39,50 2D5V_S0 2D5V_S0
2

2
M21
M22
M23
M24
M25

M19
N21
N22
N23
N24
N25
N26

N19

D12
3,6,8,11,12,13,14,15,16,17,18,19,20,24,25,26,27,28,30,31,32,33,34,35,36,38,41,47,49,50 3D3V_S0 3D3V_S0

K21

P22
P23
P24
P25
P26

P19

E12

E10
E11
L23

L21

L19

D9
E9
U28C
12 VLAD[7..0] VLAD0 13,18,19,20,22,24,28,29,33,38,43,49,50 3D3V_S5 3D3V_S5
H25

VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK

MIISUS25
MIISUS25

MIIVCC
MIIVCC
MIIVCC
MIIVCC
VLAD1 VD0
Layout trace 20 mil G26 VD1 MCRS A11 LAN_MCRS 29 19,22,34,38,39,45,46,49 +5V_AUX_S5 +5V_AUX_S5
4 2D5V_S0 VLAD2 K26 B11 4
VD2 MCOL LAN_MCOL 29
VLAD3 J23 R168 DY-33R3
VLAD4 VD3 LAN_R_MTXENA
F26 C11 1 2
SC VLAD5 G25
VD4 MTXENA
A10 LAN_R_TXD0
LAN_MTXENA 29
VD5 MTXD0
1

1
VLAD6 K22 B10 LAN_R_TXD1 LAN_R_TXD2 1 8
VD6 MTXD1 LAN_TXD2 29
R424 C719 VLAD7 K24 B9 LAN_R_TXD2 LAN_R_TXD3 2 7
SCD1U VD7 MTXD2 LAN_TXD3 29
3K6R3D E24 A9 LAN_R_TXD3 LAN_R_TXD1 3 6 LAN_TXD1 29
2

64.36016.651 NC MTXD3 LAN_R_TXD0


G23 NC MTXCLK C10 LAN_TXCLK 29 4 5 LAN_TXD0 29
L26
2

LVREFSB NC RN15 DY-SRN33-1


L25 NC MRXER D10 LAN_RXER 29
E26 NC MRXCLK C9 LAN_RXCLK 29
1

E25 NC MRXDV D8 LAN_RXDV 29


1

R425 L24 C8
NC MRXD0 LAN_RXD0 29
442R3F C722 M26 B8
SCD1U NC
MII MRXD1
A8
LAN_RXD1 29
LAN_RXD2 29
2

MRXD2
12 VBE# G24 C7 LAN_RXD3 29
2

VBE MRXD3
UPCMD K23 A7 R169 DY-10KR3
12 UPCMD UPCMD MDCK LAN_MDCK 29
D NCMD K25 B7 LAN_MTXENA 1 2
The voltage level of
VL_VREF is 0.3V +- 5%
8X
12 DNCMD

12 UPSTB J26
DNCMD

UPSTB
V-LINK MDIO

NC D7
LAN_MDIO 29

mode 12 UPSTB# J24 UPSTB


Cross SB as short as possible D11 EECS# 05/11
EECS EEDO
12 DNSTB H26 DNSTB EEDO B12 For VIA suggest.
H24 A12 EEDI
12 DNSTB# DNSTB EEDI LAN_MTXENA Pull-down with
C12 EECK
EECK 10K ohm resistor
LPAR F24 E7 2D5VSBRAM
12 LPAR VPAR RAMVCC
3 LVREFSB H22 3D3V_S0 3
VLREF
E6 U24
R423 1 RAMGND
2 360R3F VCOMPP J22 EECS# 1 8
2D5V_S5 CLK66_VCLK
VCOMPP
FERR U24 FERR#
A20M#
1 R452 2 680R3
TP16
2D5V_S0
EECK
EEDI
2
CS
SK
VCC
DC 7
3 CLK66_VCLK L22 VCLK A20M U26 3 DI ORG 6
U73 2D5V_S5 T24 IGNNE# TP67 EEDO 4 5
5V_S5 IGNNE INT# TP20 DO GND
INIT R26
2 F23 T25 INTR TP17 VIEW VIA note AN311 DY-M93C46-W-3
VOUT NC INTR NMI TP18
3 VIN NMI T26
1 G22 U25 SMI# TP19
GND NC SMI STPCLK# TP68 R200
R24
33,35,36 LPC_LAD[0..3] HOST STPCLK
SLP V26 LDTSTP# 1 2 680R3 2D5V_S0
2D5VSBRAM 1 2 2D5V_S0
1

APL5308-25AC-TR LPC_LAD0 AD8 R22 GHI R406


LAD0 GHI

1
C240 C690 LPC_LAD1 AF7 P21 DPSLP 2R3F
SCD1U I max = 300 mA SC10U10V5ZY LPC_LAD2 LAD1 DPSLP C689
AE7
LPC
2

LPC_LAD3 LAD2 SC1U10V3ZY


AD7 AC9

2
LAD3 NC VIDSEL
VIDSEL AC8
VRDSLP
By KDS suggested change VRDSLP AB9
AD10 SB_GPI6
AGPBZ/GPI6 SB_GPI6 16
From 12P to 10P 33,35,36 LPC_LFRAME# AF6 LFRM
3D3V_S0
AE6
SC 36 LDRQ#0_SIO
AE8
LREQ0 PICD0 R196 1 2 330R3
NC PICD1 R454
PCICLK R23 CLK33_SB 3 1 2 330R3
78.10034.1B1
C775 SC10P SB_PWROK AC5 U23
PWRGD APICCLK APICCLKSB 3
2 1 GHI R453 1 2 4K7R3
RSMRST# AD4 R25 PICD0 SC DPSLP R426 1 2 4K7R3
22 RSMRST# RSMRST APICD0/APICCS SB_GPI6
T23 PICD1 2D5V_S0 R486 1 2 4K7R3
APICD1/APICACK
2

L28
2 X8 R483 VBAT 2D5SBPLL 2
AF4 VBAT PLLVCC T22 1 2

1
20MR3 Layout trace 20 mil
X-32D768KHZ-12-U RTC1 AE4 U22 GAP-CLOSE-PWR
3

RTCX1 PLLGND C750 VIDSEL R484 1 2 4K7R3


2

2
2 1 RTC2 AF3 SC1U10V3ZY VRDSLP R485 1 2 4K7R3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
C774 SC10P RTCX2
78.10034.1B1
05/10
SC
P11
P12
P13
P14
P15
P16
R11
R12
R13
R14
R15
R16
R21
T11
T12
T13
T14
T15
T16
W22
W25
AA21
AB19
AB22
AB25
AC18
AE17
AE19
AE22
AE25
AA9
AB18
T21
AA10
K19
+5V_AUX_S5 VT8235-CE For VIA suggest.
ALL_PWROK SB_PWROK SB Pin AC8, AB9 Pull-down
6,12,19,39 ALL_PWROK 1 2
1

R528 with 4.7K ohm resistor


1

R141 2K2R3
4K7R3 C811 5V_S0
63.47234.151 SC1U10V3ZY When
2

2D5V_S0
For K8N800 v.CD:
2

3D4V_AUX_S5 K8T800Pro : Remove


Not stuff R197 K8N800 : Install resistance
1

U21 VBAT U88 Stuff R198

1
R140 BAT54C-L
1

10KR3 SMBC_SB 1 6 SMBCK For K8N800 v.CE: R199


3,8 SMBC_SB SMBCK 20 680R3
63.10334.151
3
SB VBAT 2 5 Stuff R197
2

Not stuff R198

2
SMBDT 3 4 SMBD_SB Reference VIA note AN311
20 SMBDT SMBD_SB 3,8
1

C208 1 2
6 HTT_CPU_STOP# LDTRST# 11
2

SCD1U R197 DY-0R3-U


C188 2N7002DW
By Mechanism requset CN9 P/N:
2

1 1
Main 20.D0012.103 LDTSTP#
BAT_1

1 2 LDTSTP# 11
R198 0R3-U
SC DY-SC4D7U10V5ZY Second 20.D0122.103
ZZ.47593.411
3D3V_S0 3D3V_S5 SC Wistron Corporation
R142 CN9 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1 2 BAT_CON 1 RN46 RN47 When Taipei Hsien 221, Taiwan, R.O.C.
SMBC_SB 2 3 SMBCK 1 4
2 SMBD_SB 1 4 SMBDT 2 3 K8T800Pro : Install resistance Title
1KR3 3
K8N800 : Remove SB-VT8235(3/3)_VLINK_MII_LPC
CON3-4 SRN10KJ SRN10KJ
20.D0012.103 Size Document Number Rev
A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 21 of 50
A B C D E
FAN1_VCC
16,17,18,19,20,21,23,24,27,30,31,32,33,34,37,38,39,41,42,47,48,49,50 5V_S0 5V_S0

*Layout* 15 mil G791 Thermal sensor & Fan controller 16,18,38,41,43,44,45,46,47,50 DCBATOUT DCBATOUT

SB 3,6,8,11,12,13,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,35,36,38,41,47,49,50 3D3V_S0 3D3V_S0

1
C496 5V_S0
C102 D4 C495
SC10U10V5ZY SC2200P50V3JX 13,18,19,20,21,24,28,29,33,38,43,49,50 3D3V_S5 3D3V_S5
SCD1U

1
*Layout* 15 mil 21,38,39,43,44,45,46,48,49 5V_S5 5V_S5
S1N4148-U R504 FAN1 IS THE MAIN FAN

1
10KR3 FAN1_VCC FAN1
SB
1 By ME requset FAN1 P/N:
SB

2
5V_S0 2
FAN2_VCC FAN1_FB
3 Main 20.D0012.103

1
*Layout* 15 mil C498 CON3-4 Second 20.D0122.103

1
20.D0012.103
SC1000P50V3KX R505 FAN2

2
1

1
C465 78.10224.2B1 10KR3 6
C62 D3 C464
DY-SCD1U DY-SC10U10V5ZY DY-SC2200P50V3JX 4
2

2
ZZ.10492.4B1 ZZ.10693.411 +5V_AUX_S5 FAN2_FB 3
DY-S1N4148-U FAN2_VCC 2
SB

1
ZZ.04148.011 C466 1

1
*Layout* 30 mil FAN2 IS THE SECOUND FAN
R41 SC1000P50V3KX 5

2
5V_S0 DY-10KR3 78.10224.2B1
5V_S0 U9 *Layout* 15 mil
DY-MOLEX-CON4
R71
ZZ.D0012.104 SB

2
1 2 5V_G791_S0 6 1
VCC FAN1
20 DVCC FAN2 19
1

1
200R3 C497 R70 4 7
SCD1U 4K99R3F C463 C61 C103 17
FG1 DXP1
9 THERMDP2 SC
2

FG2 DXP2

3
SCD1U SCD1U 11 THERMDP3

2
DXP3

3
SC4D7U10V5ZY PR_HW_SDN# 13 C529 1 Q28
THERM#

1
ALERT# 15 C64 C63 C212 1 Q12
2

SMBD_KBC ALERT# DY-MMBT3904-U1


33,48 SMBD_KBC 16 8

2
SMBC_KBC SDA SGND1 THERMDN2
33,48 SMBC_KBC 18 10

2
SCL SGND2 THERMDN3
19 G791_32K 14 CLK SGND3 12
Setting T8 as V_DEGREE 3 MMBT3904-U1
G791_RST# THERM_SET G7 SC470P50V3JN DY-SC470P50V3JN
1 2 2 5
39 RUNPWROK RESET# DGND SC
1

2
100 Degree

GAP-CLOSE

GAP-CLOSE
1 0R3-U
R69 R68 SC2200P50V3JX
DY-49K9R3F R3064K7R3 G10
G791SFX THERMDP 6
V_DEGREE 10KR3

1
=(((Degree-72)*0.02)+0.34)*VCC
2

1
DXP1:108 Degree C104
2

SC2200P50V3JX
DXP2:H/W Setting

2
Place near chip as close THERMDN 6
HW thermal shut down tempature DXP3:88 Degree
SC as possible
setting 95 degree . Put Near CPU .

ALERT# 1 2 PM_THRM# 20
R40 DY-0R3-U

Dummy when G791 enhanced T8 function


T8_RSET:27K SET TO 80°C
3D3V_S5 T8_RSET:20K SET TO 90°C By Sourcer requset:
T8_RSET:15K SET TO 100°C
2

D7
Main souce 74.00709.07F
3 BAT54C-L
+5V_AUX_S5 Second souce
U55
74.00710.03P
1

3D3V_S5 3D3V_S5
T8_SET 1 6
74.06509.07F
1

SET VCC
U23A U23B
14

14

2 GND OUTSET 5
R154 3 OUT# HYST 4 74.06510.A7P

1
100KR3 C800
2

DRSMRST# 1 2 PM_RSMRST 3 4 SC4D7U10V5ZY


RSMRST# 21
R320 G710TBU
1

20KR3F 74.00709.07F
C222 TSLCX14-U TSLCX14-U
SB
7

2
SCD1U
2

Put under CPU Socket


SC
PR_HW_SDN# 2 1 6509_T8 20
D37
S1N4148-U
PR_HW_SDN# 38

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
G791
Size Document Number Rev
Custom SC
EGRET
Date: Friday, July 23, 2004 Sheet 22 of 50
A B C D E

16,17,18,19,20,21,22,24,27,30,31,32,33,34,37,38,39,41,42,47,48,49,50 5V_S0 5V_S0

4 CDROM 4

HDD

IDE1
20 SIDE_D[15..0]
51
HDD1 2 1
31 CD_AUDR CD_AUDL 31
20 PIDE_D[15..0] 47 4 3 CD_AGND 31
45
SIDE_D8 6 5 RSTDRV#_5
44 43 SIDE_D9 8 7 SIDE_D7
19 RSTDRV#_5 PIDE_D7 PIDE_D8 SIDE_D10 SIDE_D6
42 41 10 9
PIDE_D6 40 39 PIDE_D9 SIDE_D11 12 11 SIDE_D5
PIDE_D5 38 37 PIDE_D10 SIDE_D12 14 13 SIDE_D4
PIDE_D4 36 35 PIDE_D11 SIDE_D13 16 15 SIDE_D3
PIDE_D3 34 33 PIDE_D12 SIDE_D14 18 17 SIDE_D2
PIDE_D2 32 31 PIDE_D13 SIDE_D15 20 19 SIDE_D1
PIDE_D1 30 29 PIDE_D14 22 21 SIDE_D0
20 SIDE_DREQ
3 PIDE_D0 28 27 PIDE_D15 24 23 3
20 SIDE_IOR#
26 25 26 25 SIDE_IOW# 20
20 PIDE_DREQ 24 23 20 SIDE_DACK# 28 27 SIDE_IORDY 20
22 21 TP13 TPAD30 BAY_ID0 30 29
20 PIDE_IOW# SIDE_IRQ15 20
20 19 TP14 TPAD30 BAY_ID1 32 31
20 PIDE_IOR# SIDE_A1 20
20 PIDE_IORDY 18 17 20 SIDE_A2 34 33 SIDE_A0 20
20 PIDE_DACK# 16 15 20 SIDE_CS#1 36 35 SIDE_CS#0 20
20 PIDE_IRQ14 14 13 38 37 CDROM_LED#_5 18
20 PIDE_A1 12 11 40 39 1 2
10 9 42 41 R428 4K7R3
20 PIDE_A0 PIDE_A2 20 5V_S0 5V_S0
20 PIDE_CS#0 8 7 PIDE_CS#1 20 44 43
18 HDD_LED#_5 6 5 46 45
4 3 48 47 CSEL
5V_S0 5V_S0 SC
2

1
DASP# 50 49
1

2
2 1 C723 C692 C724 52
R437 C731 C699 C246 TC19 D30 SC10U10V6ZY-U SCD1U SCD1U

2
4K7R3 SCD1U 46 SCD1U SPD-CONN50-4R4U2
2

B240LA 20.80163.050
48
1

5V_S0 SC10U10V6ZY-U DY-ST47U6D3V-U1 PIN 49,50 DON'T USE


1
5V_S0
SPD-CONN44D-6 PWR TRACE 100mil
20.F0385.A44

1
R427
SC 4K7R3

By ME requset change P/N:

2
5V_S0 SIDE_IORDY
2 from 20.F0385.044 2

to 20.F0385.A44
1

R170
4K7R3
2

PIDE_IORDY

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
HDD / CDROM
Size Document Number Rev
A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 23 of 50
A B C D E
10 0 mil
5V_S0 10 0 mil
USB PORT USB_0-
5V_USB0_S0

CN4
19 USB_PN0
5V_USB1_S0 5
SC 1
1 2

2
USB_0- 2

1
F2 7
MINISMDC150 TC1 C21 C20 USB_0+ 3
SCD1U SC1000P50V3KX

2
78.10224.2B1 TR1 4
L-63UH 6
SE100U10VM 68.03216.20B

3
79.10710.401 68
SKT-USB-19-U1
USB_0+ 22.10218.F51
19 USB_PP0
USB_1-
19 USB_PN1
5V_USB0_S0
10 0 mil
10 0 mil

2
5V_S0
5V_USB0_S0 CN3
SC 5
1 2 1
TR2
1

1
F3 L-63UH USB_1- 2
MINISMDC150 TC2 C22 C23 68.03216.20B 7

3
SCD1U SC1000P50V3KX USB_1+ 3
2

2
78.10224.2B1
USB_1+ 4
19 USB_PP1
SE100U10VM 6
79.10710.401

5
6
7
8
RN68 SKT-USB-19-U1
22.10218.F51
SRN15K-1

4
3
2
1
5V_USB1_S0

CN2
5
1

3D3V_S0 SC USB_2- 2
7
USB_2+ 3
U39C
14

Q30 4
BTH_IN 9 3 6
36 BTH_IN R1 BT_LED# 34
8 BT_LED 1
BT_PWR_ON 10 2
R2 SKT-USB-19-U1
TSLCX08-U 22.10218.F51
7

PDTC124EU

USB_2- 5V_USB1_S0
19 USB_PN2

CN1

2
5
1
3D3V_S5
USB_3- 2
TR3 7
1

L-63UH USB_3+ 3
R341 68.03216.20B

3
10KR3 4
6
USB_2+
MDC CONN 19 USB_PP2
2

Q31 USB_3- SKT-USB-19-U1


19 USB_PN3
3 22.10218.F51
R1 1 BT_PWR_ON SB
31 AUD_MDC_OUT BT_PWR_ON 36
CN12
35

2
R2
R95 31 32
PDTC124EU
By Sourcer requset change P/N:
1 2 AUD_MDCOUT 1 2
SB From 22.10218.701
BT_DETACH 36
3 4 TR4
5 6 BL_ON# SB L-63UH To 22.10218.F51
DUMMY-R3 7 8 68.03216.20B
SC

3
9
11
10
12
By ME requset P/N:
USB_PP4 19 USB_3+
13 14 USB_PN4 19 19 USB_PP3 Main 22.10218.F51
15 16
3D3V_LAN_S5 17 18 BT_WAKEUP 36 Second 22.10218.F41

5
6
7
8
19 20
21 22 RN69
AC_DIN1A_R AC97_SYNC 20,31
20,31 AC97_DOUT 23 24 1 2 AC97_DIN1 20 SRN15K-1
25 26 AC_DIN1B_R 1 2 R342 33R3
20,31 AC97_RST#
27 28
SC4D7U10V5ZY

29 30 R344
AC97_BITCLK 31
4
3
2
1
C146

DUMMY-R3
33 34
1

AMP-CONN30A-1
36

20.F0099.030 R343
100KR3 C584 Wistron Corporation
SC22P 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2

Taipei Hsien 221, Taiwan, R.O.C.


16,17,18,19,20,21,22,23,27,30,31,32,33,34,37,38,39,41,42,47,48,49,50 5V_S0 5V_S0
2

Title
13,18,19,20,21,22,28,29,33,38,43,49,50 3D3V_S5 3D3V_S5
By ME requset CN12 P/N: USB and MDC
28,29 3D3V_LAN_S5 3D3V_LAN_S5
Main 20.F0099.030 Size
A3
Document Number Rev

Second 20.F0589.030 3,6,8,11,12,13,14,15,16,17,18,19,20,21,25,26,27,28,30,31,32,33,34,35,36,38,41,47,49,50 3D3V_S0 3D3V_S0 EGRET SC


Date: Friday, July 23, 2004 Sheet 24 of 50
A B C D E
3D3V_S0
U58B
A_CAD[31..0] 27 B_CAD[31..0] 27
A_CC/BE#[3..0] 27 B_CC/BE#[3..0] 27
V1 VCCP
19,28,30 PCI_AD[31..0] W8 VCCP
PCI_AD31 T2 P2 2 1
AD31 SUSPEND# 3D3V_S0 VCC_ASKT_S0 VCC_BSKT_S0
PCI_AD30 P5 R336 10KR3
PCI_AD29 AD30
U1 AD29 U58D
PCI_AD28 U2 M1 U58C 1 2 1 2
AD28 DATA CB_DATA 27
PCI_AD27 T3 L5
AD27 CLOCK CB_CLOCK 27
PCI_AD26 P6 M2 INTA# CARBUS 1 A4 C551 D19 C549
AD26 LATCH CB_LATCH 27 VCCA VCCB
PCI_AD25 V2 INTB# CARBUS 2 A10 SCD01U50V3KX K19 SCD01U50V3KX
PCI_AD24 AD25 VCCA VCCB
U3 1 2
4 PCI_AD23 W3
AD24 R324 47KR3 INTC# 1394 E3 A_CAD31 E13 B_CAD31 4
PCI_AD22 AD23 INTD# NO USE A_CAD31/A_D10 A_CAD30 B_CAD31/B_D10 B_CAD30
U4 AD22 SPKROUT L7 CB_SPKR 31 A_CAD30/A_D9 D1 B_CAD30/B_D9 A16
PCI_AD21 R6 D2 A_CAD29 E14 B_CAD29
PCI_AD20 AD21 A_CAD29/A_D1 A_CAD28 B_CAD29/B_D1 B_CAD28
V4 AD20 A_CAD28/A_D8 D3 B_CAD28/B_D8 B16
PCI_AD19 W4 M3 INTA# E5 A_CAD27 A17 B_CAD27
AD19 MFUNC0 INT_PIRQB# 19 A_CAD27/A_D0 B_CAD27/B_D0
PCI_AD18 U5 L6 INTB# B3 A_CAD26 F14 B_CAD26
AD18 MFUNC1 INT_PIRQC# 19 A_CAD26/A_A0 B_CAD26/B_A0
PCI_AD17 N7 N1 INTC# A3 A_CAD25 D17 B_CAD25
AD17 MFUNC2 INT_PIRQD# 19 A_CAD25/A_A1 B_CAD25/B_A1
PCI_AD16 V5 N2 E6 A_CAD24 C19 B_CAD24
AD16 MFUNC3 P_SERIRQ 20,33,36 A_CAD24/A_A2 B_CAD24/B_A2
PCI_AD15 W7 N3 INTD# C5 A_CAD23 F15 B_CAD23
PCI_AD14 AD15 MFUNC4 CB_MFUNC5 R93 A_CAD23/A_A3 B_CAD23/B_A3
U8 AD14 MFUNC5 M5 1 2 4K7R3 3D3V_S0 A_CAD22/A_A4 B5 A_CAD22
B_CAD22/B_A4 E18 B_CAD22
PCI_AD13 V8 P1 A5 A_CAD21 G15 B_CAD21
AD13 MFUNC6 PM_CLKRUN# 20,28,30,36 A_CAD21/A_A5 B_CAD21/B_A5
PCI_AD12 N10 B6 A_CAD20 F17 B_CAD20
PCI_AD11 AD12 A_CAD20/A_A6 A_CAD19 B_CAD20/B_A6 B_CAD19
R9 AD11 A_CAD19/A_A25 A6 B_CAD19/B_A25 H14
PCI_AD10 V9 C7 A_CAD18 F19 B_CAD18
PCI_AD9 AD10 A_CAD18/A_A7 A_CAD17 B_CAD18/B_A7 B_CAD17
W9 AD9 A_CAD17/A_A24 B7 B_CAD17/B_A24 H15
PCI_AD8 V10 L2 B10 A_CAD16 K18 B_CAD16
AD8 CLK_48 CLK48_CARDBUS 3 A_CAD16/A_A17 B_CAD16/B_A17
PCI_AD7 W10 G10 A_CAD15 K13 B_CAD15
PCI_AD6 AD7 A_CAD15/A_IOWR# A_CAD14 B_CAD15/B_IOWR# B_CAD14
R10 AD6 A_CAD14/A_A9 F10 B_CAD14/B_A9 K14
PCI_AD5 W11 C11 A_CAD13 L17 B_CAD13
PCI_AD4 AD5 A_CAD13/A_IORD# A_CAD12 B_CAD13/B_IORD# B_CAD12
V11 AD4 A_CAD12/A_A11 B11 B_CAD12/B_A11 L18
PCI_AD3 U11 A11 A_CAD11 L19 B_CAD11
PCI_AD2 AD3 A_CAD11/A_OE# A_CAD10 B_CAD11/B_OE# B_CAD10
N11 AD2 A_CAD10/A_CE2# E11 B_CAD10/B_CE2# L15
PCI_AD1 R11 C12 A_CAD9 M18 B_CAD9
PCI_AD0 AD1 A_CAD9/A_A10 A_CAD8 B_CAD9/B_A10 B_CAD8
W12 AD0 A_CAD8/A_D15 A12 B_CAD8/B_D15 M19
E12 A_CAD7 L13 B_CAD7
19,28,30 PCI_CBE#[3..0] A_CAD7/A_D7 B_CAD7/B_D7
PCI_CBE#3 W2 B13 A_CAD6 N17 B_CAD6
PCI_CBE#2 R7 C/BE3# A_CAD6/A_D13 A_CAD5 B_CAD6/B_D13 B_CAD5
C/BE2# A_CAD5/A_D6 C13 B_CAD5/B_D6 N18
PCI_CBE#1 P9 B14 A_CAD4 M14 B_CAD4
PCI_CBE#0 U10 C/BE1# A_CAD4/A_D12 A_CAD3 B_CAD4/B_D12 B_CAD3
C/BE0# A_CAD3/A_D5 A14 B_CAD3/B_D5 M15
3 C14 A_CAD2 P18 B_CAD2 3
SB N9
A_CAD2/A_D11
F12 A_CAD1 B_CAD2/B_D11
P19 B_CAD1
19,28,30 PCI_PAR PAR A_CAD1/A_D4 B_CAD1/B_D4
A15 A_CAD0 P17 B_CAD0
U58E A_CAD0/A_D3 B_CAD0/B_D3
19,28,30 PCI_FRAME# W5 FRAME#
V6 B4 A_CC/BE#3 D18 B_CC/BE#3
19,28,30 PCI_TRDY# TRDY# A_CC/BE3#/A_REG# B_CC/BE3#/B_REG#
U6 K7 A7 A_CC/BE#2 G17 B_CC/BE#2
19,28,30 PCI_IRDY# IRDY# SCL A_CC/BE2#/A_A12 B_CC/BE2#/B_A12
W6 C10 A_CC/BE#1 K17 B_CC/BE#1
19,28,30 PCI_STOP# STOP# A_CC/BE1#/A_A8 B_CC/BE1#/B_A8
R8 B12 A_CC/BE#0 M17 B_CC/BE#0
19,28,30 PCI_DEVSEL# DEVSEL# A_CAUDIO/A_BVD2(SPKR#) B_CC/BE0#/B_CE1#
PCI_AD22 1 2 7411_IDSEL V3
R355 100R3 IDSEL
SDA L3 A_CPAR/A_A13 A9 A_CPAR 27 B_CPAR/B_A13 J18 B_CPAR 27
19,28,30 PCI_PERR# U7 PERR#
19,28,30 PCI_SERR# V7 SERR# B_CFRAME#/B_A23 G18 B_CFRAME# 27
E8 H13
SB T1
PCI7420GHK-U A_CFRAME#/A_A23
C8
A_CFRAME# 27 B_CTRDY#/B_A22
G19
B_CTRDY# 27
19 PCI_REQ#1 REQ# A_CTRDY#/A_A22 A_CTRDY# 27 B_CIRDY#/B_A15 B_CIRDY# 27
19 PCI_GNT#1 R2 GNT# A_CIRDY#/A_A15 F9 A_CIRDY# 27 B_CSTOP#/B_A20 J15 B_CSTOP# 27
A_CSTOP#/A_A20 G9 A_CSTOP# 27 B_SDEVSL#/B_A21 H18 B_CDEVSEL# 27
3 CLK33_CARDBUS R1 PCLK U58F A_CDEVSL#/A_A21 A8 A_CDEVSEL# 27 B_CBLOCK#/B_A19 J17 B_CBLOCK# 27
19,27,28,30 PCIRST_BUF#1 P3 PRST# A_CBLOCK#/A_A19 B9 A_CBLOCK# 27
N5 GRST# B_CPERR#/B_A14 J13 B_CPERR# 27
M12 NC RSVD H5 A_CPERR#/A_A14 C9 A_CPERR# 27 B_CSERR#/B_WAIT# B18 B_CSERR# 27
N13 NC RSVD J5 A_CSERR#/A_WAIT# B2 A_CSERR# 27
1 2 CBUS_PME# R3 R14 J6 E17
20,28,30 PME#_SB RI_OUT#/PME# NC RSVD B_CREQ#/B_INPACK# B_CREQ# 27
R357 U16 K1 F6 H19
NC RSVD A_CREQ#/A_INPACK# A_CREQ# 27 B_CGNT#/B_WE# B_CGNT# 27
DY-0R3-U P14 K2 E9
NC RSVD A_CGNT#/A_WE# A_CGNT# 27
PCI7420GHK-U P15 NC RSVD K3 B_CSTSCHG/B_BVD1(STSCHG#/R1#) A18 B_CSTSCHG 27
R19 C3 B17
SC TEST0 A_CSTSCHG/A_BVD1/(STSCHG#/R1#)
C2
A_CSTSCHG 27 B_CCLKRUN#(B_WP/IOIS16#)
H17
B_CCLKRUN# 27
A_CCLKRUN#/A_WP/(IOIS16#) A_CCLKRUN# 27 B_CCLK/B_A16 B_CCLK 27
A_CCLK/A_A16 B8 A_CCLK 27
3D3V_S0 B19
2 U58A PCI7420GHK-U B_CINT#/B_READY/(IREQ#) B_CINT# 27 2
A_CINT#/A_READY/(IREQ#) A2 A_CINT# 27
B_CRST#/B_RESET E19 B_CRST# 27
G7 VCC A_CRST#/A_RESET C6 A_CRST# 27
G8 VCC B_CAUDIO/B_BVD2/(SPKR#) C17 B_CAUDIO 27
G11 VCC A_CAUDIO/A_DVD2/SPKR# B1 A_CAUDIO 27
G12 VCC B_CCD1#/B_CD1# N15 B_CCD1# 27
G13 VCC A_CCD1#/A_CD1# B15 A_CCD1# 27 B_CCD2#/B_CD2# C16 B_CCD2# 27
H10 VCC A_CCD2#/A_CD2# C1 A_CCD2# 27 B_CVS1/B_VS1# C18 B_CVS1 27
H12 VCC A_CVS1/A_VS1# C4 A_CVS1 27 B_CVS2/B_VS2# F18 B_CVS2 27
J8 VCC A_CVS2/A_VS2# E7 A_CVS2 27
K8 3D3V_S0 N19
VCC B_RSVD/B_D14 B_RSVD_D14 27
K12 VCC A_RSVD/A_D14 A13 A_RSVD_D14 27 B_RSVD/B_D2 C15 B_RSVD_D2 27
M7 VCC A_RSVD/A_D2 F5 A_RSVD_D2 27 B_RSVD/B_A18 K15 B_RSVD_A18 27
M11 VCC A_RSVD/A_A18 E10 A_RSVD_A18 27
M13 K5 VR_PORT1
VCC VR_PORT
1

N8 J19 VR_PORT2 PCI7420GHK-U


VCC VR_PORT R335 PCI7420GHK-U
U9 DY-0R3-U
GND from spec :
M10 GND
M9 this pin is
3,6,8,11,12,13,14,15,16,17,18,19,20,21,24,26,27,28,30,31,32,33,34,35,36,38,41,47,49,50 3D3V_S0 3D3V_S0
2

GND VR_EN# active low


M8 GND VR_EN# L1
L12 GND 27 VCC_ASKT_S0 VCC_ASKT_S0
1

L11 GND
L10 C581 C552 R333
GND 27 VCC_BSKT_S0 VCC_BSKT_S0
L9 SCD1U SCD1U
2

GND GAP-CLOSE
L8 GND
K11
SC
2

GND
K10 GND
1 K9 GND 1
J12 GND
J11 GND
J10
J9
GND
GND
Wistron Corporation
H11 Place it near to chip 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
GND Taipei Hsien 221, Taiwan, R.O.C.
H9 GND
H8 GND Title

PCI7420GHK-U
TI_PCI7420(1 of 2)
Size Document Number Rev
A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 25 of 50
A B C D E
A B C D E

3,6,8,11,12,13,14,15,16,17,18,19,20,21,24,25,27,28,30,31,32,33,34,35,36,38,41,47,49,50 3D3V_S0 3D3V_S0

SC
U58G 3D3V_PLL_S0

AVD2 R12
U15 R350
AVD3 GAP-CLOSE-PWR U58H
AVD4 V17
4 U19 VDPLL 1 2 4
VDPLL 1394_R01
R0 W15 2 F3 MC_PWR_CTRL_1
R353 6K34R3
V15 1394_R1 F2
R1 MS_BS
TPBIAS0 U14 1394_TPBIAS0 27 MS_DATA1 G2
MS_SDIO(DATA0) G1
TPA0+ V14 1394_TPA0P 27 MS_DATA2 G3
TPA0- W14 1394_TPA0N 27 MC_CD_1# E1
MS_DATA3 H7
TPB0+ V13 1394_TPB0P 27 MS_CLK G5
TPB0- W13 1394_TPB0N 27
R351
R17 1394_PHYTEST 1 2 4K7R3 PCI7420GHK-U
PHY_TEST_MA

FILTER0 U17
C635
1 2
SCD1U
7420 SPEC
FILTER1 U18 Description
CPS P12 3D3V_S0 U58I

CNA R18 1394_CNA R332 1 2 4K7R3


C582 F1
1394_XO MC_PWR_CTRL_0
XO T19 1 2 SD_DAT3 J2
SD_CMD H2
2

SC15P
X7 78.15034.1B1 SC H1
1394_XI X-24D576MHZ-13 SD_CLK
XI T18
82.30023.181 H3
1

SD_DAT0
PC0 N12 1 2 SD_DAT2 J1
3 U12 J7 3
PC1 C631 SD_DAT1
PC2 V12 MC_CD_0# E2 Bypass/Decupoling Capacitors
SC15P
78.15034.1B1 Should be places as close to
VSPLL T17
U13
By KDS suggested change SD_WP J3
AGN2
AGN3 R13 X7 PCI7420 as possible
AGN4 W17 PCI7420GHK-U
From 82.30023.161
TPBIAS1 V19 1394_TPBIAS1 To 82.30023.181 3D3V_S0

C582, C631
1

TPA1+ V18
C634
TPA1- W18 From 78.10034.1B1

1
SCD1U C161
2

TPB1+ V16 To 78.15034.1B1 SC1000P50V3KX


C159
SCD1U
C160
SCD1U
W16

2
TPB1- 78.10224.2B1

3D3V_S0
PCI7420GHK-U

1
C637
C636 C553
SC1000P50V3KX SCD1U SCD1U

2
78.10224.2B1
2 2

SC
3D3V_S0 R352 3D3V_PLL_S0
GAP-CLOSE-PWR
1 2

1
C665 C633
C632
SC10U10V5ZY SC1000P50V3KX SC1U10V3ZY

2
78.10224.2B1

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
TI_PCI7420(2 of 2)
Size Document Number Rev
A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 26 of 50
A B C D E
A B C D E

1 76 UPPER SIGNAL A
LOWER SIGNAL B
SIGNAL B SIGNAL A
1394 Connector **
SC SB
LOWER UPPER
Upper = Slot0 / Signal A = Conn B
4 Lower = Slot1 / Signal B = Conn A 4

75 150 TR5
SIGNALB SIGNALA 26 1394_TPA0P
ACM201290029T
1 4 SKT2
26 1394_TPA0N 6
TPA0+ 4
A_CAD[31..0] 25
2 3 TPA0- 3
A_CC/BE#[3..0] 25

151
SKT1 1 4 TPB0+ 2
B_CAD[31..0] 25 26 1394_TPB0P
B_CC/BE#[3..0] 25
MH1 TPB0- 1
1 76 26 1394_TPB0N 2 3 5

1
2 77 TR6 MLX-CONN4A-R-U
3 78 R183 R182 R185 R184 ACM201290029T 20.90036.001
25 B_CCD2# A_CCD2# 25
4 79 56R3F 56R3F 56R3F 56R3F
25 B_CCLKRUN# A_CCLKRUN# 25
B_CAD31 5 80 A_CAD31
6 81
SC
25 B_RSVD_D2 A_RSVD_D2 25 SB

2
B_CAD30 7 82 A_CAD30 1394_TPBIBS
26 1394_TPBIAS0
B_CAD29 A_CAD29
8 83 By ME requset SKT2 P/N:

1
9 84

1
B_CAD28
B_CAD27
10 85 A_CAD28
A_CAD27 C279
C280
SC220P
R188
4K99R3F
Main 20.90036.001
11 86

2
25 B_CSTSCHG 12 87 A_CSTSCHG 25
SC1U10V3ZY 64.49915.651 Second 22.10245.141

2
B_CAD26 13 88 A_CAD26

2
25 B_CAUDIO 14 89 A_CAUDIO 25
B_CAD25 15 90 A_CAD25
3 B_CC/BE#3 16 91 A_CC/BE#3 SB 3
17 92
B_CAD24 18 93 A_CAD24
19 94
Close to the cardbus Controller.
25 B_CREQ# A_CREQ# 25
B_CAD23 20 95 A_CAD23
25 B_CSERR# 21 96 A_CSERR# 25
B_CAD22 22 97 A_CAD22
25 B_CRST#
B_CAD21
23
24
25
26
98
99
100
101
A_CAD21
A_CRST# 25
Power switch 3,6,8,11,12,13,14,15,16,17,18,19,20,21,24,25,26,28,30,31,32,33,34,35,36,38,41,47,49,50 3D3V_S0

16,17,18,19,20,21,22,23,24,30,31,32,33,34,37,38,39,41,42,47,48,49,50 5V_S0
3D3V_S0

5V_S0
25 B_CVS2 A_CVS2 25
B_CAD20 27 102 A_CAD20
25 VCC_ASKT_S0 VCC_ASKT_S0
B_CAD19 28 103 A_CAD19
B_CAD18 29 104 A_CAD18
25 VCC_BSKT_S0 VCC_BSKT_S0
B_CAD17 30 105 A_CAD17
B_CC/BE#2 31 106 A_CC/BE#2
25 B_CFRAME# 32 107 A_CFRAME# 25
33 108
25 B_CIRDY# 34 109 A_CIRDY# 25
35 110 A_CTRDY# 25 U3
25 B_CTRDY# VCC_ASKT_S0
25 B_CCLK 36 111 A_CCLK 25
VPP_BSKT_S0 37 112 VPP_ASKT_S0 25 CB_DATA 3 DATA AVCC 9
38 113 4 10 VCC_BSKT_S0
25 CB_CLOCK CLOCK AVCC
VCC_BSKT_S0 39 114 VCC_ASKT_S0 25 CB_LATCH 5 LATCH BVCC 17
25 B_CINT# 40 115 A_CINT# 25 19,25,28,30 PCIRST_BUF#1 12 RESET# BVCC 18
25 B_CDEVSEL# 41 116 A_CDEVSEL# 25 5V_S0 1 2 21 SHDN#
42 117 3D3V_S0 R22
25 B_CGNT# A_CGNT# 25
43 118 10KR3 8
AVPP VPP_ASKT_S0
25 B_CSTOP# 44 119 A_CSTOP# 25 13 3.3V BVPP 19 VPP_BSKT_S0
2 2
25 B_CPERR# 45 120 A_CPERR# 25 14 3.3V
25 B_CBLOCK# 46 121 5V_S0
A_CBLOCK# 25

1
25 B_CPAR 47 122 A_CPAR 25 OC# 15
48 123 C50 C54 1
25 B_RSVD_A18 A_RSVD_A18 25 5V
B_CC/BE#1 49 124 A_CC/BE#1 SCD1U DY-SC4D7U10V5ZY 2

2
B_CAD16 A_CAD16 5V
50 125 24 5V NC 23
51 126 NC 22

1
B_CAD14 52 127 A_CAD14 16
B_CAD15 A_CAD15 C47 C18 NC
53 128 7 12V+ NC 6
B_CAD12 54 129 A_CAD12 DY-SCD1U SC1U10V3ZY 20

2
B_CAD13 A_CAD13 12V+
55 130
B_CAD11 56 131 A_CAD11 11 GND
25 B_CVS1 57 132 A_CVS1 25 25 GND
B_CAD9 58 133 A_CAD9
59 134 TPS2224APWP VCC_ASKT_S0 VPP_ASKT_S0
B_CAD10 60 135 A_CAD10
B_CC/BE#0 61 136 A_CC/BE#0
B_CAD8 62 137 A_CAD8

1
B_CAD7 63 138 A_CAD7
64 139 C45 C46 C48
25 B_RSVD_D14 A_RSVD_D14 25
B_CAD5 65 140 A_CAD5 SC10U10V5ZY SCD1U SCD1U

2
B_CAD6 66 141 A_CAD6
67 142
B_CAD3 68 143 A_CAD3 VCC_BSKT_S0 VPP_BSKT_S0
B_CAD4 69 144 A_CAD4
B_CAD1 70 145 A_CAD1
B_CAD2 71 146 A_CAD2 1

1
B_CAD0 72 147 A_CAD0
73 148 C53 C52 C51
1 25 B_CCD1# A_CCD1# 25 1
74 149 SC10U10V5ZY SCD1U SCD1U
2

2
75 150 STK1
MH2 1 2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
152

FOX-CONN150-1 4 Taipei Hsien 221, Taiwan, R.O.C.


20.F0349.150 3
Title
CARDBUS-SKT28-U2
AUD_AGND 21.I0027.001 PCMCA SLOT_1394 CONN
Size Document Number Rev
A3 SC
SB EGRET
Date: Friday, July 23, 2004 Sheet 27 of 50
A B C D E
A B C D E

3D3V_S0
TGP0 TGP1 TGP2 TGP3
CLOSE TO
LAN CHIP 19,25,30 PCI_AD[31..0] 3,6,8,11,12,13,14,15,16,17,18,19,20,21,24,25,26,27,30,31,32,33,34,35,36,38,41,47,49,50 3D3V_S0
TGN0 TGN1 TGN2 TGN3
19,25,30 PCI_CBE#[3..0] SC 3D3V_LAN_S5

24,29 3D3V_LAN_S5

1
100M_LED#
100M_LED# 29
D40
R51 R50 R53 R52 R55 R54 R57 R56 LAN_X2
RTL_LED1# 1 6 C73

2
SC27P

2
4 49D9R3F 49D9R3F 49D9R3F U52 X1 4
MID0X MID1X MID2X MID3X 49D9R3F 2 5 1G_LED# 3 X-25MHZ-11-U
49D9R3F 49D9R3F 49D9R3F 49D9R3F BAT54C-L

1
1

1
LAN_X1
C113 C114 C116 C115 RTL_LED2# 3 4 C112

1
SCD01U50V3KX SCD01U50V3KX SCD01U50V3KX SCD01U50V3KX SC27P
2

2
RB731U 10M_LED# 3D3V_LAN_S5
10M_LED# 29
U51
LAN_EECS_3 1 8
CS VCC

1
LAN_EESK 2 7
LAN_EEDI SK DC C503
3D3V_LAN_S5 1 2 3 DI ORG 6
LAN_EEDO 4 5 SCD1U

2
R315 DO GND
LAVDDH 3K6R3D M93C46-W-3
ACT_LED#
ACT_LED# 29
LAN_X1 LDVDD
RTL_LED1#
LAN_X2 RTL_LED2# SC
1G_LED# SC
CTRL18 LAN_EESK
LDVDD
LDVDD_A LAN_EEDI 45 Ohm,
LAN_EEDO
R300 2D49KR3 3D3V_LAN_S5 3D3V_LAN_S5 600mA LAVDDH
1 2 LAN_EECS_3
3D3V_LAN_S5 SC
RSET PCI_AD0 1 2

SC10U10V5ZY
3 PCI_AD1 L3 3
0R3-U

1
C506 C546 C486 C550 C547 C79 C504 C78
128
127

126

125

124

123

122

121

120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103

C543
U53
RTL8110SBL SCD1U SCD1U SCD1U SCD1U SCD1U

2
SCD1U SCD1U SCD1U
VSS

VSS

VSS

EESK

EEDI

EECS
LANWAKE
RSET

VSSPST
AVDD18

CTRL18

XTAL2

XTAL1

LED0
VDD18
LED1
LED2
LED3

VDD18

EEDO
VDD33

PCIAD0
PCIAD1
AVDDH

GND

GND
TGP0 1 102 PCI_AD2
29 TGP0 MDI0+ PCIAD2
29 TGN0 TGN0 2 101
LAVDDL MDI0- VSSPST 3D3V_LAN_S5
3 AVDDL GND 100
4 99 LDVDD RTL8110S 1D8V
TGP1 VSS VDD18 PCI_AD3
29 TGP1 5 98
MDI1+ PCIAD3 RTL8110SB(L) 1D2V

3
TGN1 6 97 PCI_AD4
29 TGN1 MDI1- PCIAD4
LAVDDL 7 96 PCI_AD5 CTRL18 1 Q29 45 Ohm,
CTRL25 AVDDL PCIAD5 PCI_AD6
8 95
9
CTRL25 PCIAD6
94
BCP69T1-U LDVDD 600mA

2
LAVDDH VSS VDD33 PCI_AD7 LDVDD_A
10 AVDDH PCIAD7 93
11 92 PCI_CBE#0
LAVDDH HSDAC+ CBEB0
12 HSDAC- VSSPST 91 1 2

SC10U10V5ZY
13 90 PCI_AD8 L7
TGP2 VSS PCIAD8 PCI_AD9 0R3-U
29 TGP2 14 MDI2+ PCIAD9 89

1
TGN2 15 88 C545 C505 C510 C485 C488 C508 C507 C548 C481
29 TGN2 MDI2- M66EN

C544
LAVDDL 16 87 PCI_AD10
AVDDL PCIAD10 PCI_AD11 SCD1U SCD1U SCD1U SCD1U SCD1U
17 86

2
TGP3 VSS PCIAD11 PCI_AD12 SCD1U SCD1U SCD1U SCD1U
29 TGP3 18 MDI3+ PCIAD12 85
2 TGN3 2
29 TGN3 19 MDI3- VDD33 84
LAVDDL 20 83 PCI_AD13
AVDDL PCIAD13 PCI_AD14
3D3V_S0 1 2 21 VSSPST PCIAD14 82
R59 1KR3 22 81
ISOLATE# GND VSSPST
1 2 23 ISOLATE# GND 80
R58 15KR3 LDVDD 24 79 PCI_AD15 3D3V_LAN_S5
INT_PIRQG# VDD18 PCIAD15 LDVDD
19 INT_PIRQG# 25 INTA# VDD18 78
26 77 PCI_CBE#1
3D3V_LAN_S5 VDD33 CBEB1

3
27 76 PCI_PAR
19,25,27,30 PCIRST_BUF#1 CLK33_LAN PCIRST# PAR PCI_SERR# PCI_PAR 19,25,30
28 75 CTRL25 1 Q27
3 CLK33_LAN PCICLK SERR# PCI_SERR# 19,25,30
PCI_GNT#2 29 74
19 PCI_GNT#2 GNT# NC#74 BCP69T1-U
PCI_REQ#2 30 73
19 PCI_REQ#2

2
PME#_SB REQ# GND LAVDDL
20,25,30 PME#_SB 31 PME# NC#72 72
LDVDD 32 71
PCI_AD31 VDD18 VDD33 PCI_PERR#
33 PCIAD31 PERR# 70 PCI_PERR# 19,25,30

SC10U10V5ZY
PCI_AD30 34 69 PCI_STOP#
PCIAD30 STOP# PCI_DEVSEL# PCI_STOP# 19,25,30
35 GND DEVSEL# 68 PCI_DEVSEL# 19,25,30

1
PCI_AD29 36 67 PCI_TRDY# C484 C483 C75 C76
PCIAD29 TRDY# PCI_TRDY# 19,25,30

C77
PCI_AD28 37 66
PCIAD28 VSSPST PM_CLKRUN# SCD1U
38 65 PM_CLKRUN# 20,25,30,36

2
VSSPST CLKRUN# SCD1U SCD1U
PCIAD27
PCIAD26

PCIAD25
PCIAD24

PCIAD23

PCIAD22
PCIAD21

PCIAD20

PCIAD19

PCIAD18
PCIAD17
PCIAD16

FRAME#
VSSPST

SCD1U
CBEB3

CBEB2
VDD33

VDD18

VDD18

VDD33

VDD18
IRDY#
IDSEL

GND

GND

GND

CLK33_LAN
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
1

C487
SC10P
1 1
2

PCI_AD27 LDVDD
PCI_AD26 P CI_IRDY#
PCI_IRDY# 19,25,30
PCI_FRAME#
3D3V_LAN_S5 PCI_AD25 PCI_CBE#2
PCI_FRAME# 19,25,30
Wistron Corporation
PCI_AD24 PCI_AD16 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
PCI_CBE#3 PCI_AD17 Taipei Hsien 221, Taiwan, R.O.C.
LDVDD PCI_AD18
LAN_IDSEL G43 Title
R316 PCI_AD23 3D3V_LAN_S5
PCI_AD23 LAN_IDSEL PCI_AD19
1 2
PCI_AD22 LDVDD
3D3V_S5 1 2 3D3V_LAN_S5 LAN_RTL8110SBL
PCI_AD21 PCI_AD20 GAP-CLOSE-PWR Size Document Number Rev
SB 100R3 A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 28 of 50
A B C D E
A B C D E

Link: Green - 10Mbps/802.11b


Orange - 100Mbps/802.11a
Yellow - 1Gbps
SC 3D3V_LAN_S5 24,28 3D3V_LAN_S5 3D3V_LAN_S5
3D3V_LAN_S5R60 3D3V_TXRX_S5
Activity: Yellow GAP-CLOSE-PWR
1 2

1
JK1
SC

1
A3 100M_LED# C81 C88 C509
100M_LED# 28
A4 C82 C84 C118 DY-SCD1U DY-SCD1U DY-SCD1U
SC

2
MH1 R11 470R3 DY-SCD1U DY-SCD1U DY-SCD1U

2
A2 CONN_PWR 1 2 05/11
3D3V_LAN_S5
RJ45_8 RJ45-8 For VIA suggest.
4 RJ45-7 RJ45_7 A1 10M_LED# 4
10M_LED# 28 Pin20 100M_LED#
RJ45_6 RDN_RJ45-6 3D3V_LAN_S5
RJ45-5 RJ45_5
SC Pin21 10M_LED#
RJ45-4 3D3V_TXRX_S5 RN84
RDP_RJ45-3 RJ45_3
RJ45_4 By ME requset for LED3# 1 8
3D3V_LAN_S5 ACT_LED#
TDP_RJ45-1
RJ45_2 TDN_RJ45-2 10/100 LAN change P/N: 10M_LED#
2 7
RJ45_1 3 6
B2 CONN_PWR From 22.10177.601 100M_LED# 4 5
B1 ACT_LED#
ACT_LED# 28 To 22.10177.621
MH2 DY-SRN4K7-1-U

18

41
25
36
32

23
22
21
20
1

7
RING U54 05/11
RING RJ11_3
RJ11_4 By ME requset
For VIA suggest.

VDDRX
VDDTX

LED2/DUPLEX

LED0/LINK
VDD
VDD
VDDC
VDDOSC

VDDPLL

LED3/NWAYEN

LED1/SPD100
TIP
RJ11_2 TIP for GigaLAN JK1 P/N: Change from 2K26
RJ11_1
A5 Main 22.10177.601 VLAN_X1
ohm to 6K49 ohm
MH3 21 LAN_TXD2 13 40
SC Second 22.10245.771 21 LAN_TXD3 14
TXD2
TXD3
XI
XO 39 VLAN_X2
RJ45-44-U 11 31 LAN_REXT R72 1 2 DY-6K49R3F
21 LAN_TXD0 TXD0 REXT
22.10177.601 21 LAN_TXD1 12 24
R62 DY-33R3 TXD1 PD# PHYRST#
RST 42 1 2
21 LAN_RXCLK 1 2 L_RXCLK_R 4 RXC
C85 DY-SC1U10V3ZY
CN10 3 1 2
SB 21 LAN_RXDV RXDV
3

BLM18HG601SN1D 5 35 VLAN_TGP0 C83 DY-SC1U10V3ZY


21 LAN_RXER RXER TX+
L1 68.00084.341 2 L_TXCLK_R 9 VLAN_TGN0
1 TIP_MDC 1 2 TIP
By ME requset change P/N: 21 LAN_TXCLK 1
R73 DY-33R3 10
TXC TX- 34
27 VLAN_TGP1 05/11
21 LAN_MTXENA TXEN RX+
2 RING_MDC
L2
1 2 RING
BLM18HG601SN1D
From 20.D0121.102 8 TXER RX- 26 VLAN_TGN1 For VIA suggest.
21 LAN_MCOL 15 COL VT6103L need 2U
To 21.D0010.102

PHYAD1/RXD3
PHYAD2/RXD2
PHYAD3/RXD1
PHYAD4/RXD0
68.00084.341 16
21 LAN_MCRS CRS SB capacitor for PHYRST#

INT/PHYAD0
3 3
4

ETY-CON2-R

GNDOSC

GNDTXC
GNDPLL
21.D0010.102

GNDRX
GNDTX
GNDC
MDIO
TEST
U37

MDC

GND
GND
05/11
SC VLAN_TGP1 1 16 RDP_RJ45-3 For VIA suggest. 1
R164
2
RD RX 3D3V_S5
VLAN_TGN1 2 15 RDN_RJ45-6 DY-VT6103L

28
44
43
19

45
46
47
48

2
17
6
38
29
37
33
30
TCT3 RD RX MCT3 Place close to SB DY-1K5R3
3 CT CT 14
4 NC NC 13
5 NC NC 12
1 2 TCT4 6 11 MCT4 R166 1 2 DY-33R3 LAN_R_MDCK
3D3V_TXRX_S5 VLAN_TGP0 CT CT 21 LAN_MDCK
7 10 TDP_RJ45-1 R165 1 2 DY-33R3 LAN_R_MDIO
VLAN_TGN0 TD TX 21 LAN_MDIO
R285 8 9 TDN_RJ45-2 1 8 LAN_R_RXD3
TD TX 21 LAN_RXD3
DY-0R3-U 2 7 LAN_R_RXD2
21 LAN_RXD2
3 6 LAN_R_RXD1
21 LAN_RXD1
DY-XFORM-60-U1 4 5 LAN_R_RXD0
21 LAN_RXD0
ZZ.0H80P.301
Stuff for VT6103L RN3 DY-SRN33-1
10/100M Lan Transformer VLANRTG1R303 1 2 DY-49D9R3F
VLAN_TGN1
R302 2 DY-49D9R3F
VLAN_TGP1
By Sourcer requset change P/N: 1

1
VLAN_X2 1 2
From 68.H0013.301 C86 C489
SB

2
LAVDDL DY-SC6P50V3DN DY-SCD1U
SC

2
R286 0R3-U To 68.0H80P.301 X5 ZZ.6R064.1B1
1 2 TCT3 DY-X-25MHZ-11-U
ZZ.30020.421

1
R284 0R3-U VLAN_X1 1 2 VLANRTG0R305 1 2 DY-49D9R3F
VLAN_TGN0
1 2 TCT4 C87 R304 1 2 DY-49D9R3F
VLAN_TGP0
2 DY-SC6P50V3DN 2
By Sourcer requset change P/N:

1
ZZ.6R064.1B1
From 68.H5015.301 C490
DY-SCD1U
Stuff for RTL8110SBL

2
To 68.02402.30A 05/11
1.route on bottom as differential pairs. For VIA suggest.
GIGA Lan Transformer U38 2.Tx+/Tx- are pairs. Rx+/Rx- are pairs. Change from 18P to 22P
3.No vias, No 90 degree bends.
TGP3 RJ45-7
28 TGP3
TGN3
2
3
TD1+ MX1+ 23
22 RJ45-8 4.pairs must be equal lengths. By KDS suggested change
28 TGN3 TD1- MX1-
TGP2 RJ45-4
5.6mil trace width,12mil separation. X5
28 TGP2 5 20
TGN2 6
TD2+ MX2+
19 RJ45-5 6.36mil between pairs and any other trace. From 82.30020.161
28 TGN2 TD2- MX2-
7.Must not cross ground moat,except To 82.30023.421
TGP1 8 17 RDP_RJ45-3
28 TGP1
TGN1 9
TD3+ MX3+
16 RDN_RJ45-6 RJ-45 moat.
28 TGN1 TD3- MX3- C86, C87
TGP0 TDP_RJ45-1
28 TGP0
TGN0
11
12
TD4+ MX4+ 14
13 TDN_RJ45-2
From 22P To 6P
28 TGN0 TD4- MX4-
1 24 MCT1 RJ45-7
LAVDDL TCT1 MCT1 MCT2
4 21 RJ45-8
TCT3 TCT2 MCT2 MCT3 RJ45-4
7 TCT3 MCT3 18
TCT4 10 15 MCT4 RJ45-5
TCT4 MCT4
8
7
6
5

XFORM-114
8
7
6
5
SCD01U50V3KX

SCD01U50V3KX

SCD01U50V3KX

SCD01U50V3KX

1 68.02402.30A RN66 1
1

RN1
DY-SRN0-1-U
C459

C458

C457

C456

SRN75J
Wistron Corporation
2

1
2
3
4

C382 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


1
2
3
4

DY-SC1KP2KV Taipei Hsien 221, Taiwan, R.O.C.


LAN_TC_GND MCT1 MCT2
Title
For GigaLAN Cap. change C4 Stuff for VT6103L LAN_CONN&10/100LAN
1 2
to SCD01U50V3KX SC1000P50V3KX
Size
A3
Document Number Rev
SC
78.10324.2B1 78.10224.2B1 EGRET
Date: Friday, July 23, 2004 Sheet 29 of 50
A B C D E
A B C D E

3,6,8,11,12,13,14,15,16,17,18,19,20,21,24,25,26,27,28,31,32,33,34,35,36,38,41,47,49,50 3D3V_S0 3D3V_S0

MINI-PCI 16,17,18,19,20,21,22,23,24,27,31,32,33,34,37,38,39,41,42,47,48,49,50 5V_S0 5V_S0

4 4

3D3V_S0

19,25,28 PCI_AD[31..0]

1
19,25,28 PCI_CBE#[3..0]
C163 C585 C515 C492
DY-SC4D7U10V5ZY DY-SCD1U DY-SCD1U DY-SCD1U

2
CN11
125
5V_S0
TIP 1 2 RING

3 4
5 6
7 8
9 10 C90
TP52 TPAD30 80211_ACTIVE 11 12 DY-SC4D7U10V5ZY
H=Enable 13 14
L=Disable
36 WIRELESS_EN
15 16
SC
MINI_P_IRQF# 17 18 R345
19 20 MINI_P_IRQF# 1 2
3D3V_S0 INT_PIRQF# 19
21 22
3 23 24 GAP-CLOSE 3

3 CLK33_MINI 25 26 PCIRST_BUF#1 19,25,27,28


27 28
19 PCI_REQ#0 29 30 PCI_GNT#0 19
31 32
PCI_AD31 33 34 PME#_SB 20,25,28
PCI_AD29 35 36
37 38 PCI_AD30
PCI_AD27 39 40
PCI_AD25 41 42 PCI_AD28
43 44 PCI_AD26
PCI_CBE#3 45 46 PCI_AD24
PCI_AD23 47 48 MINI_IDSEL 1 2 PCI_AD21
49 50
3D3V_S0 PCI_AD21 51 52 PCI_AD22 R325
PCI_AD19 53 54 PCI_AD20 100R3
55 56 PCI_PAR 19,25,28
PCI_AD17 57 58 PCI_AD18
1

PCI_CBE#2 59 60 PCI_AD16
R74 61 62
10KR3 19,25,28 PCI_IRDY#
63 64 PCI_FRAME# 19,25,28
20,25,28,36 PM_CLKRUN# 65 66 PCI_TRDY# 19,25,28
19,25,28 PCI_SERR# 67 68 PCI_STOP# 19,25,28
2

69 70
19,25,28 PCI_PERR# 71 72 PCI_DEVSEL# 19,25,28
PCI_CBE#1 73 74
PCI_AD14 75 76 PCI_AD15
77 78 PCI_AD13
PCI_AD12 79 80 PCI_AD11
2 PCI_AD10 2
81 82
83 84 PCI_AD9
PCI_AD8 85 86 PCI_CBE#0
PCI_AD7 87 88
89 90 PCI_AD6
PCI_AD5 91 92 PCI_AD4
93 94 PCI_AD2
PCI_AD3 95 96 PCI_AD0
5V_S0 97 98 (VCC)
PCI_AD1 99 100
101 102
103 104 (M66EN)
105 106
107 108
109 110
111 112
113 114
115 116
117 118
119 120
121 122
123 124

126
RAM-124P
20.F0222.124

1 SC 1

By ME requset CN11 P/N:


Main 20.F0222.124 Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Second 62.10034.031 Taipei Hsien 221, Taiwan, R.O.C.

Title
MINI-PCI
Size Document Number Rev
A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 30 of 50
A B C D E
5 4 3 2 1

5V_AUDIO_S0
SB 3,6,8,11,12,13,14,15,16,17,18,19,20,21,24,25,26,27,28,30,32,33,34,35,36,38,41,47,49,50 3D3V_S0 3D3V_S0

16,17,18,19,20,21,22,23,24,27,30,32,33,34,37,38,39,41,42,47,48,49,50 5V_S0 5V_S0

1
R313 R314

1
1 2 AC97_BITCLK_ALL 1 2 C15 R10
20 AC97_BITCLK_SB SC22P
5V_S0 28K7R3F 5V_AUDIO_S0
47R3 3D3V_S0 DUMMY-R3

2
63.47034.151 U2 U36A

14
2
5 1 BITCLK_BUFF 1 5 5VA_SET
VCC A SHDN# SET
25 CB_SPKR 1

1
2 AC97_RST# 2 5V_AUDIO_S0 3 AUD_BEEP1
B GND R9
R312 20 SPKR_SB 2
D 1 2 4 3 3 4 10KR3F D
24 AC97_BITCLK

2
Y GND C17 IN OUT TSAHCT86

7
1
47R3 U50 SC1U10V3ZY MAX8863-S 5V_AUDIO_S0

2
1
63.47034.151 NC7SZ08-U C16
R298 SC10U10V6ZY-U AUD_AGND U36B

14
2
10KR3
4
AUD_AGND 5V_AUDIO_S0 6 AUD_SYS_BEEP
2 AUD_AGND 5

U36C TSAHCT86

14

7
9
8 AUD_BEEP2 AUD_AGND
SYS_SPKR 10
33 SYS_SPKR
TSAHCT86

7
AUD_AGND

3D3V_S0
5V_AUDIO_S0

1 2 AUD_AGND
1

C70 C69 C72


SCD1U SCD1U DY-SCD1U AUD_AGND C40
SCD1U
2

C C

R282 DY-0R3-U
1 2 SPDIF_OUT
32 SPDIF SB
2 1
R283
DY-1KR3 AUD_MDC_OUT 24
G72 G73
SB

1
ZZ.10234.151 C38 1 2 1 2
SC1000P50V3KX
C480 48 78.10224.2B1 GAP-CLOSE GAP-CLOSE
47
46
45
44
43
42
41
40
39
38
37

2
1 2 XTALIN_CODEC
AUD_AGND

HPP

MONO_OUT
S/PDIF_OUT

ID1
ID0

AVSS2

LNL/HP_OUT_L
AVDD2
EAPD

NC

LNL/HP_OUT_r
NC
2

SC12P AUD_AGND AUD_AGND


SC X6 AUD_LOR 32
G74 G75
By KDS suggested X-24D576MHZ-13 1 2 1 2
C479 82.30023.181 AUD_LOL 32
1

1
1 2 XTALOUT_CODEC 1 C39 C41 GAP-CLOSE GAP-CLOSE
DVDD1 SC1000P50V3KX SC1000P50V3KX
2 XTL_IN L_OUT_R 36
SC12P 3 35 78.10224.2B1 78.10224.2B1

2
XTL_OUT L_OUT_L AUD_AGND AUD_AGND
20,24 AC97_DOUT 4 DVSS1 NC 34
R49 33R3 5 33 AUD_AGND AUD_AGND
BITCLK_BUFF AC97_CBITCLK SDATA_OUT NC ADVRDA
1 2 6 BIT_CLK CAP2 32
R299 10KR3 7 31 VREFOUT2
DVSS2 NC ADAF2
2 1 8 SDATA_IN AFLT2 30
R48 22R3 9 29 ADAF1
AC97_DATIN DVDD2 AFLT1 VREFOUT1
20 AC97_DIN0 1 2 10 SYNC VREF_OUT 28
11 27 CODECVREF
RESET# VREF
20,24 AC97_SYNC 12 PC_BEEP AVSS1 26
B B
20,24 AC97_RST# AVDD1 25 5V_AUDIO_S0
LINE_IN_R
LINE_IN_L
VIDEO_R

CD_GND
VIDEO_L

DY-SC10U10V5ZY
AUD_SYS_BEEP 1 2 AUD_BEEP AUD_PC_BEEP
PHONE

1 2
AUX_R
AUX_L

SC10U10V5ZY

SC10U10V5ZY

SC10U10V5ZY
CD_R

SC270P50V3JN

SC270P50V3JN
CD_L

R47
MIC1
MIC2
1

1
4K7R3 C67 SCD1U
1

C34

DY-SCD1U
SCD1U

SCD1U

SCD1U
R46 C66 SCD1U
13
14
15
16
17
18
19
20
21
22
23
24

2
2K2R3 SC2200P50V3JX U47
2

C32

C68

C71

C35

C37

C36
C452

C453

C454

C455
VT1612A-U
2

AUD_AGND For VT1617A


AUD_AGND
SB AUD_AGND

G8 G9
1 2 1 2

GAP-CLOSE GAP-CLOSE
R295 75R3F C478 SC1U10V3ZY C449 SC1U10V3ZY
1 2 CDAUDL 1 2 CDAUD_L AUDLINR 1 2
23 CD_AUDL AUD_LINR 32
AUD_AGND AUD_AGND
R296 GAP-CLOSE-PWR C477 SC1U10V3ZY C448 SC1U10V3ZY G6 G2
SC 1 2 CDAGND 1 2 CDAUD_GND AUDLINL 1 2 1 2 1 2
23 CD_AGND AUD_LINL 32
R281 75R3F C475 SC1U10V3ZY C474 SCD1U GAP-CLOSE GAP-CLOSE
1 2 CDAU DR 1 2 CDAUD_R AUD_MICIN11 2
23 CD_AUDR AUD_MICIN 32
1

A
AUD_AGND AUD_AGND A

R293 R294 R297


100KR3 100KR3 100KR3
Wistron Corporation
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

AUD_AGND Title
AUDIO (1/2) -- CODEC VT1612A
Size Document Number Rev
A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 31 of 50
5 4 3 2 1
A B C D E

5VA_OP_S0
5VA_OP_S0
3,6,8,11,12,13,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,33,34,35,36,38,41,47,49,50 3D3V_S0 3D3V_S0

1
16,17,18,19,20,21,22,23,24,27,30,31,33,34,37,38,39,41,42,47,48,49,50 5V_S0 5V_S0

2
Q4 R32
C30 E PDTA124EU 10KR3
SC220P
1 2

2
B
1 SE#_BTL

3
C446 R29 R30 C D
SC10U10V6ZY-U 10KR3 10KR3 1 ENAUDIO# 36
1 2CSOUTL1 1 2 HP_L 1 2 G

3
HP_IN
4 S Q26 4

2
2N7002

1
C29
SC220P R265
1 2 100KR3 SPK1
SPKR_L- 6

2
C444 R28 SPKR_L+ 4
SC10U10V6ZY-U R27 18KR3 3
31 AUD_LOL 1 2CSOUTL2 1 2 L_LINE_IN 1 2 SPKR_R+ 2
AUD_AGND 1
15KR3F SPKR_R-
U1 5

1
5VA_OP_S0 4 3 SPKR_L+ 5V_AUDIO_S0 C780 C777 C779 C778 MOLEX-CON4
HP_L 5
LLINEIN LOUT+
10 SPKR_L- SB SC680P SC680P SC680P SC680P 20.D0012.104

2
L_BYPASS LHPIN LOUT- U36D

14
6 LBYPASS
7 14 HP_IN TSAHCT86
LVDD SE/BTL# MUTE
HP/LINE# 16 12 MUTE 36
AMP_SHUTDOWN MUTE_AMP
8 SHUTDOWN MUTEIN 11 11 By ME requset SPK1 P/N:
1

2 TJ MUTEOUT 9 13
C31
SC10U10V6ZY-U
C450
SC1U10V3ZY
C451
SCD1U
HP_IN_1 17 HP-IN GND/HS 1 Main 20.D0012.104
AUD_AGND 23 12
2

7
VOL GND/HS
GND/HS 13 Second 20.D0152.104
18 RVDD GND/HS 24
R_BYPASS 19
HP_R RBYPASS SPKR_R- AUD_AGND MIC_JKIN
20 RHPIN ROUT- 15 MIC_JKIN 36
21 22 SPKR_R+

GND
RLINEIN ROUT+

1
3 5VA_OP_S0 3
AUD_AGND By GMT suggest. G1421-U2 R253

25

1
Change from 74.01421.A1G 10KR3
LIN1
74.01421.01G
LINE IN

2
R252
to 74.01421.A1G 1KR3 5
C381 AUD_AGND

2
SC10U10V6ZY-U R16 MICJK_PWR 4
R15 18KR3 AUD_AGND
1 2CSOUTR1 1 2 R_LINE_IN 1 2 3
1 2 AUD_LINE_R
31 AUD_LINR
15KR3F R2 1KR3 6
C13
SC220P 1 2 AUD_LINE_L 2
31 AUD_LINL
1 2 R249 1KR3

1
R250 1
C408 R18 R17 AUD_MICIN 2 1 C377 C378
SC10U10V6ZY-U 10KR3 10KR3 R1 R251 SC100P SC100P SKT-JACK-22-U

2
31 AUD_LOR 1 2CSOUTR2 1 2 HP_R 1 2 10KR3 10KR3 22.10271.031
GAP-CLOSE

2
C14 SC AUD_AGND AUD_AGND SC
SC220P AUD_AGND AUD_AGND AUD_AGND
1 2 By ME requset LIN1 P/N:
Main 22.10271.031
2
R_BYPASS Second 22.10088.381 2
HP_IN_1 HP_IN
SC 1 2
If R->L 避免 noise
By ME requset LOUT1 P/N:
1

R21
R19
DUMMY-R3 1000P -> 100P Main 22.10147.031
L_BYPASS
GAP-CLOSE LINE OUT U35 3D3V_S0
Second 22.10251.031
LOUT1
2

2 GND IN 5 AUD_AGND
C447 C445 3 9
SC4D7U10V5ZY SC4D7U10V5ZY AUD_AGND HP_IN NC SPDIF_PWR GND
4 1 8
SC ON/OFF# OUT VCC
VIN 7
31 SPDIF
AUD_AGND AUD_AGND 16
AUD_AGND DY-AAT4250-U 6
TC4 SE#_BTL AUD_AGND 5
5V_AUDIO_S0 ST100U6D3VDM-5 5/10 change 4
SPKR_L+ 1 2 SPKR_L+2 1 2 SPKR_L_A1 2
R8 22R3 3
1

SPKR_R+ 1 2 SPKR_R+2 1 2 SPKR_R_A1 1


R4 R6 22R3 SC

1
1KR3 TC5 MINDIN10-1-U1
ST100U6D3VDM-5 R7 R5 C3 22.10147.031

1
1KR3 1KR3 SC680P
2

2
RB29_2 5VA_OP_S0 C2
5V_S0 5VA_OP_S0 SC680P For support S/PDIF,

2
P/N: 22.10257.001
1

G5 C1
1 2 SC4D7U10V5ZY R3 R20 AUD_AGND AUD_AGND AUD_AGND AUD_AGND AUD_AGND FOXCONN
2K2R3 10KR3
1
GAP-CLOSE-PWR 1
AUD_AGND AUD_MICIN
AUD_MICIN 31
2

C42 AMP_SHUTDOWN Q3
SC4D7U10V5ZY
2N7002
Wistron Corporation
1

C380 D
SC3300P50V3KX 1 1 2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
AMP_SHUTDOWN# 33
G R31 Taipei Hsien 221, Taiwan, R.O.C.
2

AUD_AGND S 47KR3
2

C33 Title
AUD_AGND SC1U10V3ZY
AUDIO (2/2)
2

Size Document Number Rev


A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 32 of 50
A B C D E
A B C D E

3,6,8,11,12,13,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,34,35,36,38,41,47,49,50 3D3V_S0 3D3V_S0


PM_SLP_S5# 38,39,44,45
16,17,18,19,20,21,22,23,24,27,30,31,32,34,37,38,39,41,42,47,48,49,50 5V_S0 5V_S0
U90A 18,34,38,50 3D3V_S3 3D3V_S3

4
14 5

PR
3D3V_S5 VCC Q
2 D
PCIRST_BUF# 3 CLK SUS_PCIRST#
Q 6
3D3V_S3

CL
7 GND
4 4
TSLCX74-U SPKR_D

1
U90B

10
3D3V_S5
14 9 SYS_SPKR

PR
3D3V_S5 VCC Q SYS_SPKR 31
NEAR M38859 12 D
KROW[8..1] 34
AUDIO_KBC_BEEP 11
34 KCOL[16..1] CLK
Q 8

1
KROW2

CL
10 1 7 GND
KROW4 9 2 KROW1
KROW5 8 3 KROW7 TSLCX74-U

13
KROW6 7 4 KROW8 R238
KROW3 6 5 100KR3

2
PM_SLP_S3# 16,19,38,39,43,44
3D3V_S3 RP10
SRP10K

KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
SB

KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
5/12 By Review Meeting

1
C752 C726 3D3V_S3
SC4D7U10V5ZY SCD1U

1
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39

62
61
60
59
58
57
56
55

71
R228 R229
10KR3 100KR3

P0-0
P0-1
P0-2
P0-3
P0-4
P0-5
P0-6
P0-7
P1-0
P1-1
P1-2
P1-3
P1-4
P1-5
P1-6
P1-7

P3-0/PWM-00
P3-1/PWM-10
P3-2
P3-3
P3-4
P3-5
P3-6
P3-7

VCC
3 3

2
38 1
47 RST#_AD_LIM
37
P2-0/CMPREF P6-0/AN-0
80
WIRELESS_BTN# 34
AC_IN_1 SB
48 FLASH_GPIO1 P2-1 P6-1/AN-1 3D3V_S0
48 FLASH_GPIO2 36 P2-2 P6-2/AN-2 79 BAT_IN# 47
32 AMP_SHUTDOWN# 35 P2-3 P6-3/AN-3 78 KEY4# 34
34 77 D12 S1N4148-U PM_SUS_STAT#_KBC 1 2
47 AD_CURR_DET P2-4(LED-0) P6-4/AN-4 KEY5# 34 AC_IN_1
33 76 1 2 R232 DY-10KR3
18 CAP_LED# P2-5(LED-1) P6-5/AN-5 BT_BTN# 34 AC_IN 38,46,48
32 75 ZZ.10334.151
18 NUM_LED# KBCFLASH P2-6(LED-2) P6-6/AN-6 MAIL# 34 RST#_AD_LIM
31 P2-7(LED-3) P6-7/AN-7 74 STDBY_LED# 18 1 2
BL2#_KBC 1 2 R181 100KR3
BL2# 48
27 17 INTERNET#
26
P4-0/XCOUT P5-0/INT-5
16
INTERNET# 34 SB D13 S1N4148-U 3D3V_S3
18 EMAIL_LED#
P4-2 23
P4-1/XCIN P5-1/INT-20
15
ECSMI# 20
R233 SC
P4-2/INT-0 P5-2/INT-30 ECSWI# 20
22 14 PM_SUS_STAT#_KBC 1 2 BL2#_KBC 1 2
P4-3/INT-1 P5-3/INT-40 PM_SUS_STAT# 12,16,20
21 13 R230 10KR3
19 KBRCIN# P4-4/RXD P5-4/CNTR-0 BL2#_KBC LID# 18,34
19 KA20GATE 20 12 GAP-CLOSE
P4-5/TXD P5-5/CNTR-1 R202 BT_BTN#
20 ECSCI# 19 P4-6/SCLK P5-6/DA-1/PWM-01 11 BRIGHTNESS 18 2 1
KBC_CLKRUN# 18 10 AUDIO_KBC_BEEP DUMMY-R3 R490 DY-100KR3
TP21 P4-7/SRDY#/CLKRUN# P5-7/DA-2/PWM-11 SB ZZ.10434.151
SB

3
TPAD30 STDBY_LED# 2 1
P8-4/LFRAME#

XIN_KBC R489 100KR3


P8-5/LRESET#

XIN 28
1

P8-7/SERIRQ

P4-7 can't be used as GPIO. 29 XOUT_KBC 2


P7-5/INT-41
P7-4/INT-31
P7-3/INT-21
P8-0/LAD-0
P8-1/LAD-1
P8-2/LAD-2
P8-3/LAD-3

XOUT
P8-6/LCLK

72 38859_VREF EMAIL_LED# 2 1
P7-6/SDA
P7-7/SCL

VREF

RESET#
R234 R236 100KR3

CNVSS

1
AVSS
10KR3 X4
P7-2
P7-1
P7-0

VSS

1
C781 RESON-8MHZ-U P4-2 2 1
2

SC1U10V3ZY 82.10009.031 R235 100KR3

2
(3.3V) 1 2
70
69
68
67
66
65
64
63

2
3
4
5
6
7
8
9

25
24
30
73
5V_S0

1
2 U29 2
M38857M8V2D13-U1 R457
R456 470R3
21,35,36 LPC_LAD0

3
15KR3F
21,35,36 LPC_LAD1

2
21,35,36 LPC_LAD2 KVREF D33
21,35,36 LPC_LAD3 1
CNVSS (2.5V) APL431-U
21,35,36 LPC_LFRAME#

2
14,16,19,35,36 PCIRST_BUF# 1 2 PCIRST_KBC# SUS_PCIRST#

2
R459 33R3 R455 R237 DUMMY-R3
47KR3F DUMMY 1 2
3 CLK33_KBC

Q19_C
C751 R460

1
1 2 KBCCLK_RC 2 1 Q25 D10
Q24 3 OUT 1 2 CNVSS
DY-SC10P DY-10KR3 TDATA_5
TDATA_5 34
47K 3 OUT Q19-B 2 R1

1
20,25,36 P_SERIRQ
MDATA_5 KBCFLASH2 R1 IN 1 GND 5V_S0
DY-S1N4148-U

1
KBDATA_5 IN 1 GND R2
TCLK_5 R2 DY-DTA124EE R245 C311
TCLK_5 34
MCLK_5 DY-DTC144EUA 10KR3 DY-SCD1U

2
KBCLK_5 ZZ.00144.B1K

2
SMBD_KBC 22,48
SMBC_KBC 22,48

P/N: 85.49S01.001

1 5V_S0 1
5V_S0
RN58
8
7
6
5

2 3 SMBC_KBC
1 4 SMBD_KBC RN59 NEAR Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SRN10K-2 KBC Taipei Hsien 221, Taiwan, R.O.C.
SRN10KJ
CHIP
Title
1
2
3
4

MDATA_5
KBDATA_5 KBC
MCLK_5 Size Document Number Rev
KBCLK_5 A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 33 of 50
A B C D E
A B C D E

3,6,8,11,12,13,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,35,36,38,41,47,49,50 3D3V_S0 3D3V_S0

16,17,18,19,20,21,22,23,24,27,30,31,32,33,37,38,39,41,42,47,48,49,50 5V_S0 5V_S0


3D3V_S0
19,21,22,38,39,45,46,49 +5V_AUX_S5 +5V_AUX_S5

18,33,38,50 3D3V_S3 3D3V_S3

1
16 C182
SCD1U 3D3V_S3

2
15
14 R119 DUMMY-R3 RC1

1
4 13 S_LED 1 2 INTERNET# 1 8 4
MAIL_LED# STDBY_LED#_INV 18
12 KEY5# 2 7 R231
MAIL_LED# 18
11 80211_LED# KEY4# 3 6 47KR3
80211_LED# 18
10 BT_LED# MAIL# 4 5
BT_LED# 24
9 WIRELESS_BTN#
WIRELESS_BTN# 33

2
8 BT_BTN# SRC100P50V-U R263 CN6
BT_BTN# 33
7 MAIL# RC2 LID# 1 2 LID_SW
MAIL# 33 18,33 LID# 1
6 KEY4# BT_BTN# 1 8
KEY4# 33 2

1
5 KEY5# WIRELESS_BTN# 2 7 100R3
KEY5# 33
4 INTERNET# 80211_LED# 3 6 C407 CON2-10-U
INTERNET# 33 MAIL_LED#
3 4 5 SC1000P50V3KX 20.D0012.102

2
2 PWRBTN#_CN 78.10224.2B1
1 SRC100P50V-U
3D3V_S0 C639 SC1000P50V3KX
17 BT_LED# 1 2

C180
78.10224.2B1
SC1000P50V3KX Cover Up Switch
1

CN8 PWRBTN#_CN 1 2
MOLEX-CON15 C179 78.10224.2B1
20.D0012.115 DY-SCD1U
2

5V_S0
By ME requset CN8 P/N:
Main 20.D0012.115
Second 20.D0092.115 +5V_AUX_S5 5V_S0

1
2
RN98
3 3
SRN10KJ
1

1
R117 10 1 MAIL# C695 C694 TPAD1
3D3V_S3
10KR3 9 2 KEY4# SCD1U SC1U10V3ZY

4
3

2
8 3 KEY5# 1
R118 WIRELESS_BTN# 7 4 INTERNET# 2
2

PWRBTN#_CN 1 2 BT_BTN# 6 5 1 2 R407 100R3 TP_DATA 3


PWRBTN# 38 3D3V_S3 33 TDATA_5
33 TCLK_5 1 2 R408 100R3 TP_CLK 4
1

RP11 5
470R3 C181 SRP10K 6
SCD1U
POWER BUTTON SB
2

1
78.10492.4B1
C698 C696 MOLEX-CON6-U1
SC47P SC47P 20.K0108.006

2
By ME requset TPAD1 P/N:
Main 20.K0108.006 SC
Second 20.K0021.006
Launch Board CONN TOUCH PAD
EMI Bypass cap.
2
Internal KeyBoard CONN KROW[8..1] 33
KCOL[16..1] 33
2
RC9 RC12
KB1 KCOL9 1 8 KROW5 1 8
KROW8 56 1 KROW8 KCOL10 2 7 KROW6 2 7
KCOL11 3 6 KROW7 3 6
KROW7 55 2 KROW7 KCOL12 4 5 KROW8 4 5
KROW6 54 3 KROW6
KROW5 53 4 KROW5 SRC100P50V-U SRC100P50V-U
KROW4 52 5 KROW4 RC8 RC11
3D3V_S0 KROW3 51 6 KROW3 KCOL5 1 8 KROW1 1 8
KROW2 50 7 KROW2 KCOL6 2 7 KROW2 2 7
KROW1 49 8 KROW1 KCOL7 3 6 KROW3 3 6

MATRIXID1# 2
RN97
3 30
K/B 1
KCOL16
KCOL15
KCOL14
48
47
46
9
10
11
KCOL16
KCOL15
KCOL14
KCOL8 4 5
SRC100P50V-U
KROW4 4 5
SRC100P50V-U
MATRIXID2# 1 4 KCOL13 45 12 KCOL13 RC7 RC10
KCOL12 44 13 KCOL12 KCOL1 1 8 KCOL13 1 8
KCOL11 43 14 KCOL11 KCOL2 2 7 KCOL14 2 7
SRN10KJ KCOL10 42 15 KCOL10 KCOL3 3 6 KCOL15 3 6
KCOL9 41 16 KCOL9 KCOL4 4 5 KCOL16 4 5
KCOL8 40 17 KCOL8
KCOL7 39 18 KCOL7 SRC100P50V-U SRC100P50V-U
KCOL6 38 19 KCOL6
KCOL5 37 20 KCOL5
KCOL4 36 21 KCOL4
KCOL3 35 22 KCOL3
KCOL2 34 23 KCOL2
KCOL1 33 24 KCOL1
32 25
1 31 26 1
Keyboard matrix ( from vendor ) MATRIXID2# 30 27 MATRIXID2#
MATRIXID2# 36
MATRIXID1# 29 28 MATRIXID1#
MATRIXID1# 36
US Jap Eur Other ETY-CON28 Wistron Corporation
20.K0108.028 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Low Bit MATRIXID1# 1 1 0 0 Title


By ME requset KB1 P/N: LAUNCH / TOUCHPAD / KB CONN
High Bit MATRIXID2# 1 0 1 0 Main 20.K0108.028 Size
A3
Document Number Rev
SC
Second 20.K0021.028 EGRET
Date: Friday, July 23, 2004 Sheet 34 of 50
A B C D E
A B C D E

3,6,8,11,12,13,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,36,38,41,47,49,50 3D3V_S0 3D3V_S0

RN100
3 2 LPC_FGPI0
4 1 LPC_FGPI1
21,33,36 LPC_LAD[3..0]
SRN10KJ
4
3D3V_S0 4

RN99

1
8 1 LPC_FGPI3
7 2 LPC_FGPI2 C753 C728
6 3 LPC_FGPI4 SCD1U SCD1U

2
5 4 SELECT_LPC

SRN10K-2

3D3V_S0

1
R431
DY-0R3-U 3D3V_S0

SELECT_LPC
SC

VPP2
U81

25
32

29

28
27
1 NC

VCC
VCC

IC(VIL)/IC(VIH)

CE#
NC
3 3
12 13 LPC_LAD0
ID0/A0 LAD0/DQ0 LPC_LAD1
11 ID1/A1 LAD1/DQ1 14
10 15 LPC_LAD2
ID2/A2 LAD2/DQ2 LPC_LAD3
LAD3/DQ3 17

36 LPCROM_WP# 8 TBL#/A4
7 WP#/A5

ID3/A3 9
LPC_FGPI0 6 22
LPC_FGPI1 GPI0/A6 RFU/NC
5 GPI1/A7 RFU/DQ4 18
LPC_FGPI2 4 19
LPC_FGPI3 GPI2/A8 RFU/DQ5
3 GPI3/A9 RFU/DQ6 20
LPC_FGPI4 30 21
GPI4/A10 RFU/DQ7

LFRAME#/W#
PLCC32 Socket P/N:

CLK/RC#
INIT#/G#

RST#
SSKT3262.10002.032

VSS
NC
SSKT32 62.10005.032

24
31

23

26
16
W39V040AP
72.39040.A03
LPC ROM:
SST49LF040 72.49040.A03
SC Winbond W39V040AP 72.39040.A03
LPC_RST#
2 2
SC
3 CLK33_LPCROM
C727
1 2
LPC_LFRAME# 21,33,36
SC10P
78.10034.1B1
R432
1 2 LPC_RST#
14,16,19,33,36 PCIRST_BUF#
33R3

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
LPCROM / DEBUG PORT
Size Document Number Rev
A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 35 of 50
A B C D E
A B C D E

SW1 3,6,8,11,12,13,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,35,38,41,47,49,50 3D3V_S0 3D3V_S0


CHK_PW# 1 8
37 PD_[7..0]
BOOTBLOCK# 2 7 16,17,18,19,20,21,22,23,24,27,30,31,32,33,34,37,38,39,41,42,47,48,49,50 5V_S0 5V_S0
3 6

4 5 3D3V_S0 3D3V_S0

PRNACK#_5

AUTOFD#_5
ERROR#_5
SLCTIN#_5
PRINIT#_5

STROB#_5
BUSY_5
SW-2184LPSTR

SLCT_5
RP5 RP3

PD_0
PD_1
PD_2
PD_3
PD_4
PD_5
PD_6
PD_7
PE_5

PNF
SIO_GPIO0 1 10 BOOTBLOCK# 1 10
4 RF_LED# 2 9 PNF VGA_ID0 2 9 PANEL_ID3 4
37 SLCTIN#_5
ENAUDIO# 3 8 SIO_PME# CHK_PW# 3 8 MATRIXID2#
37 PE_5 AD_OFF# 4 7 LPCPD# BACKLT_OFF# 4 7 VGA_ID1
37 BUSY_5 U72 PANEL_ID2

89
64
38
13

36
37
40
41
47
49

52
50
48
46
45
44
43
42

51
53
54
35
37 PRNACK#_5 5 6 5 6
37 SLCT_5 PC87392-U SB SRP10K SRP10K

VSS
VSS
VSS
VSS

SLCT/WGATE#
PE/WDATA#

PD0/INDEX#
PD1/TRK0#
PD2/WP#
BUSY_WAIT#/MTR1#
ACK#/DR1#
SLIN_ASTRB#/STEP#
INIT#/DIR#

PD3/RDATA#
PD4/DSKCHG#
PD5/MSEN0
PD6/DRATE0
PD7/MSEN1

ERR#/HDSEL#
AFD_DSTRB#/DENSEL/DRATE1
STB_WRITE#
PNF/XRDY#
37 PRINIT#_5

37 ERROR#_5
37 AUTOFD#_5 RP4
VGA_CARD_IN# 1 10
37 STROB#_5
34 LPCROM_WP# 2 9
DRATEO/IRSL2 PANEL_ID1 PANEL_ID0
DENSEL 33 3 8
30 MUTE 4 7 CHRG_LED#_SIO
PLANARID0 DR0# MATRIXID1#
95 GPIO20/XA0 MTR0# 31 5 6
PLANARID1 94 24
SB PLANARID2 93
GPIO21/XA1 WP#
21 RN14 SRP10K SB
CHRG_LED#_SIO GPIO22/XA2 Parallel Port DSKCHG# BT_DETACH
18 CHRG_LED#_SIO 92 GPIO23/XA3 INDEX# 32 1 8
MATRIXID1# 91 25 BT_WAKEUP 2 7
34 MATRIXID1# GPIO24/XA4/XSTB0# TRK0# BTH_IN
MATRIXID2# 72 28 3 6
34 MATRIXID2# GPIO25/XCS0#/XRDY/DR1# FDD STEP#
MUTE 87 29 4 5
32 MUTE BTH_IN GPIO26/XA6/PIRQA/XSTB2# DIR#
24 BTH_IN 86 GPIO27/XA7/PIRQB HDSEL# 22
26 SRN10K-2
WGATE#
WDATA# 27
VGA_ID1 74 23
16 VGA_ID1 GPIO17/XA19/DCD2#/JOYABTN0 RDATA#
BT_PWR_ON 75
24 BT_PWR_ON GPIO16/XA18/DSR2#/JOYBBTN0
BOOTBLOCK# 76 73
16 VGA_ID0
VGA_ID0
CHK_PW#
BACKLT_OFF#
77
78
GPIO15/XA17/SIN2/JOYAX
GPIO14/XA16/RTS2#/JOYBX
GPIO13/XA15/SOUT2/JOYBY
NS87392 XCS1#/MTR1#/DRATEO/XIOWR#
XSTB1#/XCNF2/NC
XWR#/XCNF1
90
4
SOUT1_5 3D3V_S0
18 BACKLT_OFF# 79 GPIO12/XA14/CTS2#/JOYAY SOUT1/XCNF0 59
3 VGA_CARD_IN# 80 58 RST1_5 3
16 VGA_CARD_IN# GPIO11/XA13/DTR2_BOUT2#/JOYBBTP1 RTS1#/TEST
LPCROM_WP# 81 61 DTR1#_5
35 LPCROM_WP# GPIO10/XA12/RI2#/JOYABTN1 DTR1_BOUT1/BADDR
SB96

1
AD_OFF# 85 BT_WAKEUP R400 R401 R402 Planar ID(2,1,0)
47 AD_OFF# WIRELESS_EN GPIO07/XD7/JOYABTN0 GPIO30/XA8/PIRQC BT_WAKEUP 24
97 84 PANEL_ID0
30 WIRELESS_EN GPIO06/XD6/JOYBBTN0 GPIO31/XA9/PIRQD/MTR1# PANEL_ID0 18
CHARGE_OFF 98 83 PANEL_ID1 DUMMY-R3 DUMMY-R3 10KR3 SA: 0,0,0
46 CHARGE_OFF GPIO05/XD5/JOYAX GPIO32/XA10/MDRX/XIORD# PANEL_ID1 18
99 82 BT_DETACH 63.10334.151
GPIO04/XD4/JOYBX GPIO33/XA11/MDTX/XIOWR# BT_DETACH 24
MIC_JKIN 100 5 PANEL_ID2 SB: 0,0,1
32 MIC_JKIN GPIO03/XD3/JOYBY GPIO34/XRD#/WDO# PANEL_ID2 18
ENAUDIO# 1 19 SIO_PME#
32 ENAUDIO#

2
RF_LED# GPI002/XD2/JOYAY GPIO35/SMI# PM_CLKRUN# PLANARID0
18 RF_LED#
SIO_GPIO0
2 GPIO01/XD1/JOYBBTN1 IR GPIO36/CLKRUN# 6
PANEL_ID3
PM_CLKRUN# 20,25,28,30
PLANARID1
SC: 0,1,0
3 GPIO00/XD0/JOYABTN1 GPIO37/DR1#/IRSL2/XIORD# 71 PANEL_ID3 18
PWUREQ#/IRSL3
PLANARID2 SD: 0,1,1
LPC
IRRX2_IRSL0

-1: 1,0,0

1
LFRAME#
LRESET#

LPCPD#
SERIRQ
R403 R398 R399 -2: 1,0,1
LDRQ#

DCD1#
DSR1#
CTS1#
IRRX1

CLKIN
IRSL1

0R3-U 0R3-U DY-0R3-U


LCLK

LAD0
LAD1
LAD2
LAD3
IRTX

SIN1

RI1#
VDD
VDD
VDD
VDD

63.R0004.151 63.R0004.151 ZZ.R0004.151


NC

DCD1#_5 TP56 -1

2
DSR1#_5 TP57
88
63
39
14

65

69
68
70
67
66

20
9
8
10
11
12
15
16
17
18
7

57
60
56
55
62
SIN1_5 TP58
3D3V_S0 RST1_5 TP59
RI1#_5 SOUT1_5 TP60
DCD1#_5 CST1#_5 TP61
LPC_LAD1
LPC_LAD2
LPC_LAD3

IRRX_3 DSR1#_5 DTR1#_5 TP62


LPCPD#
LPC_LAD0
1

IRSL0_3 CST1#_5 RI1#_5 TP63


C235 C234 C217 C237 IRTX_3 SIN1_5
SC1U10V3ZY SCD1U SCD1U SCD1U
3 CLK14_SIO
2

2 C710 R421 Please place together 2

1 2SIOCLK14_RC
1 2 LPC_LAD[3..0] 21,33,35
LPC_LFRAME# 21,33,35
DUMMY-C3 DUMMY-R3
LDRQ#0_SIO 21
14,16,19,33,35 PCIRST_BUF# P_SERIRQ 20,25,33
3 CLK33_SIO
C236 R163
1 2 SIOCLK_RC 1 2
SC
SC10P GAP-CLOSE
78.10034.1B1

SB
PANEL ID DEFINE
PANEL_ID3 PANEL_ID2 PANEL_ID1 PANEL_ID0 VENDORS
0 0 0 0 15" SXGA+
Infineon FIR Module 0 0 0 1 Hydis (14")SPWG
0 0 1 0 15" WIDE
U93
3D3V_S0 40mil 0 0 1 1 Hitachi (15")
1 1 VCC2/IRED_ANODE 0 0 1 1 AU (15") 1
2 IRED_CATHODE
1

C790 10mil IRTX_3 3 0 0 1 1 CMO(15")


SC1U10V3ZY C791 IRRX_3 TXD
10mil 4
SC4D7U10V5ZY 10mil IRSL0_3 5
RXD
0 1 0 0 CMO(14") Wistron Corporation
2

SD 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


6 VCC1
1 2 IRMODE 7 MODE 0 1 0 1 AU (14") Taipei Hsien 221, Taiwan, R.O.C.
R494 DY-10KR3 8 GND Title
0 1 1 0 AU (14")**
SB 0 1 1 1 No Panel SUPER IO
FIR-TFDU6102 Size Document Number Rev
Note : AU (友達),CMO(奇美),** : With Digitizer A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 36 of 50
A B C D E
A B C D E

PRINTER PORT
RN72
SLCTIN#_5 1 8 SLCTIN#_D5
PD_2 2 7 PRPD2
16,17,18,19,20,21,22,23,24,27,30,31,32,33,34,38,39,41,42,47,48,49,50 5V_S0 5V_S0
PRINIT#_5 3 6 PRINIT#_D5
PD_1 4 5 PRPD1
4 4
SRN33-1

RN73
PD_6 1 8 PRPD6
PD_5 2 7 PRPD5
PD_4 3 6 PRPD4
PD_3 4 5 PRPD3

SRN33-1

BUSY_D5
RN74 PRPD1
SLCT_5 1 8 SLCT_D5 PRINIT#_D5
PE_5 2 7 PE_D5 PRPD2
PRNACK#_5 3 6 PRNACK#_D5 PRPD3
PD_7 4 5 PRPD7 PRPD4
PRPD5
SRN33-1 PRPD6

RN71
ERROR#_5 1 8 ERROR#_D5
PD_0 2 7 PRPD0
AUTOFD#_5 3 6 AUTOFD#_D5

8
7
6
5

8
7
6
5
STROB#_5 4 5 STROB#_D5
RC5 RC4
SRN33-1
3 SRC100P50V-U SRC100P50V-U 3

1
2
3
4

1
2
3
4
R262
BUSY_5 1 2 BUSY_D5

33R3
PRT1
26

STROB#_D5 1
AUTOFD#_D5 14
PRPD0 2
ERROR#_D5 15
3
16
4
SLCTIN#_D5 17
5
18
5V_S0 6
19

8
7
6
5
7
1

C379 RC3 20
D2 SC100P 8

2
SRC100P50V-U
S1N4148-U 21
9

1
2
3
4
22 FROM SIO
2

10
2 PRN_PU_5V 2
23
RP1 11 PD_[7..0] 36
ERROR#_D5 1 10 24
PRPD0 2 9 PRPD1 12
AUTOFD#_D5 3 8 PRINIT#_D5 25
STROB#_D5 4 7 PRPD2 PRPD7 13
5 6 SLCTIN#_D5 PRNACK#_D5
SLCT_5 36
PE_D5 27
SRP1K SLCT_D5
PE_5 36
PRNT25-17-U1
RP2 20.B0030.A25
SLCT_D5 PRNACK#_5 36
1 10
PE_D5 2 9 PRPD3
ERROR#_5 36
8
7
6
5

PRNACK#_D5 3 8 PRPD4
PRPD7 4 7 PRPD5 RC6 SC
PRINIT#_5 36
5 6 PRPD6
SRC100P50V-U
SRP1K
By ME requset PRT1 P/N: SLCTIN#_5 36
1
2
3
4

R261 1KR3
Main 20.B0030.A25 AUTOFD#_5 36
1 2 BUSY_D5 Second 20.B0028.L01 STROB#_5 36

BUSY_5 36
CHECK PULL HIGH

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Printer PORT
Size Document Number Rev
A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 37 of 50
A B C D E
A B C D E

5V_S0 5V_S5
Q21
DCBATOUT

R220
TP0610T
41 12VGATE_S0
1
2
S
S
D
D
8
7
Suspend Power
3 S D 6
1 2 PM_RUNCTL 2 1 4 G D 5

2
SCD22U25V5ZY
10KR3 U95
R218 AO4422 3D3V_S3 3D3V_S5

1
1 2 PM_RUNCTL_G 330KR3 3D3V_S0 3D3V_S5 Q18
R530 DCBATOUT TP0610T 1 8

1
S D
R221 330KR3 47KR3 1 8 2 7

1
S D S D
R219 2 7 R176 3 6

C282
S D S D
4 1KR3 3 6 1 2 PM_SUSCTL 2 1 PM_SUSPWR_CTL 4 5 4

2
S D G D
D9 4 5

2
G D
MMGZ5242B 10KR3 U76

3
D U80 R422 D29 AO4422

1
R506 Q22_D 1 Q22 AO4422 1 2 PM_SUSCTL_G 330KR3
0R3-U 2N7002 C712 MMGZ5242B
G

1
63.R0004.151 S R175 330KR3 SCD1U50V3ZY

1
PM_SLP_S3# 1 2 R174

3
D Q23 1KR3
1 2 PMSLPS3#_R 1 2N7002 SC
2D5V_S0
G 12VGATE_S0 1 2 RUNGATE_S0

Q34_D 2
1
R507 S

2
DY-0R3-U C801 R529 3D3V_S3
ZZ.R0004.151 DY-SC1U10V3ZY 0R3-U
SC
2
ZZ.10593.4B1
SB

1
2D5V_S0 2D5V_S3

3
D Q19 R526
Q43 PM_SLP_S5# 1 2N7002 1MR3F
DCBATOUT 33,39,44,45 PM_SLP_S5#
DY-TP0610T 1 S D 8 G
2 7 S

2
S D
R508 3 6
1 2 PM_RUNCTL_22 1 RUNGATE_S0 4
S
G
D
D 5
SC

2
DY-SCD22U25V5ZY
DY-10KR3 U30
R509 AO4422
3

1
1 2 PM_RUNCTL_G2 DY-330KR3
18,33,34,50 3D3V_S3 3D3V_S3
1

R510 DY-330KR3

1
R511
21,39,43,44,45,46,48,49 5V_S5 5V_S5

C802
3 DY-1KR3 3
D38
16,18,41,43,44,45,46,47,50 DCBATOUT DCBATOUT
DY-MMGZ5242B
2

D
16,17,18,19,20,21,22,23,24,27,30,31,32,33,34,37,39,41,42,47,48,49,50 5V_S0 5V_S0
Q22_D1 Q44
G DY-2N7002
6,12,14,15,16,19,20,21,39,50 2D5V_S0 2D5V_S0
S
2

13,18,19,20,21,22,24,28,29,33,43,49,50 3D3V_S5 3D3V_S5


3

D Q45
PM_SLP_S3# 1 DY-2N7002
16,19,33,39,43,44 PM_SLP_S3# 5,6,7,8,10,39,44,45,50 2D5V_S3 2D5V_S3
G
S
3,6,8,11,12,13,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,35,36,41,47,49,50 3D3V_S0 3D3V_S0
2

SB SC
19,21,22,34,39,45,46,49 +5V_AUX_S5 +5V_AUX_S5

Run Power
3D3V_S5
1

+5V_AUX_S5
R384
4K7R3 U70A
14

TSAHCT14
R383 47KR3
2

1 2 PM_PWRBTN#_1 2 1 PWRBTN_3 1 2 PWRBTN_2


20 PM_PWRBTN#

1
D27
2 S1N4148-U C679 +5V_AUX_S5 2

U50_PR
7

SC1U10V3ZY R380

2
1 2
SB +5V_AUX_S5
+5V_AUX_S5 +5V_AUX_S5 U63A 10KR3
U62A TSAHCT74 +5V_AUX_S5

14

4
U70B U62B
14

14

PWRBTN_74 U70C

14
1 5 14

PR
TSAHCT14 Q VCC
4 SD#_S5_1 3 2
D TSAHCT14
SHUTDOWN_S5 4 3 PURE_HW_SDN# 1 2 SD#_S5 6 2 PM_SLP_S5#
43 SHUTDOWN_S5
5 AC_IN 3 6 5 PWRBTN#
CLK PWRBTN# 34
R153 TSAHCT32 6
7
Q

1
10KR3 TSAHCT32

CL
7
7

GND C678

7
3

DY-SCD1U
SB AC_IN 33,46,48

2
D6
BAW56 3D3V_S0 U50_CL 2 1
SB
+5V_AUX_S5
6 CPU_THERMTRIP# 2 1
1

1
D R360 22KR3
D8 1 2 Q26_G 1 Q32
PR_HW_SDN# 22
S1N4148-U R361 G 2N7002 C676

2
47KR3 S SCD1U

2
1
DCBATOUT
C666
SCD1U

2
1

1
R381
100KR3F
Power On Logic 1

U69
QUICK_SDN# 1 5
Wistron Corporation
2

MAX807_VDD OUT NC
2 VDD
MAX807_VSS 3 4 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
VSS NC
1

Taipei Hsien 221, Taiwan, R.O.C.


1

S-80840CNMC
R382 C677 Title
51K1R3F SCD1U
PWR CTL LOGIC / PWR PLANE
2
2

Size Document Number Rev


BL3# A3

Date: Friday, July 23, 2004


EGRET
Sheet 38 of 50
SC

A B C D E
A B C D E

21,38,43,44,45,46,48,49 5V_S5 5V_S5


+5V_AUX_S5 5V_S5

U62C 6,12,14,15,16,19,20,21,38,50 2D5V_S0 2D5V_S0

14

14
TSAHCT32 4,11,13,45 1D2V_HT0A_S0 1D2V_HT0A_S0
9 R387 SUSB# 1
20 SUSB# 1D2V_S0_EN
8 PMSLPS3# 1 2 3
PM_SLP_S3# 16,19,33,38,43,44 VRM_PG 1D2V_S0_EN 45 5,6,7,9,10,45 1D25V_S3 1D25V_S3
10 2
GAP-CLOSE 5,6,7,8,10,38,44,45,50 2D5V_S3 2D5V_S3
U19A

7
TSAHCT08-U
19,21,22,34,38,45,46,49 +5V_AUX_S5 +5V_AUX_S5
4 73.07408.0JB 4

+5V_AUX_S5 SB 20,21 2D5V_S5 2D5V_S5

U62D SC

14
TSAHCT32
20 SUSC# 12 R389
11 PMSLPS5# 1 2
VRM_PG PM_SLP_S5# 33,38,44,45
13
GAP-CLOSE
7

For CPU power off sequence


2D5V_S0 2D5V_S3

1
R139 R124 5V_S5 5V_S5
10KR3 10KR3 5V_S5 C207
SCD1U

14

14
1 2

2
2D5V_S3_PG

14
4
5V_S5 6 VDDA_2D5_PG 13
2D5V_S0_PG 5 11 VTT_VDDA_PG 10
12 8 VCORE_EN 41

1
U19B 9

7
R363 C206 C185 TSAHCT08-U U19C

7
3 10KR3 SCD1U SCD1U 73.07408.0JB TSAHCT08-U U19D 3

7
73.07408.0JB TSAHCT08-U
5V_S5 SUSB# 73.07408.0JB
2
3 1D2V_PG 5V_S5

1
1D2V_S0_PG# 1 Q34
G 2N7002 R362
1

S 10KR3
2

R138 C205
4K7R3 SCD1U
2

2
5V_S5 1D25V_S3_PG
2

1
R134 D
1 2 1D25V_S3_PG# 1 Q33 C667
1D2V_HT0A_S0 G 2N7002 SC1U10V3ZY

2
1

1
S

2
C204 4K7R3 C203
SC
2

SCD1U SCD1U

2
R136
U18
1MR3F
5V_S5 1 8 1D25V_S3
1

R122 R137 1D2V_S0_PG2 OUTPUT_A V+


INVERTING_INPUT_A OUTPUT_B 7
1 2 1D2V_PG_SET GAP-CLOSE 3 6
NON-INVERTING_INPUT_A INVERTING_INPUT_B
4 GND NON-INVERTING_INPUT_B 5 1 2
1

1
47KR3 R135 1MR3F
R123 C183 5V_S5
10KR3 LM393M SC1U10V3ZY

2
2 74.00393.F21 2
U71 5V_S5
2

5V_S5 VRM_PG 1 16
VCORE_GD 5VSB
By Sourcer requset change P/N: 1
R120
2 1D25V_PG_SET 1D2V_S0_PG 2 15 1D2V_S0_EN RN96
VLDT_12 VLDT_EN
From 74.00393.D21 1 8
1

470KR3 2D5V_S0_PG 3 14 PM_SLP_S3# 2 7


VDDA_25 VDDA_EN
To 74.00393.F21 R121
100KR3F
3 6
2D5V_S3_PG 4 13 VCORE_EN 4 5
VDIMM_STR VCORE_EN
SUSB# 5 12 PM_SLP_S5# DY-SRN4K7-1-U
2

SB_PSON# VDIMM_STR_EN
SUSC# 6 11 ALL_PWROK 1 2
ACPI_S3 CPU_PWRGD 2D5V_S0
7 10 R388
Reserved Reserved DY-470R3
8 GND Reserved 9

1
5V_S5 DY-IT8283M R390
5V_S5 DY-4K7R3
5V_S5
14

2D5V_S5
14

2
VTT_VDDA_PG U65
14

1
3 VTT_1D2V_PG 4
1D2V_PG 2 6 VTT_VRM_PG 13 1 5 5V_S0
ALL_PG_1 NC VCC
5 11 2 A
U64A 12 3 4 ALL_PWROK
ALL_PWROK 6,12,19,21
7

TSAHCT08-U U64B GND Y


7

1 73.07408.0JB TSAHCT08-U U64C 1


7

73.07408.0JB TSAHCT08-U SN74LVC1G17-1

VRM_PG
41 VRM_PG 22 RUNPWROK
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
POWERGOOD&ENABLES
Size Document Number Rev
Custom SC
EGRET
Date: Friday, July 23, 2004 Sheet 39 of 50
A B C D E
A B C D E

CPU_CORE
TI TPS5110 5V_AUX_S5
Intersil 6559CR + ISL6209CB*2
2D5V/1D5V DCBATOUT
VID Setting Output Signal INPUT
H_VID0 5V_AUX_S5
VID0(I / 3.3V) VRM_PG Input Power Output Power AUX_SD OUT
PGOOD(OD / 3.3V) 5V_S0 SD
H_VID1 REG5V_IN
VID1(I / 3.3V)
4 4
H_VID2 LP2951ACM
VID2(I / 3.3V) DCBATOUT
VIN_SENSE
H_VID3
VID3(I / 3.3V) 1D25V_S3
Output Power 2D5V_S5 (9.8A) 2D5V_S3
H_VID4 2D5V (O) VIN
VID4(I / 3.3V) VCC_CORE_S0(Imax=80A) Input Signal
VCC_CORE_PWR(O) 5V_S5 1D25V_S0
SHUTDOWN_S5 VCNTL VOUT
STBY 1D5V_S0 (1.8A)
1D5V_S0 (O) PM_SLP_S3#
PM_SLP_S3# VREF
STBY_LDO
Input Signal APL5331KAC
5110A_SKIP
VCORE_EN SKIP
EN (I / 3.3V)
1D2V_S0
NC PG
2D5V_S3
Voltage Sense VIN
COREFB 5V_S5 1D2V_S0
VSEN(I / Vcore) VCNTL VOUT
COREFB# PM_SLP_S3#
3
RGND(I / Vcore) REF 3
Adapter APL5331KAC
Input Power
DCBATOUT Input Signal Output Signal
VCC(I) AD_OFF AD_IN
(I) (O)
5V_S0
VCC(I)
Input Power Output Power
3D3V_S0
VCC(I) AD_JK AD+
VCC(I) VCC(O)
5V_AUX_S5
VCC(I)

Max1999
Charger_Max1645 + Tiny12
2
5V/3D3V 2

Input Signal Output Signal Input Signal Output Signal


CHARGE_OFF AD_IN
CLS (I / 3.3V) LDO (O / 5.4V)
SHUTDOWN_S5 PGOOD(OD / 5V) MAX1999_PGD BT_TH
ON3 THM (I / 3.3V) CHARGE_LED#
XTAL2/PB4 (O/5V)
BAT+SENSE
SHUTDOWN_S5 BATT (I / 3.3V)
ON5 XTAL1/PB3 (O/5V) BL2#
BT_SCL_5
Output Power SCL (IO / 5V)
DCBATOUT
SHDN# BT_SDA_5
SDA (IO / 5V)
5V_S5 (6A) Output Power
PM_SLP_S3# 5V(O) FLASH_GPIO1 DCBATOUT
SKIP# RESET#/PB5 (I/5V) VCC (O)
FLASH_GPIO2
3D3V_S5 (4A) PB0/MOSI/AIN0 BT+
3D3V(O) VCC (O)
Input Power AC_IN
PB0/MOSI/AIN0
MAX1999_LDO5 (30mA)
DCBATOUT LDO5(O)
1 V+ Input Power 1
AD+
DCIN (I)
MAX1999_LDO3 (30mA)
LDO3 (O) Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Power Block Diagram
Size Document Number Rev
A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 40 of 50
A B C D E
A B C D E

DCBATOUT_ISL
Vcore_CPU=1.500V R149 DUMMY-R3 R372 DUMMY-R3 R366 5V_S0
5V_S0 1 2 1 2 1 2
Iomax=52.9A 6 COREFB#
SB 53A*1.5=79.5A (OCP),=>79.5A/2Phase=39.75A/Phase
Dummy-10k Dummy-80.6k Remote Sense DUMMY-R3
Vcore_CPU=1.400V

2
R364
Tie to CPU
R393 R365
90uA*Rsense=39.75A*(6.5m/2)*1.4
ISL6559_OVP
Iomax=42.7A 10R3
U67
6 COREFB 1 2 0R3-U =>Rsense=2.0K
DUMMY-R3 1 2

1 2

1
5V_ISL6559_S0 15 7 ISL6559_FB R368 C201 SC10U35V0ZY-U
C671 VCC FB VCC_CORE_S0 ISL6559_PWM3_1 ISL6559_PWM3 78.10699.4A1
R394 2 1
SC1U10V3ZY 29 9 1 2 1 2
R158 OVP IDROOP DUMMY-R3 C140 DY-SC10U35V0ZY-U

2
4 Vdrop is over spec ISL6559_OFS ISL6559_VDIFF 51R3 ZZ.10699.4A1 4
1 2 5 OFS VDIFF 10 C216/C201/C140
under max loading 11 V_RMSEN+ ISL6559_PWM2 1 2
VID0_PWM VSEN ISL6559_PWM2 42 Can not stuff!
4K99R3F 3 12 V_RMSEN- C536 SC10U35V0ZY-U
VID1_PWM VID0 RGND 78.10699.4A1
R value large, then offset small. 2 VID1

1
VID2_PWM 1 21 ISL6559_PWM1 5V_S0
=> 3K or 4.99K? VID3_PWM 32
VID2 PWM1
20 ISL6559_PWM2 R367 DCBATOUT_ISL DCR=1.3mohm+-10% / Imax=40A /
VID4_PWM VID3 PWM2 ISL6559_PWM3_1 51R3
Now=>Offset value is over 0.05V 30 VID4 PWM3 16
SB Panasonic /
If without offset =>R158=0ohm PWM4 24 1 2
ISEN1 ETQP2H0R7BF / 0.48uH /
22 Rt=10^[11.09-1.13log(fs)]

2
ISEN2 ISEN1 ISL6559_DIS C538 DUMMY-C3
18 26
6 VID[4..0] 42 ISEN2 ISEN2 FS/DIS 13.4*13.3*4.9
ISEN3 17 ISEN3 Rt=107K,=>fs=230KHz

8
7
6
5

8
7
6
5
SCD1U50V3ZY
SB 23 ISEN4 PGOOD 25

1
But real freq.=270KHz

D
D
D

D
D
D
U56

NC1

NC2
R392 C684

1
C683 13 R375 C141 VCC_CORE_S0
GND DY-SI7888DP-U
2 1ISL6559_FB_1
1 2 ISL6559_FB 1 2 ISL6559_COMP
6 COMP GND 14 3D3V_S0 107KR3F Follow MOSFET rise time spec. DY-SCD1U50V3ZY

C142
19 5V_S0 ZZ.10494.4B1 ZZ.59N03.037

2
DUMMY-R3 DUMMY-C3 SC56P GND R330 C627 L11
SC 27 28

2
EN GND

1
BOOT_2 BOOT_2# 1 DY-L-D48UH

G
S
S
S

G
S
S
S
NC

NC

NC
GND 33 1 2 2 Power-PAK
R391 C685 R395 U12 ZZ.R4810.201

4
3
2
1

4
3
2
1
1 2 1 2 FB/COMP1 2 R374 DY-2D2R3 DY-SCD22U16V3KX-1 DY-SI7888DP-U Id=46A

31
ISL6559CR 10KR3 ZZ.2R234.151 ZZ.22421.5B1 ZZ.59N03.037 Rdson=6.9~8.6mohm

2
1KR3F SC4700P50V3KX 3K65R3F 74.06559.073 ISL6559_UG2

2
U59 ISL6559_PHASE_2
39 VRM_PG
Gain value large, R373
SB

1
ISL6559_VDIFF VCORE_EN_1 1 2 1 8
then bandwidth large! VCORE_EN 39 UGATE PHASE ISL6207_EN2
C215 2 7
SC1U10V3ZY ISL6559_PWM3 BOOT EN
=> 2.74K or 3.65K SC GAP-CLOSE 3 6

2
PWM VCC

8
7
6
5

8
7
6
5
PLACE IN THE BACK OF CPU 4 5 ISL6559_LG_2
GND LGATE

1
D
D
D

D
D
D
U13 U57

D
SHOWA 2V/ 7.3*4.3*1.9mm / SMD

1
R331 D5 R370
DY-SI7336DP DY-SI7336DP

1
3 3
79.22719.20B DY-ISL6207CB-U R349 C628
ZZ.42N03.037 ZZ.42N03.037
DY-SSM54-U DY-2KR3F SB Version:

1
DY-499KR3F ZZ.06207.071 DY-0R3-U R348 ZZ.5R004.A8M ZZ.20015.651
ESR=9mohm , Iripplet=3.0A ZZ.49935.651 53A=>2K
SB

2
ZZ.R0004.151 DUMMY-R3

G
S
S
S

G
S
S
S
2'nd Source: SB Version: Power-PAK

2
ISEN3
SB

4
3
2
1

4
3
2
1
NEC 220uF / 2.5V / ESR=9 / Iripple=3.7A 77.C2271.081 Change U59 from ISL6209CB (74.06209.071) DY-SCD01U50V3KX Id=50A

2
1
7.3*4.3*1.9 / NT$:8.0 to ISL6207CB-U (74.06207.071) ZZ.10324.2B1 Rdson=5.2~6.5mohm
C629
VCC_CORE_S0 DY-SC1U10V3ZY
By PWRteam requset High side

2
ZZ.10593.4B1
MosFETchange
From SI7888DP-U (84.07888.037)
1

1
TC11 TC12 TC17 TC9 TC10 TC14 TC8 TC18 TC13 TC15 SB
To BSC059N03S-U (84.59N03.037)
SE220U2VDM-6

SE220U2VDM-6

SE220U2VDM-6

SE220U2VDM-6

SE220U2VDM-6

SE220U2VDM-6

DY-SE220U2VDM-6
ZZ.22719.20B

SE220U2VDM-6
79.22719.20B

DY-SE220U2VDM-6
ZZ.22719.20B

DY-SE220U2VDM-6
ZZ.22719.20B
SB
2

2
79.22719.20B

79.22719.20B

79.22719.20B

79.22719.20B

79.22719.20B

79.22719.20B

G50
Low side MosFETchange
G15 1 2 From SI7338DP (84.07336.037)

D
1 2
GAP-CLOSE-PWR Q35 To BSC042N03S-U (84.42N03.037)
GAP-CLOSE-PWR G16 2'nd Source:
G14 1 2 VID0_PWM 2 3 VID0
H/S:SI7888DP (84.07888.037)

G
1 2
GAP-CLOSE-PWR L/S:SI7886DP (84.07886.037)
GAP-CLOSE-PWR G44 2N7002
SB SC

1
S

D
G13 1 2
DCBATOUT DCBATOUT_ISL Q36 12VGATE_S0 38
1 2 Panasonic 25V / E1 Cap.
GAP-CLOSE-PWR
GAP-CLOSE-PWR 8.5*6.5mm / SMD G45 VID1_PWM VID1 R159 DUMMY-R3
SB 2 3

G
G12 ESR=0.26ohm, Iripple=0.3A 1 2 VID0_PWM 1 2 VID0
2 1 2 1 2 2
FX Serial C541 DY-SC10U35V0ZY-U GAP-CLOSE-PWR 2N7002 R160 DUMMY-R3

1
1

D
GAP-CLOSE-PWR G49 VID1_PWM 1 2 VID1
G46 TC3 1 2 1 2 Q38
1 2 SE100U25VM-1-U C502 SC10U35V0ZY-U R162 DUMMY-R3
2

79.10712.6I1 GAP-CLOSE-PWR VID2_PWM 2 3 VID2 VID2_PWM 1 2 VID2

G
GAP-CLOSE-PWR DCBATOUT_ISL 1 2
G47 C537 SC10U35V0ZY-U R161 DUMMY-R3
1 2 78.10699.4A1 DCR=1.3mohm+-10% / Imax=40A / 2N7002 VID3_PWM 1 2 VID3
DCBATOUT

1
S

D
GAP-CLOSE-PWR Panasonic / Q37 R396 DUMMY-R3
G48 ETQP2H0R7BF / 0.48uH / VID4_PWM 1 2 VID4
SCD1U50V3ZY

SCD1U50V3ZY

1 2 1 2 VID3_PWM 2 3 VID3
13.4*13.3*4.9

G
8
7
6
5

8
7
6
5
1

1
D
D
D

D
D
D

GAP-CLOSE-PWR 5V_S0 U49 C539 DUMMY-C3


D

Follow MOSFET rise time spec. 2N7002


NC1

NC2

1
SI7888DP-U

D
C202

C540
2

=> Mount 0ohm first. 84.59N03.037 Q13


Power-PAK
R42 C65 L6 VID4_PWM VID4
G
S
S
S

G
S
S
S

2 3
Id=46A

G
BOOT_1 1 2 BOOT_1# 1 2 U10 L-D48UH
4
3
2
1

4
3
2
1

SI7888DP-U Rdson=6.9~8.6mohm 68.R4810.201


7,42 VCC_CORE_S0 VCC_CORE_S0
2D2R3 SCD22U16V3KX-1 84.59N03.037 VCC_CORE_S0 2N7002

1
16,18,38,43,44,45,46,47,50 DCBATOUT DCBATOUT
1

ISL6559_UG1
U4 ISL6559_PHASE_1
16,17,18,19,20,21,22,23,24,27,30,31,32,33,34,37,38,39,42,47,48,49,50 5V_S0 5V_S0
1 UGATE PHASE 8 3,6,8,11,12,13,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,35,36,38,47,49,50 3D3V_S0 3D3V_S0
2 7 ISL6207_EN1
ISL6559_PWM1 BOOT EN
3 PWM VCC 6
SB 42 DCBATOUT_ISL DCBATOUT_ISL
8
7
6
5

8
7
6
5

1 4 5 ISL6559_LG_1 1
GND LGATE
1

1
D
D
D

D
D
D

U5 U46
D

SB Version:
1

D25 R371
SI7336DP SI7336DP 53A=>2K
1

R45 ISL6207CB-U R44 DY-SSM54-U 2KR3F


Wistron Corporation
1

74.06207.071 C25 R43 84.42N03.037 84.42N03.037 ZZ.5R004.A8M


499KR3F 0R3-U 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2

DUMMY-R3
G
S
S
S

G
S
S
S

Power-PAK Taipei Hsien 221, Taiwan, R.O.C.


2

ISEN1
SB
4
3
2
1

4
3
2
1

SCD01U50V3KX Id=50A Title


2
1

Rdson=5.2~6.5mohm CPU Vcore Power_1


SB Version: C26
SC1U10V3ZY Size Document Number R ev
2

Change U4 from ISL6209CB (74.06209.071) Custom SC


to ISL6207CB-U (74.06207.071) EGRET
Date: Friday, July 23, 2004 Sheet 41 of 50
A B C D E
A B C D E

SC
1 2
C664 DY-SC10U35V0ZY-U
ZZ.10699.4A1

4 DCBATOUT_ISL 4

SB Version: 1 2
Change U68 from ISL6209CB (74.06209.071) DCR=1.3mohm+-10% / Imax=40A / Panasonic /
C232 DUMMY-C3
to ISL6207CB-U (74.06207.071) ETQP2H0R7BF / 0.48uH / 13.4*13.3*4.9

8
7
6
5

8
7
6
5
SCD1U50V3ZY

SCD1U50V3ZY
D
D
D

D
D
D
U61

NC1

NC2
1

1
VCC_CORE_S0
SI7888DP-U
Follow MOSFET rise time spec. 84.59N03.037

C542

C663
5V_S0

2
R376 C673 Power-PAK L12
BOOT_3 BOOT_3# 1 L-D48UH

G
S
S
S

G
S
S
S
1 2 2
U20 Id=46A

4
3
2
1

4
3
2
1
2D2R3 SCD22U16V3KX-1 SI7888DP-U Rdson=6.9~8.6mohm
84.59N03.037
By PWRteam requset High side

2
ISL6559_UG3

SB U68 ISL6559_PHASE_3 MosFETchange


1 UGATE PHASE 8
ISL6207_EN3
From SI7888DP-U (84.07888.037)
2 7
41 ISL6559_PWM2
ISL6559_PWM2 3
BOOT
PWM
EN
VCC 6 To BSC059N03S-U (84.59N03.037)

8
7
6
5

8
7
6
5
4 5 ISL6559_LG_3
GND LGATE Low side MosFETchange
1

1
D
D
D

D
D
D
U60 U17

D
1
R377 D26 R369
SI7336DP SI7336DP SB From SI7338DP (84.07336.037)

1
ISL6207CB-U R378 2KR3F
84.42N03.037 84.42N03.037

1
499KR3F 74.06207.071
0R3-U
C662 R379 DY-SSM54-U
ZZ.5R004.A8M
To BSC042N03S-U (84.42N03.037)
2

2
DUMMY-R3

G
S
S
S

G
S
S
S
Power-PAK

2
3 ISEN2 3
SB ISEN2 41

4
3
2
1

4
3
2
1
SCD01U50V3KX Id=50A

2
1
Rdson=5.2~6.5mohm
C661
SC1U10V3ZY
SB

TABLE 1. VOLTAGE IDENTIFICATION CODES


VID4 VID3 VID2 VID1 VID0 DAC
0 0 0 0 0 1.550
0 0 0 0 1 1.525
0 0 0 1 0 1.500
0 0 0 1 1 1.475
0 0 1 0 0 1.450
0 0 1 0 1 1.425
0 0 1 1 0 1.400
0 0 1 1 1 1.375
0 1 0 0 0 1.350
0 1 0 0 1 1.325
0 1 0 1 0 1.300
2 2
0 1 0 1 1 1.275
0 1 1 0 0 1.250
0 1 1 0 1 1.225
0 1 1 1 0 1.200
0 1 1 1 1 1.175
1 0 0 0 0 1.150
1 0 0 0 1 1.125
1 0 0 1 0 1.100
1 0 0 1 1 1.075
1 0 1 0 0 1.050
1 0 1 0 1 1.025
1 0 1 1 0 1.000
1 0 1 1 1 0.975
1 1 0 0 0 0.950 41 DCBATOUT_ISL DCBATOUT_ISL
1 1 0 0 1 0.925
1 1 0 1 0 0.900
1 1 0 1 1 0.875 7,41 VCC_CORE_S0 VCC_CORE_S0
1 1 1 0 0 0.850
1 1 1 0 1 0.825
1 1 1 1 0 0.800 16,17,18,19,20,21,22,23,24,27,30,31,32,33,34,37,38,39,41,47,48,49,50 5V_S0 5V_S0

1 1 1 1 1 1 Shutdown 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU Vcore Power_2
Size Document Number Rev
A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 42 of 50
A B C D E
A B C D E

SYSTEM DC/DC G19


1
GAP-CLOSE-PWR
2
G62
1
GAP-CLOSE-PWR
2

3D3V_S5/5V_S5 DCBATOUT
G18
1 2
GAP-CLOSE-PWR
DCBATOUT_MAX1999 5V_DC_S5
G64
1 2
GAP-CLOSE-PWR
5V_S5

G56 G20 G65


1 2 1 2 1 2
GAP-CLOSE-PWR GAP-CLOSE-PWR GAP-CLOSE-PWR
4 G55 G22 G66 4
1 2 1 2 1 2

GAP-CLOSE-PWR GAP-CLOSE-PWR SB GAP-CLOSE-PWR


G59 G21 G39
3D3V_DC_S5 1 2 3D3V_S5 1 2 1 2

GAP-CLOSE-PWR DCBATOUT_MAX1999 GAP-CLOSE-PWR GAP-CLOSE-PWR


G60 R217 MAX1999_LDO5 MAX1999_VCC G38
1 2 DCBATOUT_MAX1999 1 2 DCBATOUT_MAX1999_1 1 2
4D7R5 R476 C765
GAP-CLOSE-PWR 1 2 1 2 DCBATOUT_MAX1999 GAP-CLOSE-PWR
G57 G37

1
1 2 10R3 SC1U10V3ZY 1 2

8
7
6
5

3
C310 C769 ZZ.47522.521
SCD1U

D
D
D
D
GAP-CLOSE-PWR U79 SC1U25V5ZY D35 GAP-CLOSE-PWR

2
1

G58 C739 C738 G63


BAW56

DY-SC4D7U25V6KX
1 2 AO4422 1 2

1
BC1
DY-SCD1U50V5ZY NC,SO-8
2

5
6
7
8
GAP-CLOSE-PWR SC10U35V0ZY-U C770 C768 GAP-CLOSE-PWR
Id=9.3A MAX1999_BST3 MAX1999_BST5 SC U87 SCD1U

D
D
D
D
S
S
S
G

2
Rdson=19.6~24mohm

1
2
3
4
AO4422
8
7
6
5

GAP-CLOSE-PWR

GAP-CLOSE-PWR
SC10U35V0ZY-U
SB SC SB

1
D
D
D
D
C767

1
C766
U78 R472 SCD1U U31

G
S
S
S
2
SCD1U

20

17

4
3
2
1
R448
AO4422 300KR3 NC,SO-8

R477
NC,SO-8 5V=6A
S
S
S
G

V+

VCC
2
3 Id=9.3A 3
3D3V=4.0A
1
2
3
4

Id=9.3A MAX1999_BST3_1
28 BST3 14 MAX1999_BST5_1 Rdson=19.6~24mohm OCP:9.0A~13.1A
BST5
OCP:6.5A~11.27A Rdson=19.6~24mohm Imax=6.0A,
5V_DC_S5
3D3V_DC_S5 MAX1999_DH3 26 16 MAX1999_DH5 DCR=25mohm
L27 DH3 DH5 L31 12*12*3.9
1 2 MAX1999_LX3 27 15 MAX1999_LX5 1 2
LX3 LX5
1

IND-6D8UH-14 MAX1999_DL3 24 19 MAX1999_DL5 IND-6D8UH-14


SB Imax=6.0A, C305 DL3 DL5
1

5
6
7
8

1
SC47P 22 21 TC21
2

DCR=25mohm OUT3 OUT5


1

D
D
D
D
C772 C281 U94 C306 C771 ST220U6D3VDM-4
TC22 SC100P 12*12*3.9 MAX1999_LX3_1 7 9 MAX1999_FB5 SC47P DUMMY-C3 80.22715.191

2
FB3 FB5 AO4406
1
DUMMY-C3

ST150U6D3VDM-9 KEMET, NT:8.5


2

80.15715.191 R213 MAX1999_LX5_1


2MR3 ESR=25mohm
2

2
R191 MAX1999_SD_3 R212

G
S
S
S
3 ON3 Iripple=2.2A

1
6K65R3F MAX1999_ON5 4 10 MAX1999_PRO#
1 2
7.3/4.3/1.9
2

4
3
2
1
ON5 PRO#

1
1 NC,SO-8 R210
2

NC

1
MAX1999_SHDN# 6 100KR3 2MR3 R216 C337
SANYO, NT:7.0
SHDN# Id=9.6A SC100P
MAX1999_FB3 Rdson=13.5~16.5mohm 15KR3F

2
ESR=40mohm

2
Iripple=1.9A R242 11 MAX1999_ILIM5
ILIM5
1

10KR3
7.3/4.3/2.0 R192 1 2 MAX1999_TON
13 TON
MAX1999_VCC
77.21571.031 10K2R3F 5 MAX1999_ILIM3 MAX1999_FB5
ILIM3
1 2
SB Version: R243 R475
2

2 DUMMY-R3 MAX1999_PGD 2
MAX1999_REF 8 2 1 2 MAX1999_LDO5
KEMET, NT=6.6 REF PGOOD

1
1

9K76R3F
ST150U6D3VDM-9 (80.15715.191) C764 DY-10KR3
Open Drian

R244
MAX1999_SKIP# 12 23 R186 R214 ZZ.10334.151
ESR=40mohm SKIP# GND

LDO3

LDO5
SCD22U16V3ZY
2

Iripple=1.7A 20KR3F 40K2R3F

2
1

R208
7.3/4.3/1.9 Ton = VCC : 200KHz/300KHz

2
R473 MAX1999EEI MAX1999_ILIM5_3 1 2 MAX1999_VCC
25

18
Ton = GND : 400KHz/500KHz DUMMY-R3 MAX1999_SHDN#
GAP-CLOSE-PWR
OCP Setting SB SC

1
(5V/3D3V) MAX1999_LDO3 MAX1999_LDO5 SC

1
C307 R211
2

SC: 3.3V SC: 5V 100KR3


30mA MAX. 30mA MAX.
1

MAX1999_ILIM5_3 1 SCD1U
R186=>20KR3F R214=>40K2R3F

2
C308 C309

2
SC1U25V5ZY SC1U25V5ZY OCP: OCP:
2

MAX1999_LDO5
Main Source Main Source
MAX1999_VCC MAX1999_VCC Adapter=10.6A Adapter=12.6A 16,18,38,41,44,45,46,47,50 DCBATOUT DCBATOUT
1

Battery=10.4A Battery=11.6A
R446
Second Source Second Source
1

100KR3
13,18,19,20,21,22,24,28,29,33,38,49,50 3D3V_S5 3D3V_S5
R209 R241 Adapter=9.4A Adapter=16.4A
100KR3 100KR3
Battery=9.2A Battery=14.4A
2

R190 0R3-U
MAX1999_ON5 21,38,39,44,45,46,48,49 5V_S5 5V_S5
U86 1 2 TP66
2

1 6 MAX1999_SKIP# R189 1KR3 Q32_D MAX1999_ILIM5


1
MAX1999_SD_3 1 2 TPAD30 1
2 5 MAX1999_ILIM3
Q40
3

MAX1999_SKIP 3 4 C803 D 2N7002


Wistron Corporation
1

SC4D7U10V5ZY 1 SHUTDOWN_S5 38
G R215 R187 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1

2N7002DW S 10KR3F 10KR3F Taipei Hsien 221, Taiwan, R.O.C.


SB
2

R447
SB 100KR3 Title
2

5V_UP_S5/3D3V_S5/5V_S5
2

Size Document Number Rev


PM_SLP_S3# 16,19,33,38,39,44
Adjust 3V/5V current limit A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 43 of 50
A B C D E
A B C D E

TI TPS5110 for 2.5V and 1.5V 2D5V_S3 2D5V_S3 16,18,38,41,43,45,46,47,50 DCBATOUT DCBATOUT
2D5V_PWR 2D5V_PWR
21,38,39,43,45,46,48,49 5V_S5 5V_S5
G25 G23
5,6,7,8,10,38,39,45,50 2D5V_S3 2D5V_S3
1 2 1 2 12,13,14,15,16,50 1D5V_S0 1D5V_S0

CT = 47pF/300KHz GAP-CLOSE-PWR GAP-CLOSE-PWR DCBATOUT_5110


G26 G24
2D5V_S5: 9.8Amax , OCP>14.7A 1 2 1 2
GAP-CLOSE-PWR GAP-CLOSE-PWR
1D5V_S3: 1.8Amax , OCP>3.3A G27 G31

1
1 2 1 2 C794 C784 C785

4 GAP-CLOSE-PWR GAP-CLOSE-PWR SC10U35V0ZY-U SC10U35V0ZY-U SCD1U 4

2
G28 G32
1 2 1 2
G71
1 2 GAP-CLOSE-PWR GAP-CLOSE-PWR
G29 G33 D
GAP-CLOSE-PWR 1 2 1 2

2
G70
1 2 GAP-CLOSE-PWR GAP-CLOSE-PWR Q42
DCBATOUT DCBATOUT_5110 G30 FDD6035AL
GAP-CLOSE-PWR 1 2 5110A_DH 1 Id=46A
G69 G Rdson=12~16mOhm
2D5V
GAP-CLOSE-PWR
1 2
SB Imax=9.8A

3
S GS 3D3UH /12.8*12.8*3.9
GAP-CLOSE-PWR
G68 Id=8.0A OCP:14.7A~28.5A
1 2
SB SB DCR = 15mohm 2D5V_PWR
L30
GAP-CLOSE-PWR R491 5110A_LX 1 2
SB
G67 DY-0R3-U 5110A_DL
1 2
SB R465 C756 ZZ.R0004.151 IND-3D3UH-19
1 2 5110A_FB_2 1 2 1 2 VDDIOSENSE 68.3R350.10A
VDDIOSENSE 6

1
GAP-CLOSE-PWR R466 D

1
1KR3 SC5600P50V3KX
1 2 From CPU

2
63.10234.151 R492 D11 TC26 TC25
SB 10K2R3F 1 2 2D5V_PWR_1 1 2 Q41 DY-SSM24-U ST220U4VDM-6 DY-ST220U4VDM-6
2D5V_PWR

2
1
64.10225.651 FDD6688-U ZZ.2R004.C8M 80.22715.191 ZZ.22271.101

2
R2 R1 R467 GAP-CLOSE-PWR 5V_S5 1 84.08896.036
R464 21KR3F Id=85A
3 2K7R3F 64.21025.651 SC G
Rdson=5.7~6.8mOhm
SB 3

3
3
Output Voltage Setting SANYO, NT$:8.8
2

Change Output Voltage 5110A_INV D34


Vo=2.6V S Iripple=2.4A,ESR=25mohm
from 2.5V to 2.6V 5110A_FB_1 C757 1 2 5110A_FB BAW56LT1
7.3/4.3/1.9
(support DDR400) SB
77.22271.101

1
SC3300P50V3KX
R467 = 21KR3F 64.21025.651 Change Q41 from FDD6688-U (84.06688.A37) SB Version:

1
R466 = 10K2R3F 64.10225.651
C761 to FDD8896 (84.08896.036) KEMET ST220U6D3VDM-4 (80.22715.191)
5110ABST SCD1U Iripple=2.2A, ESR=25mohm

2
7.3/4.3/1.9
5110A_LX
5110A_CT 5110A_REF 5110A_SS 2D5V_S3
1

DCBATOUT_5110
C755 C754 C758
SB 2D5V_S3
SC47P SC3300P50V3KX 5V_S5 OCP Setting R468
2

SCD1U R203
1 2
SB 5110A_LDO_CUR 1 2
1

1
9K31R3F
R463 U82 C759 C283 D015R2010
100KR3 1 2 SCD1U

2
5110A_INV 1 24 5110ABST
5110A_FB INV BST 5110A_DH SCD1U
2 23
2

5110A_SS FB DH 5110A_LX
3 SS LX 22

5
6
7
8

1
5110A_SKIP 4 21 5110A_DL
5110A_CT SKIP DL C285
5 CT PGND 20
1

2 5110A_TRIP SC10U10V5ZY 2
6 19

2
R462 5110A_REF GND TRIP DCBATOUT_5110
7 18
DUMMY-R3 5110A_STBY 8 REF VIN_SENSE
17 5V_S5 1D5V
5110A_STBY_LDO9 STBY REG5V_IN U83
STBY_LDO LDO_IN 16 2D5V_S3 Imax=1.8A

1
5110A_FLT 10 15 5110A_LDO_CUR FDS9412-U

D
D
D
D
FLT LDO_CUR 5110A_LDO_GATE
11 14 C760 Id=5A OCP>3.3A
2

4
3
2
1
PG LDO_GATE
1

5110A_INV_LDO 12 13 5110A_LDO_OUT SC10U10V5ZY Rds(on) = 30mohm

2
C729 INV_LDO LDO_OUT 1D5V_S0
SCD1U
2

TPS5110PW-U G54

G
S
S
S
R461 1 2
1 2 5110A_STBY
33,38,39,45 PM_SLP_S5# SC GAP-CLOSE-PWR
10KR3 R436 G53
R433 1 2 1D5V_PWR 1 2
1 2 5110A_STBY_LDO
16,19,33,38,39,43 PM_SLP_S3# very close to IC GAP-CLOSE-PWR GAP-CLOSE-PWR
10KR3 G52
R434 C730 SC2200P50V3JX 1 2
SB

1
1 2 1 2 5110A_LDO_OUT
TC20 GAP-CLOSE-PWR
10KR3F R435 SB Version: ST100U4VBM-1
SB

2
1 2 80.10716.321
G17 KEMET,NT:5.7, B2 size
2 1 8K45R3F ST100U4VBM-1 (80.10716.321) SANYO, NT$:6.1
SC
LDO Output Voltage Setting Iripple=1.1A,ESR=70mohm Iripple=1.1A,ESR=70mohm
GAP-CLOSE 3.5/2.8/2.0
1
Vo=1.518V 1
77.21071.031

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
2D5V_S5/1D5V_S0_TPS5110
Size Document Number Rev
A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 44 of 50
A B C D E
A B C D E

5V_AUX_S5
5/17 power team change
+5V_AUX_S5 C219
SC330P50V3KX 2D5V_S3 1D2V_S0
1 2 LP2951ACM_FB

DCBATOUT Iomax=0.75A

1
U22 5V_S5

1
1 8 C99 C98
C220 C221 OUT INPUT DY-SC10U10V5ZY SC10U10V5ZY
2 7

2
SENSE FB

1
SCD1U DY-SC10U10V5ZY 3 6 C218 ZZ.10693.411 78.10693.411 G40

2
SD 5V/TAP

1
DY-SC1U50V5ZY
4 4 GND 100mA ERROR 5
ZZ.10594.411 2D5V_S3 C60
1 2 4

2
LP2951ACM SCD1U GAP-CLOSE-PWR

2
G41

1
1 2
SB R66 1D2V_LDO 1D2V_HT0A_S0
11K5R3F U7 GAP-CLOSE-PWR
64.11525.651 G42
SB 1 4 1 2

2
APL5331_1D2V_VREF VIN VOUT
3 VREF

1
6 8 GAP-CLOSE-PWR
VCNTL NC

1
7
NC SB

1
R67 C100 2 5 C494 C101
GND NC SC22U10V6ZY-U DUMMY-C3
9

2
10KR3F SC1U10V3ZY GND

2
2

2
APL5331KAC-TR

SO-8-P

2D5V_S3

1
R65
100KR3

3 3

2
HTVDD_EN#_1D2V
U8

1 6

39 1D2V_S0_EN 2 5

APL5331_1D2V_VREF 3 4

2N7002DW

1D25V_S3
2D5V_S3
Iomax=1.5A
1

5V_S5
C342 C343
SC10U10V5ZY DY-SC10U10V5ZY
2

78.10693.411 ZZ.10693.411 G34


1

1 2
2D5V_S3 C313
SCD1U GAP-CLOSE-PWR
2

G35
1

1 2
2 R247 1D25V_LDO 1D25V_S3 2
U33 GAP-CLOSE-PWR
4,11,13,39 1D2V_HT0A_S0 1D2V_HT0A_S0
1KR3F G36
1 4 1 2
2

APL5331_1D25V_VREF VIN VOUT


3 VREF
1

6 8 GAP-CLOSE-PWR
VCNTL NC 16,18,38,41,43,44,46,47,50 DCBATOUT DCBATOUT
1

NC 7
1

R248 C344 2 5 C345 C314


9
GND NC SC22U10V6ZY-U DUMMY-C3 SB
19,21,22,34,38,39,46,49 +5V_AUX_S5
2

1KR3F SCD1U GND +5V_AUX_S5


2
2

21,38,39,43,44,46,48,49 5V_S5 5V_S5


APL5331KAC-TR

SO-8-P 2D5V_S3
SB 5,6,7,8,10,38,39,44,50 2D5V_S3 2D5V_S3

1
R246
100KR3 5,6,7,9,10,39 1D25V_S3 1D25V_S3

2
HTVDD_EN#_1D25V
U32

1 6

33,38,39,44 PM_SLP_S5# 2 5
1 1
APL5331_1D25V_VREF 3 4

2N7002DW Wistron Corporation


21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
1D25V_LDO/3V_AUX/5V_AUX
Size Document Number Rev
A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 45 of 50
A B C D E
DCBATOUT

3
D D32
BT_TH 1 Q14 2 1
2N7002 AD+_TO_SYS 47
G

1
S DY-SSM34

2
R172
DUMMY-R3
U77
5 4 R471

2
AD+ D G
AD+_TO_SYS
6 D S 3 1 2
7 2

1
D S
D 8 1 D02R2512F

1
D S
1 Q15 C789
36 CHARGE_OFF 2N7002 SCD1U50V5ZY
G AO4407

2
1
S R409 R439

1
R173 DUMMY-R3 DUMMY-R3 1645_PDS 4D7R3 R441 R440

1
100KR3 1645_CSSP 1 2 4D7R3
D28 1645_CSSN 1 2

1
2 S1N4148-U R438

1
LDO_VCC 10KR3 C734

2
SCD01U50V3KX C733

2
SCD01U50V3KX

SC10U35V0ZY-U

SC10U35V0ZY-U
5/17 power team change

1
Adaptor is 135W :

4
3
2
1

4
3
2
1
C763

C762
C732 D31
R410 is 75KR3F 64.75025.551

5
6
7
8
1645_DCIN
R410 C700 C701 SC1000P50V3KX S1N4148-U LDO_VCC

G
S
S
S

G
S
S
S
2

AO4407

AO4407
Adaptor is 90W : 75KR3F SC1U50V5ZY SC1U50V5ZY 78.10224.2B1 R442 U85

D
D
D
D
1645_CVS
2

U91

U92
R410 is 26K1R3F 64.26125.651 64.75025.551 2 1 1 2 SI4800BDY

1
U74 C735 33R3
C277
SB SC

D
D
D
D

D
D
D
D
1 28 1 2 SCD1U

G
S
S
S
2

5
6
7
8

5
6
7
8
C686 DCIN CVS
R411 2 27

4
3
2
1
1645_CLS LDO PDS SCD1U
2 1 1 2 3 CLS CSSP 26
46K4R3F 1645_REF 4 25 R469
SC1U10V3ZY 1645_CCS REF CSSN 1645_BST
5 CCS BST 24
1645_CCI 6 23 1645_DH1_1 1 0R3-U 2 1645_DH1_2 L29 R497
1645_CCV_1 1645_CCV CCI DHI 1645_LX
1 2 7 CCV LX 22 1 2 1 2 BT+
R412 8 21 1645_DLOV R470
GND DLOV

1
10KR3 9 20 1645_DLO_1 1 2 1645_DLO_2 IND-15UH-19 D02R2512F
BATT DLO

SC10U25V0KX

SC10U25V0KX

SC10U25V0KX

SCD01U50V3KX
1645_DAC 10 19
DAC PGND

1
11 18 1645_CSIP 0R3-U R443
5V_S5 VDD CSIP

5
6
7
8

C798

C797

C788

C372
SCD01U50V3KX

SCD01U50V3KX

12 17 1645_CSIN DUMMY-R3 1645_LX1


THM CSIN
C702

C703

C687
SCD01U50V3KX

1645_PDL

D
D
D
D
13 16 (10R3)

2
SCL PDL U84
14 15

1 2
SDA INT#
1

SC1U25V5ZY

C704 1645_LX_2
C705

1
SCD1U MAX1645BEEI SI4800BDY
2

C736 C706 C737

G
S
S
S

1
1645_TH

SCD1U50V5ZY SCD1U50V5ZY DUMMY-C3


SB

4
3
2
1
5V_S5 R444 R445
0x12 1R3 1R3

2
1

(SC1000P100V3KX)

2
C707
5V_S5 SC1500P50V3KX
2

G51
1

1 2
1

R397
100KR3 GAP-CLOSE
R413 notice sense resistor noise and trace
10KR3
2

47 BAT+SENSE
2

47,48 BT_TH
47,48 BT_SCL_5
47,48 BT_SDA_5 47 AD+ AD+

16,18,38,41,43,44,45,47,50 DCBATOUT DCBATOUT

47 BT+ BT+

19,21,22,34,38,39,45,49 +5V_AUX_S5 +5V_AUX_S5

Li-ion =>8 Cells (4S2P*2=16.8V)


Ni-Mh =>8 Cells (8*1.8=14.4V)
+5V_AUX_S5 +5V_AUX_S5 LDO_VCC

U70D U70E Low => Li-ion


14

14

TSAHCT14 TSAHCT14 (3.3A=2400mAH*2*0.7C)


R385
33,38,48 AC_IN 8 9 AC_IN# 10 11 A C_IN_R 2 1 High => Ni-MH
(2.5A=4800mAH*0.55C)

1
10KR3 R386
7

10KR3

SB SB

2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CHARGER MAX1645
Size Document Number R ev
Custom SC
EGRET
Date: Friday, July 23, 2004 Sheet 46 of 50
A B C D E

D24 2
Adaptor in to generate DCBATOUT 3
1
AD+
SB SC DY-PZM24NB1 SC
By ME requset change P/N:
DCIN1
From 22.10037.511 U43
To 22.10037.971 1 AD_JK 1 S D 8
2 S D 7

1
3 S D 6

1
AD+_2 4 G D 5 C28 C27
4 2 C11 C12 SCD1U50V5ZY SCD1U50V5ZY 4

2
SCD1U50V3ZY SCD1U50V3ZY

1
3 AO4407

1
Adaptor is 135W : DC-JACK74-U1 R264 ID = -10A/70deg
22.10037.821 4 100KR3 C443
DCIN1 is 22.10037.821 SCD1U Rds(ON) = 24mohm

2
2
Adaptor is 90W : SO-8

2
DCIN1 is 22.10037.971 Q6 E

PDTA124EU
B
5V_S0 AD_OFF#_JK 1

1
R280

1
C
56KR3F
R512

3
1KR3

2
U96

2
1 6 AD_OFF
19,21,22,34,38,39,45,46,49 +5V_AUX_S5 +5V_AUX_S5

1
36 AD_OFF# 2 5
R26
AD_OFF#_JK 16,17,18,19,20,21,22,23,24,27,30,31,32,33,34,37,38,39,41,42,48,49,50 5V_S0 5V_S0
3 4 1KR3
2 46 AD+ AD+
2N7002DW
46 BT+ BT+
SB
3 3

5V_AUX_S5

2
D14 D16 D15

3
DY-BAV99-2 DY-BAV99-2 DY-BAV99-2
BATTERY CONNECTOR ZZ.00099.L01 ZZ.00099.L01 ZZ.00099.L01

D36 BAT1
S1N4148-U 2 1
BAT_IN# 1 2 4 3
33 BAT_IN# R498 1 BTSMCLK
46,48 BT_SCL_5 2 27R3F 6 5
R493 1 2 27R3F BTSMDATA 8 7
BT+ 46,48 BT_SDA_5 BT_TH
46,48 BT_TH 10 9
46 BAT+SENSE 12 11
BT+ 14 13
16 15
2 2

SPD-CONN16D-7
1

1
C373 C799 20.D0091.208
C376 C375 C374
DY-SCD1U SCD1U50V3ZY SC1000P50V3KX SC1000P50V3KX
2

2
78.10224.2B1 78.10224.2B1

DY-SC1000P50V3KX

3D3V_S0
1

R180
DY-10KR3F
DCBATOUT
U27
2

1 VCC RS+ 8 AD+_TO_SYS 46


MAX4373_OUT 2 7
OUT RS- DCBATOUT 16,18,38,41,43,44,45,46,50
3 CIN1 COUT1 6 AD_CURR_DET 33
1

4 GND RESET# 5 RST#_AD_LIM 33


1

R179
C278 DY-4K42R3F
1
DY-SCD1U50V3ZY DY-MAX4373FEUA 1
2

MAX4373_CIN1

Wistron Corporation
1

R178 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


DY-1KR3F Taipei Hsien 221, Taiwan, R.O.C.

Title
2

DC/DC (1/2) -- 5V / 3.3V / 2.5V


Size Document Number Rev
A3 SC
Check Setting Value(6.5A) EGRET
Date: Friday, July 23, 2004 Sheet 47 of 50
A B C D E
A B C D E

+5V_UP_S5

+5V_UP_S5 +5V_UP_S5 5V_S5

1
1 2

1
R419
100KR3 R416 G11
100KR3 GAP-CLOSE-PWR
4 4

2
R420

2
1 2 BL2#
SB

3
1KR3
1 Q17
33 FLASH_GPIO1 PDTC144EU

2
Q39

3
C709 D 2N7002
SCD1U 1 BT_TH 46,47
G

2
S

2
U75

BL2# 2 6
33 BL2# XTAL1/PB3 PB1/MISO/INT0/AIN1 BT_SCL_5 46,47
3 5 ATTINY12_PB0 1 2 1 2
18 CHARGE_LED# XTAL2/PB4 PB0/MOSI/AIN0 AC_IN 33,38,46

1
0V: 4A 1 7 R414 R415
RESET#/PB5 PB2/SCK/T0 BT_SDA_5 46,47
5V: 0A R417 20KR3F 20KR3F
100KR3 4 8
GND VCC +5V_UP_S5

3
+5V_UP_S5

1
1 Q16
33 FLASH_GPIO2

2
ATTINY12L-4SI C708 PDTC144EU
SC1U10V3ZY
3 3

2
5V_S0

U26

1 6 BT_SDA_5
22,33 SMBD_KBC
2 5 +5V_UP_S5
RN17
BT_SCL_5 3 4 BT_SCL_5 2 3
SMBC_KBC 22,33 BT_SDA_5 1 4

2N7002DW SRN10KJ

2 2

13,18,19,20,21,22,24,28,29,33,38,43,49,50 3D3V_S5 3D3V_S5

21,38,39,43,44,45,46,49 5V_S5 5V_S5

18,50 +5V_UP_S5 +5V_UP_S5

1 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Micro-P Tiny 12
Size Document Number Rev
A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 48 of 50
NO USE LOGIC
+5V_AUX_S5
U63B 3D3V_S5 3D3V_S5
5V_S0 5V_S0 3D3V_S0 TSAHCT74 5V_S5

10
SB SB

14

10

14

13

14
9 14

PR
Q VCC
U39D
14

10

14

13

14
D 12
U44C U44D 10
12 CLK 11 9 8 12 11 8
9 8 12 11 11 8 Q 9
TSLCX125 TSLCX125

CL
13 GND 7
U34C U34D U64D

7
TSAHCT125 TSAHCT125 TSLCX08-U TSAHCT08-U
7

13
+5V_AUX_S5

U70F

14
TSAHCT14

13 12

7
SC

SB
SC

HOLE28 HOLE29 HOLE19 HOLE3 HOLE13 HOLE7 HOLE17


HOLEMDC HOLEMDC HOLE2 HOLELCD HOLEVGA HOLEVGA HOLEVGA2 HOLE26 HOLE20
HOLEFAN HOLEFAN
1

1
HOLE2 HOLE9 HOLE5 HOLE6 HOLE14 HOLE15 HOLE12 HOLE16 HOLE18 HOLE21
HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE
1

1
HOLE22 HOLE23 HOLE24 HOLE25 HOLE1 HOLE4 HOLE30
HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE31 HOLE11 HOLE8 HOLE27
HOLE HOLE HOLE3 HOLE
1

1
GND29 GND30 SB GND31 SC SC SB
GNDPADS177X118 SPRING-1 GNDPADS177X118 GND32
ZZ.39S07.001 ZZ.40V16.001 Stuff For UMA Only 34.39S07.001 GNDPAD
ZZ.NDPAD.XXX
GND28 GND27
1

GNDPADS157X118GNDPADS157X118
1

ZZ.41P23.001 ZZ.41P23.001
AUD_AGND
SB

1
SC Stuff For UMA Only
GND1
GND2 GND11 GND13 GND14 SPRING-1 GND4 GND6 GND10 GND15 GND22 GND3 GND8 GND5 GND9 GND12
GNDPAD-S4 GNDPADS126X87 SPRING-1 GNDPADS126X87 ZZ.40V16.001 SPRING-1 GNDPAD GNDPAD GNDPAD GNDPAD GNDPAD GNDPAD GNDPAD GNDPAD GNDPAD
34.45T31.001 34.40V16.001 34.45T31.001 ZZ.40V16.001 Stuff For UMA Only
1

1
GND17 GND18 GND20 GND21 GND7 GND16 GND25 GND24
GND19 GND23 GND26 GNDPAD GNDPAD GNDPAD GNDPAD GNDPADS177X118 GNDPAD GNDPADS157X118
GNDPAD-S2 GNDPADS177X118 SPRING-3 GNDPADS236X354 ZZ.39S07.001 ZZ.41P23.001 Wistron Corporation
34.39S07.001 34.49V19.001 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
1

1
1

Title
MISC
SC Stuff For UMA Only
SC Stuff For UMA Only Size Document Number Rev
A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 49 of 50
A B C D E

SB 3,6,8,11,12,13,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,35,36,38,41,47,49 3D3V_S0 3D3V_S0

3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0


6,12,14,15,16,19,20,21,38,39 2D5V_S0 2D5V_S0

SCD1U
3D3V_S0: 30 pcs

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U
16,17,18,19,20,21,22,23,24,27,30,31,32,33,34,37,38,39,41,42,47,48,49 5V_S0 5V_S0
1

1
C44

C43

C184

C643

C630

C514

C554

C511

C145
2D5V_S0: 8 pcs
12,13,14,15,16,44 1D5V_S0 1D5V_S0
2

2
5V_S0: 10 pcs
1D5V_S0: 4 pcs 5,6,7,8,10,38,39,44,45 2D5V_S3 2D5V_S3
4 4
2D5V_S3: 10 pcs
3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0
DCBATOUT: 10 pcs 16,18,38,41,43,44,45,46,47 DCBATOUT DCBATOUT
DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U
1

1
C56

C49

C89

C80

C74
C110

C491

C144

C111

C117
2

2
3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0

3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0


DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U
1

1
C512

C640

C638

C262

C513

SCD1U

SCD1U

SCD1U

SCD1U

SCD1U

SCD1U
1

1
C24
C428

C436

C493

C524

C462
2

2
SB
3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0
SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

FOR EMI
1

1D5V_S0 1D5V_S0 1D5V_S0


C675

C238

C239

C223

C233

C263

3 3

DECOUPLING CAPS
2

SCD1U

SCD1U

SCD1U
1

1
C97

C59

C425
2

2
2D5V_S0 2D5V_S0 2D5V_S0 2D5V_S0 2D5V_S0 2D5V_S0 2D5V_S0 2D5V_S0
DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U
1

1
C668

C586

C680

C265

C746

C697

C225

C681

2D5V_S0 2D5V_S0 2D5V_S0


2

SCD1U

SCD1U

SCD1U
1

1
C461

C439

C589
2

2
5V_S0 5V_S0 5V_S0 5V_S0 5V_S0 5V_S0 5V_S0 5V_S0 5V_S0 5V_S0
DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U
1

5V_S0 5V_S0 5V_S0 5V_S0 5V_S0 5V_S0 5V_S0


C284

C266

C725

C245

C693

C776

C782

C783

C312

C286
2

SCD1U

SCD1U

SCD1U

SCD1U

SCD1U

SCD1U

SCD1U
1

1
C19

C10
C642

C434

C688

C670

C429
2 2

2
1D5V_S0 1D5V_S0 1D5V_S0 1D5V_S0

3D3V_S5 3D3V_S5 3D3V_S5 3D3V_S5 3D3V_S5


DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U
1

1
C247

C209

C656

C562

SCD1U

SCD1U

SCD1U

SCD1U

SCD1U
2

1
C55
C583

C482

C119

C516
2

2
2D5V_S3 2D5V_S3 2D5V_S3 2D5V_S3 2D5V_S3 2D5V_S3 2D5V_S3 2D5V_S3 2D5V_S3 2D5V_S3
DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U
1

3D3V_S3 3D3V_S3 3D3V_S3 3D3V_S3


C331

C228

C658

C623

C624

C255

C272

C317

C275

C270
2

SCD1U

SCD1U

SCD1U

SCD1U
1

1
C340

C383

C711

C143
2

2
DCBATOUT DCBATOUT DCBATOUT DCBATOUT DCBATOUT DCBATOUT DCBATOUT DCBATOUT DCBATOUT DCBATOUT
1 1

+5V_UP_S5+5V_UP_S5+5V_UP_S5
DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

DY-SCD1U

Wistron Corporation
1

1
C335

C304

C261

C260

C336

C341

C793

C339

C792

C338

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


SCD1U

SCD1U

SCD1U
Taipei Hsien 221, Taiwan, R.O.C.
2

1
C641

C248

C231
Title
EMI
2

2 Size Document Number Rev


A3 SC
EGRET
Date: Friday, July 23, 2004 Sheet 50 of 50
A B C D E

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