CHAPTER 1

Introduction
(Solutions to Review Questions and Problems)

Review Questions
Q1-1. Turing proposed that all kinds of computation could be performed by a special
kind of a machine. He based the model on the actions that people perform
when involved in computation. He abstracted these actions into a model for a
computational machine that has really changed the world.
Q1-2. The von Neumann Model defines the components of a computer, which are
memory, the arithmetic logic unit (ALU), the control unit and the input/output
subsystems.
Q1-3. Based on the Turing model a program is a set of instruction that tells the com-
puter what to do.
Q1-4. The von Neumann model states that the program must be stored in the mem-
ory. The memory of modern computers hosts both programs and their corre-
sponding data.
Q1-5. The subsystems of the von Neumann model are memory, the arithmetic/logic
unit (ALU), the control unit, and the input/output.
Q1-6. Memory is the storage area used for programs and data.
Q1-7. The arithmetic/logic unit (ALU) is where calculations and logical operations
take place.
Q1-8. The control unit controls the operations of the memory, ALU, and the input/
output subsystem.
Q1-9. The input subsystem accepts input data and the program from outside the
computer; the output subsystem sends the result of the processing to the out-
side.
Q1-10. The first generation (roughly 1950–1959) is characterized by the emergence
of commercial computers and were used only by professionals. The second-
generation (roughly 1959–1965) computers used transistors instead of vac-
uum tubes. The third generation (roughly 1965 and 1975.) started with the
invention of the integrated circuit that reduced the cost and size of computers
even further. The fourth generation (approximately 1975–1985) saw the
appearance of microcomputers. The fifth generation, started in 1985, wit-
nessed the appearance of laptop and palmtop computers, improvements in sec-

1
2

ondary storage media (CD-ROM, DVD, etc.), the use of multimedia, and the
phenomenon of virtual reality.

Problems
P1-1. To solve a problem, a computer follows a set of instructions called a program,
This set of instructions is written based on the paper-and-pencil solution to the
problem. If there is no solution to the problem outside of the computer, we
cannot write such a program.
P1-2. According to Turing, any problem that can be solved by a big computer can
also be solve by a small computer but a big computer can probably solve the
problem faster.
P1-3. In the Turing model, a computer consists of input data, output data and a pro-
gram. Pascaline calculator, which is an addition/subtraction machine, is not a
computer according to this model because it lacks the program component.
P1-4. In the Turing model, a computer consists of input data, output data and a pro-
gram. Leibnit’s wheel is not a computer according to this model because it
lacks the program component.
P1-5. In the Turing model, a computer consists of input data, output data and a pro-
gram. In the Jacquard Loom, a program (punch cards) was used to control the
output (the pattern of the loom’s weave). Therefore, based on the Turing
model, it is a computer.
P1-6. The Analytical Engine has all four components of the von Neumann model: a
mill (ALU), a store (memory), an operator (control unit), and output (input/
output), but the program was not stored in the memory. Therefore, it is not a
computer according to the von Neumann model.
P1-7. The first computer based on the von Neumann model was first considered to
be ENVAC (made in 1950). However, there has been controversy and court
battle and in 1973 District Court invalidated the ENIAC patent and concluded
that the ABC (made in 1950) was the first computer.
P1-8. The first keyboard appear with time sharing, multi-user system by 1964 which
is end of the second generation and the beginning of the third generation.
 CHAPTER 2

Number Systems
(Solutions to Review Questions and Problems)

Review Questions
Q2-1. A number system shows how a number can be represented using distinct sym-
bols.
Q2-2. In a positional number system, the position of a symbol determines the value
it represents. In a non-positional number system each symbol has a value but
the position of a symbol normally has no relation to its value; the value of
each symbol is fixed.
Q2-3. The base (or radix) is the total number of symbols used in a positional number
system.
Q2-4. The decimal system is a positional number system that uses ten symbols to
represent a number. The word decimal is derived from the Latin root decem
(ten) or decimalis (related to ten). In the decimal system, the base is 10.
Q2-5. The binary system is a positional number system that uses two symbols (0 and
1) to represent a number. The word binary is derived from the Latin root bini
(two by two) or binarius (related to two). In the binary system, the base is 2.
Q2-6. The octal system is a positional number system that uses eight symbols to rep-
resent a number. The word octal is derived from the Latin root octo (eight) or
octalis (related to eight). In the octal system, the base is 8.
Q2-7. The hexadecimal system is a positional number system with sixteen symbols.
The word hexadecimal is derived from the Greek root hex (six) and the Latin
root decem (ten). To be consistent with decimal and binary, it should have
been called sexadecimal, from Latin roots sex and decem. In the hexadecimal
system, the base is 16.
Q2-8. Conversion is easy because there is a direct relationship between the two systems
(see the answer to question 9).
Q2-9. Four bits in binary is one hexadecimal digit.
Q2-10. Three bits in binary is one octal digit.

1
2

Problems
P2-1.
a.
Place values 16 8 4 2 1
(01101)2 = 0 + 8 + 4 + 0 + 1 = 13

b.
Place values 64 32 16 8 4 2 1
(1011000)2 = 64 + 0 + 16 + 8 + 0 + 0 + 0 = 88

c.
Place values 32 16 8 4 2 1 1/2 1/4
(011110.01)2 = 0 + 16 + 8 + 4 + 2 + 0 + 0 + 1/4 = 30.25

d.
Place values 32 16 8 4 2 1 1/2 1/4 1/8
(111111.111)2 = 32 + 16 + 8 + 4 + 2 + 1 + 1/2 + 1/4 + 1/8 = 63.875

P2-2.
a.
Place values 256 16 1
(AB2)16 = 10 × 256 + 11 × 16 + 2×1 = 2738

b.
Place values 256 16 1
(123)16 = 1 × 256 + 2 × 16 + 3×1 = 291

c.
Place values 256 16 1
(ABB)16 = 10 × 256 + 11 × 16 + 11 × 1 = 2747

d.
Place values 256 16 1 1/16 1/256
(35E.E1)16 = 3 × 256 + 5 × 16 + 14 × 1 + 14 × 1/16 + 1 × 1/256 ≈ 862.879

P2-3.
a.
Place values 64 8 1
(237)8 = 2 × 64 + 3×8 + 7×1 = 159
 3

b.
Place values 512 64 8 1
(2731)8 = 2 × 512 + 7 × 64 + 3×8 + 1×1 = 1497

c.
Place values 512 64 8 1 1/8
(617.7)8 = + 6× 64 + 1×8 + 7×1 + 7×1/8 = 399.875

d.
Place values 8 1 1/8 1/64
(21.11)8 = 2×8 + 1×1 + 1×1/8 + 1 × 1 / 64 ≈ 17.141

P2-4.
a. 1234 = (100 1101 0011)2 as shown below:
0 ← 1 ← 2 ← 4 ← 9 ← 19 ← 38 ← 77 ← 154 ← 308 ← 617 ← 1234
↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓
1 0 0 1 1 0 1 0 0 1 0

b. 88 = (1011000)2 as shown below:

0 ← 1 ← 2 ← 5 ← 11 ← 22 ← 44 ← 88
↓ ↓ ↓ ↓ ↓ ↓ ↓
1 0 1 1 0 0 0

c. 124.02 = (111 1110.00000101)2 as shown below. Note that we start the integral
part from the right, but the fraction par from the left.
0 ← 1 ← 3 ← 7 ← 15 ← 31 ← 62 ← 124
↓ ↓ ↓ ↓ ↓ ↓ ↓
1 1 1 1 1 0 0

.02 → .04 → .08 → .16 → .32 → .64 → .28 → .56 → .12

↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓
• 0 0 0 0 0 1 0 1

d. 14.56 = (1110.100011)2 as shown below:

0 ← 1 ← 3 ← 7 ← 14 .56 → .12 → .24 → .48 → .96 → .92 → .84
↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓
1 1 1 0 • 1 0 0 0 1 1
4

P2-5.
a. 1156 = (2204)8 as shown below:
0 ← 2 ← 18 ← 144 ← 1156
↓ ↓ ↓ ↓
2 2 0 4

b. 99 = (134)8 as shown below:

0 ← 1 ← 12 ← 99
↓ ↓ ↓
1 4 3

c. 11.4 = (13.3146)8 as shown below:

0 ← 1 ← 11 .4 → .2 → .6 → .8 → 4
↓ ↓ ↓ ↓ ↓ ↓
1 3 • 3 1 4 6

d. 72.8 = (110.6314)8 as shown below:

0 ← 1 ← 9 ← 72 .8 → .4 → .2 → .6 → .8
↓ ↓ ↓ ↓ ↓ ↓ ↓
1 1 0 • 6 3 1 4

P2-6.
a. 576 = (237)16 as shown below:
0 ← 2 ← 35 ← 567
↓ ↓ ↓
2 3 7

b. 1411 = (583)16 as shown below:

0 ← 5 ← 88 ← 1411
↓ ↓ ↓
5 8 3

c. 12.13 = (C.2147AE)16 as shown below:

0 ← 12 .13 → .08 → .48 → .68 → .88 → .08
↓ ↓ ↓ ↓ ↓ ↓
C • 2 1 7 A E
 5

d. 16.5 = (10.8)16 as shown below:

0 ← 1 ← 16 .5 → 0
↓ ↓ ↓
1 0 • 8

P2-7.
a.
Change octal to binary Change binary to hexadecimal
(514)8 = 101 001 100 = 1 0100 1100 = (14C)16

b.
Change octal to binary Change binary to hexadecimal
(411)8 = 100 001 001 = 1 0000 1001 = (109)16

c.
Change octal to binary Change binary to hexadecimal
(13.7)8 = 001 111 • 111 = 00 1011 • 1110 = (B.E)16

d.
Change octal to binary Change binary to hexadecimal
(1256)8 = 001 010 101 110 = 0010 0101 1110 = (25E)16

P2-8.
a.
Change Hexadecimal to Binary Change Binary to Octal
(51A)16 = 0101 0001 1010 = 010 100 011 010 = (2432)8

b.
Change Hexadecimal to Binary Change Binary to Octal
(4E1)16 = 0100 1110 0001 = 010 011 100 001 = (2341)8

c.
Change Hexadecimal to Binary Change Binary to Octal
(BB.C)16 = 1011 1011 • 1100 = 010 111 011 • 110 = (273.6)8

d.
Change Hexadecimal to Binary Change Binary to Octal
(ABC.D)16 = 1010 1011 1100 • 1101 = 101 010 111 100 • 110 100 = (5274.64)8
6

P2-9.
a.
(01101)2 = 001 101 = (15)8

b.
(1011000)2 = 001 011 000 = (130)8

c.
(011110.01)2 = 011 110 • 010 = (36.2)8

d.
(111111.111)2 = 111 111 • 111 = (77.7)8

P2-10.
a.
(01101)2 = 1101 = (0D)16

b.
(1011000)2 = 0101 1000 = (58)16

c.
(011110.01)2 = 0001 1110 • 0100 = (1E.4)16

d.
(111111.111)2 = 0011 1111 • 1110 = (3F.E)16

P2-11.
a.
121 = 0 + 64 + 32 + 16 + 8 + 0 + 0 + 1 = (01111001)2

b.
78 = 0 + 64 + 0 + 0 + 8 + 4 + 2 + 0 = (01001110)2

c.
255 = 128 + 64 + 32 + 16 + 8 + 4 + 2 + 1 = (11111111)2

d.
214 = 128 + 64 + 0 + 16 + 0 + 4 + 2 + 0 = (11010110)2
 7

P2-12.
a.
3 5/8 = 2 + 1 + 1/2 + 0 + 1/8 = (11.101)2

b.
12 3/32 = 8 + 4 + 0 + 0 + 0 + 1/16 + 1/32 = (1100.0001100)2

c.
4 13/64 = 4 + 0 + 0 + 1/8 + 1/16 + 0 + 1/64 = (100.0011010)2

d.
12 5/8 = 8 + 4 + 0 + 0 + 0 + 1/32 + 0 + 1/128 = (1100.0000101)2

P2-13.
a. binary: 26 −1 = 63
b. decimal: 106 −1 = 999,999
c. hexadecimal: 166 −1 = 16,777,215
d. octal: 86 −1 = 262,143
P2-14.
a. 5 × (log10) / (log2) = 16.6 = 17
b. 4 × (log10) / (log8) = 4.4 = 5
c. 7 × (log10) / (log16) = 5.8 = 6
P2-15.
a. 5 × (log2) / (log10) = 16.6 = 2
b. 3 × (log8) / (log10) = 16.6 = 3
c. 3 × (log16) / (log10) = 16.6 = 4
P2-16.
a. 0.1875 = 0.125 + 0.0625 = (1/8) + (1/16) = (3/16)
b. 0.640625 = 0.5 + 0.125 + 0.015625 = (1/2) + (1/8) + (1/64) = (41/64)
c. 0.40625 = 0.25 + 0.125 + 0.03125 = (1/4) + (1/8) + (1/32) = (13/32)
d. 0.375 = 0.25 + 0.125 = (1/4) + 1/8) = 3/8
P2-17. Using the result of previous exercise, we can find the equivalent as:
a. 7.1875 = (111)2 + (0.001)2 + (0.0001)2 = (111.0011)2
b. 12.540625 = (1100)2 + (0.1)2 + (0.001)2 + (0.000001)2 = (1100.101001)2
8

c. 11.40625 = (1011)2 + (0.01)2 + (0.001)2 + (0.00001)2 = (1011.01101)2

d. 0.375 = (0.01)2 + (0.001)2 = (0.011)2
P2-18.
a. 1010 − 1 = 999
b. 221 − 1 = 4095
c. 88 − 1 = 16,777,215
d. 167 − 1 = 268,435,455
P2-19.
a. log21000 = log1000 / log2 = 9.97 = 10
b. log2100,000 = log100,000 / log2 = 16.6 = 17
c. log264 = log226 = 6 × log22 = 6 = 6
d. log2256 = log228 = 8 × log22 = 8 = 8
P2-20.
a. 14
b. 8
c. 13
d. 4

P2-21.
a.

17 × 2563 + 234 × 2562 + 34 × 2561 + 14 × 2560 = 300,556,814

b.

14 × 2563 + 56 × 2562 + 234 × 2561 + 56 × 2560 = 238,611,000

c.

110 × 2563 + 14 × 2562 + 56 × 2561 + 78 × 2560 = 1,864,425,678

d.

24 × 2563 + 56 × 2562 + 13 × 2561 + 11 × 2560 = 406,326,539

 9

P2-22.
a.

00010001 11101010 00100010 00001110

b.

00001110 00111000 11101010 00111000

c.

01101110 00001110 00111000 01001110

d.

00011000 00111000 00001101 00001011

P2-23.
a. 15
b. 27
c. This is not a valid Roman Numeral (V cannot come before L)
d. 1157
P2-24.
a. XVII
b. XXXVIII
c. LXXXII
d. CMXCIX
P2-25.
a. Not valid because I cannot come before M
b. Not valid because I cannot come before C
c. Not valid because V cannot come before C
d. Not valid because 5 is written as V not VX
P2-26.
a. First, we convert the four numbers to base 20 as shown below:
0 ← 12 0 ← 6 ← 123
↓ ↓ ↓
12 6 3

0 ← 1 ← 22 ← 452 0 ← 3 ← 62 ← 1256
↓ ↓ ↓ ↓ ↓ ↓
1 2 12 3 2 16
10

b. The equivalent Myan numerals are shown in Figure P2-26.

Figure P2-26 Myan numerals

12 123 = (6, 3)20 452 = (1, 2, 12)20 1256 = (3, 2, 16)20

P2-27.
a. First, we convert the three numbers to base 60 as shown below:
0 ← 3 ← 188 ← 11291 0 ← 1 ← 60 ← 3646 0 ← 59 ← 3582
↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓
3 8 11 1 0 46 59 42

b. The equivalent Babylonian numerals are shown in Figure P2-27.

Figure P2-27 Babylonian numerals

11291 = (3, 8, 11)60 3646 = (1, 0, 46)60 3582 = (59, 42)60

c. In Babylonian numerals, they used extra space when a zero was needed in the
middle of the number. When a zero was need at left, they did not use anything;
They probably recognized it from the context.
 CHAPTER 3

Data Storage
(Solutions to Review Questions and Problems)

Review Questions
Q3-1. We discussed five data types: numbers, text, audio, images, and video.
Q3-2. If the length of the bit pattern is L bits, the number of symbols that can be rep-
resented by the bit pattern is 2L.
Q3-3. In the bitmap graphic method each pixel is represented by a bit pattern.
Q3-4. In vector graphic method, the size of the file is smaller and the image can be
easily rescaled. However, vector graphic can not be used to represent the
details of colors in a photo.
Q3-5. The three steps are sampling, quantization, and encoding.
Q3-6. Representations are the same except that the representable range of positive
integers in unsigned method is twice the other methods.
Q3-7. In both representations, the upper half of the range represents the negative
numbers. However, the wrapping is different. In addition, there are two zeros
in sign-and-magnitude but only one in two’s complement.
Q3-8. In the signed-and-magnitude representation, there are two zeros. In two’s
complement representation there is only one zero. In the excess representa-
tion, zero is represented by a positive number (bias) such as +127 and +1023.
Q3-9. In both systems, the leftmost bit represents the sign. If the leftmost bit is 0, the
number is positive; if it is 1, the number is negative.
Q3-10.
a. Normalization is necessary to make calculations easier.
b. Mantissa is the bit sequence to the right of the decimal point after normal-
ization.
c. The computer stores the sign of the number, the exponent, and the man-
tissa.

Problems
P3-1. 25 = 32 patterns.
P3-2. 102 = 100 if zero is allowed. 92 = 81 if zero is not allowed.

1
2

P3-3.
a. If zero is allowed, (102 for numbers) × (263 for letters) = 1757600.
b. If zero is not allowed, (92 for numbers) × (263 for letters) = 1423656.
P3-4. 2n = 8 → n =3 or log28 = 3.
P3-5. 2n = 7 → n ≈3 or log27 = 2.81 → 3.
P3-6. 2n = 900 → n ≈ 10 or log2900 = 9.81 → 10. With n = 10 we can uniquely
assign 210 = 1024 bit pattern. Then 1024 − 900 = 124 patterns are unassigned.
These unassigned patterns are not sufficient for extra 300 employees. If the
company hires 300 new employees, it is needed to increase the number of bits
to 11.
P3-7. 24 − 10 = 6 are wasted.
P3-8. 256 level can be represented by 8 bits because 28 = 256. Therefore, the num-
ber of bits per seconds is
(8000 sample/ sec) × (8 bits / sample) = 64,000 bits /seconds
P3-9.
a. 23 = 16 + 4 + 2 +1 = (0000 1011)2
b. 121 = 64 + 32 + 16 + 8 +1 = (0111 1001)2
c. 34 = 32 +2 = (0010 0010)2.
d. Overflow occurs because 342 > 255.

P3-10.
a. 41 = 32 + 8 +1 = (0000 0000 0010 1001)2.
b. 411 = 256 + 128 + 16 + 8 + 2 + 1 = (0000 0001 1001 1011)2.
c. 1234 = 1024 + 128 + 64 + 16 + 2 = (0000 0100 1101 0010)2.
d. 342 = 256 + 64 + 16 + 4 + 2 = (0000 0001 0101 0110)2.
P3-11.
a. −12 =

Convert 12 to binary 0 0 0 0 1 1 0 0
Apply two’s complement operation 1 1 1 1 0 1 0 0

b. Overflow occurs because −145 is not in the range −128 to +127.

c. 56 =

Convert 56 to binary 0 0 1 1 1 0 0 0

d. Overflow occurs because 142 is not in the range −128 to +127.

P3-12.
a. 102 =

Convert 102 to binary 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0

 3

b. −179 =

Convert 179 to binary 0 0 0 0 0 0 0 0 1 0 1 1 0 0 1 1

Apply two’s complement operation 1 1 1 1 1 1 1 1 0 1 0 0 1 1 0 1

c. 534 =

Convert 534 to binary 0 0 0 0 0 0 1 0 0 0 0 1 0 1 1 0

d. Over flow because 62,056 is not in the range (−32768, +32767).

P3-13.
a. 0110 1011 = 64 + 32 + 8 + 2 +1 = 107.
b. 1001 0100 = 128 + 16 + 4 = 148.
c. 0000 0110 = 4 + 2 = 6.
d. 0101 0000 = 64 + 16 = 80.
P3-14.
a. 0111 0111 =

Leftmost bit is 0. The sign is + 0 1 1 1 0 1 1 1

Integer changed to decimal 119
Sign is added + 119

b. 1111 1100 =

Leftmost bit is 1. The sign is − 1 1 1 1 1 1 0 0

Apply two’s complement operation 0 0 0 0 0 1 0 0
Integer changed to decimal 4
Sign is added −4

c. 0111 0100 =

Leftmost bit is 0. The sign is + 0 1 1 1 0 1 0 0

Integer changed to decimal 116
Sign is added + 116

d. 1100 1110 =

Leftmost bit is 1. The sign is − 1 1 0 0 1 1 1 0

↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓
Apply two’s complement operation 0 0 1 1 0 0 1 0
Integer changed to decimal 50
Sign is added −50
4

P3-15. We change the sign of the number by applying the two’s complement opera-
tion.
a. 01110111 → 10001001
b. 11111100 → 00000100
c. 01110111 → 10001001
d. 11001110 → 00110010
P3-16.
a. 01110111 → 10001001 → 01110111
b. 11111100 → 00000100 → 11111100
c. 01110100 → 10001100 → 01110100
d. 11001110 → 00110010 → 11001110
P3-17.
a.

1.10001 = 20 × 1.10001

b.

23 × 111.1111 = 25 × 1.111111

c.

2−2 × 101.110011 = 20 × 1.01001100

d.

2−5 × 101101.00000110011000 = 20 × 1.0110100000110011000

P3-18.
a. S = 1,
E = 0 + 127 = 127 = (01111111)2,
M = 10001 (plus 18 zero added at the right to make the number of bits 23)
1 01111111 10001000000000000000000
b. S = 0,
E = 3 + 127 = 130 = (10000010)2,
M = 111111 (plus 17 zero added at the right)
0 10000010 11111100000000000000000
c. S = 0
E = −4 + 127 = 123 = (01111011)2,
M = 01110011 (plus 15 zero added at the right)
0 01111011 01110011000000000000000
 5

d. S = 1
E = −5 + 127 = 122 = (01111010)2,
M = 01101000 (plus 15 zero added at the right)
1 01111010 01101000000000000000000
P3-19.
a. S = 1
Ε = 0 + 1023 = 1023 = (01111111111)2,
M = 10001 (plus 47 zero added at the right)
1 01111111111 1000100000000000000000000000000000000000000000000000
b. S = 0
E = 3 + 1023 = 1026 = (10000000010)2
M = 111111 (plus 46 zero added at the right)
0 10000000010 1111110000000000000000000000000000000000000000000000
c. S = 0
E = −4 + 1023 = 1019 = (01111111011)2
M = 01110011 (plus 44 zero added at the right)
0 01111111011 0111001100000000000000000000000000000000000000000000
d. S = 1
E = −5 + 1023 = (01111111010)2
M = 01101000 (plus 44 zero added at the right)
1 01111111010 0110100000000000000000000000000000000000000000000000
P3-20.
a. 7.1875 = (111.0011)2 = 22 × 1.110011
S=0
E = 2 + 127 = 129 = (10000001)2
M = 110011 (plus 17 zero at the right)
0 10000001 11001100000000000000000
b. −12.640625 = (−1100.101001)2 = − 23 × 1.100101001
S=1
E = 3 + 127 = 130 = (10000010)2
M = 100101001 (plus 14 zero at the right)
1 10000010 10010100100000000000000
c. 11.40625 = (1011.01101)2 = 23 × 1.01101101
S=0
E = 3 + 127 = 130 = (10000010)2
M = 01101101 (plus 15 zero at the right)
0 10000010 01101101000000000000000
d. −0.375 = −0.011 = − 2−2 × 1.1
S=1
E = −2 + 127 =125 = (01111101)2
M = 1 (plus 22 zero at the right)
1 01111101 10000000000000000000000
P3-21.
6

a. (01110111)2 =

0 1 1 1 0 1 1 1
+ 64 32 16 0 4 2 1 → +119

b. (11111100)2 =

1 1 1 1 1 1 0 0
− 64 32 16 8 4 2 1 → −124

c. (01110100)2 =

0 1 1 1 0 1 0 0
+ 64 32 16 0 4 0 0 → +116

d. (11001110)2 =

1 1 0 0 1 1 1 0
− 64 0 0 8 4 2 0 → −78

P3-22.
a. 53 = 32 + 16 + 4 + 1 =

+ 0 32 16 0 4 0 1
0 0 1 1 0 1 0 1 = 0011 0101

b. −107 = − (64 + 32 + 8 + 2 + 1) =

− 64 32 0 8 0 2 1
1 1 1 0 1 0 1 1 = 1110 1011

c. −5 = − (4+1) = 10000101

− 0 0 0 0 4 0 1
1 0 0 0 0 1 0 1 = 1000 0101

d. 154 creates overflow because 154 is not in the range −127 to +127.
P3-23.
a. (53)16 =

Convert 53 to binary 0 1 0 1 0 0 1 1
 7

b. (−107)16 =

Convert 107 to binary 0 1 1 0 1 0 1 1

Apply one’s complement operation 1 0 0 1 0 1 0 0

c. (−5)16 =

Convert 5 to binary 0 0 0 0 0 1 0 1
Apply one’s complement operation 1 1 1 1 1 0 1 0

d. (154)16 = Overflow because 154 is not in the range of −127 to 127

P3-24.
a. (01110111)2 =

Leftmost bit is 0. The sign is + 0 1 1 1 0 1 1 1

Integer changed to decimal 119
Sign is added +119

b. (11111100)2 =

Leftmost bit is 1. The sign is − 1 1 1 1 1 1 0 0

Apply one’s complement operation 0 0 0 0 0 0 1 1
Integer changed to decimal 3
Sign is added −3

c. (01110100)2 =

Leftmost bit is 0. The sign is + 0 1 1 1 0 1 0 0

Integer changed to decimal 116
Sign is added +116

d. (11001110)2 =

Leftmost bit is 1. The sign is − 1 1 0 0 1 1 1 0

One’s complement 0 0 1 1 0 0 0 1
Integer changed to decimal 49
Sign is added −49

P3-25.
a. 01110111 → 10001000 → 01110111
b. 11111100 → 00000011 → 11111100
c. 01110100 → 10001011 → 01110100
8

d. 11001110 → 00110001 → 11001110

P3-26.
a. (01110111)2

One’s complement = 10001000

+1
Two’s complement 10001001

b. (11111100)2

One’s complement = 00000011

+1
Two’s complement 00000100

c. (01110100)2

One’s complement = 10001011

+1
Two’s complement 10001100

d. (11001110)2

One’s complement 00110001

+1
Two’s complement 00110010

P3-27.
a. With 3 digits we can express 103 = 1000 integers, 500 for positives and 500
negatives. Then we can represent numbers in the range of −499 to 499.
b. The first digit determine the sign of the number. The number is positive if
the first digit is 0 to 4 and negative if the first digit is 5 to 9.
c. We have two zeros, one positive and one negative.
d. +0 = 000 and −0 = 999.
P3-28.
a. +234 → 234.
b. +560 → Overflow because 560 is not in the range −499 to 499.
c. −125 → 874.
d. −111 → 888.
P3-29.
a. With 3 digits we can represent 103 = 1000 integers, 500 for zero and posi-
tives and 500 for negatives. Then we can represent numbers in the range of
−500 to 499.
 9

b. The first digit determine the sign of the number. The number is zero or pos-
itive if the first digit is 0 to 4 and negative if the first digit is 5 to 9.
c. No, there is only one representation for zero (0 = 000).
d. NA.
P3-30.
a. +234 → 234.
b. +560 → Overflow because 560 is not in the range −500 to 499.
c. −125 → 874 + 1 = 875.
d. −111 → 888 + 1 = 889.
P3-31.
a. With 3 digits we can represent 163 = 4096 integers, 2048 for positives and
2048 for negatives. Then we can represent numbers in the range of (−
7FF)16 to (7FF)16.
b. The fifteen’s complement of a positive number is itself. To find the fifteen
complement of negative numbers, we subtract each digit from 15.
c. We have two zeros, a positive zero and a negative zero.
d. +0 = (000)16 and −0 = (EEE)16.
P3-32.
a. (+B14)16 → (B14)16.
b. (+FE1)16 → Overflow because it is not in the range (−7FF)16 to (7FF)16.
c. (−1A)16 = (−01A)16 → (FE5)16.
d. (−1E2)16 → (E1D)16.
P3-33.
a. With 3 digits we can represent 163 = 4096 integers, 2048 for zero and posi-
tives and 2048 for negatives. Then we can represent numbers in the range
of (−800)16 to (7FF)16.
b. If the number is positive, the complement of the number is itself. If the
number is negative we find the fifteen’s complement and add 1 to it.
c. No, there is only one zero, (000)16.
d. NA.
P3-34.
a. (+B14)16 → (B14)16.
b. (+FE1)16 → Overflow occurs because it is not in the range (−800)16 to
(7FF)16.
c. (−1A)16 = (−01A)16 → (FE5 +1)16 = (FE6)16.
d. (−1E2)16 → (E1D +1)16 = (E1E)16.
 CHAPTER 4

Operations On Data
(Solutions to Solution to Review Questions and Problems)

Review Questions
Q4-1. Arithmetic operations interpret bit patterns as numbers. Logical operations
interpret each bit as a logical value (true or false).
Q4-2. The leftmost carry is discarded.
Q4-3. The bit allocation can be 1. In this case, the data type normally represents a
logical value.
Q4-4. Overflow happens when the result of an arithmetic operation is outside the
range of allocated values.
Q4-5. The decimal point of the number with the smaller exponent is shifted to the
left until the exponents are equal.
Q4-6. A unary operation takes a single operand. A binary operation takes two oper-
ands.
Q4-7. The common logical binary operations are: AND, OR, and XOR.
Q4-8. A truth table lists all possible input combinations with the corresponding out-
puts.
Q4-9. The NOT operation inverts logical values (bits): it changes true to false and
false to true.
Q4-10. The result of an AND operation is true when both of the operands are true.
Q4-11. The result of an OR operation is true when one or both of the operands are
true.
Q4-12. The result of an XOR operator is true when the operands are different.
Q4-13. An important property of the AND operator is that if one of the operands is
false, the result is false.
Q4-14. An important property of the OR operator is that if one of the operands is true,
the result is true.
Q4-15. An important property of the XOR operator is that if one of the operands is
true, the result will be the inverse of the other operand.
Q4-16. The OR operator can be used to set bits. Set the desired positions in the mask
to 1.

1
2

Q4-17. The AND operator can be used to clear bits. Set the desired positions in the
mask to 0.
Q4-18. The XOR operator can be used to invert bits. Set the desired positions in the
mask to 1.
Q4-19. The logical shift operation is applied to a pattern that does not represent a
signed number. The arithmetic shift operation assumes that the bit pattern is a
signed number in two’s complement format.

Problems
P4-1.

a. NOT (99)16 = NOT (10011001)2 = (01100110)2 = (99)16

b. NOT (FF)16 = NOT (11111111)2 = (00000000)2 = (00)16
c. NOT (00)16 = NOT (00000000)2 = (11111111)2 = (FF)16
d. NOT (01)16 = NOT (00000001)2 = (11111110)2 = (FE)16

P4-2.

a. (99)16 AND (99)16 = (10011001)2 AND (10011001)2 = (10011001)2 = (99)16

b. (99)16 AND (00)16 = (10011001)2 AND (00000000)2 = 00000000)2 = (00)16
c. (99)16 AND (FF)16 = (10011001)2 AND (11111111)2 = (10011001)2 = (99)16
d. (99)16 AND (FF)16 = (11111111)2 AND (11111111)2 = (11111111)2 = (FF)16

P4-3.

a. (99)16 OR (99)16 = (10011001)2 OR (10011001)2 = (10011001)2 = (99)16

b. (99)16 OR (00)16 = (10011001)2 OR (00000000)2 = (10011001)2 = (99)16
c. (99)16 OR (FF)16 = (10011001)2 OR (11111111)2 = (11111111)2 = (FF)16
d. (FF)16 OR (FF)16 = (11111111)2 OR (11111111)2 = (11111111)2 = (FF)16

P4-4.
a.
NOT[(99)16 OR (99)16] = NOT [(10011001)2 OR (10011001)2] = (01100110)2 = (66)16

b.
(99)16 OR [NOT (00)16] = (10011001)2 OR [NOT (00000000)2]
= (10011001)2 OR (11111111)2 = (11111111)2 = (FF)16

c.
[(99)16 AND (33)16] OR [(00)16 AND (FF)16)
= [(10011001)2 AND (00110011)2] OR [(00000000)2 AND (11111111)2]
= (00010001)2 OR (00000000)2 = (00010001)2 = (11)16
 3

d.
[(99)16 OR (33) 16] AND [(00)16 OR (FF)16]
= [(10011001)2 OR (00110011)2] AND [(00000000)2 OR (11111111)2]
= (10111011)2 AND (11111111)2 = (10111011)2 = (BB)16

P4-5.
Mask = (00001111)2
Operation: Mask AND (xxxxxxxx)2 = (0000xxxx)2

P4-6.
Mask = (00001111)2
Operation: Mask OR (xxxxxxxx)2 = (xxxx1111)2

P4-7.
Mask: (11000111)2
Operation: Mask XOR (xxxxxxxx)2 = (yyxxxyyy)2, where y is NOT x

P4-8.
Mask1= (00011111)2 Mask2 = (00000011)2
Operation: [Mask1 AND (xxxxxxxx)2] OR Mask2 = (000xxx11)2

P4-9. Arithmetic right shift divides an integer by 2 (the result is truncated to a

smaller integer). To divide an integer by 4, we apply the arithmetic right shift
operation twice.
P4-10. Arithmetic left shift multiplies an integer by 2. To multiply an integer by 8, we
apply the arithmetic left shift operation three times.
P4-11. We assume that extraction is for bits 4 and 5 from left. Let the integer in ques-
tion be (abcdefgh)2.
a. Apply logical right shift operation on (abcdefgh)2 three times to obtain
(000abcde)2.
b. Let (000abcde)2 AND (00000001)2 to extract the fifth bit: (0000000e)
c. Apply logical right shift operation on (000abcde)2 once to obtain
(0000abcd)2
d. Let (0000abcd)2 AND (00000001 )2 to extract the fourth bit: (0000000d)
4

P4-12.

a. 00010011 + 00010111

1 1 1 1 Carry Decimal
0 0 0 1 0 0 1 1 19
+ 0 0 0 1 0 1 1 1 23
0 0 1 0 1 0 1 0 42

b. 00010011 − 00010111 = 000010011 + (−00010111) = 00010011 +

11101001 =

1 1 Carry Decimal
0 0 0 1 0 0 1 1 19
+ 1 1 1 0 1 0 0 1 -23
1 1 1 1 1 1 0 0 -4

c. (−00010011) + 00010111 = 11101101 + 00010111

1 1 1 1 1 1 1 1 Carry Decimal
1 1 1 0 1 1 0 1 -19
+ 0 0 0 1 0 1 1 1 23
0 0 0 0 0 1 0 0 4

d. (−00010011) − 00010111 = (−00010011) + (−00010111) =

11101101 + 11101001 =

1 1 1 1 1 Carry Decimal
1 1 1 0 1 1 0 1 -19
+ 1 1 1 0 1 0 0 1 -23
1 1 0 1 0 1 1 0 -42

P4-13.
a. 00000000 10100001 + 00000011 11111111 =

1 1 1 1 1 1 1 1 1 1 Carry Decimal
0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 1 161
+ 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1023
0 0 0 0 0 1 0 0 1 0 1 0 0 0 0 0 1184
 5

b. 00000000 10100001 − 00000011 11111111 = 00000000 10100001 +

(−00000011 11111111) = 00000000 10100001 + 11111100 00000001 =

1 Carry Decimal
0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 1 161
+ 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 1 -1023
1 1 1 1 1 1 0 0 1 0 1 0 0 0 1 0 -862

c. (−00000000 10100001) + 00000011 11111111 = 11111111 01011111 +

00000011 11111111 =

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Carry Decimal
1 1 1 1 1 1 1 1 0 1 0 1 1 1 1 1 -161
+ 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1023
0 0 0 0 0 0 1 1 0 1 0 1 1 1 1 0 862

d. (-00000000 10100001) − 00000011 11111111 = (−00000000 10100001) +

(−00000011 11111111) = 11111111 01011111 + 11111100 00000001 =

1 1 1 1 1 1 1 1 1 1 1 Carry Decimal
1 1 1 1 1 1 1 1 0 1 0 1 1 1 1 1 −161
+ 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 1 −1023
1 1 1 1 1 0 1 1 0 1 1 0 0 0 0 0 −1184

P4-14. Addition of two integers does not create overflow if the result is in the range
(−128 to +127).
a. Addition does not create overflow because (−62) + (+63) = 1 (in the range).
b. Addition does not create overflow because (+2) + (+63) = 65 (in the
range).
c. Addition does not create overflow because (−62) + (−1) = −63 (in the
range).
d. Addition does not create overflow because (+2) + (−1) = 1 (in the range).
P4-15.
a. There is overflow because 32 + 105 = 137 is not in the range (−128 to
+127).
b. There is no overflow because 32 − 105 = −73 is in the range (−128 to
+127).
c. There is no overflow because −32 + 105 = 73 is in the range (−128 to
+127).
d. There is overflow because −32 − 105 = −137 is not in the range (−128 to
+127).
6

P4-16.
a.

1 1 1 1 Carry Hexadecimal
0 0 0 0 0 0 0 1 0 0 1 0 1 0 1 0 012A
+ 0 0 0 0 1 1 1 0 0 0 1 0 0 1 1 1 0E27
0 0 0 0 1 1 1 1 0 1 0 1 0 0 0 1 0F51

b.

1 1 1 1 Carry Hexadecimal
0 1 1 1 0 0 0 1 0 0 1 0 1 0 1 0 712A
+ 1 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 9E00
0 0 0 0 1 1 1 1 0 0 1 0 1 0 1 0 10F2A

Note that the result is not valid because of overflow.

c.

1 Carry Hexadecimal
1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 8011
+ 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0001
1 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 8012

d.

1 1 1 1 1 Carry Hexadecimal
1 1 1 0 0 0 0 1 0 0 1 0 1 0 1 0 E12A
+ 1 0 0 1 1 1 1 0 0 0 1 0 0 1 1 1 9E27
0 1 1 1 1 1 1 1 0 1 0 1 0 0 0 1 17F51

Note that the result is not valid because of overflow.

P4-17. Number are stored in sign-and-magnitude format
a. 19 + 23 → A = 19 = (00010011)2 and B = 23 = (00010111)2.
Operation is addition; sign of B is not changed. S = AS XOR B S = 0, RM =
AM + BM and RS = AS

No overflow 1 1 1 1 Carry
AS 0 0 1 0 0 1 1 AM
BS + 0 0 1 0 1 1 1 BM
RS 0 1 0 1 0 1 0 RM

The result is (00101010)2 = 42 as expected.

 7

b. 19 − 23 → A = 19 = (00010011)2 and B = 23 = (00010111) 2. Operation is

subtraction, sign of B is changed. BS = BS, S = AS XOR BS = 1, RM = AM
+ (BM +1). Since there is no overflow RM = (RM +1) and RS = BSThe result
No overflow 1 1 Carry
AS 0 0 1 0 0 1 1 AM
BS + 1 1 0 1 0 0 1 (BM +1)
1 1 1 1 1 0 0 RM
RS 0 0 0 0 1 0 0 RM = (RM +1)

(10000100)2 = −4 as expected.
c. −19 + 23 → A = −19 = (10010011)2 and B = 23 = (00010111)2. Operation
is addition, sign of B is not changed. S = AS XOR BS = 1, RM = AM + (BM
+1). Since there is no overflow RM = (RM +1) and RS = BS
No overflow 1 1 Carry
AS 0 0 1 0 0 1 1 AM
BS + 1 1 0 1 0 0 1 (BM +1)
1 1 1 1 1 0 0 RM
RS 0 0 0 0 1 0 0 RM = (RM +1)

The result is (00000100)2 = 4 as expected.

d. −19 − 23 → A = −19 = (10010011)2 and B = 23 = (00010111) 2. Operation
is subtraction, sign of B is changed. S = A S XOR BS = 0, RM = AM + BM
and RS = AS
No overflow 1 1 1 1 Carry
AS 0 0 1 0 0 1 1 AM
BS + 0 0 1 0 1 1 1 BM
RS 0 1 0 1 0 1 0 RM

The result is (10101010)2 = −42 as expected.

P4-18.
a. 34.75 + 23.125 = (100010.11)2 + (10111.001)2 = 25 × (1.0001011)2 + 24 ×
(1.0111001)2. These two numbers are stored in floating-point format as
shown, but we need to remember that each number has a hidden 1 (which is
not stored, but assumed). E1 = 127 + 5 = 132 = (10000100)2 and E2 = 127
+ 4 = 131 = (10000011)2. The first few steps in UML diagram is not
needed. We move to denormalization. We denormalize the numbers by
adding the hidden 1’s to the mantissa and incrementing the exponent.

S E M
A 0 10000100 00010110000000000000000
B 0 10000011 01110010000000000000000

Now both denormalized mantissas are 24 bits and include the hidden 1’s.
They should store in a location to hold all 24 bits. Each exponent is incre-
8

mented.

S E Denormalized M
A 0 10000101 100010110000000000000000
B 0 10000100 101110010000000000000000

We align the mantissas. We increment the second exponent by 1 and shift

its mantissa to the right once.

S E Denormalized M
A 0 10000101 100010110000000000000000
B 0 10000101 010111001000000000000000

Now we do sign-and-magnitude addition treating the sign and the mantissa

of each number as one integer stored in sign-and-magnitude representation.

S E Denormalized M
R 0 10000101 11100111100000000000000

There is no overflow in mantissa, so we normalized.

S E M
R 0 10000100 1100111100000000000000

The mantissa is only 23 bits because there is no overflow, no rounding is

needed.
E = (10000100)2 = 132, M = 11001111
In other words, the result is
(1.11001111)2 × 2132−−127 = (111001.111)2 = 57.875

b. −12.625 + 451 = − (1100.101)2 + (111000011)2 = −23 × (1.100101)2 + 28

× (1.11000011)2. These two numbers are stored in floating-point format as
shown, but we need to remember that each number has a hidden 1 (which is
not stored, but assumed). E1 = 127 + 3 = 130 = (10000010)2 and E2 = 127
+ 8 = 135 = (10000111)2

S E M
A 1 10000010 10010100000000000000000
B 0 10000111 11000011000000000000000

The first few steps in UML diagram is not needed. We move to denormal-
ization. We denormalize the numbers by adding the hidden 1’s to the man-
tissa and incrementing the exponent. Now both denormalized mantissas are
 9

24 bits and include the hidden 1’s. They should store in a location to hold
all 24 bits. Each exponent is incremented.

S E Denormalized M
A 1 10000011 110010100000000000000000
B 0 10001000 111000011000000000000000

We align the mantissas. We increment the first exponent by 5 and shift its
mantissa to the right five times.

S E Denormalized M
A 1 10001000 000001100101000000000000
B 0 10001000 111000011000000000000000

Now we do sign-and-magnitude addition treating the sign and the mantissa

of each number as one integer stored in sign-and-magnitude representation.

S E Denormalized M
R 0 10001000 110110110011000000000000

There is no overflow in mantissa, so we normalized.

S E M
R 0 10000111 10110110011000000000000

The mantissa is only 23 bits because there is no overflow, no rounding is

needed. E = (10000111)2 = 135, M = 10110110011
In other words, the result is
(1.10110110011)2 × 2135−−127 = (110110110.011)2 = 438.375

c. 33.1875 − 0.4375 = (100001.0011)2 − (0.0111)2 = 25 × (1.000010011)2 −

2−2 × (1.11)2. These two numbers are stored in floating-point format as
shown, but we need to remember that each number has a hidden 1 (which is
not stored, but assumed). E1 = 127 + 5 = 132 = (10000100)2 and E2 = 127
+ (−2) = 125 = (01111101)2

S E M
A 0 10000100 00001001100000000000000
B 0 01111101 11000000000000000000000

The first two steps in UML diagram is not needed. Since the operation is
subtraction, we change the sine of the second number.
10

S E M
A 0 10000100 00001001100000000000000
B 1 01111101 11000000000000000000000

We denormalize the numbers by adding the hidden 1’s to the mantissa and
incrementing the exponent. Now both denormalized mantissas are 24 bits
and include the hidden 1’s. They should store in a location to hold all 24
bits. Each exponent is incremented.

S E Denormalized M
A 0 10000101 100001001100000000000000
B 1 01111110 111000000000000000000000

We align the mantissas. We increment the second exponent by 7 and shift

its mantissa to the right seven times.

S E Denormalized M
A 0 10000101 100001001100000000000000
B 1 10000101 000000011100000000000000

Now we do sign-and-magnitude addition treating the sign and the mantissa

of each number as one integer stored in sign-and-magnitude representation.

S E Denormalized M
R 0 10000101 100000110000000000000000

There is no overflow in mantissa, so we normalized.

S E M
R 0 10000100 00000110000000000000000

The mantissa is only 23 bits because there is no overflow, no rounding is

needed.
E = (10000100)2 = 132, M = 0000011
The result is
(1.0000011)2 × 2132−−127 = (100000.11)2 = 32.75

d. −344.3125 − 123.5625 = − (101011000.0101)2 − (1111011.1001 )2 = 28 ×

(1.010110000101)2 − 26 × (1.1110111001)2. These two numbers are stored
in floating-point format as shown, but we need to remember that each num-
ber has a hidden 1 (which is not stored, but assumed). E1 = 127 + 8 = 135 =
 11

(10000111)2 and E2 = 127 + 6 = 133 = (10000101)2

S E M
A 1 10000111 01011000010100000000000
B 0 10000101 11101110010000000000000

The first two steps in UML diagram is not needed. Since the operation is
subtraction, we change the sing of the second number.
.

S E M
A 1 10000111 01011000010100000000000
B 1 10000101 11101110010000000000000

We denormalize the numbers by adding the hidden 1’s to the mantissa and
incrementing the exponent. Now both denormalized mantissas are 24 bits
and include the hidden 1’s. They should store in a location to hold all 24
bits. Each exponent is incremented.

S E M
A 1 10001000 101011000010100000000000
B 1 10000110 111101110010000000000000

We align the mantissas. We increment the second exponent by 7 and shift

its mantissa to the right seven times.

S E M
A 1 10001000 101011000010100000000000
B 1 10001000 001111011100100000000000

Now we do sign-and-magnitude addition treating the sign and the mantissa

of each number as one integer stored in sign-and-magnitude representation.

S E Denormalized M
R 1 10001000 111010011111000000000000

There is no overflow in mantissa, so we normalized.

S E Denormalized M
R 1 10000111 11010011111000000000000

The mantissa is only 23 bits because there is no overflow, no rounding is

needed.
E = (10000111)2 = 135, M = 11010011111

The result is
12

(1.11010011111)2 × 2135−−127 = (111010011.111)2 = 467.875

P4-19. We assume that both operands are in the presentable range.
a. Overflow can occur because the magnitude of the result is greater than the
magnitude of each number and could fall out of the presentable range.
b. Overflow does not occur because the magnitude of the result is smaller
than one of the numbers; the result is in the presentable range.
a. When we subtract a positive integer from a negative integer, the magni-
tudes of the numbers are added. This is the negative version of case a.
Overflow can occur.
b. When we subtract two negative numbers, the magnitudes are subtracted
from each other. This is the negative version of case b. Overflow does not
occur.
P4-20. The result is a number with all 1’s which has the value of −0. For example, if
we add number (10110101) 2 in 8-bit allocation to its one’s complement
(01001010)2 we obtain

Decimal equivalent
1 0 1 1 0 1 0 1 -74
+ 0 1 0 0 1 0 1 0 +74
1 1 1 1 1 1 1 1 -0

We use this fact in the Internet checksum in Chapter 6.

P4-21. The result is a number with all 0’s which has the value of 0. For example, if
we add number (10110101) 2 in 8-bit allocation to its two’s complement
(01001011)2 we obtain

Decimal equivalent
1 1 1 1 1 1 1 1 Carry
1 0 1 1 0 1 0 1 -74
+ 0 1 0 0 1 0 1 1 +74
0 0 0 0 0 0 0 0 0

We use this fact in normal mathematical calculation in the computers.

 CHAPTER 5

Computer Organization
(Solutions to Review Questions and Problems)

Review Questions
Q5-1. The three subsystems are the central processing unit (CPU), the main memory,
and the input/output.
Q5-2. The CPU has an arithmetic logic unit (ALU), a control unit, and various kinds
of registers.
Q5-3. The ALU performs arithmetic and logical operations.
Q5-4. The control unit is responsible for controlling the operations of all other sub-
systems.
Q5-5. The main memory stores data and programs when the program is being exe-
cuted.
Q5-6. RAM is random access memory and can be read from and written to by the
user. ROM is read only memory. The contents of ROM are written by the
manufacturer and cannot be overwritten by the user. SRAM is static RAM that
uses flip-flop gates to hold data. DRAM is dynamic RAM that uses capacitors
to hold the data. PROM is programmable read only memory and can be pro-
grammed by the user using special equipment. EPROM is erasable PROM
and can be erased by the user using a special device that uses UV light.
EEPROM is electronically erasable PROM that can be reprogrammed while it
is still installed in the computer.
Q5-7. The cache memory provides the CPU with fast access to part of data stored in
main memory.
Q5-8. A magnetic disk consists of one or more disks with a magnetic coating and
one read/write head for each disk surface.
Q5-9. The surface of a magnetic disk is divided into circular rings called tracks.
Each track is divided into sections called sectors. The width of a magnetic
tape is divided into 9 tracks. The length of the tape may be divided into
blocks.
Q5-10. Data can be stored on a CD-R and a CD-RW by the user. The advantage of a
CD-RW is that it can be overwritten with new data. A DVD uses much
smaller pits and lands that allow the disk to hold much more data (4.7 GB to
17 GB) compared to a CD-ROM (650 MB).

1
2

Q5-11. An SCSI (small computer system interface) controller is a parallel interface

that provides a daisy chain connection between devices and the buses. The
FireWire interface is a high speed serial interface that transfers data in pack-
ets. It can use a daisy chain or tree configuration. USB is a serial controller
that connects both low and high-speed devices to the computer bus. Multiple
devices can be connected to a USB controller.
Q5-12. Isolated I/O uses a set of instructions to access memory and another set of
instructions to access I/O devices. Memory-mapped I/O uses the same set of
instructions to access memory and I/O devices.
Q5-13. In the programmed I/O method, the CPU waits for the I/O device. A lot of
CPU time is wasted by checking for the status of an I/O operation. In the inter-
rupt-driven I/O method, the I/O device informs the CPU of its status via an
interrupt. In direct memory access (DMA), the CPU sends its I/O requests to
the DMA controller which manages the entire transaction.
Q5-14. CISC (Complex Instruction Set Computer) has a large set of instructions to
execute commands at the machine level. This makes the circuitry of the CPU
and the control unit very complicated. RISC (Reduced Instruction Set Com-
puter) uses a small set of instructions. Complex operations are accomplished
using a set of simple commands.
Q5-15. Pipelining allows different types of phases belonging to different cycles to be
done simultaneously. Pipelining can increase the throughput of the computer.
Q5-16. A single computer can have multiple control units, multiple ALU units and
multiple memory units to perform several instructions in parallel. Parallel pro-
cessing increases the throughput of the computer.

Problems
P5-1. We have 64 MB /(4 bytes per word) = 16 Mega words = 16 × 220 = 24 × 220 =
224 words. Therefore, we need 24 bits to access memory words.
P5-2. We need 24 × 80 = 1920 bytes.
P5-3. We need 4 bits to determine the instruction (24 = 16). We need 4 bits to
address a register (24 = 16). We need 10 bits to address a word in memory (210
= 1024). The size of the instruction is therefore (4 + 4 + 10) or 18 bits.
P5-4. Since the size of the instruction is 18 bits (See Solution to Exercise 43), we
must have 18-bit data registers.
P5-5. The instruction register must be at least 18 bits long (See solution to Exercise
43).
P5-6. The program counter must be large enough to hold the address of a word in
memory. Therefore, it must be 10 bits (See Solution to Exercise 43).
P5-7. The data bus must be wide enough to carry the contents of one word in the
memory. Therefore, it must be 18 bits (See Solution to Exercise 43).
P5-8. The size of the address bus must be 10 bits (log21024) (See Solution to Exer-
cise 43).
 3

P5-9. The control bus should handle all instructions. The minimum size of the con-
trol bus is therefore 4 bits (log216) (See Solution to Exercise 43).
P5-10. The memory has 1024 words which is addressable by 10 bits. Since the sys-
tem uses isolated I/O, up to 10 bits can be used to address the I/O registers.
This means we can have up to 1024 registers. If each controller has 16 regis-
ters, then up to 1024/16 = 64 controllers can be accessed in this system.
P5-11. The address bus uses 10 lines which means that it can address 210 = 1024
words. Since the memory is made of 1000 words and the system uses shared
(memory-mapped I/O) addressing, 1024 − 1000 = 24 words are available for I/
O controllers. If each controller has 4 registers, then 24/4 = 6 controllers can
be accessed in this system.
P5-12. Table 5.1 shows the instruction codes, the first column is not part of the code;
it contains instruction addresses for reference. We type A, B, and C on the
keyboard (one at a time). The program reads and stores them as we press the
ENTER key.
Table 5.1 Solution to P5-12
(00)16 (1FFE)16 // RF ← MFE, Input A from keyboard to RF
(01)16 (240F)16 // M40 ← RF, Store A in M40
(02)16 (1FFE)16 // RF ← MFE, Input B from keyboard to R F
(03)16 (241F)16 // M41 ← RF, Store B in M41
(04)16 (1FFE)16 // RF ← MFE, Input C from keyboard to RF
(05)16 (242F)16 // M42 ← RF, Store C in M42
(06)16 (1040)16 // M40 ← R0, Load A from M40 to R0
(07)16 (1141)16 // M41 ← R1, Load B from M41 to R1
(08)16 (1242)16 // M42 ← R2, Load C from M42 to R2
(09)16 (3310)16 // R3 ← R1 +R0, Add A to B and store in R3
(0A)16 (3432)16 // R4 ← R3 +R2, Add C to (A + B) and store in R4
(0B)16 (2434)16 // M43 ←R4, Store The result in M 43
(0C)16 (1F43)16 // RF ← M43, Load the result to RF
(0D)16 (2FFF)16 // MFF ←RF, Send the result to the monitor
(0E)16 (0000)16 // Halt

P5-13. Table 5.2 shows the instruction codes, the first column is not part of the code;
it contains instruction addresses for reference. We type A on the keyboard.
The program reads and stores it as we press the ENTER key.
Table 5.2 Solution to P5-13
(00)16 (1FFE)16 // RF ← MFE, Input A from keyboard to RF
(01)16 (240F)16 // M40 ← RF, Store A in M40
(02)16 (1040)16 // M40 ← R0, Load A from M40 to R0
(03)16 (A000)16 // R0 ← R0 + 1, Increment A
(04)16 (A000)16 // R0 ← R0 + 1, Increment A
4

Table 5.2 Solution to P5-13

(05)16 (A000)16 // R0 ← R0 + 1, Increment A
(06)16 (2410)16 // M41 ← R0, Store The result in M41
(07)16 (1F41)16 // RF ← M41, Load the result to RF
(08)16 (2FFF)16 // MFF ← RF, Send the result to the monitor
(09)16 (0000)16 // Halt

P5-14. The following shows the instructions. The first column is not part of the code;
it contains the instruction addresses for reference. We type A on the keyboard.
The program reads and stores it as we press the ENTER key.
Table 5.3 Solution to P5-14
(00)16 (1FFE)16 // RF ← MFE, Input A from keyboard to RF
(01)16 (240F)16 // M40 ← RF, Store A in M40
(02)16 (1040)16 // M40 ← R0, Load A from M40 to R0
(03)16 (B000)16 // R0 ← R0 - 1, Decrement A
(04)16 (A000)16 // R0 ← R0 - 1, Decrement A
(05)16 (2410)16 // M41 ← R0, Store The result in M41
(06)16 (1F41)16 // RF ← M41, Load the result to RF
(07)16 (2FFF)16 // MFF ← RF, Send the result to the monitor
(08)16 (0000)16 // Halt

P5-15. Table 5.4 shows the instructions. The first column is not part of the code; it
contains the instruction addresses for reference. First, we type 0 and n (n has a
minimum value of 2) from the key board. The program reads and stores them
in registers R0 and R1 as we press the ENTER key. We then type the first num-
ber and press ENTER. The program stores the first number in register R2. The
program then decrements R1 twice. We type the second number which is
stored in register R3. The program adds the content of R2 and R3 and stores
the result in register R2. The program then compares the value of R1 with R0,
If they are the same, it displays the result on the monitor and halts; otherwise,
it jumps back to the second decrement statement and continues.
Table 5.4 Solution to P5-15
(00)16 (10FE)16 // RF ← MFE, Input 0 from keyboard to R0
(01)16 (11FE)16 // RF ← MFE, Input n from keyboard to R1
(02)16 (12FE)16 // RF ← MFE, Input the first number to R2
(03)16 (B100)16 // R1 ←R1 - 1 Decrement R1
(04)16 (B100)16 // R1 ←R1 - 1 Decrement R1
(05)16 (13FE)16 // RF ← MFE, Input the next number to R 3
(06)16 (3223)16 // R2 ←R2 + R3 Add R 3 to R2 and store in R2
(07)16 (D104)16 // If R0 ≠ R1 the PC = 04, otherwise continue
(08)16 (2FF2)16 // MFF ← R2, Send the result to the monitor
(09)16 (0000)16 // Halt
 5

P5-16. Table 5.5 shows the instructions. The first column is not part of the code; it
contains the instruction addresses for reference. We first type 0 and then the
two integers on the keyboard (the first integer has a value of 0 or 1). The pro-
gram reads and stores them on R0, R1 and R2 as we press the ENTER key.
Table 5.5 Solution to P5-16
(00)16 (10FE)16 // RF ← MFE, Input 0 from keyboard to R0
(01)16 (11FE)16 // RF ← MFE, Input the first integer to R1
(02)16 (12FE)16 // RF ←MFE, Input the second integer to R2
(03)16 (D108)16 // If R0 ≠ R1 then PC = 08, otherwise continue
(04)16 (A200)16 // R2 ← R2 + 1
(05)16 (2FF2)16 // MFF ← R2, Send the result to the monitor
(06)16 (A100)16 // R1 ← R1 + 1
(07)16 (D10A)16 // If R0 ≠ R1 then PC = 0A, otherwise continue
(08)16 (B200)16 // R 2 ← R2 - 1
(09)16 (2FF2)16 // MFF ← R2, Send the result to the monitor
(0A)16 (0000)16 // Halt
 CHAPTER 6

Computer Networks and Internet

(Solutions to Review Questions and Problems)

Review Questions
Q6-1. To make the communication bidirectional, each layer needs to be able to pro-
vide two opposite tasks, one in each direction.
Q6-2. The identical objects are the two messages: one sent and one received.
Q6-3.
a. At the application layer, the unit of data is a message.
b. At the network layer, the unit of data is a datagram.
c. At the data-link layer, the unit of data is a frame.
Q6-4. A frame is a link-layer data unit. It encapsulates a data unit coming from the
network layer. In this case, the data unit is a datagram.
Q6-5. A user datagram is a transport-layer data unit. It decapsulates a data unit going
to the application layer. In this case, the data unit is a message.
Q6-6. The data unit should belong to layer 4. In this case, it is a user datagram.
Q6-7.
a. At the application layer, we normally use a name to define the destination
computer name and the name of the file we need to access. An example is
something@somewhere.com.
b. At the network layer, we use two logical addresses (source and destination)
to define the source and destination computers. These addresses are unique
universally.
c. At the data-link layer, we use two link-layer addresses (source and destina-
tion) to define the source and destination connections to the link.
Q6-8. Probably Alice turned off her desktop, which stopped the FTP server, when
she left the office. A server process should be running all the time, waiting for
clients to access it.
Q6-9. A personal computer, such as a desktop or a laptop, is normally used as a cli-
ent. If a business needs to use a computer as a server, it should be more power-
ful to allow several connections from clients at the same time.
Q6-10. In this case, UDP is more appropriate because it does not have the overhead of
TCP in connection establishment and teardown.

1
2

Q6-11. Routing cannot be done at the transport layer, because the communication at
the transport layer is one single logical path between the source port and the
destination port. Routing cannot be done at the data-link layer because the
communication at the data-link layer is between two nodes (one single path);
there is no need for routing. On the other hand, there are several possible paths
for a packet between the source host and destination host at the network layer.
Routing is the job of selecting one of these paths for the packet.
Q6-12. Communication at the network layer is host-to-host; communication at the
data-link layer is node-to-node.
Q6-13. Dial-up modems use part of the bandwidth of the local loop to transfer data.
The latest dial-up modems use the V-series standards such as V.90 (56 kbps
for downloading and 33.6 kbps for uploading), and V.92 (56 kbps for down-
loading and 48 kbps for uploading).
Q6-14. A Bluetooth network is normally a wireless small network that is more suited
to communication in a personal environment; a wireless local area can cover a
larger geographical areas such as a building or an office.
Q6-15. The period of a signal is the inverse of its frequency: T = 1/f.
Q6-16. The amplitude measures the value of the signal at any point.
Q6-17. Normally, analog transmission refers to the transmission of analog signals
using a band-pass channel. Baseband digital or analog signals are converted to
a complex analog signal with a range of frequencies suitable for the channel.
Q6-18. The transmission media is located beneath the physical layer and controlled
by the physical layer.
Q6-19. The two major categories are guided and unguided media.
Q6-20. The three major categories of guided media are twisted-pair, coaxial, and
fiber-optic cables.
Problems
P6-1. The services provided in part a and part b are the opposite of each other.
a. Layer 1 takes the ciphertext from layer 2, inserts (encapsulates) it in an
envelope and sends it.
b. Layer 1 receives the mail, removes (decapsulates) the ciphertext from the
envelope and delivers it to layer 2.
P6-2. The services provided in part a and part b are the opposite of each other.
a. Layer 2 takes the plaintext from layer 3, encrypts it, and delivers it to layer
1.
b. Layer 2 takes the ciphertext from layer 1, decrypts it, and delivers it to
layer 3.
P6-3. In 10 years, the number of hosts becomes about six times (1.2010 ? 6.19) the-
number in 2010. This means the number of hosts connected to the Internet is
more than three billion.
P6-4. The system transmits 150 bytes for a 100-byte message. The efficiency is 100/
150 or 66.66%.
P6-5.
 3

a. The network layer is responsible for route determination.

b. The physical layer is the only layer that is connected to the transmission
media.
c. The application layer provides services for the end users.
P6-6.
a. User datagrams are created at the transport layer.
b. The data-link layer is responsible for handling frames between adjacent-
nodes.
c. The physical layer is responsible for transforming bits to electromagnetic
signals.
P6-7. Figure 6.1 shows the layers. Note that we have not shown the security check-
ing that you need to pass through because it does not have the counterpart
when you arrive. It must be included in baggage/checking layer.

Figure 6.1 Solution to P6-7

Source/destination Source/destination
airport airport
Baggage Baggage
checking/claiming checking/claiming
Boarding/unboarding Boarding/unboarding

Takeoff/Landing Takeoff/Landing
Flying

P6-8. The only two layers that need to be changed are the data-link layer and the
physical layer. The new hardware and software need to be installed in all host,
routers, and link-layer switches. As long as the new data-link layer can enca
sulate and decapsulate datagrams from the network layer, there is no need to
change any protocol in the upper three layers. This is one of the characteristics
of the protocol layering.
P6-9. The domain of IP addresses is universal. A device directly connected to the
Internet needs a unique IP address. The domain of port numbers is local; they
can be repeated. Two computers running the HTTP server process use the
same well-known port number (80); two computers running the HTTP client
process can use the same ephemeral port number.
P6-10. We change each byte to the corresponding binary representation:
a. 01101110 00001011 00000101 01011000
b. 00001100 01001010 00010000 00010010
c. 11001001 00011000 00101100 00100000
P6-11. We change each 8-bit section to the corresponding decimal value and insert
dots between the bytes.
a. 94.176.117.21
b. 137.142.208.49
4

c. 87.132.55.15
P6-12. We interpret each four-bit pattern as a hexadecimal digit. We then group the
hexadecimal digits with a colon between the pairs:

5A:11:55:1B:AA:0F

P6-13.
a. (10 / 1000) s = 0.01 s
b. (8 / 1000) s = 0. 008 s = 8 ms
c. ((100,000 ⋅ 8) / 1000) s = 800 s