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Assignment 4
Assignment 4
Assignment 4
Kamra
Department of Electrical Engineering
Assignment # 04
Course: Digital Logic Design (EE-223) Semester: Fall 2023
Date: 04th December. 2023 Total Marks: 40
Q 2. The adder-subtractor circuit shown below has the following values for mode input M and
data inputs A and B.
M A B
1 1100 1000
1 0101 1010
1 0000 0001
In each case, Analyze and determine the values of the four SUM outputs, the carry C,
and overflow V. Points (20)